High-frequency module and communication device

Abstract

Provided is a high-frequency module which is provided with an IC chip including a low-noise amplifier and which is capable of reducing signal interference. The high-frequency module includes a mounting substrate and an IC chip. The IC chip includes a plurality of switches and a plurality of low noise amplifiers. The mounting substrate includes a first ground layer (23), a second ground layer, a first via conductor group, and a second via conductor group. The first ground layer (23) has a plurality of slits (27). The plurality of slits (27) include a first slit (271) and a second slit (272). The first slit (271) is disposed between the first via conductor (V11) and the third via conductor (V21) in plan view from the thickness direction (D1) of the mounting substrate (2). The second slit (272) is disposed between the second via conductor (V12) and the fourth via conductor (V22) in plan view from the thickness direction (D1) of the mounting substrate (2).

Description

Technical Field

[0001] The present invention relates to a high-frequency module and a communication device, and more particularly to a high-frequency module including an IC chip having a low-noise amplifier and a communication device including the high-frequency module. Background Art

[0002] Patent Document 1 discloses a high-frequency module including a semiconductor element (IC chip) having a transmission power amplifier. In the high-frequency module described in Patent Document 1, a noise-preventing ground pattern is disposed between two voltage supply lines that supply voltage to one transmission power amplifier. Further, in the noise-preventing ground pattern described in Patent Document 1, a slit is provided between two regions facing the two voltage supply lines.

[0003] Patent Document 1: Japanese Patent Application Laid-Open No. 2005-217581

[0004] In the high-frequency module described in Patent Document 1, when the IC chip includes a low-noise amplifier, there is a case where signal interference occurs not only between the voltage supply lines but also between the paths of received signals. Summary of the Invention

[0005] An object of the present invention is to reduce signal interference in a high-frequency module including an IC chip having a low-noise amplifier and a communication device including the high-frequency module.

[0006] One embodiment of the high-frequency module of the present invention includes a mounting substrate and an IC chip. The mounting substrate is a multi-layer substrate having a first main surface and a second main surface facing each other. The IC chip is disposed on the first main surface of the mounting substrate. The IC chip includes a plurality of switches and a plurality of low-noise amplifiers. The plurality of low-noise amplifiers are connected to the plurality of switches one-to-one. The plurality of switches include a first switch and a second switch. The plurality of low-noise amplifiers include a first low-noise amplifier and a second low-noise amplifier. The first low-noise amplifier is connected to the first switch. The second low-noise amplifier is connected to the second switch. The mounting substrate includes a first ground layer, a second ground layer, a first via conductor group, a second via conductor group, and a third via conductor group. The first ground layer is disposed between the first main surface and the second main surface. The second ground layer is disposed between the first ground layer and the second main surface. The first via conductor group connects the plurality of switches to the first ground layer. The second via conductor group connects the plurality of low-noise amplifiers to the first ground layer. The third via conductor group connects the first ground layer to the second ground layer. The first ground layer has a plurality of slits. The third via conductor group is disposed around the first via conductor group and the second via conductor group when viewed from above in the thickness direction of the mounting substrate. The first via conductor group includes a first via conductor and a second via conductor. The first via conductor is connected to the first switch. The second via conductor is connected to the second switch. The second via conductor group includes a third via conductor and a fourth via conductor. The third via conductor is connected to the first low-noise amplifier. The fourth via conductor is connected to the second low-noise amplifier. The plurality of slits include a first slit and a second slit. The first slit is disposed between the first via conductor and the third via conductor when viewed from above in the thickness direction of the mounting substrate. The second slit is disposed between the second via conductor and the fourth via conductor when viewed from above in the thickness direction of the mounting substrate. The first via conductor, the first slit, and the third via conductor are disposed adjacent to the second via conductor, the second slit, and the fourth via conductor.

[0007] One embodiment of the communication device of the present invention includes the high-frequency module and a signal processing circuit connected to the high-frequency module.

[0008] According to one embodiment of the high-frequency module and the communication device of the present invention, interference of signals can be reduced. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1 It is a cross-sectional view of the main part of the high-frequency module of Embodiment 1.

[0010] Figure 2 It is a perspective top view of the IC chip in the high-frequency module described above.

[0011] Figure 3 It is a top view of the mounting substrate in the high-frequency module described above.

[0012] Figure 4 It is a top view of the first ground layer in the high-frequency module described above.

[0013] Figure 5 It is a top view of the second ground layer in the high-frequency module described above.

[0014] Figure 6 It is an enlarged top view of the first ground layer in the high-frequency module described above.

[0015] Figure 7 It is a circuit structure diagram of the communication device equipped with the high-frequency module described above.

[0016] Figure 8 It is a top view of the first ground layer in the high-frequency module of Embodiment 2.

[0017] Figure 9 It is a top view of the first ground layer in the high-frequency module of Embodiment 3.

[0018] Figure 10 It is a cross-sectional view of the main part of the high-frequency module of Embodiment 4.

[0019] Figure 11 It is a top view of the second ground layer in the high-frequency module described above.

[0020] Explanation of reference numerals

[0021] 1... High-frequency module, 2... Mounting substrate, 21... First main surface, 22... Second main surface, 23... First ground layer, 24... Second ground layer, 25, 26... Conductor portions, 27... Slit, 27a... Slit (slit, first slit), 271... Slit (first slit), 272... Slit (second slit), 273, 274, 275, 276... Slits, 28... First portion, 281, 282, 283, 284... First portions, 29... Slit, 291, 292, 293, 294... Slits, 10... IC chip, 193... Control circuit, 11... Switch, 110... Common terminal, 111, 112, 113, 114... Selection terminals, 121, 122, 123, 124... Receiving filters, 13... Switch, 131... Switch (first switch), 1310... Common terminal, 1311, 1312... Selection terminals, 132... Switch (second switch), 1320... Common terminal, 1321, 1322... Selection terminals, 133, 134... Switches, 14... Matching circuit, 141, 142... Matching circuits, 15... Low-noise amplifier, 151... Low-noise amplifier (first low-noise amplifier), 152... Low-noise amplifier (second low-noise amplifier), 153, 154... Low-noise amplifiers, 16... Inductor, 161, 162, 163, 164... Inductors, 17... Switch, 171, 172... Selection terminals, 173, 174... Common terminals, 18... External connection terminal, 181... Antenna terminal, 182... First signal output terminal, 183... Second signal output terminal, 100... Communication device, 101... Antenna, 19... Signal processing circuit, 191... RF signal processing circuit, 192... Baseband signal processing circuit, d1... Distance, D1... First direction, D2... Second direction, D3... Third direction, V1... Through-hole conductor, V11... Through-hole conductor (first through-hole conductor), V12... Through-hole conductor (second through-hole conductor), V13, V14, V15, V16... Through-hole conductors, V2... Through-hole conductor, V21... Through-hole conductor (third through-hole conductor), V22... Through-hole conductor (fourth through-hole conductor), V23, V24, V25, V26... Through-hole conductors, V3... Through-hole conductor, V4... Through-hole conductor, V5... Through-hole conductor, W1... Width, W2... Length. Detailed implementation mode

[0022] Hereinafter, the high-frequency module and the communication device of the embodiment will be described with reference to the drawings. Each of the drawings referred to in the following embodiments is a schematic diagram, and the ratio of the sizes and thicknesses of the respective components in the drawings does not necessarily reflect the actual dimensional ratio.

[0023] (Embodiment 1)

[0024] (1) High-frequency module

[0025] As shown Figure 7 in FIG. 1, the high-frequency module 1 is used, for example, in the communication device 100. The communication device 100 is, for example, a mobile phone such as a smart phone. In addition, the communication device 100 is not limited to a mobile phone and may be, for example, a wearable terminal such as a smart watch. The high-frequency module 1 is, for example, a high-frequency module capable of supporting 4G (Fourth Generation Mobile Communication) standards, 5G (Fifth Generation Mobile Communication) standards, etc. The 4G standard is, for example, the 3GPP (registered trademark, Third Generation Partnership Project) LTE (registered trademark, Long Term Evolution) standard. The 5G standard is, for example, 5G NR (New Radio). The high-frequency module 1 can support, for example, Carrier Aggregation and Dual Connectivity.

[0026] The high-frequency module 1 is provided, for example, in the communication device 100 corresponding to multiple frequency bands according to communication standards such as LTE. The high-frequency module 1 can, for example, assign different frequencies to the transmission signal (transmission high-frequency signal) and the reception signal (reception high-frequency signal) through FDD (Frequency Division Duplex) to achieve two-way transmission of full-duplex communication.

[0027] (2) Circuit Structure of High-Frequency Module

[0028] Hereinafter, Figure 7 the circuit structure of the high-frequency module 1 of Embodiment 1 will be described.

[0029] As shown Figure 7 in FIG. 2, the high-frequency module 1 of Embodiment 1 includes, for example, a plurality of external connection terminals 18, a switch 11, a plurality of (four in Figure 7 FIG. 2) reception filters 121 to 124, a plurality of (two in Figure 7 FIG. 2) switches 13, a plurality of (two in Figure 7 FIG. 2) matching circuits 14, a plurality of (two in Figure 7 FIG. 2) low-noise amplifiers 15, a plurality of (two in Figure 7 FIG. 2) inductors 16, and a switch 17. The plurality of external connection terminals 18 include an antenna terminal 181, a first signal output terminal 182, and a second signal output terminal 183.

[0030] Here, a plurality of switches 13, a plurality of matching circuits 14, a plurality of low-noise amplifiers 15, and a plurality of inductors 16 are connected one-to-one. That is, the switch 131, the matching circuit 141, the low-noise amplifier 151, and the inductor 161 are connected to each other. In addition, the switch 132, the matching circuit 142, the low-noise amplifier 152, and the inductor 162 are connected to each other.

[0031] (2.1) Low-noise amplifier

[0032] The plurality of low-noise amplifiers 15 are respectively amplifiers for amplifying received signals. The plurality of low-noise amplifiers 15 respectively have an input terminal (not shown) and an output terminal (not shown).

[0033] The input terminal of the low-noise amplifier 151 is connected to the signal processing circuit 19 via the switch 17. The output terminal of the low-noise amplifier 151 is connected to the switch 131 via the matching circuit 141.

[0034] The input terminal of the low-noise amplifier 152 is connected to the signal processing circuit 19 via the switch 17. The output terminal of the low-noise amplifier 152 is connected to the switch 132 via the matching circuit 142.

[0035] (2.2) Receive filter

[0036] The plurality of receive filters 121 to 124 are respectively filters that allow received signals to pass through. The plurality of receive filters 121 to 124 are, for example, each an elastic wave filter including a plurality of series arm resonators and a plurality of parallel arm resonators. The elastic wave filter is, for example, a SAW (Surface Acoustic Wave) filter that utilizes surface acoustic waves. The receive filters 121 to 124 respectively have an input terminal (not shown) and an output terminal (not shown).

[0037] The input terminal of the receive filter 121 is connected to the antenna terminal 181 via the switch 11. The output terminal of the receive filter 121 is connected to the low-noise amplifier 151 via the switch 131.

[0038] The input terminal of the receive filter 122 is connected to the antenna terminal 181 via the switch 11. The output terminal of the receive filter 122 is connected to the low-noise amplifier 151 via the switch 131.

[0039] The input terminal of the receive filter 123 is connected to the antenna terminal 181 via the switch 11. The output terminal of the receive filter 123 is connected to the low-noise amplifier 152 via the switch 132.

[0040] The input terminal of the receive filter 124 is connected to the antenna terminal 181 via the switch 11. The output terminal of the receive filter 124 is connected to the low-noise amplifier 152 via the switch 132.

[0041] (2.3) Switch

[0042] The switch 11 switches the filter connected to the antenna terminal 181 from among the plurality of receive filters 121 to 124. The switch 11 has a common terminal 110 and selection terminals 111 to 114. The common terminal 110 is connected to the antenna terminal 181. The selection terminal 111 is connected to the receive filter 121. The selection terminal 112 is connected to the receive filter 122. The selection terminal 113 is connected to the receive filter 123. The selection terminal 114 is connected to the receive filter 124.

[0043] (2.4) Switch

[0044] The plurality of switches 13 switch the filters connected to each of the plurality of low-noise amplifiers 15. The plurality of low-noise amplifiers 15 are connected to the plurality of switches 13 on a one-to-one basis. More specifically, the switch 131 is connected to the low-noise amplifier 151. The switch 132 is connected to the low-noise amplifier 152.

[0045] The switch 131 switches the filter connected to the low-noise amplifier 151 from among the plurality of receive filters 121 to 122. The switch 131 has a common terminal 1310 and selection terminals 1311, 1312. The common terminal 1310 is connected to the low-noise amplifier 151 via the matching circuit 141. The selection terminal 1311 is connected to the receive filter 121. The selection terminal 1312 is connected to the receive filter 122.

[0046] The switch 132 switches the filter connected to the low-noise amplifier 152 from among the plurality of receive filters 123 to 124. The switch 132 has a common terminal 1320 and selection terminals 1321, 1322. The common terminal 1320 is connected to the low-noise amplifier 152 via the matching circuit 142. The selection terminal 1321 is connected to the receive filter 123. The selection terminal 1322 is connected to the receive filter 124.

[0047] The plurality of switches 13 each have a ground terminal (not shown).

[0048] (2.5) Switch

[0049] The switch 17 switches the low-noise amplifiers respectively connected to the first signal output terminal 182 and the second signal output terminal 183 from among the plurality of low-noise amplifiers 15. The switch has common terminals 173, 174 and selection terminals 171, 172. The common terminal 173 is connected to the first signal output terminal 182. The common terminal 174 is connected to the second signal output terminal 183. The selection terminal 171 is connected to the low-noise amplifier 151. The selection terminal 172 is connected to the low-noise amplifier 152.

[0050] (2.6) Matching circuit

[0051] The matching circuit 141 is a circuit for achieving impedance matching between the output terminal of the low-noise amplifier 151 and the common terminal 1310 of the switch 131. The matching circuit 141 includes at least one of one or more capacitors and one or more inductors.

[0052] The matching circuit 142 is a circuit for achieving impedance matching between the output terminal of the low-noise amplifier 152 and the common terminal 1320 of the switch 132. The matching circuit 142 includes at least one of one or more capacitors and one or more inductors.

[0053] (2.7) Inductor

[0054] A plurality of inductors 16 correspond one-to-one with the plurality of low-noise amplifiers 15.

[0055] The inductor 161 is an inductor connected between the ground terminal of the low-noise amplifier 151 and the ground wire between the matching circuit 141 and the ground wire.

[0056] The inductor 162 is an inductor connected between the ground terminal of the low-noise amplifier 152 and the ground terminal of the matching circuit 142 and the ground wire.

[0057] (3) Structure of the high-frequency module

[0058] Hereinafter, the structure of the high-frequency module 1 according to Embodiment 1 will be described with reference to the drawings.

[0059] For example, as Figure 1 shown, the high-frequency module 1 according to Embodiment 1 includes a mounting substrate 2 and an IC chip 10.

[0060] (3.1) Mounting substrate

[0061] As Figure 1 shown, the mounting substrate 2 has a first main surface 21 and a second main surface 22. The first main surface 21 and the second main surface 22 face each other in the first direction D1.

[0062] The IC chip 10 is disposed on the first main surface 21 of the mounting substrate 2.

[0063] The mounting substrate 2 is, for example, a multilayer substrate including a plurality of dielectric layers and a plurality of conductive layers. The plurality of dielectric layers and the plurality of conductive layers are stacked in the first direction D1. The plurality of conductive layers are formed in a prescribed pattern for each layer. The plurality of conductive layers each include one or more conductor portions in a plane orthogonal to the first direction D1. The material of each conductive layer is, for example, copper. The plurality of conductive layers include a plurality of ground layers to which a ground potential is given. The plurality of ground layers include a first ground layer 23 and a second ground layer 24. That is, the mounting substrate 2 includes the first ground layer 23 and the second ground layer 24. The first ground layer 23 is disposed between the first main surface 21 and the second main surface 22. The second ground layer 24 is disposed between the first ground layer 23 and the second main surface 22. In other words, in the first direction D1, the first main surface 21, the first ground layer 23, the second ground layer 24, and the second main surface 22 are arranged in sequence. When viewed from above in the first direction D1, the area of the conductor portion having a ground potential in each of the first ground layer 23 and the second ground layer 24 is 50% or more. In the high-frequency module 1, a plurality of ground terminals are electrically connected to the ground layer via through-hole conductors or the like of the mounting substrate 2.

[0064] The mounting substrate 2 is, for example, an LTCC (Low Temperature Co-fired Ceramics) substrate. The mounting substrate 2 is not limited to an LTCC substrate, and may be, for example, an HTCC (High Temperature Co-fired Ceramics) substrate, a printed wiring board, or a resin multilayer substrate.

[0065] In addition, the mounting substrate 2 is not limited to an LTCC substrate, and may be, for example, a wiring structure. The wiring structure is, for example, a multilayer structure. The multilayer structure includes at least one insulating layer and at least one conductive layer. The insulating layer is formed in a prescribed pattern. When the number of insulating layers is plural, the plurality of insulating layers are formed in a prescribed pattern for each layer. The conductive layer is formed in a prescribed pattern different from the prescribed pattern of the insulating layer. When the number of conductive layers is plural, the plurality of conductive layers are formed in a prescribed pattern for each layer. The conductive layer may include one or more rewiring portions. In the wiring structure, of the two surfaces facing each other in the thickness direction of the multilayer structure, the first surface is the first main surface 21 of the mounting substrate 2, and the second surface is the second main surface 22 of the mounting substrate 2. The wiring structure may also be, for example, an interposer. The interposer may be an interposer using a silicon substrate or a substrate composed of multiple layers.

[0066] (3.2) IC chip

[0067] The IC chip 10 is disposed on the first main surface 21 of the mounting substrate 2. The IC chip 10 has, for example, a rectangular shape that is longer in the third direction D3 when viewed from above in the first direction D1. Here, the second direction D2 and the third direction D3 are orthogonal to each other and are both orthogonal to the first direction D1.

[0068] The IC chip 10 includes, for example, elements respectively provided in a plurality of receiving paths in the high-frequency module. More specifically, as Figure 2 shown, the IC chip 10 includes a plurality of (four in Figure 3 ) switches 13 and a plurality of (four in Figure 3 ) low-noise amplifiers 15. The IC chip 10 further includes a plurality of (four in Figure 3 ) inductors 16, a switch 17, and a control circuit 193.

[0069] The plurality of switches 13 correspond one-to-one with the plurality of low-noise amplifiers 15 as described above. The plurality of switches 13 include switches 131 to 134. The plurality of low-noise amplifiers 15 include low-noise amplifiers 151 to 154. The low-noise amplifier 151 is connected to the switch 131. The low-noise amplifier 152 is connected to the switch 132. The low-noise amplifier 153 is connected to the switch 133. The low-noise amplifier 154 is connected to the switch 134. The switch 131 corresponds to the first switch of the present disclosure, and the switch 132 corresponds to the second switch of the present disclosure. The low-noise amplifier 151 corresponds to the first low-noise amplifier of the present disclosure, and the low-noise amplifier 152 corresponds to the second low-noise amplifier of the present disclosure.

[0070] The inductor 16 is composed of, for example, a plurality of patterned conductors arranged along the first direction D1 and via conductors connecting two adjacent patterned conductors in the first direction D1. The plurality of patterned conductors are, for example, L-shaped, linear, arc-shaped, etc. The winding axis of the inductor 16 is, for example, in the direction along the first direction D1. The control circuit 193 is, for example, a circuit that supplies power to the low-noise amplifier 15 and controls the switches 13 and 17.

[0071] The IC chip 10 is, for example, flip-chip mounted on the first main surface 21 of the mounting substrate 2. The IC chip 10 is connected to the mounting substrate 2 through a plurality of conductive bumps. The material of the conductive bumps is, for example, solder, gold, or copper.

[0072] (4) Details of the mounting substrate

[0073] (4.1) Arrangement of via conductors

[0074] Hereinafter, Figures 1 to 5 will be used to explain in detail the structure of the high-frequency module 1. Here, Figures 2 to 5 shows the overlapping regions when viewed from above in the first direction D1. In addition,Figures 2 to 5 Each X1-X1 cross-section corresponds to Figure 1 In addition,[[]] Figure 4 The dot area of [[ ]] shows the existence area of the first ground layer 23. Additionally,[[]] Figure 5 The dot area of [[ ]] shows the existence area of the second ground layer 24. In other words,[[]] Figure 4 and[[]] Figure 5 The dot area of [[ ]] does not show the cross-section of the first ground layer 23 and the second ground layer 24 but shows the surface.[[]]

[0075] A plurality of conductor portions 25 are arranged on the first main surface 21 of the mounting substrate 2. In addition, the mounting substrate 2 has a plurality of via conductors V1 to V5. The plurality of via conductors V1 to V5 include a plurality of via conductors V1, a plurality of via conductors V2, a plurality of via conductors V3, a plurality of via conductors V4, and a plurality of via conductors V5. The plurality of via conductors V1 constitute a first via conductor group. The plurality of via conductors V2 constitute a second via conductor group. The plurality of via conductors V3 constitute a third via conductor group.[[]]

[0076] The plurality of conductor portions 25 are arranged on the first main surface 21 of the mounting substrate 2. The plurality of conductor portions 25 each have a first end and a second end. The first ends of the plurality of conductor portions 25 are respectively connected to the IC chip 10. The second ends of the plurality of conductor portions 25 are respectively connected to other electronic components (not shown) arranged on the first main surface 21 of the mounting substrate 2. The plurality of conductor portions 25 include, for example, signal wiring portions that input signals from the reception filters 121 to 124 to the plurality of switches 13. In addition, the plurality of conductor portions 25 include, for example, voltage wiring portions that supply voltage for driving the IC chip 10.[[]]

[0077] As[[]] Figure 1 and[[]] Figures 3 to 5 shown, the plurality of via conductors V1 included in the first via conductor group respectively connect the first main surface 21 and the first ground layer 23 in the thickness direction of the mounting substrate 2, that is, the first direction D1. The plurality of via conductors V1 are, for example, cylindrical. The first ends of the plurality of via conductors V1 are arranged on the first main surface 21 of the mounting substrate 2 and are connected to the plurality of switches 13 included in the IC chip 10 one-to-one. The second ends of the plurality of via conductors V1 are connected to the first ground layer 23. That is, the first via conductor group connects the plurality of switches 13 and the first ground layer 23. More specifically, the via conductor V11 is connected to the switch 131. The via conductor V12 is connected to the switch 132. The via conductor V13 is connected to the switch 133. The via conductor V14 is connected to the switch 134. The via conductor V11 corresponds to the first via conductor of the present disclosure. The via conductor V12 corresponds to the second via conductor of the present disclosure.[[]]

[0078] As[[]] Figures 3 to 5As shown, the plurality of via conductors V2 included in the second via conductor group respectively connect the first main surface 21 and the first ground layer 23 in the thickness direction of the mounting substrate 2, that is, the first direction D1. The plurality of via conductors V2 are, for example, cylindrical respectively. The first ends of the plurality of via conductors V2 are respectively arranged on the first main surface 21 of the mounting substrate 2 and are connected to the plurality of low-noise amplifiers 15 included in the IC chip 10 one-to-one. More specifically, the plurality of via conductors V2 are connected to the plurality of inductors 16 connected to the plurality of low-noise amplifiers 15. The second ends of the plurality of via conductors V2 are connected to the first ground layer 23. That is, the second via conductor group connects the plurality of low-noise amplifiers 15 and the first ground layer 23. More specifically, the via conductor V21 is connected to the low-noise amplifier 151. The via conductor V22 is connected to the low-noise amplifier 152. The via conductor V23 is connected to the low-noise amplifier 153. The via conductor V24 is connected to the low-noise amplifier 154. The via conductor V21 corresponds to the third via conductor of the present disclosure. The via conductor V22 corresponds to the fourth via conductor of the present disclosure.

[0079] The plurality of via conductors V1 included in the first via conductor group and the plurality of via conductors V2 included in the second via conductor group correspond one-to-one. Here, the correspondence between one via conductor V1 and one via conductor V2 means that the switch 13 connected to one via conductor V1 and the low-noise amplifier 15 connected to one via conductor V2 are connected to each other. More specifically, the via conductor V11 corresponds to the via conductor V21. The via conductor V12 corresponds to the via conductor V22. The via conductor V13 corresponds to the via conductor V23. The via conductor V14 corresponds to the via conductor V24.

[0080] Here, when viewed from the first direction D1, the first via conductor group and the second via conductor group are respectively arranged at the ends of the IC chip 10. "When viewed from the first direction D1, the first via conductor group and the second via conductor group are arranged at the ends of the IC chip 10" means that the distance of each of the plurality of via conductors V1 and each of the plurality of via conductors V2 from the outer edge of the IC chip 10 is less than or equal to 1 / 2 of the short side of the IC chip 10. More specifically, as Figure 3 and Figure 4 shown, each of the plurality of via conductors V1 and each of the plurality of via conductors V2 are arranged along one end (upper side on the paper surface) in the second direction D2 of the IC chip 10.

[0081] In addition, each of the plurality of via conductors V1 and each of the plurality of via conductors V2 are alternately arranged when viewed from the first direction D1. More specifically, in the third direction D3, they are arranged in the order of the via conductor V11, the via conductor V21, the via conductor V12, the via conductor V22, the via conductor V13, the via conductor V23, the via conductor V14, and the via conductor V24.

[0082] The third through-hole conductor group connects the first ground layer 23 and the second ground layer 24 in the thickness direction of the mounting substrate 2, that is, the first direction D1. More specifically, as Figure 1 , Figure 4 and Figure 5 shown, a plurality of through-hole conductors V3 included in the third through-hole conductor group connect the first ground layer 23 and the second ground layer 24 in the first direction D1, respectively. The plurality of through-hole conductors V3 are, for example, cylindrical. The first ends of the plurality of through-hole conductors V3 are each connected to the first ground layer 23. The second ends of the plurality of through-hole conductors V3 are each connected to the second ground layer 24. The third through-hole conductor group is arranged around the first through-hole conductor group and the second through-hole conductor group. More specifically, as Figure 4 shown, the density of the plurality of through-hole conductors V3 is greater around the through-hole conductor V1 or the through-hole conductor V2 than outside the periphery of the through-hole conductor V1 or the through-hole conductor V2. Thereby, the potential difference in the first ground layer 23 can be reduced, and the potential of the first ground layer 23 can be made closer to the ground potential.

[0083] As Figures 3 to 5 shown, a plurality of through-hole conductors V4 penetrate the mounting substrate 2 at least from the first main surface 21 to the second ground layer 24 in the first direction D1. The plurality of through-hole conductors V4 are, for example, cylindrical. The first ends of the plurality of through-hole conductors V4 are arranged on the first main surface 21 of the mounting substrate 2 and are connected to the IC chip 10. As Figure 5 shown, the second ends of the plurality of through-hole conductors V4 are connected to a conductor portion 26 on the same plane as the second ground layer 24, or to a conductor portion (not shown) on the second main surface 22 side compared to the second ground layer 24. In addition, each of the plurality of through-hole conductors V4 does not contact the first ground layer 23 and the second ground layer 24. The plurality of through-hole conductors V4, for example, include a wiring portion for inputting a signal from the switch 17 to the external connection terminal 18. Further, the plurality of through-hole conductors V4, for example, include a power supply circuit for supplying a voltage for driving the IC chip 10.

[0084] As Figures 3 to 5 shown, a plurality of through-hole conductors V5 connect the first main surface 21 and the second ground layer 24 in the first direction D1, respectively. The plurality of through-hole conductors V5 are, for example, cylindrical. The first ends of the plurality of through-hole conductors V5 are each connected to, for example, a pad electrode (not shown) at the ground potential arranged on the first main surface 21. The second ends of the plurality of through-hole conductors V5 are connected to the second ground layer 24.

[0085] (4.2) Relationship between the through-hole conductor and the first ground layer

[0086] As Figure 1 , Figure 4 and Figure 6As shown, the first ground layer 23 has a plurality of slits 27.

[0087] When viewed from above in the first direction D1, the plurality of slits 27 are respectively provided between one of the plurality of via conductors V1 included in the first via conductor group and the via conductor V2 corresponding to the via conductor V1 among the plurality of via conductors V2 included in the second via conductor group. That is, the switch 13 connected to one via conductor V1 in the first via conductor group and the low-noise amplifier 15 connected to one via conductor V2 in the second via conductor group are connected to each other.

[0088] More specifically, a slit 271 is disposed between the via conductor V11 and the via conductor V21. The via conductor V11 is connected to the switch 131. The via conductor V21 is connected to the low-noise amplifier 151. The low-noise amplifier 151 is connected to the switch 131. The slit 271 corresponds to the first slit of the present disclosure. Thereby, between the ground terminal of the switch 131 and the ground terminal of the low-noise amplifier 151, it is possible to reduce the interference of signals caused by the connection via the first ground layer 23. That is, the isolation between the switch 131 and the low-noise amplifier 151 is improved.

[0089] Similarly, a slit 272 is disposed between the via conductor V12 and the via conductor V22. The via conductor V12 is connected to the switch 132. The via conductor V22 is connected to the low-noise amplifier 152. The low-noise amplifier 152 is connected to the switch 132. The slit 272 corresponds to the second slit of the present disclosure. Thereby, between the ground terminal of the switch 132 and the ground terminal of the low-noise amplifier 152, it is possible to reduce the interference of signals caused by the connection via the first ground layer 23. That is, the isolation between the switch 132 and the low-noise amplifier 152 is improved.

[0090] Similarly, a slit 273 is disposed between the via conductor V13 and the via conductor V23. The via conductor V13 is connected to the switch 133. The via conductor V23 is connected to the low-noise amplifier 153. The low-noise amplifier 153 is connected to the switch 133. Thereby, between the ground terminal of the switch 133 and the ground terminal of the low-noise amplifier 153, it is possible to reduce the interference of signals caused by the connection via the first ground layer 23. That is, the isolation between the switch 133 and the low-noise amplifier 153 is improved.

[0091] Similarly, a slit 274 is disposed between the via conductor V14 and the via conductor V24. The via conductor V14 is connected to the switch 134. The via conductor V24 is connected to the low-noise amplifier 154. The low-noise amplifier 154 is connected to the switch 134. Thus, between the ground terminal of the switch 134 and the ground terminal of the low-noise amplifier 154, the interference of signals caused by the connection via the first ground layer 23 can be reduced. That is, the isolation between the switch 134 and the low-noise amplifier 154 is improved.

[0092] In addition, as Figure 4 shown, in the high-frequency module 1, among all the via conductors V1, there is a slit 27 between the via conductor V1 and the via conductor V2. That is, one of the plurality of slits 27 is disposed between each of the plurality of via conductors V1 included in the first via conductor group and the corresponding via conductor V2 in the second via conductor group. Therefore, in the high-frequency module 1, for all of the plurality of switches 13, the isolation from the connected low-noise amplifiers 15 is improved.

[0093] In addition, when viewed from the first direction D1, each of the plurality of via conductors V1 and each of the plurality of via conductors V2 are alternately arranged. Therefore, as Figure 4 shown, when viewed from the first direction D1, a combination of one of the plurality of via conductors V1, one of the plurality of slits 27, and one of the plurality of via conductors V2 are arranged adjacent to each other. Here, "a combination of one of the plurality of via conductors V1, one of the plurality of slits 27, and one of the plurality of via conductors V2 are arranged adjacent to each other" means that there are no via conductors V1, via conductors V2, and slits 27 between one combination of the via conductor V1, the slit 27, and the via conductor V2 and one combination of the via conductor V1, the slit 27, and the via conductor V2.

[0094] More specifically, in the third direction D3, they are arranged in the order of the via conductor V11, the slit 271, the via conductor V21, the via conductor V12, the slit 272, the via conductor V22, the via conductor V13, the slit 273, the via conductor V23, the via conductor V14, the slit 274, and the via conductor V24. Thus, the via conductor V11, the slit 271, and the via conductor V21 are arranged adjacent to the via conductor V12, the slit 272, and the via conductor V22. Thereby, the interference of signals caused by the connection via the first ground layer 23 can be reduced between the plurality of via conductors V1. In addition, the interference of signals caused by the connection via the first ground layer 23 can be reduced between the plurality of via conductors V2. Therefore, it becomes easy to improve the isolation between the plurality of switches 13 and the plurality of low-noise amplifiers 15.

[0095] In addition, when viewed from above in the first direction D1, each of the plurality of via conductors V1 and each of the plurality of via conductors V2 are disposed at the end of the IC chip 10. Therefore, as Figure 4 shown, when viewed from above in the first direction D1, the first via conductor group, the plurality of slits 27, and the second via conductor group are disposed at the end of the IC chip 10. Thus, in the mounting substrate 2, it is easy to regularly arrange the plurality of via conductors V1, the plurality of via conductors V2, and the plurality of slits 27. Therefore, for any combination of the plurality of switches 13 and the plurality of low-noise amplifiers 15, it is easy to equalize the degree of improvement in isolation.

[0096] (4.3) Shape of the slit

[0097] As Figure 4 and Figure 6 shown, when viewed from above in the first direction D1, the plurality of slits 27 are each longer in a direction crossing the direction connecting one via conductor V1 and one via conductor V2 with the slit 27 therebetween. More specifically, the slit 271 is longer in a direction crossing the direction connecting the via conductor V11 and the via conductor V21. Similarly, the slit 272 is longer in a direction crossing the direction connecting the via conductor V12 and the via conductor V22. Similarly, the slit 273 is longer in a direction crossing the direction connecting the via conductor V13 and the via conductor V23. Similarly, the slit 274 is longer in a direction crossing the direction connecting the via conductor V14 and the via conductor V24.

[0098] More specifically, the width W1 of the slit 27 is equal to or less than the distance d1 between the via conductor V1 and the via conductor V2. Specifically, as Figure 6 shown, the width W1 of the slit 274 is equal to or less than the distance d1 between the via conductor V14 and the via conductor V24. Similarly, the width W1 of the slit 271 is equal to or less than the distance d1 between the via conductor V11 and the via conductor V21.

[0099] In addition, the length W2 of the slit 27 is at least twice the width W1 of the slit 27.

[0100] Thus, the length of the path in the first ground layer 23 that electrically connects the via conductor V1 and the via conductor V2 is long enough with respect to the distance d1 between the via conductor V1 and the via conductor V2. Therefore, it is possible to further reduce the interference between the plurality of switches 13 and the plurality of low-noise amplifiers 15 via the via conductor V1, the via conductor V2, and the first ground layer 23.

[0101] (5) Communication device

[0102] As Figure 7As shown in the figure, the communication device 100 includes a high-frequency module 1, a signal processing circuit 19, and an antenna 101.

[0103] The antenna 101 is connected to the antenna terminal 181 of the high-frequency module 1. The antenna 101 has a transmission function of transmitting a transmission signal output from the high-frequency module 1 through radio wave radiation, and a reception function of receiving a reception signal as a radio wave from the outside and outputting it to the high-frequency module 1.

[0104] The signal processing circuit 19 includes an RF signal processing circuit 191 and a baseband signal processing circuit 192. The signal processing circuit 19 processes the signals passing through the high-frequency module 1. More specifically, the signal processing circuit 19 processes the transmission signal and the reception signal.

[0105] The RF signal processing circuit 191 is, for example, an RFIC (Radio Frequency Integrated Circuit). The RF signal processing circuit 191 performs signal processing on high-frequency signals.

[0106] The RF signal processing circuit 191 performs signal processing such as up-conversion and amplification on the transmission signal transmitted from the baseband signal processing circuit 192, and outputs the signal-processed transmission signal to the high-frequency module 1. In addition, the RF signal processing circuit 191 amplifies and performs signal processing such as down-conversion on the reception signal output from the high-frequency module 1, and outputs the signal-processed reception signal to the baseband signal processing circuit 192.

[0107] The baseband signal processing circuit 192 is, for example, a BBIC (Baseband Integrated Circuit). The baseband signal processing circuit 192 performs prescribed signal processing on the transmission signal from outside the signal processing circuit 19. The reception signal processed in the baseband signal processing circuit 192 is used, for example, as an image signal for image display or as a voice signal for a call.

[0108] In addition, the RF signal processing circuit 191 also has a function as a control unit that controls the connection of the switches 11, 13, and 17 included in the high-frequency module 1 for transmission and reception based on high-frequency signals (transmission signals, reception signals). Specifically, the RF signal processing circuit 191 switches the connection of the switches 11, 13, and 17 of the high-frequency module 1 through a control signal (not shown). In addition, the control unit may be provided outside the RF signal processing circuit 191, for example, may be provided in the high-frequency module 1 or the baseband signal processing circuit 192.

[0109] (6) Effects

[0110] The high-frequency module 1 of Embodiment 1 includes a mounting substrate 2 and an IC chip 10. The mounting substrate 2 is a multilayer substrate having a first main surface 21 and a second main surface 22 facing each other. The IC chip 10 is disposed on the first main surface 21 of the mounting substrate 2. The IC chip 10 includes a plurality of switches 13 and a plurality of low-noise amplifiers 15. The plurality of low-noise amplifiers 15 are connected to the plurality of switches 13 on a one-to-one basis. The plurality of switches 13 include a switch 131 and a switch 132. The plurality of low-noise amplifiers 15 include a low-noise amplifier 151 connected to the switch 131 and a low-noise amplifier 152 connected to the switch 132. The mounting substrate 2 includes a first ground layer 23, a second ground layer 24, a first via conductor group, a second via conductor group, and a third via conductor group. The first ground layer 23 is disposed between the first main surface 21 and the second main surface 22. The second ground layer 24 is disposed between the first ground layer 23 and the second main surface 22. The first via conductor group connects the plurality of switches 13 to the first ground layer 23. The second via conductor group connects the plurality of low-noise amplifiers 15 to the first ground layer 23. The third via conductor group connects the first ground layer 23 to the second ground layer 24. The first ground layer 23 has a plurality of slits 27. When viewed from above in the thickness direction D1 of the mounting substrate 2, the third via conductor group is disposed around the first via conductor group and the second via conductor group. The first via conductor group includes a via conductor V11 connected to the switch 131 and a via conductor V12 connected to the switch 132. The second via conductor group includes a via conductor V21 connected to the low-noise amplifier 151 and a via conductor V22 connected to the low-noise amplifier 152. The plurality of slits 27 include a slit 271 disposed between the via conductor V11 and the via conductor V21 and a slit 272 connecting between the via conductor V12 and the via conductor V22 when viewed from above in the thickness direction D1 of the mounting substrate 2. The via conductor V11, the slit 271, and the via conductor V21 are disposed adjacent to the via conductor V12, the slit 272, and the via conductor V22. Thereby, between the plurality of switches 13 and the plurality of low-noise amplifiers 15, it is possible to reduce the signal winding via the first ground layer 23. Therefore, it is possible to improve the isolation between each of the plurality of switches 13 and each of the plurality of low-noise amplifiers 15.

[0111] In addition, in the high-frequency module 1 of Embodiment 1, when viewed from above in the first direction D1, the first via conductor group, the second via conductor group, and the plurality of slits 27 of the first ground layer 23 are disposed at the ends of the IC chip 10. Therefore, in the mounting substrate 2, it is easy to regularly arrange the plurality of via conductors V1, the plurality of via conductors V2, and the plurality of slits 27. Therefore, for any combination of the plurality of switches 13 and the plurality of low-noise amplifiers 15, it is easy to make the degree of improvement in isolation uniform.

[0112] In addition, in the high-frequency module 1 of Embodiment 1, when viewed from above in the first direction D1, the slit 27 is longer in the direction intersecting the direction connecting the via conductor V11 and the via conductor V21. When viewed from above in the first direction D1, the width W1 of the slit 27 is equal to or less than the distance d1 between the via conductor V11 and the via conductor V21. Thereby, the length of the path in the first ground layer 23 that electrically connects the via conductor V11 and the via conductor V21 is sufficiently long with respect to the distance d1 between the via conductor V11 and the via conductor V21. Therefore, the interference between the switch 131 and the low-noise amplifier 151 can be further reduced.

[0113] In addition, in the high-frequency module 1 of Embodiment 1, when viewed from above in the first direction D1, the length W2 of the slit 271 is twice or more the width W1 of the slit 271. Thereby, the length of the path in the first ground layer 23 that electrically connects the via conductor V11 and the via conductor V21 is sufficiently long with respect to the distance d1 between the via conductor V11 and the via conductor V21. Therefore, the interference between the switch 131 and the low-noise amplifier 151 can be further reduced.

[0114] In addition, in the high-frequency module 1 of Embodiment 1, the plurality of via conductors V1 included in the first via conductor group correspond one-to-one with the plurality of via conductors V2 included in the second via conductor group. One slit 27 among the plurality of slits 27 is disposed between each of the plurality of via conductors V1 included in the first via conductor group and the corresponding via conductor V2 in the second via conductor group. Therefore, in the high-frequency module 1, the isolation between all of the plurality of switches 13 and the connected low-noise amplifiers 15 is improved.

[0115] In addition, the communication device 100 of Embodiment 1 includes the high-frequency module 1 and a signal processing circuit 19 connected to the high-frequency module 1. Thereby, in the communication device 100 of Embodiment 1, in the high-frequency module 1, the isolation between each of the plurality of switches 13 and each of the plurality of low-noise amplifiers 15 can be improved.

[0116] (Embodiment 2)

[0117] (1) Structure

[0118] In the high-frequency module 1 of Embodiment 2, the first ground layer 23 has a plurality of slits 27a.

[0119] As Figure 8 shown, the first ground layer 23 has a plurality of slits 27a. The plurality of slits 27a each include a first portion 28. When viewed from above in the first direction D1, the first portion 28 and the inductor 16 (see Figure 2)Overlap. Here, "when viewed from above in the first direction D1, the first portion 28 overlaps with the inductor 16" means that at least a part of the existing area of the inductor 16 is located inside the first portion 28 when viewed from above in the first direction D1.

[0120] Specifically, when viewed from above in the first direction D1, the first portion 281 overlaps with the inductor 161 (refer to Figure 2 ). In addition, the first portion 282 overlaps with the inductor 162 (refer to Figure 2 ). The first portion 283 overlaps with the inductor 163 (refer to Figure 2 ). The first portion 284 overlaps with the inductor 164 (refer to Figure 2 ).

[0121] Therefore, in the high-frequency module 1 of Embodiment 2, when viewed from above in the first direction D1, each of the plurality of inductors 16 overlaps with any one of the plurality of slits 27a. Thereby, the electromagnetic coupling between each of the plurality of inductors 16 and the first ground layer 23 can be reduced, and in particular, the parasitic capacitance of the plurality of inductors 16 can be reduced. Therefore, the inflow of noise into the plurality of low-noise amplifiers 15 can be reduced.

[0122] In addition, in the high-frequency module 1 of Embodiment 2, since the plurality of slits 27a have the first portion 28, the area is larger than that of the plurality of slits 27 in the high-frequency module 1 of Embodiment 1. Therefore, the length of the path in the first ground layer 23 that electrically connects the via conductor V1 and the via conductor V2 becomes longer, so the interference between the switch 13 and the low-noise amplifier 15 can be further reduced.

[0123] (2) Effects

[0124] In the high-frequency module 1 of Embodiment 2, the IC chip 10 further includes a plurality of inductors 16 that correspond one-to-one with the plurality of low-noise amplifiers 15. The plurality of inductors 16 are respectively connected between the corresponding low-noise amplifier 15 in the plurality of low-noise amplifiers 15 and the via conductor V2 in the second via conductor group that is connected to the corresponding low-noise amplifier 15. When viewed from above in the first direction D1, one inductor among the plurality of inductors 16 overlaps with the slit 27a. Thereby, the electromagnetic coupling between each of the plurality of inductors 16 and the first ground layer 23 can be reduced, and the inflow of noise into the plurality of low-noise amplifiers 15 can be reduced. In addition, the length of the path in the first ground layer 23 that electrically connects the via conductor V1 and the via conductor V2 becomes longer, so the interference between the switch 13 and the low-noise amplifier 15 can be further reduced.

[0125] (Embodiment 3)

[0126] In the high-frequency module 1 of Embodiment 3, when viewed from above in the first direction D1, a combination of a via conductor V1, a slit 27, and a via conductor V2 is arranged along the outer periphery of the IC chip 10. Thus, the combination of the via conductor V1, the slit 27, and the via conductor V2 is arranged not only in the third direction D3 but also in the second direction D2.

[0127] More specifically, as Figure 9 shown, the via conductor V1 and the via conductor V2 are arranged in a U shape along the outer periphery of the IC chip 10. More specifically, the via conductor V15 and the via conductor V25 are arranged in the second direction D2 with the via conductor V11 and the via conductor V21. Similarly, the via conductor V16 and the via conductor V26 are arranged in the second direction D2 with the via conductor V14 and the via conductor V24. A slit 275 is arranged between the via conductor V15 and the via conductor V25. A slit 276 is arranged between the via conductor V16 and the via conductor V26.

[0128] In the high-frequency module 1 of Embodiment 3, interference between the switch 13 and the low-noise amplifier 15 can also be reduced. In addition, since it is not necessary to arrange the switch 13 and the low-noise amplifier 15 on one side of the IC chip 10, the IC chip 10 can be miniaturized.

[0129] (Embodiment 4)

[0130] (1) Structure

[0131] In the high-frequency module 1 of Embodiment 4, as Figure 10 and Figure 11 shown, the via conductors included in the first via conductor group and the second via conductor group penetrate the first ground layer 23 to reach the second ground layer 24.

[0132] Specifically, as Figure 10 and Figure 11 shown, the first via conductor group and the second via conductor group penetrate the first ground layer 23 to connect the first main surface 21 of the mounting substrate 2 to the second ground layer 24. Here, the first via conductor group and the second via conductor group are connected to the first ground layer 23. In other words, the first via conductor group and the second via conductor group connect the first ground layer 23 to the second ground layer 24. Thus, the uniformity of the potential of the first ground layer 23 is improved. Here, it is not necessary for all of the via conductors V1 and V2 included in the first via conductor group and the second via conductor group to be connected to the second ground layer 24, and it is sufficient that at least one via conductor V1 and the via conductor V2 corresponding to the via conductor V1 are connected to the second ground layer 24.

[0133] In addition, in the high-frequency module 1 of Embodiment 4, the second ground layer 24 has a plurality of slits 29. When viewed from above in the first direction D1, the plurality of slits 29 overlap with the plurality of slits 27. Here, "when viewed from above in the first direction D1, the plurality of slits 29 overlap with the plurality of slits 27" means that when viewed from above in the first direction D1, a part of each of the plurality of slits 29 overlaps with a part of any one of the plurality of slits 27. Specifically, when viewed from above in the first direction D1, the slit 291 overlaps with the slit 271. In addition, when viewed from above in the first direction D1, the slit 292 overlaps with the slit 272. In addition, when viewed from above in the first direction D1, the slit 293 overlaps with the slit 273. In addition, when viewed from above in the first direction D1, the slit 294 overlaps with the slit 274.

[0134] Thereby, it is possible to reduce the interference via the second ground layer 24 between the switch 13 connected to the via conductor V1 and the low-noise amplifier 15 connected to the via conductor V2.

[0135] (2) Effects

[0136] In the high-frequency module 1 of Embodiment 4, the first via conductor group and the second via conductor group further connect the first ground layer 23 and the second ground layer 24. Thereby, the first ground layer 23 is connected to the second ground layer 24 through the first via conductor group and the second via conductor group in addition to the third via conductor group. Therefore, the potential of the first ground layer 23 is more stable.

[0137] In addition, in the high-frequency module 1 of Embodiment 4, the second ground layer 24 has a plurality of slits 29. When viewed from above in the first direction D1, the plurality of slits 27 of the first ground layer 23 overlap with the plurality of slits 29 of the second ground layer 24. Thereby, between the plurality of switches 13 and the plurality of low-noise amplifiers 15, it is possible to reduce the signal winding around via the second ground layer 24.

[0138] (Modification)

[0139] The high-frequency module 1 of Embodiments 1 to 4 includes one IC chip 10 including a plurality of low-noise amplifiers 15, but the high-frequency module 1 may also include a plurality of IC chips 10. In this case, each of the plurality of IC chips 10 may include a plurality of low-noise amplifiers 15 or may include one low-noise amplifier 15. In this case, it is preferable that when viewed from above in the first direction D1, the plurality of low-noise amplifiers 15 are arranged along the outer edge of the region including the plurality of IC chips 10.

[0140] In addition, in the high-frequency module 1 according to Embodiments 1 to 3, either the plurality of via conductors V1 or the plurality of via conductors V2 may further connect the first ground layer 23 and the second ground layer 24. Thereby, the potential of the first ground layer 23 becomes more stable, and it is less likely that signal wrapping via the first ground layer 23 occurs between the plurality of switches 13 and the plurality of low-noise amplifiers 15.

[0141] In addition, in the high-frequency module 1 according to Embodiments 1 to 4, the mounting substrate 2 may further include a ground layer in addition to the first ground layer 23 and the second ground layer 24.

[0142] In addition, in the high-frequency module 1 according to Embodiments 1 to 4, the switch 131 is connected to the receiving filters 121 and 122, and the switch 132 is connected to the receiving filters 123 and 124. However, the connection relationship between the switch 13 and the receiving filters 121 to 124 is not limited thereto. As long as the plurality of switches 13 each select a receiving filter to be connected to the low-noise amplifier 15 from among the plurality of receiving filters, the connection relationship between the switch 13 and the receiving filters may have any structure.

[0143] (Method)

[0144] The high-frequency module (1) of the first mode includes a mounting substrate (2) and an IC chip (10). The mounting substrate (2) is a multilayer substrate having a first main surface (21) and a second main surface (22) facing each other. The IC chip (10) is disposed on the first main surface (21) of the mounting substrate (2). The IC chip (10) includes a plurality of switches (13) and a plurality of low-noise amplifiers (15). The plurality of low-noise amplifiers (15) are connected to the plurality of switches (13) on a one-to-one basis. The plurality of switches (13) include a first switch (131) and a second switch (132). The plurality of low-noise amplifiers (15) include a first low-noise amplifier (151) and a second low-noise amplifier (152). The first low-noise amplifier (151) is connected to the first switch (131). The second low-noise amplifier (152) is connected to the second switch (132). The mounting substrate (2) includes a first ground layer (23), a second ground layer (24), a first via conductor group, a second via conductor group, and a third via conductor group. The first ground layer (23) is disposed between the first main surface (21) and the second main surface (22). The second ground layer (24) is disposed between the first ground layer (23) and the second main surface (22). The first via conductor group connects the plurality of switches (13) to the first ground layer (23). The second via conductor group connects the plurality of low-noise amplifiers (15) to the first ground layer (23). The third via conductor group connects the first ground layer (23) to the second ground layer (24). The first ground layer (23) has a plurality of slits (27; 27a). When viewed from above in the thickness direction (D1) of the mounting substrate (2), the third via conductor group is disposed around the first via conductor group and the second via conductor group. The first via conductor group includes a first via conductor (V11) and a second via conductor (V12). The first via conductor (V11) is connected to the first switch (131). The second via conductor (V12) is connected to the second switch (132). The second via conductor group includes a third via conductor (V21) and a fourth via conductor (V22). The third via conductor (V21) is connected to the first low-noise amplifier (151). The fourth via conductor (V22) is connected to the second low-noise amplifier (152). The plurality of slits (27; 27a) include a first slit (271) and a second slit (272). When viewed from above in the thickness direction (D1) of the mounting substrate (2), the first slit (271) is disposed between the first via conductor (V11) and the third via conductor (V21). When viewed from above in the thickness direction (D1) of the mounting substrate (2), the second slit (272) is disposed between the second via conductor (V12) and the fourth via conductor (V22). The first via conductor (V11), the first slit (271), and the third via conductor (V21) are disposed adjacent to the second via conductor (V12), the second slit (272), and the fourth via conductor (V22).

[0145] In the high-frequency module (1) according to the above-described manner, between the plurality of switches (13) and the plurality of low-noise amplifiers (15), it is possible to reduce the signal winding via the first ground layer (23). Therefore, it is possible to improve the isolation between each of the plurality of switches (13) and each of the plurality of low-noise amplifiers (15).

[0146] In the high-frequency module (1) of the second manner, in the first manner, the first via conductor group and the second via conductor group connect the first ground layer (23) and the second ground layer (24).

[0147] In the high-frequency module (1) according to the above-described manner, the potential of the first ground layer (23) is stable, so it is possible to improve the isolation between each of the plurality of switches (13) and each of the plurality of low-noise amplifiers (15).

[0148] In the high-frequency module (1) of the third manner, in the second manner, the second ground layer (24) has a plurality of slits (29). When viewed from above in the thickness direction (D1) of the mounting substrate (2), the plurality of slits (27; 27a) of the first ground layer (23) overlap with the plurality of slits (29) of the second ground layer (24).

[0149] In the high-frequency module (1) according to the above-described manner, between the plurality of switches (13) and the plurality of low-noise amplifiers (15), it is possible to reduce the signal winding via the second ground layer (24). Therefore, it is possible to improve the isolation between each of the plurality of switches (13) and each of the plurality of low-noise amplifiers (15).

[0150] In the high-frequency module (1) of the fourth manner, in any one of the first to third manners, when viewed from above in the thickness direction (D1) of the mounting substrate (2), the first via conductor group, the second via conductor group, and the plurality of slits (27) of the first ground layer (23) are arranged at the end of the IC chip (10).

[0151] In the high-frequency module (1) according to the above-described manner, it is easy to regularly arrange the first via conductor group, the second via conductor group, and the plurality of slits (27). Therefore, for any combination of the plurality of switches (13) and the plurality of low-noise amplifiers (15), it is easy to make the degree of improvement in isolation uniform.

[0152] In the high-frequency module (1) of the fifth mode, in any one of the first to fourth modes, when viewed from above in the thickness direction (D1) of the mounting substrate (2), the first slit (271) is longer in a direction crossing the direction connecting the first via conductor (V11) and the third via conductor (V21). When viewed from above in the thickness direction (D1) of the mounting substrate (2), the width of the first slit (271) is equal to or less than the distance between the first via conductor (V11) and the third via conductor (V21).

[0153] In the high-frequency module (1) according to the above mode, the length of the path in the first ground layer (23) that electrically connects the first via conductor (V11) and the third via conductor (V21) is sufficiently long with respect to the distance (d1) between the first via conductor (V11) and the third via conductor (V21). Therefore, the interference between the first switch (131) and the first low-noise amplifier (151) can be further reduced.

[0154] In the high-frequency module (1) of the sixth mode, in the fifth mode, when viewed from above in the thickness direction (D1) of the mounting substrate (2), the length (W2) of the first slit (271) is twice or more the width (W1) of the first slit (271).

[0155] In the high-frequency module (1) according to the above mode, the length of the path in the first ground layer (23) that electrically connects the first via conductor (V11) and the third via conductor (V21) is sufficiently long with respect to the distance (d1) between the first via conductor (V11) and the third via conductor (V21). Therefore, the interference between the first switch (131) and the first low-noise amplifier (151) can be further reduced.

[0156] In the high-frequency module (1) of the seventh mode, in any one of the first to fourth modes, the IC chip (10) further includes a plurality of inductors (16) corresponding one-to-one to the plurality of low-noise amplifiers (15). The plurality of inductors (16) are respectively connected between the corresponding low-noise amplifier (15) in the plurality of low-noise amplifiers (15) and the via conductor (V2) in the second via conductor group that is connected to the corresponding low-noise amplifier (15). When viewed from above in the thickness direction (D1) of the mounting substrate (2), one inductor (16) among the plurality of inductors (16) overlaps with the first slit (27a).

[0157] The high-frequency module (1) according to the above-described manner can reduce the electromagnetic coupling between each of the plurality of inductors (16) and the first ground layer (23), and can reduce the inflow of noise into the plurality of low-noise amplifiers (15). In addition, since the length of the path in the first ground layer (23) that electrically connects the via conductor (V1) and the via conductor (V2) becomes longer, interference between the switch (13) and the low-noise amplifier (15) can be further reduced.

[0158] In the high-frequency module (1) of the eighth manner, in any one of the first to seventh manners, the plurality of via conductors (V1) included in the first via conductor group correspond one-to-one to the plurality of via conductors (V2) included in the second via conductor group. One of the plurality of slits (27; 27a) is disposed between each of the plurality of via conductors (V1) included in the first via conductor group and the corresponding via conductor (V2) in the second via conductor group.

[0159] The high-frequency module (1) according to the above-described manner improves the isolation between all of the plurality of switches (13) and the connected low-noise amplifiers (15).

[0160] The communication device (100) of the ninth manner includes any one of the high-frequency modules (1) of the first to eighth manners and a signal processing circuit (19) connected to the high-frequency module (1).

[0161] The communication device (100) according to the above-described manner can reduce the signal winding via the first ground layer (23) between the plurality of switches (13) and the plurality of low-noise amplifiers (15) in the high-frequency module (1). Therefore, the isolation between each of the plurality of switches (13) and each of the plurality of low-noise amplifiers (15) can be improved.

Claims

1. A high frequency module, wherein: have: The mounting substrate is a multi-layer substrate and has a first main surface and a second main surface facing each other; and The IC chip is arranged on the first main surface of the mounting substrate. The above IC chip includes: Multiple switches; as well as A plurality of low noise amplifiers are connected one-to-one with the plurality of switches. The plurality of switches include a first switch and a second switch. The multiple low noise amplifiers include: A first low noise amplifier connected to the first switch; and A second low noise amplifier is connected to the second switch. The above-mentioned mounting substrate comprises: A first ground layer is arranged between the first main surface and the second main surface; A second ground layer is arranged between the first ground layer and the second main surface; a first through-hole conductor group connecting the plurality of switches to the first ground layer; a second through-hole conductor group connecting the plurality of low-noise amplifiers to the first ground layer; as well as The third through-hole conductor group connects the first ground layer to the second ground layer. The first ground layer has a plurality of slits. The third through-hole conductor group is arranged around the first through-hole conductor group and the second through-hole conductor group when viewed from above in the thickness direction of the mounting substrate. The first through-hole conductor group includes: A first through-hole conductor connected to the first switch; and A second through-hole conductor is connected to the second switch. The second through-hole conductor group includes: A third through-hole conductor connected to the first low-noise amplifier; and The fourth through-hole conductor is connected to the second low-noise amplifier. The plurality of slits include: A first slit is disposed between the first through-hole conductor and the third through-hole conductor when viewed from above in the thickness direction of the mounting substrate; and The second slit is disposed between the second through-hole conductor and the fourth through-hole conductor when viewed from above in the thickness direction of the mounting substrate. The first through-hole conductor, the first slit, and the third through-hole conductor are arranged adjacent to the second through-hole conductor, the second slit, and the fourth through-hole conductor.

2. The high frequency module according to claim 1, wherein: The first through-hole conductor group and the second through-hole conductor group connect the first ground layer and the second ground layer.

3. The high frequency module according to claim 2, wherein: The second ground layer has a plurality of slits. The plurality of slits in the first ground layer overlap with the plurality of slits in the second ground layer when viewed from above in the thickness direction of the mounting substrate.

4. The high frequency module according to any one of claims 1 to 3, wherein: The first through-hole conductor group, the second through-hole conductor group, and the plurality of slits of the first ground layer are arranged at an end portion of the IC chip when viewed from above in the thickness direction of the mounting substrate.

5. The high frequency module according to any one of claims 1 to 3, wherein: The first slit is long in a direction intersecting a direction connecting the first through-hole conductor and the third through-hole conductor when viewed from above in the thickness direction of the mounting substrate, and has a width less than a distance between the first through-hole conductor and the third through-hole conductor.

6. The high frequency module according to claim 5, wherein: When viewed from above in the thickness direction of the mounting substrate, the length of the first slit is at least twice the width of the first slit.

7. The high frequency module according to any one of claims 1 to 3, wherein: The IC chip further includes a plurality of inductors corresponding one-to-one to the plurality of low-noise amplifiers. The plurality of inductors are respectively connected between corresponding low-noise amplifiers among the plurality of low-noise amplifiers and a through-hole conductor, the through-hole conductor being a through-hole conductor in the second through-hole conductor group connected to the corresponding low-noise amplifier. One of the plurality of inductors overlaps with the first slit when viewed from above in the thickness direction of the mounting substrate.

8. The high frequency module according to any one of claims 1 to 3, wherein: The plurality of through-hole conductors included in the first through-hole conductor group correspond one-to-one to the plurality of through-hole conductors included in the second through-hole conductor group. One of the plurality of slits is disposed between each of the plurality of through-hole conductors included in the first through-hole conductor group and a corresponding through-hole conductor in the second through-hole conductor group.

9. A communication device, wherein: have: The high frequency module according to claim 1; and The signal processing circuit is connected to the high frequency module.

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