High-boron-doped single-mask TBC solar cell structure and manufacturing method thereof

Abstract

The invention relates to the technical field of solar cells, and particularly discloses a high-boron-doped single-mask TBC solar cell structure and a manufacturing method thereof.In the process of forming a patterned region, a P region does not need a mask structure, and through the combination of boron diffusion doping, annealing and two-time laser doping treatment, the high-boron-doped single-mask TBC solar cell structure is obtained. The boron atom doping concentration of the polycrystalline silicon layer is greatly improved, so that the boron-doped polycrystalline silicon layer in the P region is high in doping concentration and uniform in doping. According to the TBC solar cell prepared by the method, the processes of preparing and removing the mask structure are simplified, the technological process is short, the manufacturing cost is low, the contact resistance is reduced, the passivation effect is improved, the filling factor of the cell is increased, and the efficiency of the cell is improved. And the open-circuit voltage and the photoelectric conversion efficiency of the battery are improved.

Description

Technical Field

[0001] The present invention belongs to the technical field of solar cells, and particularly relates to a high-boron-doped single-mask TBC solar cell structure and a manufacturing method thereof. Background Art

[0002] With the continuous increase of solar cells, the battery manufacturing process has become more complex. Especially for the manufacturing processes of TBC, HBC and other cells, when manufacturing the N-region and P-region structures, it is necessary to sequentially fabricate a mask on the P-region, and then use laser or photolithography to etch away the unnecessary mask, and then fabricate a mask on the N-region, and then use laser or photolithography to remove the unnecessary mask to form a patterned mask for fabricating the PN interdigitated structure. There are disadvantages such as long manufacturing process flow, high cost, and low yield. At the same time, due to the low solubility of boron in silicon, the boron doping concentration will be greatly reduced after multiple high-temperature treatments, that is, it is difficult to fabricate a highly concentrated and uniform boron-doped polysilicon layer through high-temperature diffusion, which will affect the passivation and contact performance of the battery, resulting in problems such as low fill factor and efficiency of the battery. Summary of the Invention

[0003] The present invention provides a manufacturing method for a high-concentration boron-doped TBC solar cell. The doping concentration of the polysilicon layer in the P-region of this method is high and the doping is uniform, and only one mask needs to be fabricated. The process flow is short and the manufacturing cost is low, which helps to improve the efficiency of the TBC battery and achieve low-cost mass production.

[0004] The present invention is realized through the following technical solutions:

[0005] In a first aspect, the present invention provides a manufacturing method for a TBC solar cell, including the following steps:

[0006] S1. Double-sidedly polish an N-type substrate silicon wafer, and sequentially grow a first tunneling oxide layer and an intrinsic polysilicon layer on the back surface of the silicon wafer;

[0007] S2. Perform boron diffusion on the silicon wafer, and the intrinsic polysilicon layer is converted into a first boron-doped polysilicon layer;

[0008] S3. Set a patterned P-region on the back surface of the silicon wafer, and convert the first boron-doped polysilicon layer in the P-region into a second boron-doped polysilicon layer through the first laser boron doping;

[0009] S4. Corrode and remove the first boron-doped polysilicon layer and the first tunneling oxide layer outside the P-region on the back surface of the silicon wafer, form a polished surface on the exposed silicon wafer, and then clean the silicon wafer;

[0010] S5. Sequentially grow a second tunneling oxide layer, a phosphorus-doped polysilicon layer and a silicon dioxide mask layer on the boron-doped polysilicon layer and the polished surface in the P-region on the back surface of the silicon wafer;

[0011] S6. Remove the silicon dioxide mask layer on the P region and make grooves in the silicon dioxide mask layer on the polished surface part. The grooved area on the silicon dioxide mask layer forms an isolation region (Gap region), and the ungrooved area is the N region. The P region and the N region are arranged in a cross shape, and the isolation region is distributed between the P region and the N region;

[0012] S7. Use an alkaline solution to remove the phosphorus-doped polysilicon layer in the P region, remove the phosphorus-doped polysilicon layer and the second tunneling oxide layer in the isolation region, and form a pyramid light-trapping structure on the isolation region and the front side of the silicon wafer;

[0013] S8. Anneal the silicon wafer;

[0014] S9. Perform a second laser boron doping on the P region, and the second boron-doped polysilicon layer is converted into a P+-region boron-doped polysilicon layer;

[0015] S10. Deposit an aluminum oxide passivation film layer and a silicon nitride passivation and antireflection film layer on both sides of the silicon wafer in sequence;

[0016] S11. Print electrodes on the back side of the silicon wafer, and form a TBC solar cell after sintering.

[0017] Further, in step S1, the double-sided polishing uses an alkaline solution with a mass fraction of 5-20%, and the alkali includes sodium hydroxide or potassium hydroxide.

[0018] Further, the thickness of the first tunneling oxide layer in step S1 is 1.2-1.8 nm, such as 1.2 nm, 1.3 nm, 1.4 nm, 1.5 nm, 1.6 nm, 1.7 nm or 1.8 nm; the first tunneling oxide layer is SiO x , preferably silicon dioxide; the thickness of the intrinsic polysilicon layer is 150-350 nm, such as 150 nm, 180 nm, 200 nm, 230 nm, 250 nm, 280 nm, 300 nm, 320 nm, 330 nm or 350 nm;

[0019] Further, the diffusion temperature of the boron diffusion in step S2 is 840-940 °C, such as 840 °C, 850 °C, 860 °C, 870 °C, 880 °C, 890 °C, 900 °C, 910 °C, 920 °C, 930 °C or 940 °C; the boron diffusion time is 30-50 min; the doping concentration of the first boron-doped polysilicon layer is 1×10 20 cm -3 -3×10 20 cm -3 , such as 1×10 20 cm -3 、1.5×10 20 cm -3 、2×1020 cm -3 、 2.5×10 20 cm -3 or 3×10 20 cm -3 ;

[0020] Further, the laser pulse width of the first laser boron doping described in step S3 is 1 - 100 ns, the wavelength is 455 - 532 nm, and the spot energy is 0.3 - 1 J / cm 2 ;

[0021] Further, the doping concentration of the second boron-doped polysilicon layer described in step S3 is 1×10 21 cm -3 - 3×10 21 cm -3 For example, it is 1×10 21 cm -3 、 1.5×10 21 cm -3 、 2×10 21 cm -3 、 2.5×10 21 cm -3 or 3×10 21 cm -3 ;

[0022] The boron-doped polysilicon layer serves as an electron enrichment region. When light irradiates the solar cell, photo-generated electrons accumulate in the P region to form a current. The doping concentration in the boron-doped polysilicon layer obtained by high-temperature boron diffusion is limited and there is a concentration difference between the surface layer and the interior. The upper limit of the boron doping concentration of the polysilicon layer is increased through the first laser boron doping.

[0023] Further, the etching in step S4 uses an alkali solution with a mass fraction of 5 - 20%; the alkali solution includes KOH and NaOH; the cleaning of the silicon wafer includes cleaning with an HF solution with a mass fraction of 2 - 5%.

[0024] Further, the thickness of the second tunneling oxide layer in step S5 is 1.2 - 1.6 nm, for example, it is 1.2 nm, 1.3 nm, 1.4 nm, 1.5 nm or 1.6 nm; the second tunneling oxide layer is SiO x , preferably silicon dioxide; the thickness of the phosphorus-doped polysilicon layer is 100 - 200 nm, for example, it is 100 nm, 120 nm, 130 nm, 140 nm, 150 nm, 160 nm, 170 nm, 180 nm, 190 nm or 200 nm; the thickness of the silicon dioxide mask layer is 50 - 80 nm, for example, it is 50 nm, 60 nm, 70 nm or 80 nm;

[0025] Further, the preparation method of the second tunneling oxide layer described in step S5 includes: using PECVD to oxidize and grow with a flow rate of 6000 - 10000 sccm of N2O, and the working temperature of PECVD is 420 - 480 °C, such as 420 °C, 430 °C, 440 °C, 450 °C, 460 °C, 470 °C or 480 °C.

[0026] The preparation method of the phosphorus-doped polysilicon layer includes: using PECVD (Plasma Enhanced Chemical Vapor Deposition) to grow with a flow rate of 1000 - 3000 sccm of SiH4, a flow rate of 6000 - 10000 sccm of H2, and a flow rate of 300 - 600 sccm of PH3, and the working temperature of PECVD is 420 - 480 °C, such as 420 °C, 430 °C, 440 °C, 450 °C, 460 °C, 470 °C or 480 °C.

[0027] The preparation method of the silicon dioxide mask layer includes: using PECVD to grow with a flow rate of 5000 - 8000 sccm of N2O and a flow rate of 800 - 2000 sccm of SiH4; the working temperature of PECVD is 460 - 500 °C, such as 420 °C, 430 °C, 440 °C, 450 °C, 460 °C, 470 °C, 480 °C, 490 °C or 500 °C.

[0028] Further, the width of the isolation region described in step S6 is 30 - 60 μm, such as 30 μm, 35 μm, 40 μm, 45 μm, 50 μm, 55 μm or 60 μm; the width of the P region is 400 - 550 μm, such as 400 μm, 420 μm, 450 μm, 480 μm, 500 μm, 520 μm, 530 μm or 550 μm; the width of the N region is 400 - 550 μm, such as 400 μm, 410 μm, 420 μm, 430 μm, 440 μm, 450 μm, 460 μm, 470 μm, 480 μm, 500 μm, 520 μm or 550 μm.

[0029] Further, in step S6, a picosecond laser is used to remove the silicon dioxide mask layer on the P region and groove the silicon dioxide mask layer on the polished surface part. The laser power of the picosecond laser is 30 - 50 W, the wavelength is 355 - 532 nm, and the pulse width is 10 - 100 Ps;

[0030] Further, the alkali solution used in step S7 is a sodium hydroxide solution with a mass fraction of 1.5 - 3%.

[0031] Further, the annealing temperature of the annealing treatment in step S8 is 900-980°C, for example, 900°C, 910°C, 920°C, 930°C, 940°C, 950°C, 960°C, 970°C or 980°C, and the annealing time is 20-50min; the annealing treatment can repair the damage of the laser to the silicon wafer, improve the microstructure and reduce defects, but after annealing, due to thermal advancement, the surface doping concentration of the second boron-doped polysilicon layer will drop to 3×10 19 cm -3 -5×10 19 cm -3 , but its internal doping concentration is relatively stable, and the doping concentration is distributed in a gradient.

[0032] Furthermore, in step S9, the laser pulse width of the second laser boron doping is 1-100 ns, the wavelength is 532 nm, and the spot energy is 0.3-1 J / cm 2 ;

[0033] After the second laser boron doping, the doping concentration of the P region will be increased again and the doping concentration will be kept uniformly distributed, which makes up for the doping concentration gradient distribution caused by the annealing heat advancement. The formed P+ region boron doped polysilicon layer increases the short-circuit current density of the solar cell by stabilizing and providing more carriers (electrons); the doping concentration of the P+ region boron doped polysilicon layer is 3×10 20 cm -3 -6×10 20 cm -3 , for example, 3×10 20 cm -3 , 3.5×10 20 cm -3 , 4×10 20 cm -3 , 4.5×10 20 cm -3 , 5×10 20 cm -3 , 5.5×10 20 cm -3 or 6×10 20 cm -3 .

[0034] Furthermore, in step S10, the aluminum oxide passivation film layer has a thickness of 3-5 nm; the specifications of the silicon nitride passivation anti-reflection film layer include: the front silicon nitride passivation anti-reflection film layer has a thickness of 65-75 nm and a refractive index of 2.03-2.05; the back silicon nitride passivation anti-reflection film layer has a thickness of 75-85 nm and a refractive index of 2.05-2.08.

[0035] Further, printing electrodes on the back surface of the silicon wafer in step S11 and sintering to form a TBC solar cell includes: printing a P-region electrode on the P region of the back surface of the silicon wafer and printing an N-region electrode on the N region of the back surface of the silicon wafer; the P-region electrode penetrates through the silicon nitride passivation and antireflection film layer and the alumina passivation film layer and is embedded in the P+-region boron-doped polysilicon layer; the N-region electrode penetrates through the silicon nitride passivation and antireflection film layer and the alumina passivation film layer and is embedded in the phosphorus-doped polysilicon layer; the electrodes are made of a metal paste containing silver and aluminum; preferably, the P-region electrode is Ag-Al and the N-region electrode is Al. The sintering temperature is 700-750 °C, such as 700 °C, 710 °C, 720 °C, 730 °C, 740 °C or 750 °C.

[0036] In a second aspect, the present invention provides a TBC solar cell prepared by the above manufacturing method.

[0037] Compared with the prior art, the beneficial effects of the present invention are:

[0038] By combining boron diffusion doping, annealing and two laser doping treatments, the present invention greatly improves the doping concentration of boron atoms in the polysilicon layer, making the doping concentration of the boron-doped polysilicon layer in the P region high and uniform, reducing the contact resistance and improving the passivation effect; in the process of forming patterning, no mask structure is required in the P region, simplifying the process of preparing and removing the mask structure; in the process of forming patterning, using PECVD to grow a phosphorus-doped polysilicon layer and using a picosecond laser to groove the mask layer in the N region to form a Gap region can avoid the problem that phosphorus atoms are pushed into the P region due to high-temperature phosphorus doping or the thermal effect of nanosecond lasers. The TBC solar cell prepared by the present invention has a short process flow, low manufacturing cost, an increased fill factor of the battery, and an improved open-circuit voltage and photoelectric conversion efficiency of the battery.

[0039] Other features and advantages of the present invention will be described in the following specification, and part of them will become obvious from the specification or be understood by implementing the present invention. The objectives and other advantages of the present invention can be achieved and obtained by the specific embodiments pointed out in the specification. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] Figure 1 It is a schematic structural diagram of step S1 involved in the embodiment;

[0041] Figure 2 It is a schematic structural diagram of step S2 involved in the embodiment;

[0042] Figure 3 It is a schematic structural diagram of step S3 involved in the embodiment;

[0043] Figure 4 It is a schematic structural diagram of step S4 involved in the embodiment;

[0044] Figure 5 Schematic structural diagram of step S5 involved in the embodiment;

[0045] Figure 6 Schematic structural diagram of removing the silicon dioxide mask layer on the P region in step S6 involved in the embodiment;

[0046] Figure 7 Schematic structural diagram of forming an isolation region by grooving in step S6 involved in the embodiment;

[0047] Figure 8 Schematic structural diagram of performing step S7 on a group of P regions, isolation regions and N regions in the embodiment;

[0048] Figure 9 Schematic structural diagram of performing step S7 on multiple groups of P regions, isolation regions and N regions in the embodiment;

[0049] Figure 10 Schematic structural diagram of step S9 involved in the embodiment;

[0050] Figure 11 Schematic structural diagram of step S10 involved in the embodiment;

[0051] Figure 12 Schematic structural diagram of step S11 involved in the embodiment;

[0052] Reference numerals: 1 - first tunneling oxide layer, 2 - intrinsic polysilicon layer, 200 - first boron-doped polysilicon layer, 201 - second boron-doped polysilicon layer, 202 - P+-region boron-doped polysilicon layer, 3 - polished surface, 4 - second tunneling oxide layer, 5 - phosphorus-doped polysilicon layer, 6 - silicon dioxide mask layer, 7 - isolation region, 8 - alumina passivation film layer, 9 - silicon nitride passivation and antireflection film layer, 10 - P-region electrode, 11 - N-region electrode. Detailed implementation manners

[0053] In order to make the objectives, technical solutions and advantages of the present invention clearer and more understandable, the implementation solutions of the present application will be described in detail below in combination with specific embodiments. Without other definitions, the technical terms and scientific terms used in the present invention have the meanings commonly understood by those of ordinary skill in the technical field to which the present invention belongs. Without departing from the concept of the present invention, those skilled in the art can make various improvements and changes to the specific implementation manners of the present invention specification, and these all belong to the protection scope of the present invention. Unless otherwise specified, the raw materials used in the present invention are all commercially available.

[0054] Embodiment 1

[0055] The present invention provides a method for manufacturing a TBC solar cell, including the following steps:

[0056] S1. As shown in Figure 1 , double - side polishing is performed on the N - type substrate silicon wafer. The first tunneling oxide layer 1 and the intrinsic polysilicon layer 2 are sequentially grown on the back of the silicon wafer, specifically including:

[0057] The N - type substrate silicon wafer has the following specifications: thickness 140 μm, size 166×166 mm;

[0058] The polishing includes etching the surface of the N - type substrate silicon wafer with a potassium hydroxide solution with a mass concentration of 12%, the polishing temperature is 75 °C, and the polishing time is 4 min;

[0059] The alkali - polished silicon wafer is placed in a low - pressure chemical vapor deposition (LPCVD) device, and a first tunneling oxide layer 1 with a thickness of 1.7 nm and an intrinsic polysilicon layer 2 with a thickness of 300 nm are sequentially grown on the back of the silicon wafer; the first tunneling oxide layer 1 is silicon dioxide;

[0060] The process conditions of LPCVD are: growing the first tunneling oxide layer 1 by oxidation under O2 working gas, the process temperature is 620 °C, and the oxidation time is 50 min;

[0061] Subsequently, under the condition of a process temperature of 550 °C, the intrinsic polysilicon layer 2 is deposited with silane.

[0062] S2. As shown in Figure 2 , the silicon wafer is placed in a high - temperature diffusion furnace for boron diffusion, and the intrinsic polysilicon layer 2 is converted into a first boron - doped polysilicon layer 200;

[0063] The process conditions of boron diffusion: using N2 working gas, using BBr3 as the doping gas, the diffusion temperature of boron diffusion is 860 °C, and the diffusion time is 30 min; after boron diffusion, the doping concentration of the first boron - doped polysilicon layer 200 is 3×10 20 cm 3 .

[0064] S3. As shown in Figure 3 , a patterned P region is set on the back of the silicon wafer, and the first boron - doped polysilicon layer 200 in the P region is subjected to the first laser boron doping to obtain a second boron - doped polysilicon layer 201;

[0065] The laser pulse width of the first laser boron doping is 50 ns, the wavelength is 532 nm, and the spot energy is 0.7 J / cm 2 ; after the first laser boron doping, the doping concentration of the second boron - doped polysilicon layer 201 reaches 2×10 21 cm 3 ;

[0066] S4. As shown in Figure 4As shown, the first boron-doped polysilicon layer 200 and the first tunneling oxide layer 1 on the back side of the silicon wafer are removed by etching to form a polished surface 3 on the exposed silicon wafer, and then the silicon wafer is cleaned with a 1% HF solution;

[0067] The etching uses NaOH with a mass fraction of 20%;

[0068] Since the surface doping concentration of the area not subjected to the first laser boron doping treatment is low, the first boron-doped polysilicon layer 200, the first tunneling oxide layer 1 and the silicon wafer substrate will be etched by alkali from the outside to the inside to form a polished surface 3.

[0069] S5. As Figure 5 shown, a second tunneling oxide layer 4, a phosphorus-doped polysilicon layer 5 and a silicon dioxide mask layer 6 are sequentially grown on the second boron-doped polysilicon layer 201 and the polished surface 3 on the back side of the silicon wafer, including:

[0070] Using a PECVD (Plasma Enhanced Chemical Vapor Deposition) device, the second tunneling oxide layer 4 is grown by oxidizing with N2O with a flow rate of 8000 sccm, and the working temperature is 450 °C; SiH4 with a flow rate of 1000 sccm, H2 with a flow rate of 8000 sccm, and PH3 with a flow rate of 500 sccm are introduced to grow the phosphorus-doped polysilicon layer 5, and the working temperature is 450 °C; N2O with a flow rate of 6000 sccm and SiH4 with a flow rate of 1200 sccm are introduced to grow the silicon dioxide mask layer 6, and the working temperature is 450 °C;

[0071] The thickness of the second tunneling oxide layer 4 is 1.4 nm, the thickness of the phosphorus-doped polysilicon layer 5 is 160 nm, and the thickness of the silicon dioxide mask layer 6 is 60 nm.

[0072] S6. As Figures 6 - 7 shown, the silicon dioxide mask layer 6 on the P region is removed by picosecond laser and grooves are formed on the silicon dioxide mask layer 6 on the polished surface 3. The grooved area on the silicon dioxide mask layer 6 forms an isolation region 7, and the ungrooved area is the N region. The isolation regions are distributed between the P region and the N region, and the P region and the N region are arranged in a cross shape; the width of the isolation region 7 is 40 μm, the width of the P region is 500 μm, and the width of the N region is 460 μm; the laser power of the picosecond laser is 50 W and the wavelength is 532 nm.

[0073] Since the action time of the picosecond laser spot is short, the phosphorus atoms in the phosphorus-doped polysilicon layer will not be incorporated into the P region, so there is no need to prepare a second mask, reducing the process steps.

[0074] S7. As Figures 8 - 9As shown, an alkaline solution is used to remove the phosphorus-doped polysilicon layer 5 on the P region, the phosphorus-doped polysilicon layer 5 and the second tunneling oxide layer 4 in the isolation region 7, and at the same time, a pyramid light-trapping structure is formed in the isolation region 7 and on the front side of the silicon wafer; the alkaline solution used is a sodium hydroxide solution with a mass fraction of 1.5%.

[0075] Among them, Figure 8 The figure shows a schematic structural diagram of performing this step on a local group of P regions, isolation regions, and N regions. Figure 9 As Figure 8 a supplement, the figure shows a schematic structural diagram of performing this step on multiple groups of P regions, isolation regions, and N regions.

[0076] S8. Anneal the silicon wafer, including:

[0077] Perform nitrogen annealing treatment in a tube annealing furnace, with an annealing temperature of 920 °C and an annealing time of 30 min;

[0078] The annealing treatment can repair the damage to the silicon wafer by the laser, improve the microstructure, and reduce defects. However, due to the reason of thermal diffusion after annealing, the doping concentration of the second boron-doped polysilicon layer 201 decreases from 2×10 21 cm 3 to 5×10 19 cm 3 .

[0079] S9. As Figure 10 shown, perform second laser boron doping in the P region, and the second boron-doped polysilicon layer 201 is converted into a P+-region boron-doped polysilicon layer 202;

[0080] The laser pulse width of boron in the second laser boron doping is 50 ns, the wavelength is 532 nm, and the spot energy is 0.5 J / cm 2 ;

[0081] After the second laser boron doping, the doping concentration is increased, and the doping concentration of the formed P+-region boron-doped polysilicon layer 202 is 5×10 20 cm 3 .

[0082] S10. As Figure 11 shown, sequentially deposit an aluminum oxide passivation film layer 8 and a silicon nitride passivation and antireflection film layer 9 on both sides of the silicon wafer, including:

[0083] Use an atomic layer deposition device to deposit an aluminum oxide passivation film layer with a thickness of 3 nm on both sides of the silicon wafer. Among them, the deposition gas uses trimethylaluminum (TMA) with a flow rate of 20 sccm, the deionized water flow rate is 20 sccm, the deposition temperature is 300 °C, the reaction pressure is 0.8 mbar, and the number of cycles is 25 times.

[0084] Deposit a silicon nitride passivation and antireflection film layer in a tube-type PECVD device. The thickness of the front-side silicon nitride passivation and antireflection film layer is 75 nm, and the refractive index is 2.03. The process parameters are as follows: the flow rate of SiH4 is 800 sccm, NH3 is 8000 sccm, the reaction pressure is 1750 mTorr, the deposition temperature is 480 °C, and the deposition time is 800 s. The thickness of the back-side silicon nitride passivation and antireflection film layer is 80 nm, and the refractive index is 2.1. The process parameters are as follows: the flow rate of SiH4 is 1200 sccm, NH3 is 8000 sccm, the reaction pressure is 1800 mTorr, the deposition temperature is 480 °C, and the deposition time is 700 s.

[0085] S11, as Figure 12 shown, print electrodes on the P region and N region on the back side of the silicon wafer, including:

[0086] Print the P-region electrode 10 on the P region on the back side of the silicon wafer. The P-region electrode 10 penetrates through the silicon nitride passivation and antireflection film layer 9 and the alumina passivation film layer 8 and is embedded in the P+-region boron-doped polysilicon layer 202. The P-region electrode is made of silver-aluminum paste;

[0087] Print the N-region electrode 11 on the N region on the back side of the silicon wafer. The N-region electrode 11 penetrates through the silicon nitride passivation and antireflection film layer 9 and the alumina passivation film layer 8 and is embedded in the phosphorus-doped polysilicon layer 5. The N-region electrode is made of silver paste;

[0088] After printing the electrodes, sinter the silicon wafer at 720 °C in a sintering furnace. The electrodes form an ohmic contact with the silicon wafer to fabricate a TBC solar cell.

[0089] Comparative Example 1

[0090] The main difference from Example 1 is that two mask layers are prepared and the N-region and P-region doping layers are prepared by the method of intrinsic polysilicon diffusion doping.

[0091] S1. Perform double-sided polishing on the N-type substrate silicon wafer. The specifications of the N-type substrate silicon wafer are: thickness 140 um, size 166 × 166 mm; the polishing includes etching the surface of the N-type substrate silicon wafer with a potassium hydroxide solution with a mass concentration of 12%, the polishing temperature is 75 °C, and the polishing time is 4 min;

[0092] Grow the first tunneling oxide layer and the intrinsic polysilicon layer on the back side of the silicon wafer in sequence, specifically including:

[0093] Place the alkali-polished silicon wafer in a low-pressure chemical vapor deposition (LPCVD) device, and grow the first tunneling oxide layer 1 with a thickness of 1.7 nm and the intrinsic polysilicon layer with a thickness of 300 nm in sequence; the first tunneling oxide layer is silicon dioxide;

[0094] The process conditions of LPCVD are as follows: the first tunneling oxide layer is grown by oxidation under O2 working gas, the process temperature is 620 °C, and the oxidation time is 50 min; subsequently, under the condition that the process temperature is 550 °C, intrinsic polysilicon layer is deposited using silane as the working gas.

[0095] S2. Place the silicon wafer in a high-temperature diffusion furnace for boron diffusion, and the intrinsic polysilicon layer is converted into a boron-doped polysilicon layer; the process conditions of boron diffusion: use N2 as the working gas, use BBr3 as the doping gas, the diffusion temperature of boron diffusion is 860 °C, and the diffusion time is 30 min; after boron diffusion, the doping concentration of the boron-doped polysilicon layer is 3×10 20 cm 3 .

[0096] S3. Grow the first mask layer on the boron-doped polysilicon layer on the back of the silicon wafer;

[0097] The first mask layer is a silicon dioxide mask layer with a thickness of 60 nm, which is prepared by the method of high-temperature oxidation, the oxidation temperature is 960 °C, and the oxygen flow rate is 15 slm.

[0098] S4. Remove the first mask layer, the first tunneling oxide layer and the intrinsic polysilicon layer that are plated around the front and side of the silicon wafer. Use a chain cleaning equipment, and the liquid medicine is a conventional mixed solution of HF, HNO3 and H2O.

[0099] S5. Set a patterned P region on the back of the silicon wafer. Use a green light picosecond laser to perform laser window opening on the back of the silicon wafer, remove the first mask layer in the window opening area, and then use an alkali solution to polish the window opening area;

[0100] Among them, the laser wavelength of the green light picosecond laser is 532 nm, and the power is 50 W; the window opening area and the P region are arranged in a cross pattern, and the widths of the window opening area and the P region are both 500 μm.

[0101] Among them, using an alkali solution to polish the N region includes using 20% by mass of NaOH to corrode and remove the first tunneling oxide layer and the boron-doped polysilicon layer in the N region.

[0102] S6. Use LPCVD to grow the second tunneling oxide layer and the intrinsic polysilicon layer on the back of the silicon wafer, including: the thickness of the second tunneling oxide layer is 1.3 nm, the thickness of the intrinsic polysilicon layer is 200 nm, and the process conditions involved are: the first tunneling oxide layer is grown by oxidation under oxygen working gas, the process temperature is 600 °C, and the oxidation time is 20 min; subsequently, under the condition that the process temperature is 600 °C, intrinsic polysilicon layer is deposited using silane.

[0103] S7, phosphorus-doping the intrinsic polysilicon layer to form a phosphorus-doped polysilicon layer, and growing a second mask layer on the phosphorus-doped polysilicon layer, including:

[0104] The process conditions for phosphorus diffusion doping of the intrinsic polysilicon layer using a phosphorus diffusion device are as follows: phosphorus diffusion temperature is 880°C, diffusion time is 40 min, and phosphorus doping concentration of the polysilicon layer is 4×10 20 cm -3 .

[0105] The second mask layer is a silicon dioxide mask layer with a thickness of 50 nm, which is grown by oxidation under oxygen working gas, with an oxygen flow rate of 15 slm, an oxidation temperature of 900° C., and an oxidation time of 40 min.

[0106] S8, using a picosecond green laser to remove the second mask layer above the P region, and to make grooves on the second mask layer on the window region to form an isolation region, where the area without grooves on the window region is the N region, and the isolation region is distributed between the P region and the N region, and the P region and the N region are arranged in a cross shape;

[0107] A groove is formed on the second mask layer on the window area to form an isolation region, and the groove width is 40 μm, that is, an isolation region with a width of 40 μm is formed, and the ungrooved region is an N region with a width of 460 μm.

[0108] Among them, the working parameters of the picosecond green laser are: laser wavelength is 532nm, power is 45w.

[0109] S9, using an alkaline solution to etch and remove the phosphorus-doped polysilicon layer and the second tunnel oxide layer on the P region and the isolation region on the back of the silicon wafer, and forming a pyramid light trapping structure in the isolation region and the front of the silicon wafer; the alkaline solution used is a sodium hydroxide solution with a mass fraction of 1.5%. Then, a 1% HF solution is used to clean and remove the first mask layer and the second mask layer remaining on the back surface.

[0110] S10. Depositing an aluminum oxide passivation film layer and a silicon nitride passivation anti-reflection film layer on both sides of the silicon wafer in sequence, including: using an atomic layer deposition device to deposit an aluminum oxide passivation film layer with a thickness of 3 nm on both sides of the silicon wafer, wherein the deposition gas uses trimethylaluminum (TMA) with a flow rate of 20 sccm, the deionized water flow rate is 20 sccm, the deposition temperature is 300°C, the reaction pressure is 0.8 mbar, and the number of cycles is 25 times.

[0111] Deposit a silicon nitride passivation and antireflection film layer in a tube-type PECVD equipment. The thickness of the front-side silicon nitride passivation and antireflection film layer is 75 nm, and the refractive index is 2.03. The process parameters are as follows: the flow rate of SiH4 is 800 sccm, NH3 is 8000 sccm, the reaction pressure is 1750 mTorr, the deposition temperature is 480 °C, and the deposition time is 800 s. The thickness of the back-side silicon nitride passivation and antireflection film layer is 80 nm, and the refractive index is 2.1. The process parameters are as follows: the flow rate of SiH4 is 1200 sccm, NH3 is 8000 sccm, the reaction pressure is 1800 mTorr, the deposition temperature is 480 °C, and the deposition time is 700 s.

[0112] S11. Print electrodes on the P region and N region on the back side of the silicon wafer. The P-region electrode is made of silver-aluminum paste, and the N-region electrode is made of silver paste. After printing the electrodes, sinter the silicon wafer at a high temperature of 720 °C in a sintering furnace, and an ohmic contact is formed between the electrodes and the silicon wafer to fabricate a TBC solar cell.

[0113] Performance detection:

[0114] Perform battery performance detection on the TBC solar cells prepared in the examples and comparative examples to obtain Table 1. Table 1 shows data such as the photoelectric conversion efficiency (Eta), open-circuit voltage (Voc), short-circuit current Isc, fill factor (FF), and battery leakage value (Irev2) of the battery.

[0115] Table 1. Battery performance data

[0116] Serial number Eta (%) Voc (mV) Isc (mA) FF (%) Irev2 (A) Example 1 26.7％ 746 42.33 84.48 0.02 Comparative Example 1 26.4％ 742 42.33 84.03 0.02

[0117] It can be seen that the battery fabricated by the method of Example 1 has a relatively high open-circuit voltage, fill factor, and photoelectric conversion efficiency, indicating that the present invention can improve the battery performance by simplifying the mask structure manufacturing process and enhancing the concentration and uniformity of the P-region doping layer, and has industrial production value.

[0118] Finally, it should be noted that the above are only the preferred embodiments of the present invention and are not used to limit the present invention. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements on some of the technical features. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

Claims

1. A method for manufacturing a TBC solar cell, characterized in that: The following steps are involved: The silicon wafer is double-sided polished, and a first tunneling oxide layer and an intrinsic polysilicon layer are sequentially grown on the back side of the silicon wafer; Boron diffusion, the intrinsic polysilicon layer is converted into a first boron-doped polysilicon layer; A patterned P region is provided on the back of the silicon wafer, and a first boron-doped polysilicon layer in the P region is converted into a second boron-doped polysilicon layer by a first laser boron doping; Etching and removing the first boron-doped polysilicon layer and the first tunnel oxide layer outside the P region on the back side of the silicon wafer, and forming a polished surface on the exposed silicon wafer; A second tunneling oxide layer, a phosphorus-doped polysilicon layer and a silicon dioxide mask layer are sequentially grown on the back side of the silicon wafer; The silicon dioxide mask layer on the P region is removed and grooves are made on the silicon dioxide mask layer on the polished surface, wherein the grooved region on the silicon dioxide mask layer forms an isolation region, and the ungrooved region is an N region, the P region and the N region are arranged in a cross shape, and the isolation region is distributed between the P region and the N region; The phosphorus-doped polysilicon layer in the P region is removed, the phosphorus-doped polysilicon layer and the second tunnel oxide layer in the isolation region are removed, and a pyramid light trapping structure is formed in the isolation region and the front side of the silicon wafer; Annealing the silicon wafer; Performing a second laser boron doping in the P region, the second boron doped polysilicon layer is converted into a P+ region boron doped polysilicon layer; Aluminum oxide passivation film layer and silicon nitride passivation anti-reflection film layer are deposited on both sides of the silicon wafer in sequence; The electrodes are printed and sintered to form TBC solar cells.

2. A method for manufacturing a TBC solar cell according to claim 1, characterized in that: The thickness of the first tunneling oxide layer is 1.2-1.8 nm; the thickness of the intrinsic polysilicon layer is 150-350 nm.

3. A method for manufacturing a TBC solar cell according to claim 1, characterized in that: The diffusion temperature of the boron diffusion is 840-940° C., and the diffusion time is 30-50 min.

4. A method for manufacturing a TBC solar cell according to claim 1, characterized in that: The doping concentration of the first boron-doped polysilicon layer is 1×10 20 cm -3 -3×10 20 cm -3 .

5. The method for manufacturing a TBC solar cell according to claim 1, characterized in that: The doping concentration of the second boron-doped polysilicon layer is 1×10 21 cm -3 -3×10 21 cm -3 .

6. A method for manufacturing a TBC solar cell according to claim 1, characterized in that: The thickness of the second tunneling oxide layer is 1.2-1.6 nm; the thickness of the phosphorus-doped polysilicon layer is 100-200 nm; and the thickness of the silicon dioxide mask layer is 50-80 nm.

7. The method for manufacturing a TBC solar cell according to claim 1, characterized in that: A picosecond laser is used to remove the silicon dioxide mask layer on the P region and to groove the silicon dioxide mask layer on the polished surface. The picosecond laser has a laser power of 30-50 W, a wavelength of 355-532 nm, and a pulse width of 10-100 Ps.

8. The method for manufacturing a TBC solar cell according to claim 1, characterized in that: The annealing temperature of the annealing treatment is 900-980° C., and the annealing time is 20-50 min.

9. The method for manufacturing a TBC solar cell according to claim 1, characterized in that: The laser pulse width of the second laser boron doping is 1-100ns, the wavelength is 532nm, and the spot energy is 0.3-1J / cm 2 .

10. The method for manufacturing a TBC solar cell according to claim 1, characterized in that: The doping concentration of the boron-doped polysilicon layer in the P+ region is 3×10 20 cm -3 -6×10 20 cm -3 .

11. The method for manufacturing a TBC solar cell according to claim 1, characterized in that: The thickness of the aluminum oxide passivation film layer is 3-5 nm; And / or, the specifications of the silicon nitride passivation anti-reflection film layer include: the thickness of the front silicon nitride passivation anti-reflection film layer is 65-75nm, and the refractive index is 2.03-2.05; And / or, the back silicon nitride passivation anti-reflection film layer has a thickness of 75-85 nm and a refractive index of 2.05-2.

08.

12. A TBC solar cell, characterized in that: It is manufactured by the TBC solar cell manufacturing method described in any one of claims 1-11.

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