Test mask and layout drawing method thereof

By adding a mask layer to identify special graphics areas during the graphic drawing process of the test mask version, and combining basic graphics, special graphics and mask layers, the problems of cumbersome and complex calculations in the existing technology are solved, and the effect of simplifying the process and reducing errors is achieved.

CN120195928APending Publication Date: 2025-06-24CHONGQING XINLIAN MICROELECTRONICS CO LTD
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Patent Information

Application Number
CN202510319045.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-03-18
Publication Date
2025-06-24

AI Technical Summary

Technical Problem

The prior art has problems of repetition, cumbersome and complex calculations in the drawing process of the test mask. Especially when merging basic graphics and special graphics, it is necessary to generate and merge multiple times, and space and calculation coordinates of special graphics need to be reserved, which is prone to layout errors and re-layout problems.

Method used

A layout drawing method for testing mask versions is proposed, including generating the original test layout, adding a mask layer to identify special graphics areas, merging basic graphics, special graphics and mask layers, and finally performing mask version rule checks, retaining basic graphics that comply with the rules and protecting special graphics areas from being inspected.

Benefits of technology

The graphical drawing process of the test mask version is simplified, the number of generation and merges is reduced, layout errors and re-layout problems are avoided, and the possibility of layout errors is reduced.

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Abstract

The invention provides a test mask and a layout drawing method thereof, and the method comprises the steps: generating an original test layout which comprises a basic graph and a special graph; adding a mask layer on the special pattern, and combining the basic pattern, the special pattern and the mask layer; mask rule checking is executed, the basic graph is checked, the basic graph conforming to the mask rule is reserved, the mask layer is recognized by the script, and mask rule checking is not executed on the corresponding special graph under the mask layer. According to the method, the layout drawing process of the test mask is simplified, the original multi-time generation and multi-time combination are simplified into one-time generation and one-time combination, and layout errors caused by the fact that the reserved area needs to be calculated in a basic graph are avoided; relayout and modification of the whole test layout caused by insufficient original reserved area due to change of special graphs are avoided; in addition, coordinate calculation errors possibly existing in the special graph merging process are avoided, and the possibility of layout errors of the mask is reduced.
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Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuits, and particularly relates to a test mask and a layout drawing method thereof. Background Art

[0002] The test mask includes SRAF Split Pattern (sub-resolution assist feature split test pattern), Original Pattern (original pattern without added SRAF), and POST OPC Pattern (pattern after OPC correction). The patterns in the Original Pattern are the parts without inserting SRAF and without OPC correction, and some special patterns may be needed. The purpose of the special patterns is to detect the limit of photomask manufacturing ability and the risk of SRAF printing (exposure and development), but these special patterns cannot be cleared by the MRC (Mask Rule Checking) step. The existing method is as follows: (1) separately generate the basic patterns and special patterns in the original pattern; (2) merge the basic patterns, and at the same time reserve the placement space for the special images; (3) merge the special patterns; (4) perform MRC clean (mask rule checking and cleaning) on the merged basic pattern part; (5) merge the merged pattern after MRC clean with the merged special patterns again to generate the overall original pattern part. The disadvantages of the existing method are: (1) it is necessary to separately generate the basic pattern and the special pattern, merge them separately, then perform MRC clean on the basic pattern, and finally merge all the patterns, and the process is repeated and cumbersome; (2) when merging the basic pattern, it is necessary to plan in advance and calculate the reserved area and coordinates of the special pattern. If it is necessary to add a special pattern or the area of the special pattern exceeds the planned area, the whole process needs to be adjusted. If the coordinates are input incorrectly during the final merge, it is also necessary to merge again. Summary of the Invention

[0003] The purpose of the present invention is to provide a test mask and a layout drawing method thereof, so as to solve at least one of the problems of repeated, cumbersome process and complex calculation in the graphic drawing of the test mask.

[0004] To solve the above technical problems, the present invention provides a layout drawing method for a test mask, including:

[0005] Generate an original test layout, where the original test layout includes basic patterns and special patterns;

[0006] Add a mask layer on the special pattern, and the mask layer is used to be recognized by a script for the special pattern area;

[0007] Merge the basic pattern, the special pattern and the mask layer to obtain a final test layout;

[0008] Perform mask rule checking, check the basic patterns and retain the basic patterns that conform to the mask rules, and the mask layer is recognized by the script, and the corresponding special patterns under the mask layer do not perform mask rule checking.

[0009] Optionally, the basic pattern includes multiple sub-patterns, and when merging the basic pattern, the special pattern and the mask layer, the multiple sub-patterns in the basic pattern are merged simultaneously.

[0010] Optionally, the special pattern includes multiple sub-patterns, and when merging the basic pattern, the special pattern and the mask layer, the multiple sub-patterns in the special pattern are merged simultaneously.

[0011] Optionally, the mask layer includes multiple sub-patterns, and the sub-patterns of the mask layer correspond one-to-one with the sub-patterns of the special pattern.

[0012] Optionally, the critical dimension of the sub-pattern of the mask layer is at least larger than the critical dimension of the corresponding sub-pattern of the special pattern to completely cover the corresponding sub-pattern of the special pattern.

[0013] Optionally, when merging the basic pattern, the special pattern and the mask layer, the multiple sub-patterns of the mask layer are merged simultaneously.

[0014] Optionally, the sub-patterns of the special pattern include sub-patterns for detecting the limit of mask making ability, sub-patterns for testing the exposure and development risk of SRAF patterns, and sub-patterns for checking the process window of basic patterns.

[0015] Optionally, in the mask rule checking, the sub-patterns in the basic pattern that do not conform to the mask making rules are removed.

[0016] Optionally, after performing the mask rule checking, the test layout is made into a mask.

[0017] Based on the same inventive concept, the present invention also provides a mask, which is made into a mask using the test layout drawing method of the test mask as described in any one of the above.

[0018] In the layout drawing method of the test mask provided by the present invention, an original test layout is first generated, and the original test layout includes basic graphics and special graphics; then a mask layer is added to the special graphics, and the mask layer is used to be recognized by a script for the special graphics area; then the basic graphics, the special graphics and the mask layer are combined to obtain the final test layout; finally, a mask rule check is performed, the basic graphics are checked, and the basic graphics that conform to the mask rules are retained, and the mask layer is recognized by the script, and the special graphics corresponding to the mask layer are not subject to the mask rule check. The present invention simplifies the process of graphic drawing of the test mask, which is simplified from multiple generations and multiple combinations to one generation and one combination, and avoids the layout error caused by the need to calculate and reserve the area in the basic graphics; and avoids the need to re-layout and modify the entire test layout due to insufficient original reserved area caused by the change of the special graphics; it also avoids the possible coordinate calculation errors during the combination of special graphics, reducing the possibility of layout errors of the mask. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Those of ordinary skill in the art will understand that the provided drawings are used to better understand the present invention and do not constitute any limitation to the scope of the present invention. Among them:

[0020] Figure 1 is a schematic diagram of the layout drawing method of the test mask according to an embodiment of the present invention.

[0021] Figure 2 is a schematic diagram of the basic graphics in the original test layout according to an embodiment of the present invention.

[0022] Figure 3 is a schematic diagram of the special graphics in the original test layout according to an embodiment of the present invention.

[0023] Figure 4 is a schematic diagram of the mask layer in the original test layout according to an embodiment of the present invention.

[0024] Figure 5 is a schematic diagram of the special graphics in the original test layout according to another embodiment of the present invention.

[0025] Figure 6 is a schematic diagram of the combined test layout according to an embodiment of the present invention.

[0026] Figure 7 is a schematic diagram of the test layout after performing the mask rule check according to an embodiment of the present invention.

[0027] In the drawings:

[0028] 10 - Merged test layout; 11 - Basic pattern; 11a - Sub - pattern of the basic pattern; 12 - Special pattern; 12a - Sub - pattern of the special pattern; 12b - First sub - pattern of the special pattern; 12c - Second sub - pattern of the special pattern; 13 - Mask layer; 13a - Sub - pattern of the mask layer; 20 - Test layout after performing mask rule check. Detailed implementation mode

[0029] To make the objectives, advantages and features of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be noted that the accompanying drawings are in a very simplified form and not drawn to scale, and are only used to conveniently and clearly assist in explaining the objectives of the embodiments of the present invention. In addition, the structures shown in the accompanying drawings are often part of the actual structures. In particular, the emphasis that each accompanying drawing needs to show is different, and sometimes different scales are used.

[0030] As used in the present invention, the singular forms "a", "an" and "the" include plural objects. The term "or" is generally used in the sense of including "and / or". The term "several" is generally used in the sense of including "at least one". The term "at least two" is generally used in the sense of including "two or more". In addition, the terms "first", "second", "third" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the quantity of the indicated technical features. Thus, the features defined with "first", "second", "third" may explicitly or implicitly include one or at least two of such features. In addition, as used in the present invention, when an element is disposed on another element, it generally only means that there is a connection, coupling, cooperation or transmission relationship between the two elements, and the two elements can be directly or indirectly connected, coupled, cooperated or transmitted through an intermediate element, and cannot be understood as indicating or implying the spatial position relationship between the two elements, that is, an element can be in any position such as inside, outside, above, below or on one side of another element, unless otherwise explicitly stated in the content. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0031] Figure 1 It is a schematic diagram of the layout drawing method of the test mask of the embodiment of the present invention. As Figure 1 shown, this embodiment provides a layout drawing method for a test mask, including:

[0032] Step S10, generating an original test layout, where the original test layout includes a basic pattern and a special pattern;

[0033] Step S20, adding a mask layer on the special pattern, where the mask layer is used to be recognized by a script for the special pattern area;

[0034] Step S30: Combine the basic graphics, the special graphics, and the mask layer to obtain the final test layout.

[0035] Step S40: Perform mask rule checking, check the basic graphics and retain the basic graphics that conform to the mask rules, and the mask layer is recognized by the script. The special graphics corresponding to the mask layer do not perform mask rule checking.

[0036] Figure 2 is a schematic diagram of the basic graphics in the original test layout of the embodiment of the present invention. Figure 3 is a schematic diagram of the special graphics in the original test layout of the embodiment of the present invention. Figure 4 is a schematic diagram of the mask layer in the original test layout of the embodiment of the present invention. Figure 5 is a schematic diagram of the special graphics in the original test layout of another embodiment of the present invention. Figure 6 is a schematic diagram of the combined test layout of the embodiment of the present invention. Figure 7 is a schematic diagram of the test layout after performing mask rule checking in the embodiment of the present invention. To make the above objects, features, and beneficial effects of the present invention more obvious and understandable, the following combines the accompanying drawings of the specification Figures 2 to 7 to make a detailed description of the specific embodiments of the present invention.

[0037] As Figure 2 shown, the basic graphics 11 in the original layout include multiple sub-graphics, that is, the sub-graphics 11a of the basic graphics. The sub-graphics 11a of the basic graphics correspond to the lithography graphics in different regions of the wafer, and the requirements for the lithography graphics in different regions are different. Therefore, the spacing and critical dimensions of the sub-graphics of different basic graphics are different.

[0038] As Figure 3 shown, the special graphics 12 in the original layout include multiple sub-graphics, that is, the sub-graphics 12a of the special graphics. The functions of the sub-graphics 12a of different special graphics are different, and the shapes and critical dimensions of the sub-graphics 12a of different special graphics are also different. Specifically, the sub-graphics 12a of the special graphics include sub-graphics of special graphics for detecting the limit of mask manufacturing ability, sub-graphics of special graphics for testing the exposure and development risks of SRAF graphics (Sub Resolution Assist Feature), and sub-graphics of special graphics for checking the process window of basic graphics.

[0039] In this embodiment, as Figure 5As shown, the first sub-graphic 12b of the special graphic is used to test the exposure and development risk of the SRAF graphic. Since the SRAF graphic cannot be developed in the lithography graphic of the wafer, it can be designed as a sub-graphic of the special graphic in the layout of the test mask. For example, the distance between the SRAF graphic and the target graphic ranges from the closest to gradually farther away, so as to obtain the distance at which the SRAF graphic is not developed, and to verify the exposure and development risk of the SRAF graphic at different distances. The second sub-graphic 12c of the special graphic is used to detect the limit of the mask manufacturing ability. The critical dimension of the second sub-graphic 12c of the special graphic is designed to be 5 nm to 10 nm smaller than the critical dimension of the mask manufacturing ability limit. For example, if the critical dimension of the mask manufacturing ability limit is 20 nm, the critical dimension of the second sub-graphic 12c of the special graphic is, for example, 15 nm; if the critical dimension of the mask manufacturing ability limit is 25 nm, the critical dimension of the second sub-graphic 12c of the special graphic is, for example, 20 nm. After transferring the special graphic in the test mask to the test wafer, the shape and critical dimension of the special graphic are tested to determine whether the shape and critical dimension of the special graphic meet the preset requirements, so as to detect the limit of the mask manufacturing ability. It should be emphasized that due to the different materials of the masks, the limit of each mask manufacturing ability is different, and the specific parameters of the mask manufacturing ability limit in this embodiment are not restricted. In other embodiments, the sub-graphic of the special graphic is also used to check the critical dimension process window of the basic graphic, and the sub-graphic of the special graphic can also be used for any lithography graphic or process window that needs to be verified.

[0040] As Figure 4 shown, a mask layer 13 is added to the special graphic 12. The mask layer 13 is used to identify the special graphic area during the mask rule check. The mask layer 13 is also called the block layer. In fact, the mask layer 13 is a virtual layer, which only identifies the area where the special graphic 12 is located during the mask rule check, so that the special graphic 12 is not subject to the mask rule check during the mask rule check. That is, even if the graphics within the special graphic 12 area do not conform to the mask rules, they do not need to be cleared. The mask layer 13 includes multiple sub-graphics, that is, the sub-graphic 13a of the mask layer, and the sub-graphic 13a of the mask layer and the sub-graphic 12a of the special graphic correspond one by one. The critical dimension of the sub-graphic 13a of the mask layer is at least larger than the critical dimension of the corresponding sub-graphic 12a of the special graphic, so as to completely cover the corresponding sub-graphic 12a of the special graphic. That is, during the mask rule check, the sub-graphics within the special graphic area are completely protected from being cleared.

[0041] As Figure 6As shown, the basic pattern 11, the special pattern 12, and the mask layer 13 are merged to obtain the final merged test layout 10. When merging the basic pattern 11, the special pattern 12, and the mask layer 13, multiple sub-patterns in the basic pattern, multiple sub-patterns in the special pattern, and multiple sub-patterns of the mask layer are merged simultaneously. As Figure 6 shown, the mask layer 13 is above the special pattern 12 and completely covers the special pattern 12, and the special pattern 12 is located in the middle of the basic pattern 11, that is, the basic pattern 11 is arranged around the special pattern 12. In the prior art, since the basic pattern is merged first, and a position for the special pattern is reserved when merging the basic pattern, then the mask rule check is performed on the merged basic pattern, and then the special pattern is merged, and then the special pattern is merged into the basic pattern through coordinate calculation.

[0042] When calculating the reserved area for the special pattern in the basic pattern, it may cause layout errors, and it may also cause the entire layout pattern to be re-layout and modified due to the change of the special pattern and the insufficient original reserved area, and precise and complex calculations are required when merging the special pattern into the basic pattern subsequently. In this embodiment, the basic pattern and the special pattern are merged at one time, avoiding the layout errors caused by the need to calculate the reserved area in the basic pattern; and avoiding the re-layout and modification of the entire test layout due to the change of the special pattern and the insufficient original reserved area; and also avoiding the possible coordinate calculation errors during the merging process of the special pattern, reducing the possibility of mask layout errors.

[0043] As Figure 7 shown, in the execution of the mask rule check (Mask Rule Checking, MRC), the sub-patterns in the basic pattern 11 that do not meet the mask manufacturing specifications are removed to form the test layout 20 after the mask rule check is executed. Since the special pattern 12 is covered by the mask layer 13, when the mask rule check is executed, the script recognizes the mask layer 13, and the mask rule is not executed in the area of the special pattern 12 covered by the mask layer 13, that is, the patterns in the area of the special pattern 12 do not meet the mask rules and will not be cleared. Therefore, in the execution of the mask rule check, the mask layer 13 protects the integrity of the entire pattern in the area of the special pattern 12.

[0044] After the mask rule check is executed, the test layout is made into a mask.

[0045] This embodiment also provides a mask, which is made from a test layout drawn by the test mask layout drawing method described in any one of the above.

[0046] In summary, in the layout drawing method of the test mask provided in the embodiment of the present invention, an original test layout is first generated, and the original test layout includes basic graphics and special graphics; then a mask layer is added to the special graphics, and the mask layer is used to be recognized by a script for the special graphic area; then the basic graphics, the special graphics, and the mask layer are merged to obtain a final test layout; finally, a mask rule check is performed, the basic graphics are checked, and the basic graphics that conform to the mask rules are retained, and the mask layer is recognized by the script, and the special graphics corresponding to the mask layer are not subject to the mask rule check. The present invention simplifies the process of drawing the graphics of the test mask, which is simplified from multiple generations and multiple merges to one generation and one merge, and avoids the layout error caused by the need to calculate and reserve the area in the basic graphics; and avoids the need to re-layout and modify the entire test layout due to insufficient original reserved area caused by the change of the special graphics; it also avoids the possible coordinate calculation errors during the merging process of the special graphics, reducing the possibility of layout errors of the mask.

[0047] It should be noted that the embodiments in this specification are described in a progressive manner, and the key points of each embodiment are the differences from other embodiments. The same or similar parts between the embodiments can be referred to each other. In addition, the different parts between the embodiments can also be combined and used with each other, and the present invention does not limit this.

[0048] In addition, it should also be recognized that although the present invention has been disclosed above with preferred embodiments, the above embodiments are not intended to limit the present invention. For any person skilled in the art, without departing from the scope of the technical solution of the present invention, many possible changes and modifications can be made to the technical solution of the present invention by using the disclosed technical content, or modified into equivalent embodiments with equivalent changes. Therefore, any simple modification, equivalent change, and modification made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solution of the present invention still fall within the scope of the protection of the technical solution of the present invention.

Claims

1. A method for drawing a layout of a test mask, characterized in that: include: Generate an original test layout, wherein the original test layout includes basic graphics and special graphics; Adding a mask layer on the special graphic, the mask layer is used for the script to identify the special graphic area; Merging the basic pattern, the special pattern and the mask layer to obtain a final test layout; Perform mask rule check, check the basic graphics and retain the basic graphics that meet the mask rule, and the mask layer is recognized by the script, and the special graphics corresponding to the mask layer do not perform mask rule check.

2. The method for drawing a layout of a test mask according to claim 1, characterized in that: The basic pattern includes a plurality of sub-patterns, and when the basic pattern, the special pattern and the mask layer are merged, the plurality of sub-patterns in the basic pattern are merged simultaneously.

3. The method for drawing a layout of a test mask according to claim 1, characterized in that: The special pattern includes a plurality of sub-patterns, and when the basic pattern, the special pattern and the mask layer are merged, the plurality of sub-patterns in the special pattern are merged simultaneously.

4. The method for drawing a layout of a test mask according to claim 3, characterized in that: The mask layer includes a plurality of sub-patterns, and the sub-patterns of the mask layer correspond to the sub-patterns of the special pattern one by one.

5. The method for drawing a layout of a test mask according to claim 4, characterized in that: The critical size of the sub-pattern of the mask layer is at least larger than the critical size of the corresponding sub-pattern of the special pattern, so as to completely cover the corresponding sub-pattern of the special pattern.

6. The method for drawing a layout of a test mask according to claim 4, characterized in that: When the basic pattern, the special pattern and the mask layer are merged, a plurality of sub-patterns of the mask layer are merged simultaneously.

7. The method for drawing a layout of a test mask according to claim 3, characterized in that: The sub-patterns of the special patterns include sub-patterns for detecting the limit of mask manufacturing capability, sub-patterns for testing the exposure and development risks of SRAF patterns, and sub-patterns for checking the process window of basic patterns.

8. The method for drawing a layout of a test mask according to claim 1, characterized in that: In performing the mask rule check, sub-patterns in the basic pattern that do not comply with the mask manufacturing rule are removed.

9. The method for drawing a layout of a test mask according to claim 1, characterized in that: After performing the mask rule check, the test layout is made into a mask.

10. A test mask, characterized in that: A test mask is made by using a test layout drawn by the method for drawing a test mask layout as claimed in any one of claims 1 to 9.