Probabilistic Cellular Automata Computing System and Its Preparation Method

Abstract

The present invention relates to the field of semiconductor technology and provides a probabilistic cellular automaton computing system and a preparation method thereof. The system includes a control module and at least three computing modules arranged in an array. The control module determines the computing module corresponding to the cell in the state to be determined and the computing modules corresponding to the adjacent cells of the cell in the state to be determined based on the cell in the state to be determined, and generates a corresponding control signal and sends it to the corresponding selected computing module; the computing module corresponding to the adjacent cell obtains the cell state information stored therein based on the received control signal and sends the obtained cell state information to the computing module corresponding to the cell in the state to be determined; the computing module corresponding to the cell in the state to be determined obtains the cell state information stored therein based on the received control signal and performs corresponding logical operations based on the received cell state information. The present invention uses the computing modules arranged in an array to construct a probabilistic cellular automaton with high parallelization, high energy efficiency, and low hardware cost.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a probabilistic cellular automaton computing system and a preparation method thereof. Background Art

[0002] Cellular automata (CA) is a fully parallel computational model proposed by John Von Neumann. The CA model consists of a discrete cellular space composed of a number of cells, each of which has a finite number of information bits. Driven by the same clock, the state of each cell is updated synchronously (in parallel) according to the same local evolutionary rules. Building on this foundation, researchers have further introduced randomness to develop probabilistic cellular automata (PCA) to better simulate the uncertainty and complexity of the real world.

[0003] Probabilistic cellular automata are important models for simulating complex dynamic systems. However, existing probabilistic cellular automata are generally based on the traditional von Neumann architecture in both software and hardware implementations. Due to the separation of computing units and storage units, this architecture gradually presents challenges such as the "memory wall problem" and the "power wall problem" when processing data-intensive tasks such as neural networks, which limits the computational efficiency and energy efficiency of probabilistic cellular automata. Summary of the Invention

[0004] The present invention provides a probabilistic cellular automaton computing system and a preparation method thereof, which are used to solve the defects of the prior art such as the "memory wall problem" and the "power consumption wall problem" caused by the separation of computing units and storage units. The system constructs computing modules arranged in an array to construct a probabilistic cellular automaton with high parallelization, high energy efficiency and low hardware cost.

[0005] The present invention provides a probabilistic cellular automaton computing system, comprising a control module and at least three computing modules arranged in an array, wherein the computing modules are used to store cellular state information of cells, and the cells stored in adjacent computing modules are adjacent cells to each other, wherein: the control module determines, based on the cell with a state to be determined, the computing module corresponding to the cell with a state to be determined and the computing modules corresponding to the adjacent cells of the cell with a state to be determined, and generates corresponding control signals based on each selected computing module and sends the signals to the corresponding selected computing modules; the computing modules corresponding to the adjacent cells of the cell with a state to be determined obtain the cellular state information stored therein based on the received control signals, and sends the obtained cellular state information to the computing modules corresponding to the cell with a state to be determined; and the computing modules corresponding to the cell with a state to be determined obtain the cellular state information stored therein based on the received control signals, and performs corresponding logical operations in combination with the received cellular state information, so as to update the state information of the cell with a state to be determined based on the logical operation results.

[0006] According to a probabilistic cellular automaton computing system provided by the present invention, the computing module includes a storage unit, an operation unit, a first switch unit and a second switch unit. For any selected computing module, the first switch unit controls the corresponding switch state according to the control signal corresponding to the control module to control the on-off of the storage unit belonging to the same computing module and the adjacent other selected computing modules; the second switch unit controls the corresponding switch state according to the control signal corresponding to the control module to control the on-off of the storage unit and the operation unit belonging to the same computing module; the storage unit is in the case where the first switch unit is in the open state and the second switch unit is in the disconnected state, or when the first switch unit is in the disconnected state, the second switch unit is in the disconnected state, and the first switch unit of the adjacent other selected computing modules is in the open state. When the first switch unit is in the on state, the cell state information stored therein is obtained and sent to the operation unit of other adjacent selected computing modules; or, when the first switch unit is in the on state and the second switch unit is in the on state, the cell state information stored therein is obtained and sent to the operation unit belonging to the same computing module; the operation unit, when the first switch unit and the second switch unit are in the on state at the same time, receives the cell state information sent by the storage unit belonging to the same computing module and the cell state information sent by the storage unit of other adjacent selected computing modules, and performs corresponding logical operations according to the received cell state information; or, when the first switch unit is in the on state and the second switch unit is in the off state, does not perform the corresponding logical operations.

[0007] According to a probabilistic cellular automaton computing system provided by the present invention, the computing modules corresponding to the adjacent cells of the cell to be determined state include a first computing module and a second computing module, and the computing modules include a storage unit, an operation unit, a first switching unit and a second switching unit, wherein: the control module determines, according to the cell to be determined state, the computing module corresponding to the cell to be determined state and the first computing module and the second computing module corresponding to the adjacent cells of the cell to be determined state; generates a first control signal according to the storage unit of the computing module corresponding to the cell to be determined state and sends the first control signal to the corresponding storage unit; generates a second control signal according to the first switching unit of the computing module corresponding to the cell to be determined state and sends the second control signal to the corresponding a first switch unit; generates a third control signal according to the second switch unit of the computing module corresponding to the state cell to be determined, and sends the third control signal to the corresponding second switch unit; generates a corresponding fourth control signal according to the storage unit corresponding to the first computing module and the second computing module, and sends the corresponding fourth control signal to the corresponding storage unit; generates a fifth control signal according to the first switch unit of the first computing module, and sends the fifth control signal to the corresponding first switch unit; generates a corresponding sixth control signal according to the second switch unit corresponding to the first computing module and the second computing module, and sends the sixth control signal to the corresponding second switch unit; and generates a seventh control signal according to the first switch unit corresponding to the second computing module. signal, and sends the seventh control signal to the corresponding first switch unit; the first switch unit of the computing module corresponding to the cell to be determined controls the corresponding first switch unit to be in the open state according to the received second control signal; the second switch unit of the computing module corresponding to the cell to be determined controls the corresponding second switch unit to be in the open state according to the received third control signal; the first switch unit of the first computing module controls the corresponding first switch unit to be in the open state according to the received fifth control signal; the second switch units corresponding to the first computing module and the second computing module respectively control the corresponding second switch unit to be in the open state according to the corresponding received sixth control signal; the first switch unit corresponding to the second computing module controls the corresponding second switch unit to be in the open state according to the corresponding The received seventh control signal controls the corresponding first switch unit to be in the off state; the storage units corresponding to the first computing module and the second computing module respectively obtain the cell state information stored therein according to the received fourth control signal, and send it to the operation unit of the computing module corresponding to the cell whose state is to be determined; the storage unit of the computing module corresponding to the cell whose state is to be determined obtains the cell state information stored therein according to the received first control signal, and sends it to the operation unit of the computing module corresponding to the cell whose state is to be determined; the operation unit of the computing module corresponding to the cell whose state is to be determined performs the corresponding logical operation according to the received cell state information, and the operation unit of the first computing module and the second computing module do not perform the corresponding logical operation.

[0008] According to a probabilistic cellular automaton computing system provided by the present invention, the cellular state information includes the cell state value and the inverse of the cell state value of the corresponding cell, and the computing unit of the computing module corresponding to the cell with a to-be-determined state adopts a memristor with a preset true random probability. The memristor with a preset true random probability is used to: for the computing module corresponding to the cell with a to-be-determined state and the computing module corresponding to the adjacent cells of the cell with a to-be-determined state, the corresponding cell state value and the inverse of the cell state value are arranged and combined, and for each arrangement and combination, combined with the preset true random probability, a NAND gate logic operation is performed to obtain the operation result of the corresponding arrangement and combination; based on the operation results of all the arrangements and combinations, a low-level operation result is selected as the logic operation result, and based on the logic operation result, the cell state value and the inverse of the cell state value of the cell with a to-be-determined state are updated, and the updated cell state value and the inverse of the cell state value are updated to the storage unit of the computing module corresponding to the cell with a to-be-determined state and the state of the storage unit is updated, and the state of the memristor is updated.

[0009] According to a probabilistic cellular automaton computing system provided by the present invention, the operation unit and / or storage unit includes: a substrate; a first electrode located on the substrate; an insulating layer located on the first electrode; a second electrode located on the insulating layer and connected to the control module; wherein the first electrode of the operation unit is connected to the second switch unit belonging to the same computing module; and the first electrode of the storage unit is respectively connected to the first switch unit and the second switch unit belonging to the same computing module.

[0010] According to a probabilistic cellular automaton computing system provided by the present invention, the first switch unit and / or the second switch unit include: a gate located on a substrate; a gate control layer located on the gate and connected to a control module; a channel material layer located on the gate control layer; a source and a drain located on the gate control layer, and the source and the drain are relatively located on both sides of the channel material layer; wherein the source of the first switch unit and the source of the second switch unit are respectively connected to storage units belonging to the same computing module, the drain of the first switch unit is connected to the source of the second switch unit of other adjacent selected computing modules, and the drain of the second switch unit is connected to the operation unit belonging to the same computing module.

[0011] According to a probabilistic cellular automaton computing system provided by the present invention, the substrate includes a first substrate and a second substrate, the second substrate is located on the first substrate, the material of the first substrate includes at least one of p-type doped silicon, n-type doped silicon and intrinsic silicon, and the material of the second substrate includes at least one of silicon dioxide, hafnium oxide and aluminum oxide; the material of the first electrode includes at least one of titanium, palladium, platinum, bismuth, gold and chromium; the material of the second electrode includes at least one of titanium nitride, silver, copper and aluminum; the material of the insulating layer includes at least one of hafnium oxide, aluminum oxide, silicon oxide and various mixed stacks, the mixed stack is used to represent a multilayer structure with specific properties formed by stacking materials of different materials, different structures or different functions on the same substrate through a preset process; the material of the gate includes at least one of titanium, palladium, platinum, bismuth, gold and chromium; the material of the gate control layer includes at least one of silicon dioxide, hafnium oxide and aluminum oxide; the material of the channel material layer includes at least one of molybdenum sulfide, tungsten selenide and indium tin; the materials of the source and drain include at least one of titanium, palladium, platinum, bismuth, gold and chromium.

[0012] The present invention also provides a method for preparing a probabilistic cellular automaton computing system, which is applied to any of the probabilistic cellular automaton computing systems described above, and the method includes: providing a substrate; forming at least three array-arranged computing modules on the substrate, the computing modules being used to store cellular state information of cells, and the cells stored in adjacent computing modules are adjacent cells to each other; using a preset interconnection technology, interconnecting the at least three array-arranged computing modules, and interconnecting the at least three array-arranged computing modules with the control module respectively.

[0013] According to a preparation method of a probabilistic cellular automaton computing system provided by the present invention, the computing module includes a storage unit, an operation unit, a first switch unit and a second switch unit, and at least three computing modules arranged in an array are formed on a substrate, including: using a first preset mask to etch the substrate to determine the substrate position of the unit corresponding to each computing module; wherein the first preset mask is obtained according to the position and pattern of the unit corresponding to each computing module; growing a bottom back gate at the substrate position corresponding to each first switch unit and each second switch unit to form a corresponding gate; based on wet transfer, transferring the channel material layer grown on the preset substrate to the gate to form a gate control layer, and using a second preset A mask is used to pattern each gate control layer to obtain a corresponding patterned structure; wherein, the second preset mask is obtained according to the position and pattern of the source and drain; using a third preset mask, the substrate position corresponding to each storage unit and operation unit is photoetched to obtain a corresponding photolithography pattern; wherein, the third preset mask is obtained according to the position and pattern of the first electrode; metal sputtering is performed on the patterned structure and the photolithography pattern to form a source and a drain corresponding to the patterned structure, so as to obtain the corresponding first switching unit and the second switching unit, and the first electrode forming the corresponding photolithography pattern; an insulating layer is formed on the first electrode; and a second electrode is formed on the insulating layer to obtain the corresponding operation unit and storage unit.

[0014] According to a method for preparing a probabilistic cellular automaton computing system provided by the present invention, at least three computing modules arranged in an array are formed on a substrate, and the method further includes: using a second preset mask to pattern each gate control layer to obtain a corresponding patterned structure; wherein the second preset mask is obtained based on the position and pattern of the source and drain and the position and pattern of the first interconnection line corresponding to the source and drain respectively; using a third preset mask to perform photolithography on the sub-substrate corresponding to each storage unit and the operation unit to obtain a corresponding photolithography pattern; wherein the third preset mask is obtained based on the position and pattern of the first electrode and the position and pattern of the second interconnection line corresponding to the first electrode; performing metal sputtering on the patterned structure and the photolithography pattern to form a source, a drain, a first interconnection line corresponding to the source, and a first interconnection line corresponding to the drain of the corresponding patterned structure. An interconnection line, and a first electrode corresponding to a photolithographic pattern and a second interconnection line corresponding to the first electrode; using a preset interconnection technology to interconnect at least three array-arranged computing modules, including: using the preset interconnection technology, connecting the first interconnection line corresponding to the drain of each first switch unit with the first interconnection line corresponding to the source of the second switch unit of another adjacent selected computing module, connecting the first interconnection line corresponding to the source of each first switch unit with the second interconnection line corresponding to the first electrode of the computing unit belonging to the same computing module, connecting the first interconnection line corresponding to the drain of each second switch unit with the second interconnection line corresponding to the first electrode of the computing unit belonging to the same computing module, and connecting the first interconnection line corresponding to the source of each second switch unit with the second interconnection line corresponding to the first electrode of the storage unit belonging to the same computing module.

[0015] The present invention also provides an electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the method for preparing any of the above-mentioned probabilistic cellular automaton computing systems is implemented.

[0016] The present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the method for preparing a probabilistic cellular automaton computing system as described in any one of the above.

[0017] The present invention also provides a computer program product, comprising a computer program, which, when executed by a processor, implements the method for preparing any of the above-mentioned probabilistic cellular automaton computing systems.

[0018] The probabilistic cellular automaton computing system and preparation method provided by the present invention use a control module to be responsible for overall coordination and control, so as to identify the corresponding computing module and the computing modules corresponding to the adjacent cells according to the state cell to be determined, generate and send control signals, thereby realizing complex computing tasks and dynamic adjustment, and storing adjacent cells through adjacent computing modules to facilitate the rapid exchange of cell state information and reduce the time delay of data transmission. Each computing module is only responsible for processing and storing the cell state information of a specific cell, avoiding data redundancy and improving data utilization efficiency, thereby constructing a probabilistic cellular automaton with high parallelization, high energy efficiency ratio and low hardware cost. In addition, because the computing modules are arranged in an array and are independent of each other, the states of multiple cells can be calculated and updated simultaneously, which greatly saves computing time and computing resources and greatly improves computing efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the technical solutions in the present invention or the prior art, a brief introduction is given below to the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0020] Figure 1 This is one of the structural diagrams of the probabilistic cellular automaton computing system provided by the present invention;

[0021] Figure 2 This is the second structural diagram of the probabilistic cellular automaton computing system provided by the present invention;

[0022] Figure 3 This is a schematic diagram of the relationship between the pulse width and the corresponding true random probability provided by the present invention;

[0023] Figure 4 This is a schematic diagram of the relationship between the pulse amplitude and the corresponding true random probability provided by the present invention;

[0024] Figure 5 It is a flow chart of a method for preparing a probabilistic cellular automaton computing system provided by the present invention;

[0025] Figure 6-Figure 9 1 is a cross-sectional view corresponding to different steps of the method for preparing the probabilistic cellular automaton computing system provided by the present invention;

[0026] Figure 10 It is a structural schematic diagram of the electronic device provided by the present invention.

[0027] Reference numerals:

[0028] 1: Control module; 2: Computing module; 21: Storage unit; 22: Operation unit; 23: First switch unit; 24: Second switch unit; 25: Voltage divider unit; 31: Substrate; 32: Gate; 33: Gate control layer; 34: Channel material layer; 35: Source / drain; 36: First electrode; 37: Insulating layer; 38: Second electrode. DETAILED DESCRIPTION

[0029] To make the objectives, technical solutions, and advantages of the present invention more clear, the technical solutions of the present invention will be clearly and completely described below in conjunction with the accompanying drawings. Obviously, the embodiments described are only some of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts shall fall within the scope of protection of the present invention.

[0030] Figure 1 This is one of the structural diagrams of the probabilistic cellular automaton computing system provided by the present invention, such as Figure 1 As shown, the system includes a control module and at least three computing modules arranged in an array, the computing modules are used to store cell state information of cells, and the cells stored in adjacent computing modules are adjacent cells to each other, wherein:

[0031] The control module determines, based on the state cell to be determined, the computing module corresponding to the state cell to be determined and the computing modules corresponding to the adjacent cells of the state cell to be determined, and generates a corresponding control signal according to each selected computing module and sends it to the corresponding selected computing module;

[0032] The calculation module corresponding to the adjacent cell of the cell whose state is to be determined obtains the cell state information stored therein according to the received control signal, and sends the obtained cell state information to the calculation module corresponding to the cell whose state is to be determined;

[0033] The computing module corresponding to the cell in the state to be determined obtains the cell state information stored therein according to the received control signal, and performs corresponding logical operations in combination with the received cell state information to update the state information of the cell in the state to be determined according to the result of the logical operation.

[0034] In this embodiment, reference Figure 2The computing module includes a storage unit 21, an operation unit 22, a first switch unit 23 and a second switch unit 24. For any selected computing module, the first switch unit 23 controls the corresponding switch state according to the control signal corresponding to the control module to control the on / off of the storage unit 21 belonging to the same computing module and other adjacent selected computing modules; the second switch unit 24 controls the corresponding switch state according to the control signal corresponding to the control module to control the on / off of the storage unit 21 and the operation unit 22 belonging to the same computing module; the storage unit 21 is in the case where the first switch unit 23 is in the open state and the second switch unit 24 is in the open state, or the first switch unit 23 is in the open state, the second switch unit 24 is in the open state, and the first switch unit 23 of the adjacent other selected computing modules is in the open state. In the case where the first switch unit 23 is in the open state and the second switch unit 24 is in the open state, the cell state information stored therein is obtained and sent to the operation unit 22 of the adjacent other selected computing modules; or, when the first switch unit 23 is in the open state and the second switch unit 24 is in the open state, the cell state information stored therein is obtained and sent to the operation unit 22 belonging to the same computing module; the operation unit 22, when the first switch unit 23 and the second switch unit 24 are in the open state at the same time, receives the cell state information sent by the storage unit 21 belonging to the same computing module, and receives the cell state information sent by the storage unit 21 of the adjacent other selected computing modules, and performs corresponding logical operations according to the received cell state information; or, when the first switch unit is in the open state and the second switch unit is in the disconnected state, does not perform corresponding logical operations.

[0035] Furthermore, the first switch unit is connected to the second switch units of other adjacent selected computing modules.

[0036] Specifically, in an optional embodiment, the computing modules corresponding to the adjacent cells of the cell to be determined include a first computing module and a second computing module, and the computing modules include a storage unit, an operation unit, a first switching unit, and a second switching unit, wherein: the control module determines, according to the cell to be determined, the computing module corresponding to the cell to be determined and the first computing module and the second computing module corresponding to the adjacent cells of the cell to be determined; generates a first control signal according to the storage unit of the computing module corresponding to the cell to be determined and sends the first control signal to the corresponding storage unit; generates a second control signal according to the first switching unit of the computing module corresponding to the cell to be determined and sends the second control signal to the corresponding first switching unit. element; generate a third control signal according to the second switch unit of the computing module corresponding to the state cell to be determined, and send the third control signal to the corresponding second switch unit; generate a corresponding fourth control signal according to the storage unit corresponding to the first computing module and the second computing module, and send the corresponding fourth control signal to the corresponding storage unit; generate a fifth control signal according to the first switch unit of the first computing module, and send the fifth control signal to the corresponding first switch unit; generate a corresponding sixth control signal according to the second switch unit corresponding to the first computing module and the second computing module, and send the sixth control signal to the corresponding second switch unit; and generate a seventh control signal according to the first switch unit corresponding to the second computing module, and send The seventh control signal is sent to the corresponding first switch unit; the first switch unit of the computing module corresponding to the state cell to be determined controls the corresponding first switch unit to be in the open state according to the received second control signal; the second switch unit of the computing module corresponding to the state cell to be determined controls the corresponding second switch unit to be in the open state according to the received third control signal; the first switch unit of the first computing module controls the corresponding first switch unit to be in the open state according to the received fifth control signal; the second switch units corresponding to the first computing module and the second computing module respectively control the corresponding second switch unit to be in the open state according to the corresponding received sixth control signal; the first switch unit corresponding to the second computing module controls the corresponding second switch unit to be in the open state according to the corresponding received sixth control signal The seventh control signal controls the corresponding first switch unit to be in the off state; the storage units corresponding to the first computing module and the second computing module respectively obtain the cell state information stored therein according to the received fourth control signal, and send it to the operation unit of the computing module corresponding to the cell whose state is to be determined; the storage unit of the computing module corresponding to the cell whose state is to be determined obtains the cell state information stored therein according to the received first control signal, and sends it to the operation unit of the computing module corresponding to the cell whose state is to be determined; the operation unit of the computing module corresponding to the cell whose state is to be determined performs the corresponding logical operation according to the received cell state information, and the operation unit of the first computing module and the second computing module does not perform the corresponding logical operation.

[0037] In an optional embodiment, the calculation module further includes a voltage divider unit, which is connected to the operation unit and the second switch unit to implement voltage regulation. It should be noted that the voltage divider unit can select a resistor with a certain resistance value based on actual design selection or prior experience, and is not further limited here.

[0038] In addition, the cell state information includes the cell state value of the corresponding cell and the inverse of the cell state value. The storage unit includes a first storage subunit and a second storage subunit. The first storage subunit is used to store the cell state value of the corresponding cell, and the second storage subunit is used to store the inverse of the cell state value of the corresponding cell.

[0039] In an optional embodiment, the operation unit of the computing module corresponding to the cell of the state to be determined adopts a memristor with a preset true random probability, and the memristor with a preset true random probability is used to: for the computing module corresponding to the cell of the state to be determined and the computing module corresponding to the adjacent cells of the cell of the state to be determined, the corresponding cell state value and the inverse of the cell state value are arranged and combined, and for each arrangement and combination, combined with the preset true random probability, a NAND gate logic operation is performed to obtain the operation result of the corresponding arrangement and combination; according to the operation results of all arrangements and combinations, a low-level operation result is selected as the logic operation result, and according to the logic operation result, the cell state value and the inverse of the cell state value of the cell of the state to be determined are updated, and the updated cell state value and the inverse of the cell state value are updated to the storage unit of the computing module corresponding to the cell of the state to be determined and the state of the storage unit is updated, as well as the state of the memristor is updated.

[0040] It should be added that after updating the status information of the current cell, the status update of the next cell can be obtained by traversing the cell status information stored in the corresponding storage unit. For details, please refer to the cell status update method of the cell with the to-be-determined status described above, which will not be repeated here.

[0041] In addition, the preset true random probability can be adjusted according to the actual design requirements and prior experience to adjust the corresponding pulse width and pulse amplitude. The relationship between pulse width and corresponding true random probability can be referred to Figure 3 As shown, the relationship between the pulse amplitude and the corresponding true random probability can be referred to Figure 4 shown.

[0042] It should be noted that when the voltage pulses applied to the memristor are sufficiently large and long, their evolution rules lose their randomness, allowing the present invention to achieve all the functions of a basic cellular automaton. This invention offers a new approach to developing high-performance computing architectures, breaking away from the traditional von Neumann architecture.

[0043] In an optional embodiment, the storage unit and the computing unit may adopt a memristor, and accordingly, the computing unit and / or the storage unit includes: a substrate; a first electrode, located on the substrate; an insulating layer, located on the first electrode; a second electrode, located on the insulating layer and connected to the control module; wherein the first electrode of the computing unit is connected to the second switching unit belonging to the same computing module; and the first electrode of the storage unit is respectively connected to the first switching unit and the second switching unit belonging to the same computing module.

[0044] In an optional embodiment, the substrate includes a first substrate and a second substrate, the second substrate is located on the first substrate, the material of the first substrate includes at least one of p-type doped silicon, n-type doped silicon and intrinsic silicon, and the material of the second substrate includes at least one of silicon dioxide SiO2, hafnium oxide HfO2 and aluminum oxide ‌Al2O3.

[0045] In an optional embodiment, the material of the first electrode includes at least one of titanium Ti, palladium Pd, platinum Pt, bismuth Bi, gold Au, and chromium Cr.

[0046] In an optional embodiment, the material of the second electrode includes at least one of titanium nitride TiN, silver Ag, copper Cu, and aluminum Al.

[0047] In an optional embodiment, the material of the insulating layer includes at least one of hafnium oxide HfO2, aluminum oxide Al2O3‌, silicon oxide and various mixed stacks. The mixed stack is used to represent a multilayer structure with specific properties formed by superimposing materials of different materials, different structures or different functions on the same substrate through a preset process.

[0048] In an optional embodiment, the first switch unit and the second switch unit can be transistors. Accordingly, the first switch unit and / or the second switch unit include: a substrate; a gate located on the substrate; a gate control layer located on the gate and connected to the control module; a channel material layer located on the gate control layer; a source and a drain located on the gate control layer, and the source and the drain are relatively located on both sides of the channel material layer; wherein the source of the first switch unit and the source of the second switch unit are respectively connected to the storage unit belonging to the same computing module, the drain of the first switch unit is connected to the source of the second switch unit of other adjacent selected computing modules, and the drain of the second switch unit is connected to the operation unit belonging to the same computing module.

[0049] It should be added that the source of the first switch unit and the source of the second switch unit are respectively connected to the first electrode of the storage unit belonging to the same computing module, and the drain of the second switch unit is connected to the first electrode of the operation unit belonging to the same computing module.

[0050] In an optional embodiment, the material of the gate includes at least one of titanium Ti, palladium Pd, platinum Pt, bismuth Bi, gold Au, and chromium Cr.

[0051] In an optional embodiment, the material of the gate control layer includes at least one of silicon dioxide SiO2, hafnium oxide HfO2 and aluminum oxide ‌Al2O3‌.

[0052] In an optional embodiment, the material of the channel material layer includes at least one of molybdenum sulfide MoS2, tungsten selenide WSe2 and indium tin.

[0053] In an optional embodiment, the material of the source and drain electrodes includes at least one of titanium Ti, palladium Pd, platinum Pt, bismuth Bi, gold Au, and chromium Cr.

[0054] In summary, the embodiment of the present invention is responsible for overall coordination and control through the control module, so as to identify the corresponding computing module and the computing modules corresponding to the adjacent cells according to the state cell to be determined, generate and send control signals, thereby realizing complex computing tasks and dynamic adjustments, and storing adjacent cells through adjacent computing modules to facilitate the rapid exchange of cell state information and reduce the time delay of data transmission. Each computing module is only responsible for processing and storing the cell state information of a specific cell, avoiding data redundancy and improving data utilization efficiency, thereby constructing a probabilistic cellular automaton with high parallelization, high energy efficiency and low hardware cost. In addition, since the computing modules are arranged in an array and are independent of each other, the states of multiple cells can be calculated and updated simultaneously, which can greatly save computing time and computing resources and greatly improve computing efficiency.

[0055] The following describes a method for preparing a probabilistic cellular automaton computing system provided by the present invention. The method for preparing the probabilistic cellular automaton computing system described below and the probabilistic cellular automaton computing system described above can refer to each other.

[0056] Figure 5 A schematic flow chart of a method for preparing a probabilistic cellular automaton computing system is shown. The method is applied to any of the above-described probabilistic cellular automaton computing systems, and the method includes:

[0057] S51, providing a substrate;

[0058] S52, forming at least three computing modules arranged in an array on a substrate, the computing modules being used to store cell state information of cells, and the cells stored in adjacent computing modules are adjacent cells to each other;

[0059] S53, using a preset interconnection technology, interconnecting at least three computing modules arranged in an array, and interconnecting at least three computing modules arranged in an array with the control modules respectively.

[0060] It should be noted that the step numbers "S51-S52" in this specification do not represent the order of the preparation method of the probabilistic cellular automaton computing system. Figure 6-Figure 9 The preparation method of the probabilistic cellular automaton computing system of the present invention is described.

[0061] Step S51, reference Figure 6 , providing a substrate 31.

[0062] In this embodiment, the substrate includes a first substrate and a second substrate. The second substrate is formed on the first substrate. The specific material selection can be based on the above description and is not further limited here.

[0063] Preferably, the first substrate is made of P-type doped silicon, and the second substrate is made of silicon dioxide. The combination of P-type doped silicon and silicon dioxide forms a heterostructure that leverages the strengths of both materials, enabling more complex device designs and functions. This facilitates the integration of multiple devices, such as transistors and memristors, on the same chip to achieve more complex circuit functions. In actual design, the thickness of the substrate can be selected based on actual design requirements or prior experience, such as 300 nm, and is not further limited here.

[0064] Step S52 : forming at least three computing modules arranged in an array on the substrate, wherein the computing modules are used to store cell state information of cells, and the cells stored in adjacent computing modules are adjacent cells to each other.

[0065] In this embodiment, the calculation module includes a storage unit, a calculation unit, a first switch unit and a second switch unit. The specific structure can be referred to above and will not be repeated here.

[0066] Accordingly, refer to Figure 7-Figure 9, forming at least three array-arranged computing modules on a substrate, including: using a first preset mask, performing photolithography and etching on the substrate to determine the substrate position of the unit corresponding to each computing module; wherein the first preset mask is obtained according to the position and pattern of the unit corresponding to each computing module; growing a bottom back gate at the substrate position corresponding to each first switch unit and each second switch unit to form a corresponding gate 32; based on wet transfer, transferring the channel material layer grown on the preset substrate to the gate to form a gate control layer 33, and using a second preset mask, patterning each gate control layer to obtain a corresponding patterned structure; wherein the second preset Assume that the mask is obtained according to the position and pattern of the source and drain; use the third preset mask to perform photolithography on the substrate position corresponding to each storage unit and operation unit to obtain the corresponding photolithography pattern; wherein the third preset mask is obtained according to the position and pattern of the first electrode; metal sputtering is performed on the patterned structure and the photolithography pattern to form the source and drain 35 of the corresponding patterned structure to obtain the corresponding first switching unit and the second switching unit, and the first electrode 36 with the corresponding photolithography pattern; an insulating layer 37 is formed on the first electrode 36; and a second electrode 38 is formed on the insulating layer 37 to obtain the corresponding operation unit and storage unit.

[0067] It should be noted that the formation method of the second electrode can refer to the first electrode and will not be further described here. In addition, the preset substrate can be a sapphire substrate, that is, a channel material layer is pre-formed on the sapphire substrate so that it can be subsequently transferred to the corresponding gate layer using a casting transfer method. In addition, both the gate layer and the insulating layer can be formed using a deposition process. The deposition process can be any suitable method known to those skilled in the art, such as chemical vapor deposition, physical vapor deposition, or atomic layer deposition, and is not further limited here.

[0068] Furthermore, using a first preset mask, the substrate is photolithographically and etched to determine the substrate position of the unit corresponding to each computing module, including: coating a photoresist on the substrate surface to form a photoresist layer; defining the first preset mask according to the required shape and position of each unit corresponding to each computing module, and exposing, developing, and etching the first preset mask to obtain a substrate corresponding to the substrate position of each unit corresponding to each computing module. In addition,

[0069] It should be noted that the specific method for patterning each gate control layer using the second preset mask to obtain the corresponding patterned structure can be determined based on the actual patterning method used. When a photolithography process is used for patterning, the specific method can be referred to above and will not be repeated here. Furthermore, the specific method for photolithography of the substrate locations corresponding to each storage unit and computing unit using the third preset mask to obtain the corresponding photolithographic pattern can also be referred to above and will not be further explained here.

[0070] In an optional embodiment, the computing module also includes a voltage divider unit. Accordingly, at least three array-arranged computing modules are formed on the substrate, and further include: providing a voltage divider unit; and connecting the voltage divider unit to the drain of the corresponding first electrode and the second switching unit using a preset interconnection technology.

[0071] In an optional embodiment, at least three array-arranged computing modules are formed on a substrate, further comprising: using a second preset mask to pattern each gate control layer to obtain a corresponding patterned structure; wherein the second preset mask is obtained based on the position and pattern of the source and drain and the position and pattern of the first interconnection lines corresponding to the source and drain respectively; using a third preset mask to perform photolithography on the sub-substrate corresponding to each storage unit and computing unit to obtain a corresponding photolithography pattern; wherein the third preset mask is obtained based on the position and pattern of the first electrode and the position and pattern of the second interconnection line corresponding to the first electrode; performing metal sputtering on the patterned structure and the photolithography pattern to form a source, a drain, a first interconnection line corresponding to the source, and a first interconnection line corresponding to the drain of the corresponding patterned structure, as well as a first electrode corresponding to the photolithography pattern and a second interconnection line corresponding to the first electrode.

[0072] Step S53: interconnecting at least three computing modules arranged in an array by using a preset interconnection technology, and interconnecting at least three computing modules arranged in an array with the control modules respectively.

[0073] Accordingly, at least three array-arranged computing modules are interconnected using a preset interconnection technology, including: using the preset interconnection technology, connecting the first interconnection line corresponding to the drain of each first switch unit with the first interconnection line corresponding to the source of the second switch unit of other adjacent selected computing modules, connecting the first interconnection line corresponding to the source of each first switch unit with the second interconnection line corresponding to the first electrode of the computing unit belonging to the same computing module, connecting the first interconnection line corresponding to the drain of each second switch unit with the second interconnection line corresponding to the first electrode of the computing unit belonging to the same computing module, and connecting the first interconnection line corresponding to the source of each second switch unit with the second interconnection line corresponding to the first electrode of the storage unit belonging to the same computing module.

[0074] Similarly, when generating the second electrode, a second interconnection line corresponding to the second electrode is also formed. The specific formation method can refer to the method of forming the second interconnection line corresponding to the first electrode mentioned above, which will not be repeated here, so that the second interconnection line corresponding to the second electrode is connected to the control module.

[0075] In summary, the embodiments of the present invention achieve high-density computing module integration by forming computing modules arranged in an array on a provided substrate, thereby improving computing power per unit area. Adjacent computing modules store cell state information of adjacent cells, which helps reduce data transmission distances and improve data processing speeds. Each computing module independently handles a portion of the computing tasks, facilitating modular design and maintenance. Furthermore, a preset interconnection technology is utilized to interconnect at least three computing modules arranged in an array, and at least three computing modules arranged in an array are each interconnected with a control module to ensure efficient data exchange between the computing modules and with the control module.

[0076] Figure 10 An example of a physical structure diagram of an electronic device is shown below. Figure 10 As shown, the electronic device may include: a processor 1010, a communications interface 1020, a memory 1030, and a communications bus 1040, wherein the processor 1010, the communications interface 1020, and the memory 1030 communicate with each other via the communications bus 1040. The processor 1010 may call logic instructions in the memory 1030 to execute a method for preparing a probabilistic cellular automaton computing system, the method comprising: providing a substrate; forming at least three computing modules arranged in an array on the substrate, the computing modules being used to store cellular state information of cells, with cells stored in adjacent computing modules being adjacent cells; interconnecting the at least three computing modules arranged in an array using a preset interconnection technology, and interconnecting the at least three computing modules arranged in an array with a control module.

[0077] Furthermore, the logic instructions in the aforementioned memory 1030 can be implemented as software functional units and, when sold or used as independent products, can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the portion that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for causing a computer device (which can be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as a USB flash drive, a mobile hard drive, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk.

[0078] On the other hand, the present invention also provides a computer program product, which includes a computer program, and the computer program can be stored on a non-transitory computer-readable storage medium. When the computer program is executed by a processor, the computer can execute the preparation method of the probabilistic cellular automaton computing system provided by the above methods, the method including: providing a substrate; forming at least three array-arranged computing modules on the substrate, the computing modules being used to store cell state information of cells, and the cells stored in adjacent computing modules are adjacent cells to each other; using a preset interconnection technology, interconnecting the at least three array-arranged computing modules, and interconnecting the at least three array-arranged computing modules with the control module respectively.

[0079] On the other hand, the present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, is implemented to execute the method for preparing a probabilistic cellular automaton computing system provided by the above-mentioned methods, the method comprising: providing a substrate; forming at least three array-arranged computing modules on the substrate, the computing modules being used to store cell state information of cells, and the cells stored in adjacent computing modules being adjacent cells to each other; interconnecting the at least three array-arranged computing modules using a preset interconnection technology, and interconnecting the at least three array-arranged computing modules with the control module respectively.

[0080] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, i.e., they may be located in one location or distributed across multiple network units. Some or all of the modules may be selected based on actual needs to achieve the objectives of the present embodiment. Persons of ordinary skill in the art will be able to understand and implement the present invention without inventive effort.

[0081] Through the above description of the embodiments, those skilled in the art will clearly understand that each embodiment can be implemented using software plus a necessary general-purpose hardware platform, or of course, hardware. Based on this understanding, the essence of the above technical solution, or the portion that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, a magnetic disk, or an optical disk, and includes a number of instructions for causing a computer device (such as a personal computer, server, or network device) to execute the methods described in each embodiment or certain portions of the embodiments.

[0082] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present invention.

Claims

1. A probabilistic cellular automaton computing system, characterized in that: It includes a control module and at least three computing modules arranged in an array, wherein the computing modules are used to store cell state information of cells, and the cells stored in adjacent computing modules are adjacent cells to each other, wherein: The control module determines, based on the state cell to be determined, a computing module corresponding to the state cell to be determined and computing modules corresponding to adjacent cells of the state cell to be determined, and generates a corresponding control signal based on each selected computing module and sends the control signal to the corresponding selected computing module; The calculation module corresponding to the adjacent cell of the cell whose state is to be determined obtains the cell state information stored therein according to the received control signal, and sends the obtained cell state information to the calculation module corresponding to the cell whose state is to be determined; The computing module corresponding to the cell of the to-be-determined state obtains the cell state information stored therein according to the received control signal, and performs corresponding logical operations in combination with the received cell state information to update the cell state information of the to-be-determined state according to the logical operation result.

2. The probabilistic cellular automaton computing system according to claim 1, characterized in that: The computing module includes a storage unit, a computing unit, a first switching unit, and a second switching unit. For any selected computing module, wherein: The first switch unit controls the corresponding switch state according to the control signal corresponding to the control module to control the connection and disconnection of the storage unit belonging to the same computing module and other adjacent selected computing modules; The second switch unit controls the corresponding switch state according to the control signal corresponding to the control module to control the on and off of the storage unit and the computing unit belonging to the same computing module; The storage unit, when the first switch unit is in an on state and the second switch unit is in an off state, or when the first switch unit is in an off state, the second switch unit is in an off state, and the first switch unit of another adjacent selected computing module is in an on state, obtains the cell state information stored therein and sends it to the computing unit of the other adjacent selected computing module; or, when the first switch unit is in an on state and the second switch unit is in an on state, obtains the cell state information stored therein and sends it to the computing unit belonging to the same computing module; The operation unit receives cell status information sent by the storage unit belonging to the same computing module and cell status information sent by the storage unit of other adjacent selected computing modules when the first switch unit and the second switch unit are in the open state at the same time, and performs corresponding logical operations based on the received cell status information; or, does not perform corresponding logical operations when the first switch unit is in the open state and the second switch unit is in the open state.

3. The probabilistic cellular automaton computing system according to claim 1, characterized in that: The calculation modules corresponding to the adjacent cells of the cell to be determined include a first calculation module and a second calculation module, and the calculation modules include a storage unit, an operation unit, a first switch unit and a second switch unit, wherein: The control module determines, based on a cell with a state to be determined, a computing module corresponding to the cell with a state to be determined and a first computing module and a second computing module corresponding to adjacent cells of the cell with a state to be determined; generates a first control signal based on a storage unit of the computing module corresponding to the cell with a state to be determined and sends the first control signal to the corresponding storage unit; generates a second control signal based on a first switch unit of the computing module corresponding to the cell with a state to be determined and sends the second control signal to the corresponding first switch unit; generates a third control signal based on a second switch unit of the computing module corresponding to the cell with a state to be determined and sends the third control signal to the corresponding second switch unit; generates a corresponding fourth control signal based on the storage units corresponding to the first and second computing modules and sends the corresponding fourth control signal to the corresponding storage unit; generates a fifth control signal based on the first switch unit of the first computing module and sends the fifth control signal to the corresponding first switch unit; generates a corresponding sixth control signal based on the second switch units corresponding to the first and second computing modules and sends the sixth control signal to the corresponding second switch unit; and generates a seventh control signal based on the first switch unit corresponding to the second computing module and sends the seventh control signal to the corresponding first switch unit; The first switch unit of the computing module corresponding to the cell whose state is to be determined controls the corresponding first switch unit to be in an open state according to the received second control signal; The second switch unit of the computing module corresponding to the cell whose state is to be determined controls the corresponding second switch unit to be in an open state according to the received third control signal; The first switch unit of the first computing module controls the corresponding first switch unit to be in an open state according to the received fifth control signal; The second switch units corresponding to the first calculation module and the second calculation module respectively control the corresponding second switch units to be in an off state according to the corresponding received sixth control signal; The first switch unit corresponding to the second calculation module controls the corresponding first switch unit to be in an off state according to the corresponding received seventh control signal; The storage units corresponding to the first computing module and the second computing module respectively obtain the cell state information stored therein according to the received fourth control signal, and send the information to the operation unit of the computing module corresponding to the cell whose state is to be determined; The storage unit of the computing module corresponding to the cell whose state is to be determined obtains the cell state information stored therein according to the received first control signal, and sends the cell state information to the operation unit of the computing module corresponding to the cell whose state is to be determined; The operation unit of the calculation module corresponding to the cell with the to-be-determined state performs a corresponding logical operation according to the received cell state information, and the operation units of the first calculation module and the second calculation module do not perform a corresponding logical operation.

4. The probabilistic cellular automaton computing system according to claim 2 or 3, characterized in that: The cell state information includes a cell state value and an inverse of the cell state value of the corresponding cell. The computing unit of the computing module corresponding to the cell state to be determined adopts a memristor with a preset true random probability. The memristor adopting the preset true random probability is used to: For the calculation modules corresponding to the cell with the state to be determined and the calculation modules corresponding to the adjacent cells of the cell with the state to be determined, the corresponding cell state values and the inverse of the cell state values are permuted and combined, and for each permutation and combination, a NAND gate logic operation is performed in combination with a preset true random probability to obtain a calculation result of the corresponding permutation and combination; According to the operation results of all permutations and combinations, the low-level operation result is selected as the logic operation result, and according to the logic operation result, the cell state value and the inverse of the cell state value of the cell to be determined are updated, and the updated cell state value and the inverse of the cell state value are updated to the storage unit of the computing module corresponding to the cell to be determined and the state of the storage unit is updated, and the state of the memristor is updated.

5. The probabilistic cellular automaton computing system according to claim 2 or 3, characterized in that: The computing unit and / or the storage unit includes: substrate; a first electrode, located on the substrate; an insulating layer, located on the first electrode; a second electrode, located on the insulating layer and connected to the control module; The first electrode of the operation unit is connected to the second switch unit belonging to the same calculation module; the first electrode of the storage unit is respectively connected to the first switch unit and the second switch unit belonging to the same calculation module.

6. The probabilistic cellular automaton computing system according to claim 5, characterized in that: The first switch unit and / or the second switch unit include: a gate, located on the substrate; a gate control layer, located on the gate and connected to the control module; a channel material layer, located on the gate control layer; The source and drain are located on the gate control layer, and the source and drain are relatively located on both sides of the channel material layer; wherein the source of the first switch unit and the source of the second switch unit are respectively connected to the storage units belonging to the same computing module, the drain of the first switch unit is connected to the source of the second switch unit of other adjacent selected computing modules, and the drain of the second switch unit is connected to the operation unit belonging to the same computing module.

7. The probabilistic cellular automaton computing system according to claim 6, characterized in that: The substrate includes a first substrate and a second substrate, the second substrate is located on the first substrate, the material of the first substrate includes at least one of p-type doped silicon, n-type doped silicon and intrinsic silicon, and the material of the second substrate includes at least one of silicon dioxide, hafnium oxide and aluminum oxide; The material of the first electrode includes at least one of titanium, palladium, platinum, bismuth, gold and chromium; The material of the second electrode includes at least one of titanium nitride, silver, copper and aluminum; The material of the insulating layer includes at least one of hafnium oxide, aluminum oxide, silicon oxide, and various mixed stacks, wherein the mixed stack is used to represent a multilayer structure with specific properties formed by stacking materials of different materials, structures, or functions on the same substrate through a preset process; The material of the gate includes at least one of titanium, palladium, platinum, bismuth, gold and chromium; The material of the gate control layer includes at least one of silicon dioxide, hafnium oxide and aluminum oxide; The material of the channel material layer includes at least one of molybdenum sulfide, tungsten selenide and indium tin; The material of the source electrode and the drain electrode includes at least one of titanium, palladium, platinum, bismuth, gold, and chromium.

8. A method for preparing a probabilistic cellular automaton computing system, applied to the probabilistic cellular automaton computing system according to any one of claims 1 to 7, characterized in that: include: providing a substrate; forming at least three computing modules arranged in an array on the substrate, wherein the computing modules are used to store cell state information of cells, and the cells stored in adjacent computing modules are adjacent cells to each other; The at least three computing modules arranged in an array are interconnected by using a preset interconnection technology, and the at least three computing modules arranged in an array are interconnected with the control modules respectively.

9. The method for preparing a probabilistic cellular automaton computing system according to claim 8, wherein: The computing module includes a storage unit, a computing unit, a first switching unit, and a second switching unit. At least three computing modules arranged in an array are formed on the substrate, including: Using a first preset mask, the substrate is etched to determine the substrate position of the unit corresponding to each computing module; wherein the first preset mask is obtained based on the position and pattern of the unit corresponding to each computing module; Growing a bottom back gate on a substrate position corresponding to each of the first switch units and each of the second switch units to form a corresponding gate; Transferring a channel material layer grown on a predetermined substrate onto the gate electrode based on a wet transfer method to form a gate control layer, and patterning each gate control layer using a second predetermined mask to obtain a corresponding patterned structure; wherein the second predetermined mask is obtained based on the position and pattern of the source and drain electrodes; Using a third preset mask, photolithography is performed on the substrate positions corresponding to the storage units and the computing units to obtain corresponding photolithography patterns; wherein the third preset mask is obtained based on the position and pattern of the first electrode; Performing metal sputtering on the patterned structure and the photolithographic pattern to form a source and a drain corresponding to the patterned structure, thereby obtaining a first switching unit and a second switching unit corresponding to the patterned structure, and forming a first electrode corresponding to the photolithographic pattern; forming an insulating layer on the first electrode; A second electrode is formed on the insulating layer to obtain a corresponding operation unit and a storage unit.

10. The method for preparing a probabilistic cellular automaton computing system according to claim 9, wherein: At least three computing modules arranged in an array are formed on the substrate, further comprising: Using a second preset mask, patterning each of the gate control layers to obtain a corresponding patterned structure; wherein the second preset mask is obtained based on the position and pattern of the source and drain electrodes and the position and pattern of the first interconnect lines corresponding to the source and drain electrodes, respectively; Using a third preset mask, photolithography is performed on the sub-substrate corresponding to each of the storage units and the computing unit to obtain a corresponding photolithography pattern; wherein the third preset mask is obtained based on the position and pattern of the first electrode and the position and pattern of the second interconnection line corresponding to the first electrode; Performing metal sputtering on the patterned structure and the photolithographic pattern to form a source electrode, a drain electrode, a first interconnection line corresponding to the source electrode, and a first interconnection line corresponding to the drain electrode corresponding to the patterned structure, as well as a first electrode corresponding to the photolithographic pattern and a second interconnection line corresponding to the first electrode; The at least three array-arranged computing modules are interconnected using a preset interconnection technology, including: Using a preset interconnection technology, the first interconnection line corresponding to the drain of each first switch unit is connected to the first interconnection line corresponding to the source of the second switch unit of the other adjacent selected computing modules, the first interconnection line corresponding to the source of each first switch unit is connected to the second interconnection line corresponding to the first electrode of the computing unit belonging to the same computing module, the first interconnection line corresponding to the drain of each second switch unit is connected to the second interconnection line corresponding to the first electrode of the computing unit belonging to the same computing module, and the first interconnection line corresponding to the source of each second switch unit is connected to the second interconnection line corresponding to the first electrode of the storage unit belonging to the same computing module.

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