Insulated gate bipolar transistor (IGBT) device and manufacturing method of contact hole structure
By optimizing high-temperature annealing and alloying processes in the contact hole structure of IGBT devices, the problem of aluminum-silicon mutual dissolution in the contact hole structure is solved, which improves electrical performance and reduces costs.
Patent Information
- Application Number
- CN202311738427.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-12-15
- Publication Date
- 2025-06-24
AI Technical Summary
Aluminum-silicon interfusion is prone to occur in the contact hole structure of IGBT devices, resulting in device failure.
After the contact hole is formed, the semiconductor structure is annealed at high temperature to reduce defects in the bottom side wall and bottom of the contact hole, and avoid the reaction of the metal plug with the silicon at the bottom of the contact hole. During the alloying process, appropriate temperature and atmosphere are used to avoid the intersoluble aluminum and silicon.
It effectively avoids the phenomenon of aluminum-silicon mutual dissolution in the contact pore structure, improves the electrical performance of the contact pore structure, reduces production costs, and simplifies the process flow.
Smart Images
Figure CN120199726A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the field of semiconductor integrated circuit manufacturing, and relates to a method for manufacturing an IGBT device and a contact hole structure. Background Art
[0002] Insulated gate bipolar transistor (IGBT) is a composite fully controlled voltage-driven power semiconductor device composed of a bipolar junction transistor (BJT) and an insulated gate field effect transistor (MOS). It has the advantages of both the high input impedance of a metal oxide semiconductor field effect transistor (MOSFET) and the low on-state voltage drop of a bipolar junction transistor. Due to the advantages of low switching loss, simple gate control, and excellent switch controllability of IGBT, it has now become the new generation of mainstream products in the field of power electronics and is widely used in household appliance frequency conversion control, industrial control, locomotive drive, power electronic devices, and new energy grid access.
[0003] During the wafer fab IGBT process flow, the silicon at the bottom of the contact hole contacts with the metal to form an ohmic contact of the device, and the metal acts as an external electrode for subsequent wire connection. The magnitude of the ohmic resistance of the contact structure formed by the silicon (semiconductor) at the bottom of the contact hole and the metal contact (metal) has an obvious impact on the performance of the device.
[0004] There are currently two mainstream process flows for the contact hole and metal contact: Ti / TiN and W and ALCU or Ti / TiN and ALSICU processes. The former is mainly applicable to contact holes with small feature sizes (CD). The conventional IMP PVD (ionized metal plasma physical vapor deposition) metal deposition has general hole filling ability. For contact holes with small line widths, MOCVD (metal organic chemical vapor deposition) hole filling is better, so generally metal tungsten is filled; the latter is mainly applicable to contact holes with large line widths. The conventional IMP PVD metal deposition process can meet the requirements of the hole filling morphology. It directly deposits metal ALSICU on the contact hole and is mainly applicable to MOSFET device products.
[0005] Currently, when directly using aluminum silicon copper for hole filling in 8-inch IGBT devices, aluminum-silicon mutual dissolution will occur at the bottom of the contact hole, resulting in device failure, as Figure 1 and Figure 2 shown. Respectively, they are an SEM image of the contact hole structure filled with aluminum silicon copper and another SEM image of the contact hole structure filled with aluminum silicon copper. It can be seen from Figure 1 that aluminum-silicon mutual dissolution has occurred at the bottom of the contact hole (the part circled in black in the figure), Figure 2Al-Si eutectic occurred at the bottom of the contact hole (the part circled by the black line in the figure), and even eutectic nodules were generated. The mainstream IGBT via filling process can ensure complete void-free via filling and avoid the Al-Si eutectic problem by pre-depositing a titanium film or a titanium nitride film. As Figure 3 and Figure 4 shown, they are respectively the SEM images of the via structures filled with titanium, titanium nitride, tungsten, and Al-Si-Cu in the contact holes and the SEM images of the via structures filled with titanium, titanium nitride, tungsten, and Al-Cu in the contact holes. It can be seen from the figures that after introducing the titanium and titanium nitride films, no Al-Si eutectic occurred at the bottom of the contact holes. However, because of the newly added titanium or titanium nitride metal film layer or the new via filling metal tungsten, not only will the corresponding process cost and material cost increase additionally, but also because of the newly added film layer, the ohmic contact resistance between the contact hole and the metal will become larger. Therefore, for IGBT products with large CDs, the via hole process will be improved as much as possible to reduce the front ohmic contact resistance. At the same time, if tungsten is used as the via filling metal, due to the design differences of different products, there are contact holes with different CD sizes within the same chip. During the tungsten etch-back process, tungsten can completely fill the contact holes with smaller CDs, while only tungsten remains in the sidewall area of the contact holes with larger CDs, and only a very thin titanium nitride film layer remains at the bottom. With the subsequent deposition of metal aluminum, the 8-inch wafer is greatly affected by stress, and the warpage changes significantly. The titanium nitride thin film cracks due to the warpage of the silicon wafer, and the metal aluminum directly penetrates through the silicon at the bottom side of the contact hole with a larger CD during deposition, forming an aluminum penetration defect, resulting in Al-Si eutectic and causing device failure.
[0006] Therefore, there is an urgent need to find a method for fabricating a via hole structure that can improve the Al-Si eutectic problem occurring in the via hole structure of IGBT devices. Summary of the Invention
[0007] In view of the above-mentioned disadvantages of the prior art, the purpose of the present invention is to provide a method for fabricating an IGBT device and a via hole structure, which is used to solve the problem of easy Al-Si eutectic in the via hole structure of IGBT devices in the prior art.
[0008] To achieve the above purpose and other related purposes, the present invention provides a method for fabricating a via hole structure, including the following steps:
[0009] Provide a semiconductor structure, the semiconductor structure includes a gate structure on the upper surface layer of the semiconductor structure and at least one emitter structure on the upper surface layer of the semiconductor structure on one side of the gate structure, and the emitter structure includes a base region of the first conductivity type and an emitter region of the second conductivity type on the upper surface layer of the base region;
[0010] Form an interlayer dielectric layer covering the upper surface of the semiconductor structure, and form at least one contact hole exposing the emitter region in the interlayer dielectric layer;
[0011] Anneal the semiconductor structure after forming the contact hole in an environment with a first preset atmosphere and a first preset temperature for a first preset time;
[0012] Form a metal layer including a metal plug filling the contact hole at a second preset temperature;
[0013] Place the semiconductor structure after forming the metal layer in an environment with a second preset atmosphere and a third preset temperature for a second preset time for an alloying process.
[0014] Optionally, a contact region of a first conductivity type adjacent to the emitter region is further provided on the upper surface layer of the base region.
[0015] Optionally, after forming the contact hole and before annealing the semiconductor structure for a first preset time, it further includes the step of forming a contact region of a first conductivity type on the upper surface layer of the emitter region at the bottom of the contact hole.
[0016] Optionally, the method of forming the contact hole includes dry etching and wet etching.
[0017] Optionally, the first preset atmosphere includes a pure nitrogen atmosphere; the second preset atmosphere includes a mixed gas atmosphere of nitrogen and hydrogen.
[0018] Optionally, the range of the first preset temperature is 750°C to 1000°C, and the range of the first preset time is 30 min to 60 min.
[0019] Optionally, the range of the first preset temperature is 750°C to 1000°C, and the range of the first preset time is 30 s to 120 s.
[0020] Optionally, the range of the second preset temperature is 260°C to 300°C; the range of the third preset temperature is 400°C to 500°C; the range of the second preset time is 30 min to 60 min.
[0021] Optionally, the material of the metal layer includes at least one of aluminum silicon copper, titanium nitride, titanium, tungsten, and aluminum copper.
[0022] The present invention further provides an IGBT device, and the contact hole structure in the IGBT device is fabricated by using the manufacturing method of the contact hole structure described above.
[0023] As described above, the method for manufacturing the IGBT device and the contact hole structure of the present invention improves the process of manufacturing the contact hole. After forming the contact hole, the semiconductor structure after forming the contact hole is subjected to high-temperature annealing at a first preset temperature, in a first preset atmosphere, and for a first preset time, so as to reduce the defects at the bottom sidewall and the bottom of the contact hole, and avoid the reaction between the metal plug filling the contact hole and the silicon in the defect area at the bottom sidewall and the bottom of the contact hole. Forming the metal layer at a second preset temperature can further avoid the temperature being too high during the process of forming the metal layer, resulting in the aluminum-silicon eutectic dissolution between the metal layer and the silicon at the bottom of the contact hole. In addition, during the alloying process, a third preset temperature and a second preset atmosphere are adopted, which can avoid the aluminum-silicon eutectic dissolution during the alloying process, improve the electrical performance of the contact hole structure, and the contact hole structure of the IGBT device formed by this method reduces the contact resistance between the metal layer in the contact hole structure and the semiconductor structure at the bottom of the contact hole, reduces the cost of manufacturing the contact hole structure, and has high industrial utilization value. Description of the Drawings
[0024] Figure 1 A SEM image of a contact hole structure showing direct filling of the contact hole with aluminum-silicon-copper.
[0025] Figure 2 Another SEM image of a contact hole structure showing direct filling of the contact hole with aluminum-silicon-copper.
[0026] Figure 3 A SEM image of a contact hole structure showing filling of the contact hole with titanium, titanium nitride, tungsten, and aluminum-silicon-copper.
[0027] Figure 4 A SEM image of a contact hole structure showing filling of the contact hole with titanium, titanium nitride, tungsten, and aluminum-copper.
[0028] Figure 5 A process flow chart showing the method for manufacturing the contact hole structure of the present invention.
[0029] Figure 6 A SEM image of the contact hole part after forming the metal layer in the method for manufacturing the contact hole structure of the present invention. Detailed Description of the Invention
[0030] The following specific examples illustrate the embodiments of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.
[0031] Please refer to Figures 5 to 6 . It should be noted that the diagrams provided in this embodiment only illustrate the basic concept of the present invention schematically. Therefore, only the components related to the present invention are shown in the diagrams, rather than being drawn according to the number, shape, and size of the components in actual implementation. The type, quantity, and ratio of each component in actual implementation can be arbitrarily changed, and the layout type of its components may also be more complex.
[0032] Embodiment 1
[0033] This embodiment provides a method for fabricating a contact hole structure. As Figure 5 shown, it is a process flow diagram of the method for fabricating the contact hole structure, including the following steps:
[0034] S1: Provide a semiconductor structure, which includes a gate structure on the upper surface layer of the semiconductor structure and at least one emitter structure on the upper surface layer of the semiconductor structure on one side of the gate structure. The emitter structure includes a base region of a first conductivity type and an emitter region of a second conductivity type on the upper surface layer of the base region;
[0035] S2: Form an interlayer dielectric layer covering the upper surface of the semiconductor structure, and form at least one contact hole exposing the emitter region in the interlayer dielectric layer;
[0036] S3: Place the semiconductor structure after forming the contact hole in an environment of a first preset atmosphere and a first preset temperature for annealing for a first preset time;
[0037] S4: Form a metal layer including a metal plug filling the contact hole at a second preset temperature;
[0038] S5: Place the semiconductor structure after forming the metal layer in an environment of a second preset atmosphere and a third preset temperature for an alloying process for a second preset time.
[0039] Specifically, execute step S1 and step S2: Provide a semiconductor structure, which includes a gate structure on the upper surface layer of the semiconductor structure and at least one emitter structure on the upper surface layer of the semiconductor structure on one side of the gate structure. The emitter structure includes a base region of a first conductivity type and an emitter region of a second conductivity type on the upper surface layer of the base region; Form an interlayer dielectric layer covering the upper surface of the semiconductor structure, and form at least one contact hole exposing the emitter region in the interlayer dielectric layer.
[0040] Specifically, the first conductivity type includes one of N-type or P-type, the second conductivity type includes one of N-type or P-type, and the conductivity types of the first conductivity type and the second conductivity type are opposite. In this embodiment, the first conductivity type is P-type and the second conductivity type is N-type.
[0041] Specifically, the semiconductor structure is the structure of the interlayer dielectric layer for the IGBT device to be formed. Under the condition of ensuring the device performance, the size, thickness, material and shape of the semiconductor structure can be selected according to the actual situation and are not limited here.
[0042] Specifically, under the condition of ensuring the device performance, the size, thickness and doping concentration of the base region can be selected according to the actual situation and are not limited here.
[0043] Specifically, the emitter region forms an ohmic contact with the metal plug for the filling contact hole to be formed subsequently. Under the condition of ensuring the device performance and the emitter region forming an ohmic contact with the metal plug, the size, thickness and doping concentration of the emitter region can be selected according to the actual situation and are not limited here.
[0044] As an example, a contact region of the first conductivity type adjacent to the emitter region is further provided on the upper surface layer of the base region.
[0045] Specifically, the doping concentration of the contact region is greater than that of the base region, and the contact type between the contact region and the metal plug for the filling contact hole to be formed subsequently is an ohmic contact. Under the condition of ensuring the device performance and the contact region forming an ohmic contact with the metal plug, the size and doping concentration of the contact region can be selected according to the actual situation and are not limited here.
[0046] Specifically, the gate structure includes a trench penetrating the base region, a gate dielectric layer covering the inner wall and bottom surface of the trench, and a gate conductive layer filling the trench.
[0047] Specifically, the gate structure includes the trench, the gate dielectric layer and the gate conductive layer. The trench, the gate dielectric layer and the gate conductive layer constitute a trench gate structure. Under the condition of ensuring the device performance, the opening size and depth of the trench can be selected according to the actual situation and are not limited here; the thickness of the gate dielectric layer in the trench can be selected according to the actual situation and is not limited here.
[0048] Specifically, the gate structure includes a gate dielectric layer and a gate conductive layer stacked in sequence. The gate dielectric layer and the gate conductive layer constitute a planar gate structure. Under the condition of ensuring the device performance, the thickness of the gate dielectric layer in the planar gate structure can be selected according to the actual situation and is not limited here.
[0049] Specifically, the material of the gate dielectric layer includes silicon oxide, silicon nitride, silicon oxynitride, or other suitable dielectric materials; the material of the gate conductive layer includes polysilicon or other suitable conductive materials.
[0050] Specifically, the method for forming the interlayer dielectric layer includes chemical vapor deposition, physical vapor deposition, or other suitable methods. In this embodiment, the interlayer dielectric layer is formed by chemical vapor deposition process.
[0051] Specifically, on the premise of ensuring device performance, the thickness of the interlayer dielectric layer can be selected according to actual circumstances and will not be limited here.
[0052] Specifically, the material of the interlayer dielectric layer includes silicon oxide, silicon nitride, silicon oxynitride, or other suitable dielectric materials.
[0053] Specifically, forming the contact hole includes the following steps: forming a masking layer with a preset thickness on the exposed upper surface of the interlayer dielectric layer, and patterning the masking layer; forming the contact hole based on the patterned masking layer.
[0054] Specifically, the material of the masking layer includes photoresist or other suitable photoresist film layers. In this embodiment, photoresist is used as the masking layer.
[0055] Specifically, the method for forming the masking layer is a conventional photoresist layer coating method and will not be elaborated here; the method for patterning the masking layer is the common exposure and development processes of the photoresist layer and will not be elaborated here.
[0056] As an example, the method for forming the contact hole includes dry etching, wet etching, or other suitable methods. For example, based on the patterned masking layer, plasma etching (one type of dry etching), wet etching, or a combination of wet etching and plasma etching can be used to etch the interlayer dielectric layer.
[0057] Specifically, on the premise of ensuring device performance and that the contact hole penetrates the interlayer dielectric layer, the opening size, shape, and depth of the contact hole can be selected according to actual circumstances and will not be limited here. For example, the bottom surface of the contact hole can extend into the base region or be flush with the upper surface of the base region (i.e., the upper surface of the emitter region).
[0058] Specifically, when the contact region is provided on the upper surface layer of the base region, the bottom surface of the contact hole also exposes the contact region.
[0059] Specifically, after forming the contact hole, it further includes the step of removing the patterned masking layer.
[0060] Specifically, the method for removing the masking layer is a common dry or wet photoresist stripping process, which will not be elaborated here.
[0061] Please refer to Figure 6 , and perform the steps S3, S4, and S5: anneal the semiconductor structure after forming the contact hole in an environment with a first preset atmosphere and a first preset temperature for a first preset time; form a metal layer including a metal plug filling the contact hole at a second preset temperature; place the semiconductor structure after forming the metal layer in an environment with a second preset atmosphere and a third preset temperature for a second preset time for an alloying process.
[0062] As an example, after forming the contact hole and before annealing the semiconductor structure for a first preset time, it further includes the step of forming a first conductive type contact region on the upper surface layer of the emitter region at the bottom of the contact hole. That is, the upper surface layer of the base region is not provided with the contact region, and after forming the contact hole, the contact region can be formed on the upper surface layer of the emitter region at the bottom of the contact hole.
[0063] Specifically, the method for forming the contact region on the upper surface layer of the emitter region at the bottom of the contact hole includes ion implantation or other suitable methods.
[0064] Specifically, the method for annealing the structure after forming the contact hole includes annealing in a high-temperature furnace tube or other suitable methods.
[0065] As an example, the first preset atmosphere includes a pure nitrogen atmosphere or other suitable atmospheres. In this embodiment, the semiconductor structure after forming the contact hole is placed in a pure nitrogen atmosphere for annealing.
[0066] As an example, the range of the first preset temperature is 750°C to 1000°C, and the range of the first preset time is 30 min to 60 min. In this embodiment, the semiconductor structure after forming the contact hole is placed in a high-temperature furnace tube, pure nitrogen is filled into the furnace tube, and the temperature in the furnace tube is raised to 900°C, so that the semiconductor structure after forming the contact hole is annealed in the high-temperature furnace tube for 40 min.
[0067] As an example, the range of the first preset temperature is 750°C to 1000°C, and the range of the first preset time is 30 s to 120 s. That is, after forming the contact hole and before forming the metal layer, the annealing process of the contact hole can also be a rapid annealing process.
[0068] Specifically, by annealing the semiconductor structure after forming the contact holes at a preset temperature, the defects at the bottom sidewalls and the bottom of the contact holes can be effectively improved, reducing the defects on the upper surface layer of the semiconductor structure exposed at the bottom sidewalls and the bottom of the contact holes, avoiding the reaction between the metal layer filling the contact holes and the silicon in the defective area at the bottom of the contact holes, and effectively preventing the phenomenon of aluminum-silicon mutual dissolution in the defective area at the bottom of the contact holes.
[0069] Specifically, the method for forming the metal plugs includes magnetron sputtering, chemical vapor deposition, physical vapor deposition, or other suitable methods.
[0070] As an example, the range of the second preset temperature is 260°C to 300°C.
[0071] As an example, the material of the metal layer includes at least one of aluminum-silicon-copper, titanium nitride, titanium, tungsten, and aluminum-copper, and can also be other suitable metal materials. For example, the material of the metal layer can be only aluminum-silicon-copper, can be a combination of titanium nitride and aluminum-silicon-copper, a combination of titanium and aluminum-silicon-copper, a combination of titanium nitride and aluminum-copper, a combination of titanium and aluminum-copper, a combination of titanium and titanium nitride and aluminum-silicon-copper, or a combination of titanium and titanium nitride and aluminum-copper, or can also be a combination of titanium and titanium nitride and tungsten and aluminum-copper, or a combination of titanium and titanium nitride and tungsten and aluminum-silicon-copper.
[0072] Specifically, a tungsten film layer is provided in the metal layer. After forming the tungsten film layer and before forming aluminum-silicon-copper or aluminum-copper, it further includes the step of removing the tungsten film layer outside the contact holes.
[0073] Specifically, the method for removing the tungsten film layer includes chemical mechanical polishing, dry etching, or other suitable methods.
[0074] Specifically, the thickness range of the formed metal layer is 4μm to 7μm.
[0075] As an example, the range of the third preset temperature is 400°C to 500°C.
[0076] As an example, the second preset atmosphere includes a mixed gas atmosphere of nitrogen and hydrogen or other suitable alloying atmospheres.
[0077] Specifically, the ratio range between nitrogen and hydrogen in the second preset atmosphere is 10:1 to 22:1. In this embodiment, the ratio between nitrogen and hydrogen in the second preset atmosphere is 21:1.
[0078] As an example, the range of the second preset time is 30min to 60min.
[0079] Specifically, by subjecting the semiconductor structure forming the metal layer to an alloying process in an atmospheric pressure furnace tube under the second preset atmosphere and the third preset temperature, it is possible to avoid the aluminum-silicon mutual dissolution between the metal layer at the bottom of the contact hole and the silicon in the semiconductor structure during the alloying process, and ensure the performance of the contact hole structure.
[0080] Specifically, after forming the contact hole and before forming the metal layer, by performing a high-temperature annealing process on the semiconductor structure after forming the contact hole under the first preset atmosphere and the first preset temperature, the damage to the bottom sidewall and the bottom of the contact hole caused during the formation of the contact hole is improved, the defects at the bottom sidewall and the bottom of the contact hole are reduced, and the reaction between the silicon in the defect regions of the bottom sidewall and the bottom of the contact hole and the metal layer is avoided, thereby preventing the aluminum-silicon mutual dissolution between the metal plug filling the contact hole and the silicon at the bottom of the contact hole, ensuring the performance of the contact hole structure, and reducing the process difficulty of manufacturing the contact hole structure.
[0081] Specifically, by forming the metal layer at the second preset temperature (aluminum and silicon are prone to mutual dissolution above 577 °C), it is possible to avoid the reaction between the metal plug filling the contact hole and the silicon at the bottom of the contact hole.
[0082] Specifically, an alloying process is carried out at the third preset temperature and the second preset atmosphere to avoid the reaction between the metal plug filling the contact hole and the silicon at the bottom of the contact hole during the alloying process.
[0083] The manufacturing method of the contact hole structure in this embodiment improves the process of manufacturing the contact hole structure. After forming the contact hole and before forming the metal layer, the semiconductor structure after forming the contact hole is annealed for a first preset time under the first preset temperature and the first preset atmosphere environment to reduce the defects at the bottom sidewall and the bottom of the contact hole, and avoid the reaction between the metal plug filling the contact hole and the silicon in the defect regions of the bottom sidewall and the bottom of the contact hole. By forming the metal layer at the second preset temperature, it is further possible to avoid the aluminum-silicon mutual dissolution between the metal layer and the silicon at the bottom of the contact hole caused by too high a temperature during the formation of the metal layer. In addition, during the alloying process, by using the third preset temperature and the second preset atmosphere, it is possible to avoid aluminum-silicon mutual dissolution during the alloying process and ensure the performance of the contact hole structure.
[0084] Embodiment 2
[0085] This embodiment provides an IGBT device, and the contact hole structure in the IGBT device is manufactured by using the manufacturing method of the contact hole structure described in Embodiment 1.
[0086] Specifically, by adopting the manufacturing method of the contact hole structure described in Embodiment 1 to manufacture the contact hole structure in the IGBT device, while ensuring the performance of the contact hole structure, the steps of manufacturing the contact hole structure in the IGBT device can be simplified, and the cost of manufacturing the contact hole structure can be reduced.
[0087] Specifically, by adopting the manufacturing method of the contact hole structure described in Embodiment 1 to manufacture the contact hole structure in the IGBT device, while avoiding the phenomenon of aluminum-silicon mutual dissolution in the contact hole structure of the device, the process difficulty of manufacturing the contact hole structure is reduced, and the contact resistance of the ohmic contact formed between the metal layer in the contact hole structure and the semiconductor structure at the bottom of the contact hole is reduced.
[0088] The contact hole structure in the IGBT device of this embodiment is manufactured by adopting the manufacturing method of the contact hole structure described in Embodiment 1. While avoiding the aluminum-silicon mutual dissolution between the metal layer in the contact hole structure and the silicon in the semiconductor structure, the process difficulty of manufacturing the contact hole structure is reduced, the contact resistance between the metal layer in the contact hole structure and the semiconductor structure at the bottom of the contact hole is reduced, the steps of manufacturing the contact hole structure are simplified, and the cost of manufacturing the contact hole structure is reduced.
[0089] In summary, in the manufacturing method of the IGBT device and the contact hole structure of the present invention, by improving the process of manufacturing the contact hole structure, after forming the contact hole and before forming the metal layer, the semiconductor structure is annealed for a first preset time in a first preset temperature and a first preset atmosphere environment to reduce the defects on the side wall and at the bottom of the contact hole, and to avoid the reaction between the metal plug filling the contact hole and the silicon in the defective area of the bottom side wall and the bottom of the contact hole. When forming the metal layer at a second preset temperature, it is possible to further avoid the aluminum-silicon mutual dissolution caused by too high temperature during the process of forming the metal layer; in addition, during the alloying process, by adopting a third preset temperature and a second preset atmosphere, the aluminum-silicon mutual dissolution during the alloying process can be avoided; and by forming the contact hole structure in the IGBT device by this method, while avoiding the aluminum-silicon eutectic between the metal plug in the contact hole structure and the silicon at the bottom of the contact hole, the contact resistance between the metal layer in the contact hole structure and the semiconductor structure at the bottom of the contact hole is reduced, and the cost of manufacturing the contact hole structure is reduced. Therefore, the present invention effectively overcomes various disadvantages in the prior art and has high industrial utilization value.
[0090] The above embodiments are only illustrative of the principles and effects of the present invention and are not intended to limit the present invention. Any person familiar with this technology can modify or change the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or changes made by those with ordinary knowledge in the technical field without departing from the spirit and technical ideas disclosed by the present invention should still be covered by the claims of the present invention.
Claims
1. A manufacturing method of a contact hole structure, characterized in that Including the following steps: Providing a semiconductor structure, the semiconductor structure including a gate structure on the upper surface layer of the semiconductor structure and at least one emitter structure on the upper surface layer of the semiconductor structure on one side of the gate structure, the emitter structure including a base region of a first conductivity type and an emitter region of a second conductivity type on the upper surface layer of the base region; Forming an interlayer dielectric layer covering the upper surface of the semiconductor structure, and forming at least one contact hole exposing the emitter region in the interlayer dielectric layer; Placing the semiconductor structure after forming the contact hole in an environment of a first preset atmosphere and a first preset temperature for annealing for a first preset time; Forming a metal layer including a metal plug filling the contact hole at a second preset temperature; Placing the semiconductor structure after forming the metal layer in an environment of a second preset atmosphere and a third preset temperature for an alloying process for a second preset time.
2. The manufacturing method of the contact hole structure according to claim 1, characterized in that: A contact region of the first conductivity type adjacent to the emitter region is further provided on the upper surface layer of the base region.
3. The manufacturing method of the contact hole structure according to claim 1, wherein: After forming the contact hole and before annealing the semiconductor structure for the first preset time, it further includes the step of forming a contact region of the first conductivity type on the upper surface layer of the emitter region at the bottom of the contact hole.
4. The manufacturing method of the contact hole structure according to claim 1, characterized in that: The method of forming the contact hole includes dry etching and wet etching.
5. The manufacturing method of the contact hole structure according to claim 1, characterized in that: The first preset atmosphere includes a pure nitrogen atmosphere; the second preset atmosphere includes a mixed gas atmosphere of nitrogen and hydrogen.
6. The manufacturing method of the contact hole structure according to claim 1, wherein: The range of the first preset temperature is 750°C to 1000°C, and the range of the first preset time is 30 min to 60 min.
7. The manufacturing method of the contact hole structure according to claim 1, characterized in that: The range of the first preset temperature is 750°C to 1000°C, and the range of the first preset time is 30 s to 120 s.
8. The manufacturing method of the contact hole structure according to claim 1, characterized in that: The range of the second preset temperature is 260°C to 300°C; the range of the third preset temperature is 400°C to 500°C; the range of the second preset time is 30 min to 60 min.
9. The manufacturing method of the contact hole structure according to claim 1, characterized in that: The material of the metal layer includes at least one of aluminum silicon copper, titanium nitride, titanium, tungsten, and aluminum copper.
10. An IGBT device, characterized in that, The contact hole structure in the IGBT device is fabricated by using the method for fabricating the contact hole structure according to any one of claims 1 to 9.