Semiconductor cleaning using plasma-free precursors

By using plasma-free fluorine-containing precursors to contact silicon-containing materials, combined with activated precursors or co-reactants, the problems of chamber component erosion and greenhouse gas emissions in the prior art are solved, and efficient and environmentally friendly semiconductor cleaning effects are achieved.

CN120202322APending Publication Date: 2025-06-24APPLIED MATERIALS INC
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Patent Information

Application Number
CN202380079473.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2022-10-28
Filing Date
2023-10-17
Publication Date
2025-06-24

AI Technical Summary

Technical Problem

Existing semiconductor cleaning technologies may cause erosion of chamber components and the use of remote plasma source units is time-consuming and produces greenhouse gases.

Method used

The plasma-free fluorine-containing precursor is used to contact the silicon-containing material deposited in the semiconductor processing chamber, and the cleaning kinetics are improved by activating the precursor or co-reactants to avoid remote formation of the plasma.

Benefits of technology

The efficient removal of silicon-containing materials on the chamber components is achieved, which extends the cycle life of the chamber coating, avoids erosion of the chamber components, and reduces greenhouse gas emissions.

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Abstract

An example semiconductor processing method may include providing one or more deposition precursors to a semiconductor processing chamber. A substrate may be disposed within a processing region of a semiconductor processing chamber. The method may include depositing a silicon-containing material on a substrate and on one or more components of a semiconductor processing chamber. The method may include providing a fluorine-containing precursor to a treatment region. The fluorine-containing precursor may be plasma-free when provided to the processing region. The method may include contacting a silicon-containing material on one or more components of a semiconductor processing chamber with a fluorine-containing precursor. The method may include removing at least a portion of the silicon-containing material on one or more components of the semiconductor processing chamber with a fluorine-containing precursor.
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Description

[0001] Cross - reference to related applications

[0002] This application claims the benefit and priority of U.S. Patent Application No. 17 / 976,573, filed on October 28, 2022, entitled "SEMICONDUCTOR CLEANING USING PLASMA - FREE PRECURSORS", which is incorporated herein by reference in its entirety. Technical Field

[0003] The present invention relates to semiconductor cleaning operations. More specifically, the present invention relates to methods for cleaning semiconductor surfaces or components. Background Art

[0004] Integrated circuits are fabricated through processes that create complex patterned material layers on a substrate surface. Creating patterned materials on a substrate requires controlled methods for the formation and removal of the exposed materials. After a deposition process has been performed in a chamber, the chamber components may include residual materials from the deposition process. Chamber cleaning operations can remove residues from the chamber, however, the process may erode the chamber components over time.

[0005] Accordingly, there is a need for improved systems and methods that can be used to produce high - quality devices and structures. These and other needs are addressed by the techniques of the present invention. Summary of the Invention

[0006] Example semiconductor processing methods may include providing one or more deposition precursors to a semiconductor processing chamber. A substrate may be disposed within a processing region of the semiconductor processing chamber. The method may include depositing a silicon - containing material on the substrate and on one or more components of the semiconductor processing chamber. The method may include providing a fluorine - containing precursor to the processing region. The fluorine - containing precursor is plasma - free when provided to the processing region. The method may include contacting the silicon - containing material on one or more components of the semiconductor processing chamber with the fluorine - containing precursor. The method may include removing at least a portion of the silicon - containing material on one or more components of the semiconductor processing chamber with the fluorine - containing precursor.

[0007] In some embodiments, one or more deposition precursors include silicon-containing precursors. The silicon-containing precursors can be silicon- and oxygen-containing materials or silicon- and nitrogen-containing materials. The fluorine-containing precursor can be or include hydrofluoric acid (HF), ammonium fluoride (NH4F), ammonium bifluoride (NH4HF2), HF-pyridine, tetrafluorohydrazine (N2F4), tetramethylammonium fluoride ((CH3)4NF), tetra-n-butylammonium fluoride ((C4H9)4NF), N2H5F, N2H5F2, or hydrazinium fluoride. This method can include providing a co-reactant together with the fluorine-containing precursor to the processing region. The co-reactant can weaken the bonds in the fluorine-containing precursor. The co-reactant can be or include water or steam (H2O), an alcohol, a diol, ammonia (NH3), an amine, trifluoroacetic acid, hydrogen, helium, or argon. The method can include generating a fluorine-containing plasma from the fluorine-containing precursor in the processing region. The method can include providing an activation precursor together with the fluorine-containing precursor to the processing region. The method can include contacting the silicon-containing material deposited on one or more components of the semiconductor processing chamber with the activation precursor. The activation precursor can weaken the bonds in the silicon-containing material. The activation precursor can be or include water or steam (H2O), an alcohol, a diol, ammonia (NH3), an amine, trifluoroacetic acid, hydrogen, helium, or argon. The temperature in the semiconductor processing chamber can be maintained at less than or about 700 °C. The pressure in the semiconductor processing chamber can be maintained at less than or about 10 Torr.

[0008] Some embodiments of the present invention encompass semiconductor processing methods. The method can include i) providing one or more deposition precursors to a semiconductor processing chamber. A substrate can be disposed in a processing region of the semiconductor processing chamber; this method can include ii) depositing a silicon-containing material on the substrate and on one or more components of the semiconductor processing chamber. The method can include iii) providing a fluorine-containing precursor together with a co-reactant to the processing region. The co-reactant can weaken the bonds in the fluorine-containing precursor. The method can include iv) contacting the silicon-containing material on one or more components of the semiconductor processing chamber with the fluorine-containing precursor. The method can include v) removing at least a portion of the silicon-containing material on one or more components of the semiconductor processing chamber with the fluorine-containing precursor. The method can include vi) repeating operations i) to v) for at least three cycles.

[0009] In some embodiments, the substrate is disposed on a substrate support in the processing region. The fluorine-containing precursor can be provided to the processing region below the substrate support. The method can include providing, in operation iii), one or more of water or steam (H2O), an alcohol, a diol, ammonia (NH3), an amine, or trifluoroacetic acid and the fluorine-containing precursor. The method can include providing, in operation iii), one or more of hydrogen, helium, or argon and the fluorine-containing precursor. The fluorine-containing precursor can be ammonia-free (NH3). The temperature in the semiconductor processing chamber can be maintained between about 150 °C and about 650 °C.

[0010] Some embodiments of the present invention encompass semiconductor processing methods. The method may include providing a silicon-containing precursor to a semiconductor processing chamber. A substrate may be disposed within a processing region of the semiconductor processing chamber. The method may include depositing a silicon-containing material on the substrate and on one or more components of the semiconductor processing chamber. The silicon-containing material may include a silicon and oxygen-containing material or a silicon and nitrogen-containing material. The method may include activating the silicon-containing material. The activation may weaken bonds in the silicon-containing material. The method may include providing a fluorine-containing precursor to the processing region. The method may include contacting the silicon-containing material on one or more components of the semiconductor processing chamber with the fluorine-containing precursor. The method may include removing at least a portion of the silicon-containing material with the fluorine-containing precursor.

[0011] In some embodiments, depositing the silicon-containing material and removing the portion of the silicon-containing material may be performed simultaneously. The fluorine-containing precursor provided to the processing region may be maintained as non-plasma.

[0012] This technique may provide many benefits over conventional systems and techniques. For example, these processes may produce chamber coatings that can sustain hundreds of wafer cycles or more. Additionally, the operation of embodiments of the present invention may overcome the reduction in removal rate over time while protecting chamber components from erosion. These and other embodiments, as well as many of their advantages and features, are described in more detail in conjunction with the following description and drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] A further understanding of the nature and advantages of the disclosed technology may be realized by reference to the remainder of the specification and the drawings.

[0014] Figure 1 A schematic cross-sectional view of an example processing chamber in accordance with some embodiments of the present invention is shown.

[0015] Figure 2 An example operation in a deposition method in accordance with some embodiments of the present invention is shown.

[0016] The drawings include a number of figures as schematic diagrams. It will be understood that the drawings are for illustrative purposes and should not be considered to be to scale unless specifically noted as such. Additionally, as schematic diagrams, the drawings are provided to aid understanding and may not include all aspects or information compared to a realistic representation and may include exaggerated materials for illustrative purposes.

[0017] In the drawings, like components and / or features may have the same element symbols. Additionally, various components of the same type may be distinguished from like components by adding a letter after the element symbol. If only the prior element symbol is used in the specification, the description may apply to any of the like components having the same prior element symbol, regardless of the letter. DETAILED DESCRIPTION

[0018] Deposition operations in semiconductor processing can be included to form any number of materials on a substrate. For example, materials can be deposited on a substrate to create semiconductor structures and to facilitate patterning or removal of materials on the substrate. As a non-limiting example, a deposition operation can include forming a silicon-containing material on a substrate. The silicon-containing material deposition can be performed in any number of ways, including by thermal-activated deposition and plasma-enhanced deposition. Regardless of the mechanism, many deposition operations deposit materials not only on the substrate being processed but also on one or more chamber components. For example, in the processing region, deposition can occur on the substrate and the pedestal or support on which the substrate sits, the panel or diffuser that can dispense materials into the processing region, the chamber walls that define the processing region, and the components that define an exhaust path for subsequent deposition of materials and by-products.

[0019] Once the deposition process is complete, the substrate can be removed from the processing region and a cleaning operation can be implemented. Chamber cleaning can form a plasma that can etch or remove one or more precursors of the residual materials formed on the chamber components to essentially reset the chamber prior to subsequent processing operations, which can help maintain wafer-to-wafer consistency. However, these chamber cleaning operations present several challenges. For example, remotely formed plasmas, such as those generated in a remote plasma source unit, can be easily controlled to ensure a more complete cleaning can be performed and the cleaning materials can reach the various architectural geometries of the processing region. However, remotely formed plasmas can be time-consuming, may require the use of expensive equipment and materials, and may generate greenhouse gases that must be treated before emission.

[0020] The present invention can overcome these limitations by performing cleaning operations that do not include generating a remote plasma. Instead, the present invention can provide cleaning precursors in a plasma-free or non-plasma state. The present invention can also cover providing additional precursors during the cleaning operation, such as activation precursors or co-reactants. The additional precursors can treat or activate the silicon-containing material or the cleaning precursors to modify the chemical structure and render the silicon-containing material more amenable to cleaning and removal.

[0021] While the remainder of the specification will routinely identify specific cleaning operations that utilize the disclosed technology, it will be readily understood that the systems and methods can equally apply to other chambers and the processes can occur as in the chambers described. Therefore, the present invention should not be so limited as to be used solely with these specific deposition processes or chambers. Before describing additional details of embodiments in accordance with the present invention, the specification will discuss one possible system and chamber that can be used to perform the cleaning operations in accordance with embodiments of the present invention.

[0022] Figure 1A cross-sectional view of an exemplary processing chamber 100 in accordance with some embodiments of the present invention is shown. This figure may show an overview of a system incorporating one or more aspects of the present invention, and / or it may be specifically configured to perform one or more operations in accordance with embodiments of the present invention. Additional details of the chamber 100 or the method performed will be described further below. The chamber 100 may be utilized to form a film layer in accordance with some embodiments of the present invention. However, it will be understood that the method may be similarly performed in any chamber in which film formation may occur. The processing chamber 100 may include a chamber body 102, a substrate support 104 disposed inside the chamber body 102, and a lid assembly 106 coupled to the chamber body 102 and surrounding the substrate support 104 within a processing space 120. A substrate 103 may be provided to the processing space 120 through an opening 126, which may be conventionally sealed using a slit valve or a gate for processing. The substrate 103 may rest on a surface 105 of the substrate support during processing. The substrate support 104 may be rotatable, as indicated by arrow 145, along an axis 147, and an axis 144 of the substrate support 104 may be located on the axis 147. Alternatively, the substrate support 104 may be lifted for rotation when necessary during a deposition process.

[0023] A plasma profile modulator 111 may be disposed in the processing chamber 100 to control the plasma distribution across a substrate 103 disposed on the substrate support 104. The plasma profile modulator 111 may include a first electrode 108, which may be disposed adjacent to the chamber body 102 and may separate the chamber body 102 from other components of the lid assembly 106. The first electrode 108 may be part of the lid assembly 106 or may be a separate sidewall electrode. The first electrode 108 may be an annular or toroidal member and may be a toroidal electrode. The first electrode 108 may be a continuous loop around the perimeter of the processing chamber 100 surrounding the processing space 120, or may be discontinuous at selected locations (if desired). The first electrode 108 may also be a perforated electrode, such as a perforated toroid or a mesh electrode, or may be a plate electrode, such as, for example, a second gas distributor.

[0024] One or more isolators 110a, 110b may contact the first electrode 108 and electrically and thermally separate the first electrode 108 from the gas distributor 112 and the chamber body 102. The isolators 110a, 110b may be dielectric materials, such as ceramics or metal oxides, such as alumina and / or aluminum nitride. The gas distributor 112 may define apertures 118 for distributing process precursors into the processing space 120. The gas distributor 112 may be coupled to a first source of power 142, such as an RF generator, an RF power supply, a DC power supply, a pulsed DC power supply, a pulsed RF power supply, or any other power supply that may be coupled to the processing chamber. In some embodiments, the first source of power 142 may be an RF power supply.

[0025] The gas distributor 112 can be a conductive gas distributor or a non-conductive gas distributor. The gas distributor 112 can also be formed of conductive and non-conductive components. For example, the body of the gas distributor 112 can be conductive while the panel of the gas distributor 112 can be non-conductive. The gas distributor 112 can be powered, such as by a power source 142 of a first source, as Figure 1 shown, or the gas distributor 112 can be coupled to ground in some embodiments.

[0026] The first electrode 108 can be coupled to a first tuning circuit 128, which can control the ground path of the processing chamber 100. The first tuning circuit 128 can include a first electronic sensor 130 and a first electronic controller 134. The first electronic controller 134 can be or include a variable capacitor or other circuit element. The first tuning circuit 128 can be or include one or more inductors 132. The first tuning circuit 128 can be any circuit such that the impedance can be variable or controllable under the plasma conditions present in the processing space 120 during processing. In some embodiments as shown, the first tuning circuit 128 can include a first circuit branch and a second circuit branch in parallel between ground and the first electronic sensor 130. The first circuit branch can include a first inductor 132A. The second circuit branch can include a second inductor 132B, which is in series with the first electronic controller 134. The second inductor 132B can be disposed between the first electronic controller 134 and the node connecting the first and second circuit branches to the first electronic sensor 130. The first electronic sensor 130 can be a voltage or current sensor and can be coupled to the first electronic controller 134, which can provide a degree of closed-loop control of the plasma conditions inside the processing space 120.

[0027] The second electrode 122 can be coupled to the substrate support 104. The second electrode 122 can be embedded within the substrate support 104 or coupled to the surface of the substrate support 104. The second electrode 122 can be a plate, a perforated plate, a mesh, a wire mesh, or any other distributed arrangement of conductive elements. The second electrode 122 can be a tuning electrode and can be coupled to a second tuning circuit 136, for example, through a conduit 146 (e.g., a cable having a selected resistance, such as 50 ohms) disposed in the shaft 144 of the substrate support 104. The second tuning circuit 136 can have a second electronic sensor 138 and a second electronic controller 140, which can be a second variable capacitor. The second electronic sensor 138 can be a voltage or current sensor and can be coupled to the second electronic controller 140 to provide further control of the plasma conditions in the processing space 120.

[0028] The third electrode 124 can be coupled to the substrate support 104. The third electrode 124 can be a bias electrode and / or an electrostatic chucking electrode. The third electrode can be coupled to a second source of power 150 through a filter 148. The filter 148 can be an impedance matching circuit. The second source of power 150 can be a DC power source, a pulsed DC power source, an RF bias power source, a pulsed RF power source, or a bias power source or a combination of these power sources with other power sources. In some embodiments, the second source of power 150 can be an RF bias power source.

[0029] Figure 1 The lid assembly 106 and the substrate support 104 can be used in any processing chamber for plasma or heat treatment. In operation, the processing chamber 100 can provide real-time control of the plasma conditions in the processing space 120. The substrate 103 can be disposed on the substrate support 104, and process gases can flow through the lid assembly 106 via the inlet 114 according to any desired flow plan. The inlet 114 can include a delivery from the remote plasma source unit 116, which can be fluidly coupled to the chamber, and a bypass 117 for the delivery of process gases that do not flow through the remote plasma source unit 116 in some embodiments. The gases can exit the processing chamber 100 through the outlet 152. A power source can be coupled to the gas distributor 112 to establish a plasma in the processing space 120. The substrate is subjected to an electrical bias using the third electrode 124 in some embodiments.

[0030] When the plasma is energized in the processing space 120, a potential difference can be established between the plasma and the first electrode 108. A potential difference can be established between the plasma and the second electrode 122. However, the electronic controllers 134, 140 can be used to adjust the flow characteristics of the ground path represented by the two tuning circuits 128 and 136. A set point can be delivered to the first tuning circuit 128 and the second tuning circuit 136 to provide independent control of the deposition rate and plasma density uniformity from the center to the edge. In embodiments where both of the electronic controllers are variable capacitors, an electronic sensor can adjust the variable capacitors to independently maximize the deposition rate and minimize the thickness non-uniformity.

[0031] Each of the tuning circuits 128, 136 may have a variable impedance that can be adjusted using the respective electronic controllers 134, 140. In the case where the electronic controllers 134, 140 are variable capacitors, the capacitance range of each of the variable capacitors and the inductances of the first inductor 132A and the second inductor 132B can be selected to provide an impedance range. This range may depend on the frequency and voltage characteristics of the plasma, which may have a minimum value within the capacitance range of each variable capacitor. Thus, when the capacitance of the first electronic controller 134 is at a minimum or maximum value, the first tuning circuit 128 will have a high impedance, resulting in a plasma shape with a minimum aerial or lateral coverage above the substrate support. When the capacitance of the first electronic controller 134 approaches a value that minimizes the impedance of the first tuning circuit 128, the aerial coverage of the plasma will grow to a maximum, effectively covering the entire working area of the substrate support 104. When the capacitance of the first electronic controller 134 deviates from the minimum impedance setting, the plasma shape will shrink from the chamber walls and the aerial coverage of the substrate support will decrease. The second electronic controller 140 may have a similar effect, as the capacitance of the second electronic controller 140 can be varied to increase and decrease the aerial coverage of the plasma above the substrate support.

[0032] The electronic sensors 130, 138 can be used to tune the respective circuits 128, 136 in a closed loop. Depending on the type of sensors used, set points for current or voltage can be installed in the sensors, and the sensors can be provided with control software that determines the adjustments for each respective electronic controller 134, 140 to minimize the deviation from the set point. Thus, the plasma shape can be selected and dynamically controlled during processing. It will be understood that although the previous discussion is based on the electronic controllers 134, 140, which can be variable capacitors, any electronic component with adjustable characteristics can be used to provide the tuning circuits 128 and 136 with adjustable impedance.

[0033] Figure 2 Example operations in a method 200 of a processing chamber according to some embodiments of the present invention are shown. The method can be performed in various processing chambers, including the processing chamber 100 described above. Method 200 may include one or more operations before the start of this method, including pre-processing, polishing, cleaning, deposition, etching, or any other operation that can be performed before the said operations. Method 200 may include several optional operations that may or may not be specifically relevant to some embodiments of the method according to the present invention. For example, many operations are described to provide a broader range of structure formation, but are not critical to the present invention or can be performed by alternative methods, as will be further discussed later.

[0034] In operation 205, method 200 may include providing one or more deposition precursors to a semiconductor processing chamber. A substrate may be disposed within a processing region of the semiconductor processing chamber. The one or more deposition precursors may be provided through a gas distributor, such as gas distributor 112, defining apertures, such as apertures 118, for distributing process precursors into the processing region or processing space. The one or more deposition precursors may include silicon-containing precursors. The silicon-containing precursors may include organosilanes, which may include silane, disilane, and other materials. Additional silicon-containing precursors may include silicon, carbon, oxygen, or nitrogen, such as trisilaneamine. Additional deposition precursors may include oxygen-containing precursors, nitrogen-containing precursors, or any other semiconductor precursors for forming silicon-containing materials. The one or more deposition precursors may or may not include the delivery of additional precursors, such as a carrier gas or one or more dopant precursors for depositing doped silicon-containing materials.

[0035] In operation 210, method 200 may include depositing a silicon-containing material on the substrate. During method 200, the silicon-containing material may also be deposited on one or more components of the semiconductor processing chamber. For example, the silicon-containing material may be deposited on the chamber body or components within the processing region, such as above the substrate support, below the substrate support, adjacent to the outlet of the chamber, or surrounding any other component / on any other component. Depending on the deposition precursors provided to the semiconductor processing chamber in operation 205, various silicon-containing materials may be deposited. For example, if the deposition precursors include silicon and oxygen, a silicon- and oxygen-containing material may be deposited. Alternatively, if the deposition precursors include silicon and nitrogen, a silicon- and nitrogen-containing material may be deposited. It is contemplated that the deposition precursors may include any number of components.

[0036] The deposition of the silicon-containing material in operation 210 may be performed at various temperatures and processes. Depending on the material to be formed, the process conditions may be modified to deposit the silicon-containing material, such as a silicon- and oxygen-containing material or a silicon- and nitrogen-containing material. During operation 210, plasma power may be provided to generate a plasma effluent of one or more deposition precursors. Applying plasma power may increase the deposition rate of the silicon-containing material and / or may increase the conformality of the deposited material.

[0037] At operation 215, method 200 may include providing one or more cleaning precursors to a semiconductor processing chamber. The one or more cleaning precursors may include fluorine-containing precursors. The fluorine-containing precursors may include one or more fluorine-containing materials such as fluorocarbons, atomic fluorine (F), diatomic fluorine (F2), interhalogen fluorides such as bromine trifluoride (BF3) or chlorine trifluoride (ClF3), nitrogen trifluoride (NF3), sulfur hexafluoride (SF3), xenon difluoride (XF2). In an embodiment, the fluorine-containing precursor may include hydrogen and may be, for example, hydrofluoric acid (HF), ammonium fluoride (NH4F), ammonium bifluoride (NH4HF2), HF-pyridine, tetrafluorohydrazine (N2F4), tetramethylammonium fluoride ((CH3)4NF), tetra-n-butylammonium fluoride ((C4H9)4NF), N2H5F, N2H5F2, or hydrazine fluoride. In some embodiments, the fluorine-containing precursor may be NH3-free, as NH3 can lead to the formation of greenhouse gases and increased operating costs.

[0038] As previously described, one or more deposition precursors may be provided by a gas distributor that defines holes for dispensing process precursors into a processing region or a processing space. Any of the one or more cleaning precursors may be provided through the bottom of the chamber. For example, in an embodiment, one or more cleaning precursors may be provided from an opening in the chamber below a substrate support such as substrate support 104. By providing one or more cleaning precursors below the substrate support, the cleaning of the chamber may be focused on the area below the substrate support, such as where undesired growth may occur. Additionally, by providing one or more cleaning precursors below the substrate support, the interaction between the silicon-containing material deposited on the substrate and the one or more cleaning precursors may be minimized. In an embodiment, one or more cleaning precursors such as fluorine-containing precursors may be provided to the processing region as plasma-free. By providing the cleaning precursors as plasma-free, additional plasma generation steps such as in a remote plasma source unit may be unnecessary, thereby reducing the complexity of method 200. Additionally, the formation of remote plasma of one or more cleaning precursors may result in the release of greenhouse gases. Additionally, the operation of a remote plasma source unit may be expensive and unreliable.

[0039] At operation 215, method 200 may also include providing an activation precursor or a co-reactant. It is also contemplated that the activation precursor or the co-reactant may be provided together with and / or before the one or more cleaning precursors. For example, the activation precursor may be provided before the one or more cleaning precursors while the co-reactant may be provided with the fluorine-containing precursor. Similar to the one or more cleaning precursors, the activation precursor and / or the co-reactant may be provided from an opening in the chamber below the substrate support.

[0040] Before treating a silicon-containing material with a fluorine-containing precursor, an activation precursor can be provided to treat the silicon-containing material deposited on one or more components of a semiconductor processing chamber. The activation precursor can interact with the silicon-containing material and can weaken the bonds in the silicon-containing material. For example, in the case of a silicon- and oxygen-containing material, the activation precursor can weaken the Si-O bonds in the silicon-containing material. With weakened Si-O bonds, one or more cleaning precursors, such as a fluorine-containing precursor, can more easily remove the silicon-containing material deposited on the chamber and chamber components. Some activation precursors can activate the silicon-containing material to move positive charge centers to the central Si atom, allowing for easier nucleophilic attack and removal of the silicon-containing material. In an embodiment, the activation precursor can be or include water or steam (H2O), an alcohol (e.g., methanol, isopropyl alcohol, butanol, etc.), a diol (e.g., dimethyl diol), ammonia (NH3), a primary amine, a secondary amine or a tertiary amine, trifluoroacetic acid, or a combination of the foregoing. The activation precursor can additionally or alternatively include a plasma effluent of hydrogen, nitrogen, oxygen, fluorine, argon, or a combination of the foregoing. In some embodiments, an energy source, such as microwave energy, IR energy, UV energy, laser energy, or a combination of the foregoing, can be provided to activate the silicon-containing material.

[0041] In addition to the activation precursor that enhances the kinetics of removing the silicon-containing material, the weakened silicon-containing material can direct / pull one or more cleaning precursors toward the weakened silicon-containing material, thereby increasing the selectivity and efficiency of removal, such as the selectivity for the silicon-containing material deposited on one or more chamber components and, for example, on aluminum or other metal chamber components.

[0042] A co-reactant can be provided to modify one or more cleaning precursors, such as a fluorine-containing precursor. The co-reactant can interact with one or more cleaning precursors and can weaken the bonds in the cleaning precursors. For example, in the case of a fluorine-containing precursor, the co-reactant can weaken the fluorine bonds in the fluorine-containing precursor. With weakened fluorine bonds, the bonds can be more easily broken compared to unmodified fluorine bonds, which can more easily allow the removal of the silicon-containing material by fluorine. In addition to weakening the fluorine bonds (which can enhance the polarization of the fluorine-containing precursor), the co-reactant can empower one or more cleaning precursors, such as through external ionization, again more easily allowing the removal of the silicon-containing material by one or more cleaning precursors. In an embodiment, the co-reactant can be or include water or steam (H2O), an alcohol (e.g., methanol, isopropyl alcohol, butanol, etc.), a diol (e.g., dimethyl diol), ammonia (NH3), a primary amine, a secondary amine or a tertiary amine, trifluoroacetic acid, or a combination of the foregoing. The co-reactant can additionally or alternatively include a plasma effluent of hydrogen, nitrogen, oxygen, fluorine, argon, or a combination of the foregoing. In some embodiments, an energy source, such as microwave energy, IR energy, UV energy, laser energy, or a combination of the foregoing, can be provided to activate one or more deposition precursors.

[0043] In optional operation 220, method 200 may include generating a plasma from a cleaning precursor in the processing region. For example, when one or more cleaning precursors include a fluorine-containing precursor, operation 220 may include generating a fluorine-containing plasma from the fluorine-containing precursor in the processing region. A plasma effluent of the fluorine-containing precursor or other cleaning precursor may be generated by applying RF power to the processing region. Alternatively or additionally, the fluorine-containing precursor may contact excited species that are being purged from the processing region, which may thereby excite one or more cleaning precursors, thereby generating a plasma from the cleaning precursors in the processing region.

[0044] In operation 225, method 200 may include contacting a silicon-containing material on one or more components of the semiconductor processing chamber with one or more cleaning precursors or a plasma effluent thereof. In operation 225, method 200 may include removing at least a portion of the silicon-containing material on one or more components of the semiconductor processing chamber with one or more cleaning precursors such as a fluorine-containing precursor. The one or more cleaning precursors may interact with the silicon-containing material to volatilize the silicon-containing material. For example, the fluorine-containing precursor may interact with the silicon-containing material to yield silicon tetrafluoride (SiF4) and oxygen or nitrogen gaseous by-products. The volatiles may then be purged from the chamber to remove the silicon-containing material from the chamber and / or chamber components. The removed silicon-containing material may not include the silicon-containing material formed on the substrate or may be selective with respect to the silicon-containing material formed on the substrate. As previously discussed, the delivery of the one or more cleaning precursors may minimize interaction with the silicon-containing material deposited on the substrate. In some embodiments, the substrate may even be removed before the one or more cleaning precursors are provided to the processing region.

[0045] As Figure 2 shown, method 200 may include repeating operations 205-230 a number of cycles in operation 235. By repeating operations 205-230, the growth of semiconductor material on one or more components of the semiconductor processing chamber may be reduced. In an embodiment, the operations of method 200 may be repeated at least 2 cycles, at least 3 cycles, at least 4 cycles, at least 5 cycles, at least 10 cycles, at least 15 cycles, at least 20 cycles, at least 30 cycles, at least 40 cycles, at least 50 cycles, or more. In other embodiments, when different substrates are positioned within the processing region for depositing silicon material, the operations of method 200 may be continuously repeated.

[0046] In an embodiment, the deposition operation and the cleaning operation may be performed simultaneously. Specifically, depositing the silicon-containing material and removing a portion of the silicon-containing material may be performed simultaneously. As previously discussed, by providing one or more cleaning precursors to a different region of the processing region than one or more deposition precursors, deposition may continue without interference from the one or more cleaning precursors.

[0047] Process conditions can affect the operations performed in method 200. Each of the operations of method 200 can be performed during a fixed temperature in an embodiment, and this temperature in some embodiments can be adjusted during different operations. In some embodiments of the present invention, method 200 can be performed at a substrate, pedestal, and / or chamber temperature less than or about 700 °C, and can be performed at a temperature less than or about 650 °C, less than or about 600 °C, less than or about 550 °C, less than or about 500 °C, less than or about 450 °C, less than or about 400 °C, less than or about 350 °C, less than or about 300 °C, less than or about 250 °C, less than or about 200 °C, less than or about 150 °C or lower. The temperature can also be maintained at any temperature within these ranges, within a smaller range encompassed by these ranges, or between any of these ranges. In an embodiment, the temperature can be maintained at a temperature at which a silicon-containing material can be deposited, reducing downtime and increasing throughput. Thus, in some embodiments, the pressure can be maintained between about 150 °C and about 650 °C.

[0048] The pressure within a semiconductor processing chamber can also affect the operations performed. In an embodiment, the pressure can be maintained at less than about 20 Torr. Thus, the pressure can be maintained at less than or about 15 Torr, less than or about 14 Torr, less than or about 13 Torr, less than or about 12 Torr, less than or about 11 Torr, less than or about 10 Torr, less than or about 9 Torr, less than or about 8 Torr, less than or about 7 Torr, less than or about 6 Torr, less than or about 5 Torr, less than or about 4 Torr, less than or about 3 Torr, less than or about 2 Torr, less than or about 1 Torr or less. The pressure can also be maintained at any pressure within these ranges, within a smaller range encompassed by these ranges, or between any of these ranges. Conventional techniques would require higher temperatures to activate the removal of silicon-containing materials. However, due to the activation of one or more deposition precursors and / or the activation of silicon-containing materials, a lower operating pressure can be given. Thus, in some embodiments, the pressure can be maintained between about 1 Torr and about 10 Torr.

[0049] Conventional techniques can use a plasma effluent of a cleaning precursor such as a fluorine-containing precursor formed remotely from the processing area. As previously discussed, the use of a remote plasma source unit can be time-consuming and produce greenhouse gases. Additionally, a remote plasma source unit can be expensive, unreliable, and only allows sequential deposition and cleaning. A plasma-less cleaning operation has process limitations such as slow kinetics, limited process conditions (e.g., temperature), and may require extreme reaction chemistries. Embodiments of the present invention can overcome the challenges regarding conventional techniques by utilizing a plasma-less cleaning chemistry that allows for efficient cleaning at multiple temperatures. Embodiments of the present invention as described do not require the use of a remote plasma source unit and can thus increase throughput and maintain the life of the chamber and chamber components.

[0050] In the foregoing description, for purposes of explanation, numerous details have been set forth in order to provide an understanding of the various embodiments of the present invention. However, it will be apparent to one of ordinary skill in the art that certain embodiments may be practiced without some of these details or with additional details.

[0051] A number of embodiments have been disclosed and those skilled in the art will recognize that various modifications, substitutions, and equivalents can be used without departing from the spirit of the embodiments. Additionally, numerous well-known processes and elements have not been described so as not to unnecessarily obscure the present invention. Accordingly, the foregoing description should not be considered as limiting the scope of the present invention. Additionally, a method or process may be described as sequential or stepwise, but it will be understood that operations may be performed simultaneously or in a different order than that listed.

[0052] When a numerical range is provided, unless the context specifically indicates otherwise, it is to be understood that each intermediate value between the upper and lower limits of the range (to the smallest fraction of the lower limit unit) is also specifically disclosed. Any stated value or unstated intermediate value in the stated range and any other stated or intermediate value in the stated range form any narrower range. The upper and lower limits of those smaller ranges can be independently included in or excluded from the range, and each range that includes either, neither, or both of the limits in these smaller ranges is also covered within the technology, provided that no explicit excluded limit in the stated range is violated. When the stated range includes one or both of the limits, ranges excluding either or both of the included limits are also included.

[0053] As used herein and in the appended claims, unless the context clearly indicates otherwise, the singular forms "a," "an," and "the" include plural referents. Thus, for example, reference to "a precursor" includes a plurality of such precursors, and reference to "the material" includes reference to one or more materials and their equivalents known to those skilled in the art, and so forth.

[0054] Furthermore, the words "comprise(s)", "comprising", "contain(s)", "containing", "include(s)" and "including" when used in this specification and the appended claims are intended to specify the presence of the stated feature, integer, component, or operation, but they do not preclude the presence or addition of one or more other features, integers, components, operations, acts, or groups.

Claims

1. A semiconductor processing method, the semiconductor processing method comprising: Providing one or more deposition precursors to a semiconductor processing chamber, wherein a substrate is disposed within a processing region of the semiconductor processing chamber; Depositing a silicon-containing material on the substrate and on one or more components of the semiconductor processing chamber; Providing a fluorine-containing precursor to the processing region, wherein the fluorine-containing precursor is plasma-free when provided to the processing region; Contacting the silicon-containing material on the one or more components of the semiconductor processing chamber with the fluorine-containing precursor; And Removing at least a portion of the silicon-containing material on the one or more components of the semiconductor processing chamber with the fluorine-containing precursor.

2. The semiconductor processing method according to claim 1, wherein the one or more deposition precursors comprise a silicon-containing precursor.

3. The semiconductor processing method according to claim 1, wherein the silicon-containing material comprises a silicon and oxygen-containing material or a silicon and nitrogen-containing material.

4. The semiconductor processing method according to claim 1, wherein the fluorine-containing precursor comprises hydrofluoric acid (HF), ammonium fluoride (NH4F), ammonium bifluoride (NH4HF2), HF-pyridine, tetrafluorohydrazine (N2F4), tetramethylammonium fluoride ((CH3)4NF), tetra-n-butylammonium fluoride ((C4H9)4NF), N2H5F, N2H5F2, or hydrazine fluoride.

5. The semiconductor processing method according to claim 1, the semiconductor processing method further comprising: Providing a co-reactant to the processing region together with the fluorine-containing precursor, wherein the co-reactant weakens the bonds in the fluorine-containing precursor.

6. The semiconductor processing method according to claim 5, wherein the co-reactant comprises water or steam (H2O), an alcohol, a diol, ammonia (NH3), an amine, trifluoroacetic acid, hydrogen, helium, or argon.

7. The semiconductor processing method according to claim 1, the semiconductor processing method further comprising: Generating a fluorine-containing plasma from the fluorine-containing precursor in the processing region.

8. The semiconductor processing method according to claim 1, the semiconductor processing method further comprising: Providing an activation precursor to the processing region together with the fluorine-containing precursor; And Contacting the silicon-containing material deposited on the one or more components of the semiconductor processing chamber with the activation precursor, wherein the activation precursor weakens the bonds in the silicon-containing material.

9. The semiconductor processing method according to claim 8, wherein the activation precursor comprises water or steam (H2O), an alcohol, a diol, ammonia (NH3), an amine, trifluoroacetic acid, hydrogen, helium, or argon.

10. The semiconductor processing method according to claim 1, wherein the temperature within the semiconductor processing chamber is maintained at less than or about 700 °C.

11. The semiconductor processing method according to claim 1, wherein the pressure within the semiconductor processing chamber is maintained at less than or about 10 Torr.

12. A semiconductor processing method, the semiconductor processing method comprising: i) Provide one or more deposition precursors to a semiconductor processing chamber, wherein a substrate is disposed within a processing region of the semiconductor processing chamber; ii) Deposit a silicon-containing material on the substrate and on one or more components of the semiconductor processing chamber; iii) Provide a fluorine-containing precursor together with a co-reactant to the processing region, wherein the co-reactant weakens the bonds in the fluorine-containing precursor; iv) Contact the silicon-containing material on the one or more components of the semiconductor processing chamber with the fluorine-containing precursor; v) Remove at least a portion of the silicon-containing material on the one or more components of the semiconductor processing chamber with the fluorine-containing precursor; and vi) Repeat operations i) to v) for at least three cycles.

13. The semiconductor processing method according to claim 12, wherein: The substrate is disposed on a substrate support within the processing region; and The fluorine-containing precursor is provided to the processing region below the substrate support.

14. The semiconductor processing method according to claim 12, the semiconductor processing method further comprising: Providing one or more of water or steam (H2O), an alcohol, a diol, ammonia (NH3), an amine, or trifluoroacetic acid together with the fluorine-containing precursor in operation iii).

15. The semiconductor processing method according to claim 12, the semiconductor processing method further comprising: Providing one or more of hydrogen, helium, or argon together with the fluorine-containing precursor in operation iii).

16. The semiconductor processing method according to claim 12, wherein the fluorine-containing precursor does not contain ammonia (NH3).

17. The semiconductor processing method according to claim 12, wherein the temperature within the semiconductor processing chamber is maintained between about 150 °C and about 650 °C.

18. A semiconductor processing method, the semiconductor processing method comprising: Providing a silicon-containing precursor to a semiconductor processing chamber, wherein a substrate is disposed within a processing region of the semiconductor processing chamber; Depositing a silicon-containing material on the substrate and on one or more components of the semiconductor processing chamber, wherein the silicon-containing material comprises a silicon and oxygen-containing material or a silicon and nitrogen-containing material; Activating the silicon-containing material, wherein the activation weakens the bonds in the silicon-containing material; Providing a fluorine-containing precursor to the processing region; Contacting the silicon-containing material on the one or more components of the semiconductor processing chamber with the fluorine-containing precursor; and Removing at least a portion of the silicon-containing material with the fluorine-containing precursor.

19. The semiconductor processing method according to claim 18, wherein depositing the silicon-containing material and removing the portion of the silicon-containing material are performed simultaneously.

20. The semiconductor processing method according to claim 18, wherein the fluorine-containing precursor provided to the processing region is maintained plasma-free.