Digital type detection circuit and energy storage system

Abstract

The invention relates to a number pattern detection circuit and an energy storage system, the number pattern detection circuit comprises a number identification circuit, a type identification circuit and a controller, the number identification circuit is connected with the controller, the type identification circuit comprises a first reference resistor arranged in a host and i coding resistors matched with i external battery packs of the same type, the first end of the first reference resistor is connected with a first power supply, when the external battery pack is merged into a host, the number identification circuit generates a first identification signal, the coding resistors are connected in parallel and then connected with the second end of the first reference resistor to form a voltage division node, the voltage division node is further connected with the controller, and a first voltage division signal is generated at the voltage division node; and the controller obtains the number of the external battery packs based on the first identification signal and identifies the type parameters of the external battery packs based on the number of the external battery packs and the first voltage division signal, thereby realizing identification of the number and the type of the external battery packs.

Description

Technical Field

[0001] The present application relates to the field of energy storage, and particularly to a digital type detection circuit and an energy storage system. Background Art

[0002] With the popularization of electronic devices, the scenario of multi-battery pack collaborative power supply has increased. However, the existing energy storage systems have the following defects: First, they cannot accurately detect the number of battery packs. When multiple battery packs are connected in parallel, it is easy to cause misjudgment due to the lack of a detection mechanism, affecting power distribution and charge and discharge control. Second, battery packs include various types, and the electrical characteristics of various types of battery packs are different. For example, the electrical characteristics of lithium-ion and nickel-metal hydride battery packs are different. If the type of the incorporated battery pack cannot be identified, it will lead to a mismatch in the charge and discharge strategy, shortening the battery life and even posing a safety hazard. Therefore, there is an urgent need for a digital type detection circuit that can identify both the number and type of battery packs. Summary of the Invention

[0003] Embodiments of the present application aim to provide a digital type detection circuit and an energy storage system that can identify the number and type parameters of externally connected battery packs.

[0004] To solve the above technical problems, the embodiments of the present application provide the following technical solutions: In a first aspect, an embodiment of the present application provides a digital type detection circuit applied to an energy storage system. The energy storage system includes a host and i externally connected battery packs of the same type connected to the host. The digital type detection circuit includes: a quantity identification circuit, a type identification circuit, and a controller; The quantity identification circuit is connected to the controller and is configured to generate a first identification signal in response to the externally connected battery pack being incorporated into the host, where the level state of the first identification signal is related to the number of externally connected battery packs; The type identification circuit includes a first reference resistor disposed in the host and i coding resistors with the same resistance value configured for the same type of multiple externally connected battery packs. The first end of the first reference resistor is connected to a first power supply; when the externally connected battery pack is incorporated into the host, each of the coding resistors is connected in parallel and then connected to the second end of the first reference resistor to form a voltage division node, and the voltage division node is also connected to the controller; The first end of the first reference resistor is connected to a first power supply. When the externally connected battery pack is incorporated into the host, each of the coding resistors is connected in parallel and then connected to the second end of the first reference resistor to form a voltage division node, and the voltage division node is also connected to the controller. The type identification circuit is configured to generate a first voltage division signal at the voltage division node in response to the externally connected battery pack being incorporated into the host, where the voltage of the first voltage division signal is related to the type of the externally connected battery pack; The controller is configured to sample the first identification signal and the first voltage-dividing signal, and obtain the number of the external battery packs based on the first identification signal, and identify the type parameters of the external battery packs based on the number of the external battery packs and the first voltage-dividing signal.

[0005] In a second aspect, an embodiment of the present application provides an energy storage system, which includes a host, i external battery packs, and the digital type detection circuit as described above. Each of the external battery packs is connected in parallel with the host, and the digital type detection circuit is configured to identify the number and type parameters of the external battery packs.

[0006] In various embodiments of the present application, the digital type detection circuit includes a quantity identification circuit, a type identification circuit, and a controller. The quantity identification circuit is connected to the controller. When an external battery pack is incorporated into the host, the quantity identification circuit generates a first identification signal, where the level state of the first identification signal is related to the number of the external battery packs. The type identification circuit includes a first reference resistor disposed in the host and i coding resistors configured for i external battery packs of the same type. The resistance value of the coding resistor is obtained by resistor coding and allocation based on the analog-to-digital sampling range of the controller, and the resistance values of the coding resistors corresponding to the external battery packs of the same type are the same, while the resistance values of the coding resistors corresponding to different types of external battery packs are different. The first end of the first reference resistor is connected to a first power supply. When an external battery pack is incorporated into the host, after the coding resistors are connected in parallel, they are connected to the second end of the first reference resistor to form a voltage-dividing node, and the voltage-dividing node is also connected to the controller. A first voltage-dividing signal is generated at the voltage-dividing node, where the voltage of the first voltage-dividing signal is related to the type of the external battery pack. The controller samples the first identification signal and the first voltage-dividing signal, and obtains the number of the external battery packs based on the first identification signal, and identifies the type parameters of the external battery packs based on the number of the external battery packs and the first voltage-dividing signal.

[0007] When different numbers of external battery packs are incorporated into the host, the level states of the corresponding first identification signals are different, and the controller identifies the number of the external battery packs based on different first identification signals. When external battery packs of the same type are incorporated into the host, the corresponding coding resistors are the same, and the controller identifies the type parameters of the corresponding external battery packs based on the first voltage-dividing signal and the number of the external battery packs. Since the resistance values of the coding resistors corresponding to different types of external battery packs are different, the generated first voltage-dividing signal is different from the first voltage-dividing signal generated when other types of external battery packs are connected. Therefore, the controller can identify the type parameters of the corresponding external battery packs based on the number of the external battery packs and different first voltage-dividing signals. Thus, the digital type detection circuit can identify the number and type of the external battery packs incorporated into the host. Description of the Drawings

[0008] One or more embodiments are exemplarily illustrated by the pictures in the corresponding drawings. These exemplary illustrations do not constitute a limitation on the embodiments. Elements with the same reference numerals in the drawings are represented as similar elements. Unless otherwise stated, the drawings in the figures do not constitute a scale limitation.

[0009] Figure 1 is a schematic structural diagram of one of the energy storage systems provided by an embodiment of the present application; Figure 2 is a schematic structural diagram of one of the digital detection circuits provided by an embodiment of the present application; Figure 3 is a schematic structural diagram of one of the digital detection circuits provided by an embodiment of the present application; Figure 4 is a schematic circuit diagram of one of the digital detection circuits provided by an embodiment of the present application; Figure 5 is a schematic circuit diagram of one of the digital detection circuits provided by an embodiment of the present application; Figure 6 is a schematic circuit diagram of one of the digital detection circuits provided by an embodiment of the present application; Figure 7 is a schematic circuit diagram of one of the digital detection circuits provided by an embodiment of the present application. Detailed implementation manners

[0010] In order to make the purpose, technical solutions and advantages of the present application clearer, the present application will be further described in detail below with reference to the drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0011] When the energy storage system is expanded, the external battery pack is connected in parallel with the host in the energy storage system through a connector, as Figure 1 shown. The energy storage system includes a host 100 and N external battery packs 200, where N is an integer greater than or equal to 1. It can be three, four or more battery packs. The specific number of battery packs can be set according to needs and is not limited herein.

[0012] As Figure 1 shown, when the first external battery pack 200 is incorporated into the host 100, the first external battery pack 200 and the host 100 are connected in parallel through a connector 300. When the second external battery pack 200 is incorporated into the host 100, the second external battery pack 200 and the first external battery pack 200 are connected in parallel through a connector 300, and so on until the Nth external battery pack 200 is incorporated. After each external battery pack 200 is incorporated into the host 100, the host 100 controls operations such as charging, discharging or balancing of the external battery pack 200.

[0013] Expansion can be carried out in both the upper and lower directions of the host 100 ( Figure 1 Taking the expansion in the lower part of the host 100 as an example), but there is a limit on the number of expandable battery packs. The system needs to identify the number of incorporated expansion devices and operate within the limited number. Therefore, the energy storage system needs to identify the number of externally connected battery packs to control operations such as charging and discharging.

[0014] At the same time, the types of externally connected battery packs incorporated into the host 100 are the same. For example, the types of the i battery packs incorporated into the host are all of the first type, or the types of the i battery packs incorporated into the host are all of the second type. When the energy storage system controls the charging and discharging operations, it also needs to identify the type of the externally connected battery pack, because for different types of externally connected battery packs, their required charging voltage or charging current is different, and their discharging voltage or discharging current is also different. Therefore, the energy storage system needs to identify the type of the externally connected battery pack to enable fast charging and discharging.

[0015] Based on the above problems, the embodiment of the present application provides a numerical type detection circuit, which can identify the number and type of externally connected battery packs, so that the energy storage system can control operations such as fast charging and discharging.

[0016] As Figure 2 shown, the numerical type detection circuit includes a quantity identification circuit 20, a type identification circuit 10, and a controller 30. Among them, the quantity identification circuit 20 is connected to the controller 30. When an externally connected battery pack is incorporated into the host, the quantity identification circuit 20 generates a first identification signal, and the level state of the first identification signal is related to the number of externally connected battery packs. The controller 30 samples the first identification signal and determines the number of externally connected battery packs based on the level state of the first identification signal. The type identification circuit 10 includes a first reference resistor R 02 and i coding resistors (respectively R 1B , R 2B ... and R iB ). The first end of the first reference resistor R 02 is connected to the first power supply VSS. Among them, the first reference resistor R 02 and the controller 30 are arranged in the host, and the coding resistors are arranged in the externally connected battery pack. When the externally connected battery pack is connected in parallel with the host, the respective coding resistors are connected in parallel, and each coding resistor is connected to the second end of the first reference resistor R 02 , and a voltage dividing node A is formed at the connection point. The second ends of the respective coding resistors are grounded, and each coding resistor is connected to the first reference resistor R 02A voltage dividing circuit is formed to divide the voltage of the first power supply VSS, and a first divided voltage signal is generated at the voltage dividing node. The controller 30 is connected to the point A of the voltage dividing node. The controller 30 samples the first divided voltage signal at the point A of the voltage dividing node, and then identifies the type parameters of the external battery pack according to the first divided voltage signal and the number of the external battery packs.

[0017] If the types of the i external battery packs incorporated into the host are the same, the resistance values of the coding resistors corresponding to each external battery pack are the same. Then, based on the first divided voltage signal and the number of the external battery packs, the resistance values of the respective coding resistors can be obtained. Based on the resistance values of the respective coding resistors, the type parameters of the corresponding external battery packs are determined.

[0018] The resistance values of the coding resistors corresponding to different types of external battery packs are different. For example, if i external battery packs of the first type are incorporated into the host, the resistance values of the coding resistors in the i external battery packs of the first type are the first resistance value. And if i external battery packs of the second type are incorporated into the host, the resistance values of the coding resistors in the i external battery packs of the second type are the second resistance value. Then, when i external battery packs of the first type are incorporated into the host, a first divided voltage signal is generated at the voltage dividing node, and its voltage is the first voltage. When i external battery packs of the second type are incorporated into the host, a second divided voltage signal is generated at the voltage dividing node, and its voltage is the second voltage.

[0019] When the controller 30 receives the first divided voltage signal with the first voltage and the number of the external battery packs, it can deduce the resistance value of the corresponding coding resistor, determine that the resistance value of the first coding resistor is the first resistance value, and the type of the external battery pack corresponding to the first resistance value is the first type. Thus, it is recognized that the type of the i external battery packs is the first type, and the type parameters of the external battery packs of the first type can also be obtained, such as the type being the first type, the first charging voltage or the first charging current, and parameters such as the device ID.

[0020] When the controller 30 receives the first divided voltage signal with the second voltage and the number of the external battery packs, it can deduce the resistance value of the corresponding coding resistor, determine that the resistance value of the second coding resistor is the second resistance value, and the type of the external battery pack corresponding to the second resistance value is the second type. Thus, it is recognized that the type of the i external battery packs is the second type, and the type parameters of the external battery packs of the second type can also be obtained, such as the type being the second type, the second charging voltage or the second charging current, and parameters such as the device ID.

[0021] Therefore, when i external battery packs are incorporated into the host, the quantity identification circuit 20 generates a first identification signal related to the number of the external battery packs, and the type identification circuit 10 generates a first divided voltage signal related to the type of the external battery pack. The controller 30 identifies the number of the external battery packs based on the first identification signal, and identifies the type parameters of the i external battery packs based on the voltage of the first divided voltage signal and the number of the external battery packs.

[0022] In some embodiments, before identification, resistance coding is performed based on the analog-to-digital sampling range of the controller 30, and coding resistors with different resistance values are assigned to different types of external battery packs. When the external battery pack is connected to the host, the controller 30 samples the first divided voltage signal at the voltage division node, and then based on the voltage division principle and the first divided voltage signal, obtains the total measured value of the i coding resistors. Then, based on the total measured value and the number of external battery packs, obtains the measured resistance value corresponding to the coding resistor assigned to the external battery pack, and then searches for the resistance value in the mapping relationship set to obtain the target ideal resistance and type parameters that match the value of the measured resistance value. Among them, the mapping relationship set includes the ideal resistance that matches the coding resistor and the type parameters of the external battery pack that correspond one-to-one to the ideal resistance.

[0023] For example: as Figure 2 shown, the total measured value of the i coding resistors is deduced by the following formula based on the voltage division principle and the voltage of the first divided voltage signal: R 总 =V0×R 02 / (VSS - V0) (1) Wherein, R 总 is the total measured value, V0 is the voltage of the first divided voltage signal, R 02 is the resistance value of the first reference resistor R 02 , and VSS is the voltage of the first power supply.

[0024] If the resistance values of the i coding resistors are all the same, then the measured resistance value is calculated by the following formula: R m =i×R 总 (2) Wherein, R m is the measured resistance value of the coding resistor, R 总 is the total measured value, and i is the number of coding resistors.

[0025] Thus, the controller 30 can obtain the measured resistance value of each coding resistor, then obtain the mapping relationship set, and search in the mapping relationship set to obtain the target ideal resistance corresponding to the measured resistance value, so as to obtain the type parameters of the external battery pack corresponding to the target ideal resistance.

[0026] In order to be able to identify the types of different types of external battery packs, before the identification, resistance coding is performed based on the analog-to-digital sampling range of the controller 30. Coding resistors with different resistance values are assigned to multiple external battery packs, and then ideal resistors corresponding one-to-one to the coding resistors are assigned. The resistance value of each ideal resistor is equal to the resistance value of its corresponding coding resistor. Coding resistors with different resistance values are assigned to different external battery packs, and the ideal resistors with resistance values equal to those of the coding resistors are put into one-to-one correspondence with the type parameters of their corresponding external battery packs to establish a mapping relationship, so as to form a mapping relationship set.

[0027] When performing the resistance coding and assignment operation, resistance coding is performed based on the analog-to-digital sampling range of the controller 30, and coding resistors with different resistance values are assigned to multiple external battery packs.

[0028] Moreover, when performing the resistance coding and assignment operation, the resistance value of the coding resistor in an external battery pack is determined by connecting one external battery pack to the host.

[0029] First, the maximum resistance value and the minimum resistance value of the coding resistor are determined based on the analog-to-digital sampling range of the controller 30. In some embodiments, the controller 30 includes an ADC sampling unit. The ADC sampling unit samples the voltage-dividing signal, and the ADC sampling unit performs analog-to-digital conversion on the voltage-dividing signal to obtain the voltage value of the voltage-dividing signal. Therefore, the analog-to-digital sampling range of the controller 30 is the range of the ADC sampling unit.

[0030] Then, the first reference resistor R02 and the coding resistor divide the voltage of the first power supply VSS. The obtained first voltage-dividing signal needs to be within the range of the ADC sampling unit to achieve correct sampling. Based on this principle, the maximum resistance value and the minimum resistance value of the coding resistor can be obtained.

[0031] If the sampling range of the ADC sampling unit is [V1, V2], then in order to satisfy correct sampling, the voltage V of the first voltage-dividing signal ADC needs to satisfy the following constraint conditions: V1 < V ADC < V2 (3) Also, V ADC = (R m × VSS) / (R 02 + R m ), where R m is the resistance value of the coding resistor, and R 02 is the resistance value of the first reference resistor R 02 . Then, based on formula (3), it can be obtained that: (V1 × R 02 ) / (VSS - V1) < R m < (V2 × R 02 ) / (VSS - V2) (4) Therefore, for the accuracy of sampling, the resistance value R of the encoded resistor m ranges from [R min , R max , the minimum resistance value is R min , and the maximum resistance value is R max , where R min = (V1 × R 02 ) / (VSS - V1), and R max = (V2 × R 02 ) / (VSS - V2).

[0032] Then, based on the minimum resistance value R min and the maximum resistance value R max , a resistance encoding operation is performed to obtain the resistance values of multiple encoded resistors. When generating the resistance values of each encoded resistor, if the resistance values of each encoded resistor are relatively close, due to measurement errors and other reasons, it may cause incorrect matching of the external battery pack type and confusion may occur.

[0033] Based on the above problems, when performing the resistance encoding operation to generate the resistance values of the encoded resistors, a differential resistance interval design is carried out for the resistance values of each encoded resistor to prevent confusion and reduce the risk of incorrect matching of multiple external battery pack types.

[0034] In the embodiment of the present application, first, the median resistance value is determined based on the analog-to-digital sampling range of the controller 30, the voltage of the first power supply VSS, and the resistance value of the first reference resistor R 02 , and then the minimum allowable interval is determined based on the median resistance value. Specifically, when the median voltage of the analog-to-digital sampling range is used as the voltage of the first voltage division signal, the resistance value of the corresponding encoded resistor is determined as the median resistance value. Based on the analog-to-digital sampling range of the controller 30, the median voltage is determined, where the median voltage is the middle value of the analog-to-digital sampling range.

[0035] The median resistance value is determined by the following formula: (5) where R base is the median resistance value, V mid is the median voltage, and R 02 is the resistance value of the first reference resistor R 02 .

[0036] If the analog-to-digital sampling range is [V1, V2], then the median voltage V mid = (V2 + V1) / 2. When the resistance value of the encoded resistor is the median resistance value, it divides the first power supply VSS with the first reference resistor R 02 to generate a first voltage division signal with a voltage of the median voltage. Therefore, the corresponding median resistance value can be deduced based on the median voltage.

[0037] Then, based on the median resistance value, the minimum allowable interval is determined. The minimum allowable interval can make the interval between the resistance values of adjacent coded resistors large enough to avoid recognition conflicts caused by measurement errors.

[0038] Specifically, first, the maximum measurement error is obtained, and then the minimum allowable interval is determined by the following formula: R gap =w×ε×R base (6) Wherein, R gap is the minimum allowable interval, w is the weight, ε is the maximum measurement error, and R base is the median resistance value.

[0039] w can be set as needed. In the embodiments of the present application, w is 2. ε is the maximum measurement error, which refers to the maximum allowable error between the measured resistance value of the coded resistor and the resistance value of the assigned coded resistor. It can be set as needed. In the embodiments of the present application, ε is 5%, that is, if the error between the actual measured value and the resistance value of the assigned coded resistor is less than or equal to ε, it is considered that the actual measured value and the resistance value of the assigned coded resistor meet the error requirements or match.

[0040] In some embodiments, in order to also consider the noise interference into the minimum allowable interval to further reduce the measurement error, the minimum allowable interval can also be superimposed with a safety margin δ on the basis of the median resistance value R gap to obtain the final minimum allowable interval. Multiply the median resistance value R gap by the weight corresponding to the noise interference to obtain the safety margin δ. For example, the safety margin δ = 2%×R base .

[0041] Finally, based on the minimum allowable interval, the resistance values from the minimum resistance value to the maximum resistance value are segmented to obtain the resistance values of several coded resistors. That is, [R min , R max is segmented and split, and the difference between the split resistance values meets the minimum allowable interval. For example: the resistance values of each coded resistor are respectively R min , R min +R gap , R min +2.5×R gap ... and so on until the resistance value of the last coded resistor is obtained.

[0042] It should be noted that when splitting [R min , R maxWhen splitting and disassembling to obtain the resistance values of each coded resistor, it can be evenly split so that the difference between the resistance values of each coded resistor is equal, or it can be unevenly split so that the difference between the resistance values of each coded resistor is equal or unequal, as long as the difference between the resistance values of two adjacent coded resistors meets the minimum allowable interval.

[0043] After obtaining the resistance values of each coded resistor, each coded resistor is assigned to different types of external battery packs, and each coded resistor corresponds to each type of external battery pack one by one. For example, the coded resistor with a resistance value of R min is assigned to the first type of external battery pack, and the coded resistor with a resistance value of R min +R gap is assigned to the second type of external battery pack, and the coded resistor with a resistance value of R min +2.5×R gap is assigned to the third type of external battery pack, and so on until the last coded resistor is assigned to an external battery pack different from the aforementioned types.

[0044] Among them, the coded resistor can be a single resistor or formed by multiple resistors in parallel. For example, the coded resistor is a single resistor, and the resistance value of the single resistor is the resistance value of the coded resistor. If the coded resistor is multiple resistors, the resistance value of the multiple resistors in parallel is the resistance value of the coded resistor.

[0045] Then, a mapping relationship set is established. Among them, the mapping relationship set includes multiple mapping data units. The construction of the multiple mapping data units is as follows: For each mapping data unit, an ideal resistor corresponding one by one to the coded resistor is assigned. The resistance value of each ideal resistor is equal to the resistance value of its corresponding coded resistor. Then, a mapping relationship is established between the ideal resistor of each mapping data unit and the type parameters of the external battery pack corresponding to its coded resistor.

[0046] That is, the coded resistor and the ideal resistor are in one-to-one correspondence, and the resistance value of the coded resistor is equal to the resistance value of the ideal resistor. Then, a mapping relationship is established between the ideal resistor and the type parameters of the corresponding external battery pack. If the type parameters include the model of the external battery pack, the ID number of the external battery pack, as well as the target output voltage and maximum current of the external battery pack, the mapping relationship can be expressed as (M, R m , I DM , V _targetM , I _maxM ), where M is the device model of the external battery pack, R m is the resistance value of the ideal resistor, I DM is the ID number of device M, V _targetM is the target output voltage of device M, and I _maxM is the maximum current of device M.

[0047] Taking the allocation of coded resistors for two types of external battery packs and the construction of two mapping data units as examples, the establishment process of the resistor coding and mapping relationship set is described.

[0048] Allocate different resistance values to the coded resistors in two types of external battery packs. If the two types of external battery packs are the first external battery pack and the second external battery pack respectively, and their corresponding coded resistors are the first coded resistor and the second coded resistor respectively, then allocate the first coded resistor to the first external battery pack, with its resistance value being the first resistance value, and allocate the second coded resistor to the second external battery pack, with its resistance value being the second resistance value, and the first resistance value and the second resistance value are obtained by splitting and dividing [R min ,R max , and the difference between the first resistance value and the second resistance value meets the minimum allowable interval. For example: the first resistance value and the second resistance value are R min and R min +R gap .

[0049] Then construct two mapping data units. Allocate the first ideal resistor corresponding to the first resistance value to the first mapping data unit. The resistance value of the first ideal resistor is equal to the first resistance value. Then establish a mapping relationship between the first ideal resistor and the type parameters of the first external battery pack. The mapping relationship is expressed as (M1, R m1 , I DM1 , V _targetM1 , I _maxM1 ), where M1 refers to the device model of the first external battery pack, R M1 refers to the resistance value of the first ideal resistor, I DM1 refers to the ID number of device M1, V _targetM1 refers to the target output voltage of device M1, and I _maxM1 refers to the maximum current of device M1. Allocate the second ideal resistor corresponding to the second resistance value to the second mapping data unit. The resistance value of the second ideal resistor is equal to the second resistance value. Then establish a mapping relationship between the second ideal resistor and the type parameters of the second external battery pack. The mapping relationship is expressed as (M2, R m2 , I DM2 , V _targetM2 , I _maxM2 ), where M2 refers to the device model of the second external battery pack, R M2 refers to the resistance value of the second ideal resistor, I DM2 refers to the ID number of device M2, V _targetM2 refers to the target output voltage of device M2, and I _maxM2 refers to the maximum current of device M2. Finally, the two mapping data units form a mapping relationship set.

[0050] Therefore, the mapping relationship set contains the mapping relationship between the type parameters of each external battery pack and the ideal resistance, and the ideal resistance is equal to the resistance value of the coded resistance of the external battery pack, with a one-to-one correspondence.

[0051] When i external battery packs of the same type are connected to the host, a first voltage division signal is generated at the voltage division node. The controller 30 can determine the total measured value of the i coded resistors through the first voltage division signal, and then calculate the measured resistance value based on the number of external battery packs and the total measured value (as shown in the above formulas (1) and (2)). Furthermore, the target ideal resistance matching it is determined from the mapping relationship set through the measured resistance value, and then the type parameter matching it is determined through the target ideal resistance.

[0052] The controller 30 traverses the ideal resistances in the mapping relationship. If the absolute value of the difference between the ideal resistance and the measured resistance value is less than the preset error, it is determined that the ideal resistance value matches the measured resistance value. This ideal resistance value is the target ideal resistance value, and then the type parameter of the external battery pack corresponding to the target ideal resistance is determined from the mapping relationship set.

[0053] In some embodiments, the measured resistance value inversely deduced by the controller 30 based on the voltage value of the first voltage division signal is the original resistance value of the coded resistor. To improve the measurement accuracy, the measured resistance value is obtained after temperature compensation of the original resistance value.

[0054] Specifically, the controller 30 first determines the original resistance value of the coded resistor according to the first voltage division signal, the voltage of the first power supply VSS, and the resistance value of the first reference resistor R 02 , and then performs temperature compensation on the original resistance value of the coded resistor to obtain the measured resistance value.

[0055] If the voltage of the first voltage division signal measured by the ADC sampling unit is V ADC , and the resistance value of the first reference resistor R 02 is R 02 , then the original resistance value of the coded resistor is obtained through the following formula: (7) Among them, R mm is the original resistance value of the coded resistor.

[0056] Then, temperature compensation is performed on the original resistance value, and the measured resistance value is obtained through the following formula: (8) Among them, R c is the measured resistance value, a is the temperature coefficient of resistance. In the embodiments of the present application, a is 0.00005, and T is the current temperature.

[0057] The measured resistance value after temperature compensation is more accurate, more in line with the actual resistance value of the coded resistor, and improves the measurement accuracy of the resistance value of the coded resistor.

[0058] Due to problems such as measurement error or measurement accuracy, the measured resistance value R c is not necessarily the same as the resistance value of the ideal resistor. Therefore, traverse each ideal resistor in the mapping relationship set, and judge whether the absolute value of the difference between the resistance value of each ideal resistor and the measured resistance value R c is less than the preset error. If it is less than the preset error, it is confirmed that the resistance value of the ideal resistor matches the measured resistance value R c , and the ideal resistor that matches the measured resistance value R c is determined as the target ideal resistor. Then determine the type parameter of the external battery pack corresponding to the target ideal resistor.

[0059] Taking the first external battery pack and the second external battery pack as an example to describe the process of obtaining the type parameter. When i first external battery packs of the same type are connected to the host, the first coded resistor and the second reference resistor form a voltage division circuit to generate a first voltage division signal. Then, the controller 30 can inversely calculate the first measured resistance value R c1 of the first coded resistor based on this first voltage division signal (such as through the above formula (1) and formula (2)). Then, traverse the mapping relationship set to determine the first ideal resistor R c1 that matches the first measured resistance value R m1 , determine the first ideal resistor R m1 as the target ideal resistor, and then obtain the type parameter associated with the first ideal resistor R m1 , and this type parameter is the type parameter of the first external battery pack.

[0060] Similarly, when i second external battery packs of the same type are connected to the host, the second coded resistor and the second reference resistor form a voltage division circuit to generate a first voltage division signal. Then, the controller 30 can inversely calculate the second measured resistance value R c2 of the second coded resistor based on this first voltage division signal (such as through the above formula (1) and formula (2)). Then, traverse the mapping relationship set to determine the second ideal resistor R c2 that matches the second measured resistance value R m2 , determine the second ideal resistor R m2 as the target ideal resistor, and then obtain the type parameter associated with the second ideal resistor R m2 , and this type parameter is the type parameter of the second external battery pack.

[0061] Thus, when different types of external battery packs are connected to the host, different first voltage-dividing signals are generated. Based on the different first voltage-dividing signals and the number of external battery packs, the controller 30 can obtain different measured resistance values, and then determine the target ideal resistance that matches the measured resistance value from the mapping relationship set, and further obtain the type parameter associated with the target ideal resistance.

[0062] In some embodiments, as Figure 2 shown, the type recognition circuit 10 further includes a filtering circuit, and the filtering circuit includes a resistor R 03 and a capacitor C1. The resistor R 03 is connected between the controller and the voltage-dividing node A. One end of the capacitor C1 is connected to the controller and the resistor R 03 respectively, and the other end is grounded. After the first voltage-dividing signal is filtered by the filtering circuit, it is transmitted to the controller 30.

[0063] Please refer to Figure 3 , Figure 3 which is a schematic structural diagram of a number type detection circuit provided by an embodiment of the present application. As Figure 3 shown, the quantity recognition circuit 20 includes: i matching resistors (resistor R 1A , resistor R 2A ... resistor R iA ), a second reference resistor R 01 and N comparison circuits 21, where i is a positive integer from 0 to N, and N is a positive integer greater than or equal to 1.

[0064] It should be noted that when the host and each external battery pack form a stacked structure through the connector 300, the matching resistors in each external battery pack, the second reference resistor R 01 in the host, and the devices of the second power supply VDD in the host can form Figure 3 the connection relationship shown.

[0065] The first end of the second reference resistor R 01 is connected to the second power supply VDD. The matching resistors are arranged in the external battery packs and are in one-to-one correspondence with the external battery packs, and the resistance values of the matching resistors are the same. When the i-th external battery pack is incorporated into the host, the i matching resistors are connected in parallel to form a parallel voltage-dividing module. The first end of the parallel voltage-dividing module is connected to the second end of the second reference resistor R 01 , the second end of the parallel voltage-dividing module is grounded to GND, and the second reference resistor R 01 and the parallel voltage-dividing module divide the second power supply VDD to obtain a second voltage-dividing signal. Thus, the first end of the parallel voltage-dividing module can obtain the second voltage-dividing signal regarding the second power supply.

[0066] For example: If the i matching resistors are respectively resistor R 1A, resistor R 2A ... resistor R iA , when the first external battery pack is incorporated into the host, the first end of resistor R 1A is connected to the second end of the second reference resistor R 01 , and resistor R 1A and the second reference resistor R 01 divide the second power supply VDD to obtain a second divided voltage signal, and the voltage of the second divided voltage signal is Vin1 = VDD × R 1A / (R 01 + R 1A ).

[0067] When the second external battery pack is incorporated into the host, resistor R 1A and resistor R 2A are connected in parallel to form a voltage dividing resistor module. The first end of resistor R 2A is connected to the second end of the second reference resistor R 01 , and resistors R 1A , resistor R 2A and the second reference resistor R 01 divide the second power supply VDD to obtain a second divided voltage signal, and the voltage of the second divided voltage signal is Vin2 = VDD × (R 1A / / R 2A ) / (R 01 + (R 1A / / R 2A ), where / / represents the parallel symbol, and R 1A / / R 2A represents the total resistance after R 1A and R 2A are connected in parallel.

[0068] And so on, when the i-th external battery pack is incorporated into the host, resistors R 1A , resistor R 2A until resistor R iA are all connected in parallel to form a voltage dividing resistor module. The first end of resistor R iA is connected to the second end of the second reference resistor R 01 , and resistors R 1A , resistor R 2A until resistor R iA together with the second reference resistor R 01 divide the second power supply VDD to obtain a second divided voltage signal, and the voltage of the second divided voltage signal is Vin i = VDD × (R 1A / / R 2A / / ... / / R iA ) / (R 01 + (R 1A / / R2A / / ... / / R iA ), where / / represents the parallel symbol, R 1A / / R 2A / / ... / / R iA represents R 1A 、R 2A 、... and R iA is the total resistance after parallel connection.

[0069] Thus, when different numbers of external battery packs are incorporated into the host, the voltage of the second voltage-dividing signal is different. The voltage of the second voltage-dividing signal decreases as the number of external battery packs increases, and is less than the voltage of the second power supply VDD.

[0070] The first input terminal of each comparison circuit 21 is connected to the second voltage-dividing signal, and the second input terminal of each comparison circuit 21 is connected to a reference voltage. For example, the second input terminal of the first comparison circuit is connected to the first reference voltage Vref1, the second input terminal of the second comparison circuit is connected to the second reference voltage Vref2, and so on. The second input terminal of the Nth comparison circuit is connected to the Nth reference voltage Vref N , where the voltages of the respective reference voltages are different. For example, the voltages of the respective reference voltages increase or decrease in sequence, that is, Vref1 < Vref2 <... < Vref N , or, Vref1 > Vref2 >... > Vref N .

[0071] And the voltage of the second power supply VDD is greater than the maximum value among the reference voltages. If the values of the respective reference voltages increase in sequence, the voltage of the second power supply VDD is greater than Vref N , if the values of the respective reference voltages decrease in sequence, the voltage of the second power supply VDD is greater than Vref1.

[0072] The comparison circuit 21 compares the voltage of the second voltage-dividing signal with the corresponding reference voltage and outputs the corresponding comparison signal. These N comparison signals reflect the number of external battery packs.

[0073] For example, if the values of the reference voltages increase in sequence, that is, Vref1 < Vref2 <... < Vref N , and when the voltage at the first input terminal of the comparison circuit is less than the voltage at its second input terminal, the comparison circuit outputs a comparison signal with a high level.

[0074] Then when no external battery pack is incorporated, the first input terminals of the N comparison circuits are all connected to the second power supply VDD. The voltage of the second power supply VDD is greater than any one of the reference voltages, so the N comparison circuits all output comparison signals with a low level, determining that no external battery pack is incorporated.

[0075] When an external battery pack is incorporated, the resistor R 1A divides the voltage of the second power supply VDD with the second reference resistor R 01 to obtain a second divided voltage signal. The voltage of the second divided voltage signal is Vin1. Among them, Vin1 is transmitted to the first input ends of N comparison circuits, and Vref N-1 <Vin1<Vref N , then the Nth comparison circuit outputs a comparison signal with a high level, and the other comparison circuits output comparison signals with a low level, and it is determined that the number of incorporated external battery packs is one.

[0076] When two external battery packs are incorporated, the resistor R 1A , the resistor R 2A divide the voltage of the second power supply VDD with the second reference resistor R 01 to obtain a second divided voltage signal. The voltage of the second divided voltage signal is Vin2. Among them, Vin2 is transmitted to the first input ends of N comparison circuits, and Vref N-2 <Vin2<Vref N-1 , then the Nth comparison circuit outputs a comparison signal with a high level, the (N - 1)th comparison circuit outputs a comparison signal with a high level, and the other comparison circuits output comparison signals with a low level, and it is determined that the number of incorporated external battery packs is two.

[0077] By analogy, when N external battery packs are incorporated, the resistors R 1A to the resistor R N divide the voltage of the second power supply VDD with the second reference resistor R 01 to obtain a second divided voltage signal. The voltage of the second divided voltage signal is Vin N . Among them, Vin N is transmitted to the first input ends of N comparison circuits, and Vin N <Vref1, then the first comparison circuit outputs a comparison signal with a high level, the second comparison circuit outputs a comparison signal with a high level, and so on, and the Nth comparison circuit also outputs a comparison signal with a high level, and it is determined that the number of incorporated external battery packs is N.

[0078] For another example, if the values of the reference voltages decrease in sequence, that is, Vref N <Vref N-1 <...<Vref1, and when the voltage at the first input end of the comparison circuit is less than the voltage at its second input end, the comparison circuit outputs a comparison signal with a high level.

[0079] When no external battery pack is incorporated, the first input ends of N comparison circuits are all connected to the second power supply VDD. The voltage of the second power supply VDD is greater than any one of the reference voltages, then N comparison circuits all output comparison signals with a low level, and it is determined that no external battery pack is incorporated.

[0080] When an external battery pack is incorporated, the resistor R 1A and the second reference resistor R 01 divide the voltage of the second power supply VDD to obtain a second divided voltage signal. The voltage of the second divided voltage signal is Vin1. Among them, Vin1 is transmitted to the first input ends of N comparison circuits, and Vref2 < Vin1 < Vref1. Then, the first comparison circuit outputs a comparison signal with a high level, and the other comparison circuits output comparison signals with a low level. Then, it is determined that the number of external battery packs incorporated is one.

[0081] When two external battery packs are incorporated, the resistor R 1A , the resistor R 2A and the second reference resistor R 01 divide the voltage of the second power supply VDD to obtain a second divided voltage signal. The voltage of the second divided voltage signal is Vin2. Among them, Vin2 is transmitted to the first input ends of N comparison circuits, and Vref3 < Vin2 < Vref2. Then, the first comparison circuit outputs a comparison signal with a high level, the second comparison circuit outputs a comparison signal with a high level, and the other comparison circuits output comparison signals with a low level. Then, it is determined that the number of external battery packs incorporated is two.

[0082] By analogy, when N external battery packs are incorporated, the resistors R 1A to the resistor R N and the second reference resistor R 01 divide the voltage of the second power supply VDD to obtain a second divided voltage signal. The voltage of the second divided voltage signal is Vin N , among which, Vin N is transmitted to the first input ends of N comparison circuits, and Vin N < Vref N . Then, the first comparison circuit outputs a comparison signal with a high level, the second comparison circuit outputs a comparison signal with a high level, and by analogy, the Nth comparison circuit also outputs a comparison signal with a high level. Then, it is determined that the number of external battery packs incorporated is N.

[0083] For another example, if the values of the reference voltages increase in sequence, that is, Vref1 < Vref2 <... < Vref N , and when the voltage at the first input end of the comparison circuit is greater than the voltage at its second input end, the comparison circuit outputs a comparison signal with a high level.

[0084] Then, when no external battery pack is incorporated, the first input ends of N comparison circuits are all incorporated into the second power supply VDD. The voltage of the second power supply VDD is greater than any one of the reference voltages. Then, N comparison circuits all output comparison signals with a high level, and it is determined that no external battery pack is incorporated.

[0085] When an external battery pack is incorporated, resistor R 1A and the second reference resistor R 01 divide the voltage of the second power supply VDD to obtain a second divided voltage signal. The voltage of the second divided voltage signal is Vin1. Among them, Vin1 is transmitted to the first input terminals of N comparison circuits, and Vref N-1 <Vin1<Vref N , then the Nth comparison circuit outputs a comparison signal with a low level, and the other comparison circuits output comparison signals with a high level. Then it is determined that the number of external battery packs incorporated is one.

[0086] And so on. When N external battery packs are incorporated, resistor R 1A to resistor R N and the second reference resistor R 01 divide the voltage of the second power supply VDD to obtain a second divided voltage signal. The voltage of the second divided voltage signal is Vin N , among which, Vin N is transmitted to the first input terminals of N comparison circuits, and Vin N <Vref1. Then the first comparison circuit to the Nth comparison circuit all output comparison signals with a low level. Then it is determined that the number of external battery packs incorporated is N.

[0087] Also, for example, if the values of the reference voltages decrease in sequence, that is, Vref N <Vref N-1 <...<Vref1, and when the voltage at the first input terminal of the comparison circuit is greater than the voltage at its second input terminal, the comparison circuit outputs a comparison signal with a high level.

[0088] When no external battery pack is incorporated, the first input terminals of N comparison circuits are all connected to the second power supply VDD. The voltage of the second power supply VDD is greater than any one of the reference voltages. Then N comparison circuits all output comparison signals with a high level, and it is determined that no external battery pack is incorporated.

[0089] When an external battery pack is incorporated, resistor R 1A and the second reference resistor R 01 divide the voltage of the second power supply VDD to obtain a second divided voltage signal. The voltage of the second divided voltage signal is Vin1. Among them, Vin1 is transmitted to the first input terminals of N comparison circuits, and Vref2<Vin1<Vref1. Then the first comparison circuit outputs a comparison signal with a low level, and the other comparison circuits output comparison signals with a high level. Then it is determined that the number of external battery packs incorporated is one.

[0090] And so on. When N external battery packs are incorporated, resistor R 1A to resistor R N and the second reference resistor R 01The second power supply VDD is divided in voltage to obtain a second divided voltage signal, and the voltage of the second divided voltage signal is Vin N , where Vin N is transmitted to the first input ends of N comparison circuits, and Vin N < Vref N , then the comparison signals output by the first to the Nth comparison circuits are all low-level, and it is determined that the number of externally connected battery packs is N.

[0091] In some embodiments, the second reference resistor R 01 and the N comparison circuits 21 are both arranged in the host. When an externally connected battery pack is incorporated, the externally connected battery pack and the host are connected in parallel through a connector, and the matching resistor in the externally connected battery pack is connected to the second end of the second reference resistor R 01 in the host. When multiple externally connected battery packs are incorporated, the multiple externally connected battery packs are connected in parallel through a connector and then connected to the host in parallel through the connector. The matching resistors in each externally connected battery pack form a parallel voltage division module and are then connected to the second end of the second reference resistor R 01 .

[0092] In some embodiments, for simpler circuit design, the resistance values of the N matching resistors can be set to the same value, that is, the resistance values of resistor R 1A to resistor R iA are all the same, so that the voltage of the second divided voltage signal changes every time an externally connected battery pack is incorporated.

[0093] The output ends of the N comparison circuits are respectively connected to the controller 30. For example: the output end of the first comparison circuit is electrically connected to the first pin of the controller 30, the output end of the second comparison circuit is electrically connected to the second pin of the controller 30, and so on. The output end of the Nth comparison circuit is electrically connected to the Nth pin of the controller 30.

[0094] The controller 30 analyzes the N comparison signals to obtain an identification result. For example: if the values of the reference voltages increase in sequence, that is, Vref1 < Vref2 <... < Vref N , and when the voltage at the first input end of the comparison circuit is less than the voltage at its second input end, the comparison circuit outputs a high-level comparison signal.

[0095] If the first to the Nth pins of the controller 30 all receive low-level comparison signals, it is determined that no battery pack is incorporated.

[0096] If the Nth pin of the controller 30 receives a high-level comparison signal and the first to the N - 1th pins of the controller 30 all receive low-level comparison signals, it is determined that the number of externally connected battery packs is one.

[0097] If the Nth pin of the controller 30 receives a high-level comparison signal, the (N - 1)th pin of the controller 30 receives a high-level comparison signal, and the first pin to the (N - 2)th pin of the controller 30 all receive low-level comparison signals, it is determined that the number of externally connected battery packs is two.

[0098] If the first pin to the Nth pin of the controller 30 all receive high-level comparison signals, it is determined that the number of externally connected battery packs is N.

[0099] For another example, if the values of the reference voltages are decreasing in sequence, that is, Vref N <Vref N-1 <...<Vref1, and when the voltage at the first input terminal of the comparison circuit is less than the voltage at its second input terminal, the comparison circuit outputs a high-level comparison signal.

[0100] If the controller 30 receives N low-level comparison signals, it is determined that no externally connected battery pack is incorporated.

[0101] If the first pin of the controller 30 receives a high-level comparison signal, and the second pin to the Nth pin of the controller 30 all receive low-level comparison signals, it is determined that the number of externally connected battery packs is one.

[0102] If the first pin of the controller 30 receives a high-level comparison signal, the second pin of the controller 30 receives a high-level comparison signal, and the third pin to the Nth pin of the controller 30 all receive low-level comparison signals, it is determined that the number of externally connected battery packs is two.

[0103] If the first pin to the Nth pin of the controller 30 all receive high-level comparison signals, it is determined that the number of externally connected battery packs is N.

[0104] For another example, if the values of the reference voltages are increasing in sequence, that is, Vref1<Vref2<...<Vref N , and when the voltage at the first input terminal of the comparison circuit is greater than the voltage at its second input terminal, the comparison circuit outputs a high-level comparison signal.

[0105] If the controller 30 receives N high-level comparison signals, it is determined that no externally connected battery pack is incorporated.

[0106] If the first pin to the (N - 1)th pin of the controller 30 all receive high-level comparison signals, and the Nth pin of the controller 30 receives a low-level comparison signal, it is determined that the number of externally connected battery packs is one.

[0107] If the comparison signals received by the first pin to the Nth pin of the controller 30 are all low-level signals, it is determined that the number of externally connected battery packs is N.

[0108] For another example, if the values of the reference voltages decrease in sequence, i.e., Vref N <Vref N-1 <...<Vref1, and when the voltage at the first input terminal of the comparison circuit is greater than the voltage at its second input terminal, the comparison circuit outputs a high-level comparison signal.

[0109] If the controller 30 receives N high-level comparison signals, it is determined that no externally connected battery pack is incorporated.

[0110] If the first pin of the controller 30 receives a low-level comparison signal and the second pin to the Nth pin of the controller 30 receive high-level comparison signals, it is determined that the number of externally connected battery packs is one.

[0111] If the comparison signals received by the first pin to the Nth pin of the controller 30 are all low-level signals, it is determined that the number of externally connected battery packs is N.

[0112] In some embodiments, the controller 30 may be a general-purpose controller, a digital signal controller (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), a microcontroller, an ARM (Advanced RISC Machine), or other programmable logic devices, discrete gate or transistor logic, discrete hardware components, or any combination of these components. Additionally, the controller 30 may also be any conventional controller, controller, microcontroller, or state machine. The controller 30 may also be implemented as a combination of computing devices, for example, a combination of a DSP and a microcontroller, multiple microcontrollers, one or more microcontrollers in combination with a DSP and / or any other such configuration. The controller 30 may also be the battery management unit of a host.

[0113] Please refer to Figure 4 , Figure 4 which is a schematic circuit diagram of a quantity recognition circuit provided by an embodiment of the present application. As Figure 4 shown, the comparison circuit 21 in the quantity recognition circuit 20 includes a comparator, a first voltage-dividing resistor, and a second voltage-dividing resistor. Among them, the first end of the first voltage-dividing resistor is electrically connected to the first end of the second voltage-dividing resistor and the second input terminal of the comparator respectively. The second end of the first voltage-dividing resistor is used to connect to the third power supply VCC, the second end of the second voltage-dividing resistor is grounded to GND, and the first voltage-dividing resistor and the second voltage-dividing resistor divide the third power supply VCC to obtain a reference voltage. The first input terminal of the comparator is used to connect to the second voltage-dividing signal, and the second input terminal of the comparator is used to connect to the corresponding reference voltage.

[0114] As Figure 4 shown, if the number of comparison circuits is N, then the number of first voltage-dividing resistors is N, the number of second voltage-dividing resistors is N. The first comparison circuit includes a comparator U1, a first voltage-dividing resistor R 11 and a second voltage-dividing resistor R 21 . The second comparison circuit includes a comparator U2, a first voltage-dividing resistor R 12 and a second voltage-dividing resistor R 22 . The third comparison circuit includes a comparator U3, a first voltage-dividing resistor R 13 and a second voltage-dividing resistor R 23 . And so on, the Nth comparison circuit includes a comparator U N , a first voltage-dividing resistor R 1N and a second voltage-dividing resistor R 2N .

[0115] Moreover, the first voltage-dividing resistor R 11 and the second voltage-dividing resistor R 21 divide the third power supply VCC to obtain a first reference voltage Vref1, that is, Vref1 = VCC × R 21 / (R 11 + R 21 ). The first voltage-dividing resistor R 12 and the second voltage-dividing resistor R 22 divide the third power supply VCC to obtain a second reference voltage Vref2, that is, Vref2 = VCC × R 22 / (R 12 + R 22 ). The first voltage-dividing resistor R 13 and the second voltage-dividing resistor R 23 divide the third power supply VCC to obtain a third reference voltage Vref3, that is, Vref3 = VCC × R 23 / (R 13 + R 23 ). And so on, the first voltage-dividing resistor R 1N and the second voltage-dividing resistor R 2N divide the third power supply VCC to obtain a third reference voltage Vref N , that is, Vref N = VCC × R 2N / (R 1N + R 2N ).

[0116] If the voltages of the reference voltages increase sequentially, that is, Vref1 < Vref2 <... < Vref N , Vref1 = VCC × R 21 / (R 11 + R21 ) <Vref2 = VCC × R 22 / (R 12 + R 22 ) <... <Vref N = VCC × R 2N / (R 1N + R 2N ), then R 21 / (R 11 + R 21 ) <R 22 / (R 12 + R 22 ) <... <R 2N / (R 1N + R 2N ), and at the same time, the second power supply VDD is greater than the maximum value in the reference voltage, then VDD > Vref N = VCC × R 2N / (R 1N + R 2N ), that is, VDD > VCC × R 2N / (R 1N + R 2N )。

[0117] If the values of the reference voltage decrease successively, that is, Vref N < Vref N-1 <... <Vref1, Vref N = VCC × R 2N / (R 1N + R 2N ) <Vref N-1 = VCC × R 2(N-1) / (R 1(N-1) + R 2(N-1) ) <... <Vref1 = VCC × R 21 / (R 11 + R 21 ), then R 2N / (R 1N + R 2N ) <R 2(N-1) / (R 1(N-1) + R 2(N-1) ) <... <R 21 / (R 11 + R 21 ), and at the same time, the voltage of the second power supply VDD is greater than the maximum value in the reference voltage, then VDD > Vref1 = VCC × R 21 / (R 11 + R 21 ), that is, VDD > VCC × R 21 / (R 11 + R21 )。

[0118] Thus, by configuring the proportional relationship between the first voltage-dividing resistor and the second voltage-dividing resistor in each comparison circuit, the voltage of the reference voltage can be made to satisfy the constraint condition of increasing or decreasing in sequence.

[0119] When i external battery packs are incorporated into the host, the i matching resistors are connected in parallel and then connected to the second terminal of the second reference resistor R 01 to generate a second voltage-dividing signal at the second terminal of the second reference resistor R 01 . The resistance values of each matching resistor are the same. If the resistance value of each matching resistor is R, the voltage of the second voltage-dividing signal is: Vin i =R / (R + i×R 01 )(9) where Vin i is the voltage of the second voltage-dividing signal when i external battery packs are incorporated into the host, R is the resistance value of the matching resistor, and R 01 is the resistance value of the second reference resistor R 01 , and i is a positive integer from 0 to N.

[0120] In order to identify the number of external battery packs by comparing the level states of the signals, when each external battery pack is connected, the level states of the N comparison signals need to change bit by bit. If the voltage of the reference voltage is gradually increasing, the voltage of the second voltage-dividing signal and the voltages of the respective reference voltages need to satisfy the following first constraint condition: When i = 0, Vin0 = VDD > Vref N , when i is a positive integer from 1 to N - 1, Vref N-i <Vin i < Vref N-i+1 , when i = N, Vin N < Vref1. Where VDD is the voltage of the second power supply, Vin i is the voltage of the second voltage-dividing signal when i external battery packs are incorporated into the host, and Vref i is the voltage of the i-th reference voltage.

[0121] Correspondingly, the first voltage-dividing resistor and the second voltage-dividing resistor satisfy the third constraint condition: When i = 0, Vin0 = VDD > VCC×R 2N / (R 1N + R 2N ), when i is a positive integer from 1 to N - 1, VCC×R 2(N-i) / (R 1(N-i) + R 2(N-i) )<Vin i < VCC×R2(N-i+1) / (R 1(N-i+1) +R 2(N-i+1) ), if i is N, Vin N < VCC × R 21 / (R 11 +R 21 ).

[0122] Among them, VCC is the voltage of the third power supply, R 1i is the first voltage-dividing resistor in the i-th comparison circuit, and R 2i is the second voltage-dividing resistor in the i-th comparison circuit.

[0123] Similarly, if the reference voltage is gradually decreasing, the voltage of the second voltage-dividing signal and the voltages of each reference voltage need to satisfy the second constraint condition: If i is 0, Vin0 = VDD > Vref1. If i is a positive integer from 1 to N - 1, Vref i+1 <Vin i < Vref i , if i is N, Vin N < Vref N .

[0124] Correspondingly, the first voltage-dividing resistor and the second voltage-dividing resistor satisfy the fourth constraint condition: If i is 0, Vin0 = VDD > VCC × R 21 / (R 11 +R 21 ), if i is a positive integer from 1 to N - 1, VCC × R 2(i+1) / (R 1(i+1) +R 2(i+1) ) < Vin i < VCC × R 2i / (R 1i +R 2i ), if i is N, Vin N < VCC × R 2N / (R 1N +R 2N ).

[0125] Thus, by designing the magnitude relationship between the first voltage-dividing resistor and the second voltage-dividing resistor, the voltages of N reference voltages satisfy an increasing or decreasing relationship in sequence, and the voltage of each second voltage-dividing signal satisfies the above first constraint relationship or third constraint relationship.

[0126] In some embodiments, as Figure 4 shown, the inverting input terminal of the comparator is the first input terminal of the comparator, and the non-inverting input terminal of the comparator is the second input terminal of the comparator.

[0127] The comparison circuit further includes a pull-up resistor R', which is connected in series between the third power supply VCC and the output terminal of the comparator. The pull-up resistor R' is an open-drain pull-up resistor of the comparator, which enables the comparator to output a high level.

[0128] Taking N as 4 as an example, the working principle of the quantity recognition circuit 20 is described. As Figure 5 shown, the inverting input terminal of the comparator is the first input terminal of the comparator, the non-inverting input terminal of the comparator is the second input terminal of the comparator, and the comparison signal output by the first comparator is Vout1, the comparison signal output by the second comparator is Vout2, the comparison signal output by the third comparator is Vout3, and the comparison signal output by the fourth comparator is Vout4.

[0129] If the voltage of the reference voltage is gradually increasing, that is, Vref1 < Vref2 < Vref3 < Vref4, and Vref1 = 2.7V, Vref2 = 3.5V, Vref3 = 5.0V, Vref4 = 9.0V, VDD = 12.0V.

[0130] When no external battery pack is incorporated into the host, i is 0, then the voltage of the second divided voltage signal is Vin0 = VDD, VDD > Vref4, so all four comparators output comparison signals of low level.

[0131] When one external battery pack is incorporated into the host, i is 1, then the voltage of the second divided voltage signal is Vin1 = R / (R + 1×R 01 ) = 6.0V, Vref3 < Vin1 < Vref4, so the comparison signal Vout1 output by the first comparator U1 is a high-level signal, and the other comparators output low-level signals.

[0132] When two external battery packs are incorporated into the host, i is 2, then the voltage of the second divided voltage signal is Vin2 = R / (R + 2×R 01 ) = 4.0V, Vref2 < Vin2 < Vref3, so the comparison signals Vout1 and Vout2 output by the first comparator U1 and the second comparator U2 are both high-level signals, and the other comparators output low-level signals.

[0133] When three external battery packs are incorporated into the host, i is 3, then the voltage of the second divided voltage signal is Vin3 = R / (R + 3×R 01 ) = 3.0V, Vref1 < Vin3 < Vref2, so the comparison signals Vout1, Vout2, and Vout3 output by the first comparator U1, the second comparator U2, and the third comparator U3 are all high-level signals, and the fourth comparator outputs a low-level signal.

[0134] When four external battery packs are incorporated into the host, i is 4, and the voltage of the second voltage-dividing signal is Vin4 = R / (R + 4×R 01 ) = 2.4V. Since Vin4 < Vref1, the comparison signals Vout1, Vout2, Vout3, and Vout4 output by the four comparators are all high-level signals.

[0135] The determination relation comparison table of the quantity recognition circuit 20 can be as shown in Table 1: Table 1 Determination relation comparison table of the quantity recognition circuit 20

[0136] Thus, based on the level states of the four comparison signals, the controller 30 can identify the quantity of the external battery packs.

[0137] In some embodiments, if the reference voltage gradually decreases, i.e., Vref4 < Vref3 < Vref2 < Vref1, and Vref4 = 2.7V, Vref3 = 3.5V, Vref2 = 5.0V, Vref1 = 9.0V, and VDD = 12.0V.

[0138] Then the working principle of the quantity recognition circuit 20 is similar to that of the above embodiment, which will not be elaborated here, and the determination relation comparison table of the quantity recognition circuit 20 can be as shown in Table 2: Table 2 Determination relation comparison table of the quantity recognition circuit 20

[0139] Thus, the controller 30 can determine the quantity of the external battery packs according to the level states of the four comparison signals. The controller 30 identifies that the quantity of the external battery packs is 4, then inversely calculates the total measured value of the coded resistors in the external battery packs from the voltage of the first voltage-dividing signal, and then through R m = 4×R 总 obtains the measured resistance values R 1B of the coded resistor R 2B , the coded resistor R 3B , the coded resistor R 4B , and the coded resistor R m , and then determines the target ideal resistor that matches the measured resistance value R m from the mapping relation set, and finally obtains the type parameters of the external battery pack corresponding to the target ideal resistor.

[0140] Please refer to Figure 6 , Figure 6 which is a schematic circuit diagram of a quantity recognition circuit 20 provided by an embodiment of the present application, Figure 6 and Figure 4The difference is that the non-inverting input terminal of the comparator is the first input terminal of the comparator, and the inverting input terminal of the comparator is the second input terminal of the comparator. Figure 6 The constraint relationships that each resistor and the reference voltage in Figure 4 need to satisfy are the same as those in

[0141] Taking N as 4 as an example, the working principle of the quantity recognition circuit 20 is described. As Figure 7 shown, the non-inverting input terminal of the comparator is the first input terminal of the comparator, the inverting input terminal of the comparator is the second input terminal of the comparator, and the comparison signal output by the first comparator is Vout1, the comparison signal output by the second comparator is Vout2, the comparison signal output by the third comparator is Vout3, and the comparison signal output by the fourth comparator is Vout4.

[0142] If the voltage of the reference voltage is gradually increasing, that is, Vref1 < Vref2 < Vref3 < Vref4, and Vref1 = 2.7V, Vref2 = 3.5V, Vref3 = 5.0V, Vref4 = 9.0V, VDD = 12.0V.

[0143] When there is no external battery pack incorporated into the host, i is 0, then the voltage of the second divided voltage signal is Vin0 = VDD, VDD > Vref4, so all four comparators output high-level comparison signals.

[0144] When one external battery pack is incorporated into the host, i is 1, then the voltage of the second divided voltage signal is Vin1 = R / (R + 1 × R 01 ) = 6.0V, Vref3 < Vin1 < Vref4, so the comparison signals Vout1, Vout2, and Vout3 output by the first comparator U1, the second comparator U2, and the third comparator U3 are all high-level signals, and the fourth comparator U4 outputs a low-level signal.

[0145] When two external battery packs are incorporated into the host, i is 2, then the voltage of the second divided voltage signal is Vin2 = R / (R + 2 × R 01 ) = 4.0V, Vref2 < Vin2 < Vref3, so the comparison signals Vout1 and Vout2 output by the first comparator U1 and the second comparator U2 are both high-level signals, and the other comparators output low-level signals.

[0146] When three external battery packs are incorporated into the host, i is 3, then the voltage of the second divided voltage signal is Vin3 = R / (R + 3 × R 01If Vref2 = 3.0V and Vref1 < Vin3 < Vref2, the comparison signal Vout1 output by the first comparator U1 is a high-level signal, and the other comparators output low-level signals.

[0147] When four external battery packs are incorporated into the host, i = 4, and the voltage of the second divided voltage signal is Vin4 = R / (R + 4×R 01 )= 2.4V. Since Vin4 < Vref1, all four comparators output low-level signals.

[0148] Thus, the controller 30 can identify the number of external battery packs based on the level states of the four comparators.

[0149] The determination relation comparison table of the quantity identification circuit 20 can be as shown in Table 3: Table 3 Determination relation comparison table of the quantity identification circuit 20

[0150] In some embodiments, if the reference voltages are gradually decreasing, i.e., Vref4 < Vref3 < Vref2 < Vref1, and Vref4 = 2.7V, Vref3 = 3.5V, Vref2 = 5.0V, Vref1 = 9.0V, and VDD = 12.0V.

[0151] Then the working principle of the quantity identification circuit 20 is similar to that of the above embodiments and will not be elaborated here. The determination relation comparison table of the quantity identification circuit 20 can be as shown in Table 4: Table 4 Determination relation comparison table of the quantity identification circuit 20

[0152] Thus, the controller 30 can determine the number of external battery packs based on the level states of the four comparison signals.

[0153] When the controller 30 identifies that the number of external battery packs is 4, it inversely calculates the total measured value of the coded resistors in the external battery packs from the voltage of the first divided voltage signal, and then through R m = 4×R 总 obtains the measured resistance value R of the coded resistor m , then determines the target ideal resistor matching the measured resistance value R m from the mapping relation set, and finally obtains the type parameters of the external battery pack corresponding to the target ideal resistor.

[0154] In summary, when external battery packs with different quantities are incorporated into the host, the level states of the corresponding first identification signals are different. The controller identifies the quantity of the external battery packs based on different first identification signals. Moreover, when external battery packs of the same type are incorporated into the host, the resistance values of the corresponding coding resistors are the same. The controller identifies the type parameters of the corresponding external battery packs based on the first voltage division signal and the quantity of the external battery packs. Since the resistance values of the coding resistors corresponding to different types of external battery packs are different, the generated first voltage division signal is different from the first voltage division signal generated when other types of external battery packs are connected. Therefore, the controller can identify the type parameters of the corresponding external battery packs based on the quantity of the external battery packs and different first voltage division signals. Thus, this numerical detection circuit can identify the quantity and type of the external battery packs incorporated into the host.

[0155] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them; under the idea of the present application, the technical features in the above embodiments or different embodiments can also be combined, and the steps can be implemented in any order, and there are many other variations in different aspects of the present application as described above. For the sake of brevity, they are not provided in detail; although the present application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements for some of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A digital type detection circuit, characterized in that, Applied to an energy storage system, the energy storage system includes a host and i external battery packs of the same type for connecting to the host. The digital detection circuit includes: a quantity identification circuit, a type identification circuit, and a controller; The quantity identification circuit is connected to the controller, and the quantity identification circuit is configured to generate a first identification signal in response to the external battery pack being incorporated into the host, wherein the level state of the first identification signal is related to the quantity of the external battery packs; The type identification circuit includes a first reference resistor disposed in the host and i coding resistors with the same resistance value configured for i external battery packs of the same type. The first end of the first reference resistor is connected to a first power supply; when the external battery packs are incorporated into the host, after the coding resistors are connected in parallel, they are connected to the second end of the first reference resistor to form a voltage division node, and the voltage division node is also connected to the controller; The type identification circuit is configured to generate a first voltage division signal at the voltage division node in response to the external battery packs being incorporated into the host, wherein the voltage of the first voltage division signal is related to the type of the external battery packs; The controller is configured to sample the first identification signal and the first voltage division signal, and obtain the quantity of the external battery packs based on the first identification signal and identify the type parameters of the external battery packs based on the quantity of the external battery packs and the first voltage division signal.

2. The digital type detection circuit according to claim 1, wherein The controller is configured to identify the type parameters of the external battery packs based on the quantity of the external battery packs and the first voltage division signal, including: Obtaining the measured total value of the i coding resistors based on the voltage division principle and the first voltage division signal; Obtaining the measured resistance value corresponding to the coding resistor based on the measured total value and the quantity of the external battery packs; Performing a resistance value search in the mapping relationship set to obtain a target ideal resistor and type parameters that match the value of the measured resistance value; wherein the mapping relationship set includes the ideal resistors that match the coding resistors and the type parameters of the external battery packs that correspond one-to-one to the ideal resistors.

3. The digital detection circuit according to claim 2, characterized in that The obtaining the measured resistance value corresponding to the coding resistor based on the measured total value and the quantity of the external battery packs includes: Calculating the measured resistance value through the following formula: R m =i×R 总 ; wherein, R m is the measured resistance value, and R 总 is the total measured value.

4. The digital type detection circuit according to claim 1, wherein The quantity identification circuit includes: i matching resistors, and the i matching resistors respectively belong to the i external battery packs and have the same resistance value; A second reference resistor and N comparison circuits. The first end of the second reference resistor is connected to a second power supply. When the i external battery packs are incorporated into the host, the i matching resistors are connected in parallel to form a parallel voltage division module. The first end and the second end of the parallel voltage division module are respectively connected to the second end of the second reference resistor and the ground terminal. A second voltage division signal regarding the second power supply is obtained at the first end of the parallel voltage division module, and the second voltage division signal is connected to the first input terminal of the N comparison circuits; A reference voltage is connected to the second input terminal of each comparison circuit, and the values of the N reference voltages are different; N of the comparison circuits are configured to output N comparison signals reflecting the number of the external battery packs according to the voltage of the second divided voltage signal and the N reference voltages, and the N comparison signals together constitute the first identification signal; wherein, i is a positive integer from 0 to N, and N is a positive integer greater than or equal to 1.

5. The digital type detection circuit according to claim 4, wherein Each of the comparison circuits includes a first voltage-dividing resistor, a second voltage-dividing resistor, and a comparator; The first end and the second end of the first voltage-dividing resistor are respectively connected to a third power supply and the first end of the second voltage-dividing resistor, the second end of the second voltage-dividing resistor is connected to a ground terminal, and the connection between the first voltage-dividing resistor and the second voltage-dividing resistor is connected to the second input terminal of the corresponding comparator. The first voltage-dividing resistor and the second voltage-dividing resistor divide the voltage of the third power supply to obtain the reference voltage, and each reference voltage is connected to the second input terminal of the corresponding comparator; The first input terminal of the comparator is configured to receive the second divided voltage signal, and the N comparators are configured to output the N comparison signals according to the second divided voltage signal and the N reference voltages.

6. The digital detection circuit according to claim 5, wherein The inverting input terminal of the comparator is the first input terminal of the comparator, and the non-inverting input terminal of the comparator is the second input terminal of the comparator; or, the non-inverting input terminal of the comparator is the first input terminal of the comparator, and the inverting input terminal of the comparator is the second input terminal of the comparator.

7. The digital type detection circuit according to any one of claims 4 to 6, characterized in that The values of the N reference voltages increase in sequence, and the voltage of the second divided voltage signal and the N reference voltages satisfy a first constraint condition: When i is 0, Vin0 = VDD > Vref N ; When i is a positive integer from 1 to N - 1, Vref N-i < Vin i < Vref N-i+1 ; When i is N, Vin N < Vref1; where VDD is the voltage of the second power supply, and Vin i is the voltage of the second voltage division signal when the i-th external battery pack is incorporated into the host, and Vref i is the i-th reference voltage.

8. The digital type detection circuit according to any one of claims 4 to 6, characterized in that The values of the N reference voltages decrease in sequence, and the voltage of the second divided voltage signal and the N reference voltages satisfy a second constraint condition: When i = 0, Vin0 = VDD > Vref1; When i is a positive integer from 1 to N - 1, Vref i+1 <Vin i <Vref i ; When i is N, Vin N < Vref N ; where VDD is the voltage of the second power supply, and Vin i is the voltage of the second voltage division signal when the i-th external battery pack is incorporated into the host, and Vref i is the i-th reference voltage.

9. The digital type detection circuit according to any one of claims 1-6, characterized in that, Encoding resistors with different resistance values are allocated to different types of external battery packs. Among them, the resistance values of the encoding resistors are obtained by resistor encoding and allocation based on the analog-to-digital sampling range of the controller, including: Determining the maximum resistance value and the minimum resistance value of the encoding resistor based on the analog-to-digital sampling range of the controller; Determining the reference resistance value based on the analog-to-digital sampling range of the controller, the voltage of the first power supply, and the resistance value of the first reference resistor; Determining the minimum allowable interval based on the reference resistance value; Based on the minimum allowable interval, dividing the resistance values from the minimum resistance value to the maximum resistance value to obtain the resistance values of several encoding resistors, wherein the difference between the resistance values of two adjacent encoding resistors is greater than or equal to the minimum allowable interval; Allocating several encoding resistors to multiple different types of external battery packs respectively; Among them, one encoding resistor can be a single resistor or formed by multiple resistors connected in parallel with each other.

10. An energy storage system, characterized in that, The energy storage system includes a host, i external battery packs, and the digital detection circuit according to any one of claims 1-9. Each of the external battery packs is connected in parallel with the host, and the digital detection circuit is configured to identify the number and type parameters of the external battery packs.

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