Two-out-of-two voting method and device, electronic equipment and storage medium

Abstract

The invention provides a two-out-of-two voting method and device, electronic equipment and a storage medium, and relates to the technical field of rail transit, the two-out-of-two voting method and device are applied to a first micro-processing unit MCU in a two-out-of-two architecture, the two-out-of-two architecture comprises two MCUs, each MCU comprises an Ethernet interface, a hard wire input acquisition port and a hard wire output control port, the method comprises the following steps: under the condition that a first hard wire output control port of a first MCU and a second hard wire output control port of a second MCU are both high levels, voting data to be synchronized are sent to the second MCU in the form of a security protocol message through a first Ethernet interface, the receiving MCU receives a security protocol message corresponding to the voting data to be synchronized sent by the second MCU through the second Ethernet interface; based on the security protocol message, the voting processing result of the to-be-synchronized voting data is determined, safe and efficient synchronous transmission of the data is realized, the communication transceiving efficiency and security can be improved, and the stability of the system is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of rail transit, and in particular, to a two-out-of-two voting method, device, electronic device, and storage medium. Background Art

[0002] The safety computer platform is an important device for the core operation of the signal system. The safety computer platform is used in the rail transit signal system to carry applications of Automatic Train Protection (ATP), Zone Controller (ZC), and Computer Interlocking (CI) systems. Through two-out-of-two communication, data synchronization and voting processing in the rail transit signal system are realized, improving the safety of the signal system and ensuring the functional safety of rail transit.

[0003] In related technologies, a common voting method is that there is only a communication channel between two independent Microcontroller Units (MCUs) to achieve two-out-of-two communication voting. Another voting method is to use an independent board card as a voting arbitration module. The two MCUs independently send data to the voting arbitration module, and the voting arbitration module votes on the data. However, for the first method, there is a lack of an independent response mechanism, and a reliable retransmission logic cannot be implemented. Moreover, the two MCUs running independently for a long time will accumulate clock errors, making the cycles of the two MCUs out of sync, resulting in communication timeouts and poor stability of the rail transit signal system during long-term operation. For the second method, using a voting arbitration module increases hardware devices, resulting in increased costs. At the same time, the two MCUs lack a clock synchronization method, causing asynchronous data transmission and affecting the voting results.

[0004] Therefore, how to achieve highly reliable two-out-of-two voting at low cost is a technical problem that needs to be solved urgently. Summary of the Invention

[0005] The present invention provides a two-out-of-two voting method, device, electronic device, and storage medium to solve the problem of how to achieve highly reliable two-out-of-two voting at low cost.

[0006] The present invention provides a two-out-of-two voting method applied to a first Microprocessor Unit (MCU) in a two-out-of-two architecture. The two-out-of-two architecture includes two MCUs, and each MCU includes an Ethernet interface, a hardwire input acquisition port, and a hardwire output control port. The method includes: When the first hardwire output control port of the first MCU and the second hardwire output control port of the second MCU are both at a high level, the first MCU sends the data to be synchronized and voted in the form of a secure protocol message to the second MCU through the first Ethernet interface; The first MCU receives the security protocol message corresponding to the to-be-synchronized voting data sent by the second MCU through the second Ethernet interface; The first MCU determines the voting result of the to-be-synchronized voting data based on the security protocol message sent by the second MCU.

[0007] According to a two-out-of-two voting method provided by the present invention, the first MCU determines the voting result of the to-be-synchronized voting data based on the security protocol message sent by the second MCU, including: The first MCU parses the security protocol message to obtain the to-be-synchronized voting data; The first MCU performs voting processing on the to-be-synchronized voting data to obtain a voting result.

[0008] According to a two-out-of-two voting method provided by the present invention, the method further includes any one of the following: When the first MCU receives the to-be-synchronized voting data sent by the second MCU, the first hard-wired output control port is set from high level to low level; When the first MCU does not receive the to-be-synchronized voting data sent by the second MCU, the high level of the first hard-wired output control port is maintained; When the first MCU fails to parse the security protocol message, the high level of the first hard-wired output control port is maintained.

[0009] According to a two-out-of-two voting method provided by the present invention, after the first MCU finishes performing voting processing on the to-be-synchronized voting data, the method further includes: The first MCU collects the low level of the second hard-wired output control port of the second MCU based on the first hard-wired input acquisition port; When the collected second hard-wired output control port is not low level and the acquisition time exceeds a preset time, the first MCU re-sends the to-be-synchronized voting data to the second MCU through the first Ethernet interface; wherein, the number of re-transmissions is less than a preset maximum number.

[0010] According to a two-out-of-two voting method provided by the present invention, the method further includes: At the end of the clock cycle, the first MCU sets the first hard-wired output control port to high level; When the first MCU collects that the second hard-wired output control port of the second MCU is high level, the first MCU re-sets the time of the timing register for controlling the clock cycle time of the first MCU and enters the next clock cycle.

[0011] According to a two-out-of-two voting method provided by the present invention, the security protocol message includes at least one of the following: source identifier, destination identifier, sequence number, cycle number, data length, data content, and cyclic redundancy check CRC; wherein, the source identifier and the destination identifier are both used to identify the first MCU or the second MCU, the sequence number is used to indicate an error of the security protocol message, the cycle number is used to indicate a clock cycle, the data length is used to indicate the length of the data to be synchronously voted, and the CRC is used to verify the data to be synchronously voted.

[0012] The present invention also provides a two-out-of-two voting device, which is applied to the first microprocessing unit (MCU) in a two-out-of-two architecture. The two-out-of-two architecture includes two MCUs, and each MCU includes an Ethernet interface, a hardwired input acquisition port, and a hardwired output control port. The device includes: A sending module, configured to send the data to be synchronously voted in the form of a security protocol message to the second MCU through the first Ethernet interface when both the first hardwired output control port of the first MCU and the second hardwired output control port of the second MCU are at a high level; A receiving module, configured to receive the security protocol message corresponding to the data to be synchronously voted sent by the second MCU through the second Ethernet interface; A voting module, configured to determine a voting processing result of the data to be synchronously voted based on the security protocol message sent by the second MCU.

[0013] The present invention also provides an electronic device, including a memory, a processor, and a computer program stored on the memory and executable on the processor. When the processor executes the computer program, the two-out-of-two voting method as described in any one of the above is implemented.

[0014] The present invention also provides a non-transitory computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the two-out-of-two voting method as described in any one of the above is implemented.

[0015] The present invention also provides a computer program product, including a computer program. When the computer program is executed by a processor, the two-out-of-two voting method as described in any one of the above is implemented.

[0016] The two-out-of-two voting method, device, electronic device, and storage medium provided by the present invention are applied to the first microprocessor unit (MCU) in a two-out-of-two architecture. The two-out-of-two architecture includes two MCUs, and each MCU includes an Ethernet interface, a hardwired input acquisition port, and a hardwired output control port. The method includes: when the first hardwired output control port of the first MCU and the second hardwired output control port of the second MCU are both at a high level, the first MCU sends the data to be synchronized and voted on in the form of a secure protocol message to the second MCU through the first Ethernet interface; the first MCU receives the secure protocol message corresponding to the data to be synchronized and voted on sent by the second MCU through the second Ethernet interface; the first MCU determines the voting result of the data to be synchronized and voted on based on the secure protocol message sent by the second MCU. Through the Ethernet interface, the hardwired input acquisition port, and the hardwired output control port, high-speed communication between the two MCUs can be achieved, and the synchronous operation of the two MCUs can be ensured. By using the secure protocol mechanism, secure, efficient, and synchronous transmission of the data to be synchronized and voted on can be realized. Without using a voting arbitration module, the hardware cost can be reduced, and the communication transceiver efficiency and security can be improved, thereby enhancing the stability of the system. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the technical solutions in the present invention or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0018] Figure 1 is one of the schematic diagrams of the two-out-of-two voting architecture provided by the prior art.

[0019] Figure 2 is another schematic diagram of the two-out-of-two voting architecture provided by the prior art.

[0020] Figure 3 is a schematic flowchart of the two-out-of-two voting method provided by the present invention.

[0021] Figure 4 is a schematic diagram of the two-out-of-two architecture provided by the present invention.

[0022] Figure 5 is a schematic flowchart of the dual-CPU communication voting provided by the present invention.

[0023] Figure 6 is a schematic structural diagram of the two-out-of-two voting device provided by the present invention.

[0024] Figure 7 is a schematic structural diagram of the electronic device provided by the present invention. Detailed implementation mode

[0025] To make the objectives, technical solutions and advantages of the present invention clearer, the technical solutions in the present invention will be clearly and completely described below with reference to the accompanying drawings in the present invention. Obviously, the described embodiments are some, but not all, of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in the present invention without making creative efforts shall fall within the protection scope of the present invention.

[0026] To facilitate a clearer understanding of the embodiments of the present application, the following is an introduction to the relevant background knowledge.

[0027] I. Technical solution of the prior art I

[0028] Figure 1 is one of the schematic diagrams of the two-out-of-two voting architecture provided by the prior art. As Figure 1 shown, the two-out-of-two voting architecture includes two independent MCUs. There is only a communication channel between the two independent MCUs to achieve two-out-of-two communication voting. However, there is no independent response mechanism between the two independent MCUs, and a reliable retransmission logic cannot be achieved. Moreover, the two MCUs running independently for a long time will accumulate clock errors, resulting in out-of-sync cycles of the two MCUs, ultimately leading to communication timeouts and poor stability of the rail transit signal system during long-term operation.

[0029] Figure 2 is the second schematic diagram of the two-out-of-two voting architecture provided by the prior art. As Figure 2 shown, the two-out-of-two voting architecture includes two independent MCUs and a voting arbitration module. The two MCUs independently send data to the voting arbitration module, and the voting arbitration module votes on the data. However, the use of a voting arbitration module increases hardware devices, resulting in increased costs. At the same time, the two MCUs lack a clock synchronization method, resulting in asynchronous data transmission and affecting the voting results.

[0030] The following will be combined with Figures 3 - 5 to describe the two-out-of-two voting method of the present invention.

[0031] Figure 3 is the flow schematic diagram of the two-out-of-two voting method provided by the present invention. As Figure 3 shown, the method includes the following steps 301-step 303.

[0032] Step 301: When the first hardwired output control port of the first MCU and the second hardwired output control port of the second MCU are both at a high level, the first MCU sends the data to be synchronized and voted to the second MCU in the form of a secure protocol message through the first Ethernet interface.

[0033] It should be noted that the two-out-of-two voting method provided by the present invention can be applied to the two-out-of-two communication voting scenario in the safety computer platform of the rail transit signal system. The execution subject of this method can be a two-out-of-two voting device, such as an electronic device, a CPU, or a control module in the two-out-of-two voting device for executing the two-out-of-two voting method.

[0034] The two-out-of-two voting method provided by the present invention is applied to the first microprocessor unit (MCU) in a two-out-of-two architecture, where the first MCU is any one of the two MCUs. Figure 4 This is a schematic diagram of the two-out-of-two architecture provided by the present invention, as Figure 4 shown. The two-out-of-two architecture includes two MCUs. Each MCU includes an Ethernet (ETH) interface, a hardwired input acquisition port (IN), and a hardwired output control port (OUT). The hardwired input acquisition port and the hardwired output control port form a hardwired input / output (IO) port. The ETH interfaces between the two MCUs use gigabit full-duplex Ethernet communication to achieve high-speed communication between the two MCUs and improve the communication transceiver efficiency; IN and OUT are designed anti-interference hardwired IOs. The IN port is the input acquisition port of the MCU, and OUT is the output control port of the MCU. Based on this two-out-of-two architecture, a communication protection mechanism is added to improve security.

[0035] Specifically, the first hardwired output control port of the first MCU directly outputs a high level. The second hardwired input acquisition port of the second MCU acquires the high level output by the first hardwired output control port of the first MCU. The second hardwired output control port of the second MCU directly outputs a high level. At this time, the hardwired output control ports of the first MCU and the second MCU are both at a high level. Hardwired synchronization can ensure that the two MCUs perform data synchronization simultaneously, improve communication efficiency, greatly reduce the probability of double-CPU communication voting timeout corresponding to the two CPUs, and improve communication stability.

[0036] When the first hardwired output control port of the first MCU and the second hardwired output control port of the second MCU are both at a high level, the first MCU sends the data to be synchronized and voted to the second MCU in the form of a security protocol message through the first Ethernet interface.

[0037] Optionally, the security protocol message includes at least one of the following: source identifier, destination identifier, sequence number, cycle number, data length, data content, and Cyclic Redundancy Check (CRC); wherein, the source identifier and the destination identifier are both used to identify the first MCU or the second MCU, the sequence number is used to indicate the error of the security protocol message, the cycle number is used to indicate the clock cycle, the data length is used to indicate the length of the data to be synchronized and voted on, and the CRC is used to verify the data to be synchronized and voted on. As shown in Table 1, Table 1 is the content of the security protocol message.

[0038] Table 1. Security Protocol Message

[0039] Step 302, the first MCU receives the security protocol message corresponding to the data to be synchronized and voted on sent by the second MCU through the second Ethernet interface.

[0040] Specifically, the second MCU sends the data to be synchronized and voted on to the first MCU in the form of a security protocol message through the second Ethernet interface. The first MCU receives the security protocol message corresponding to the data to be synchronized and voted on sent by the second MCU. That is, the first MCU and the second MCU use Gigabit full-duplex Ethernet to synchronize the data to be synchronized and voted on to each other for voting. Using the security protocol protection can avoid misjudgment of voting errors caused by communication errors.

[0041] Step 303, the first MCU determines the voting result of the data to be synchronized and voted on based on the security protocol message sent by the second MCU.

[0042] Specifically, based on the security protocol message sent by the second MCU, the first MCU can further determine the voting result of the data to be synchronized and voted on.

[0043] The two-out-of-two voting method provided by the present invention is applied to the first microprocessor unit (MCU) in a two-out-of-two architecture. The two-out-of-two architecture includes two MCUs, and each MCU includes an Ethernet interface, a hardwired input acquisition port, and a hardwired output control port. The method includes: when the first hardwired output control port of the first MCU and the second hardwired output control port of the second MCU are both at a high level, the first MCU sends the data to be synchronized and voted on in the form of a secure protocol message to the second MCU through the first Ethernet interface; the first MCU receives the secure protocol message corresponding to the data to be synchronized and voted on sent by the second MCU through the second Ethernet interface; the first MCU determines the voting result of the data to be synchronized and voted on based on the secure protocol message sent by the second MCU. Through the Ethernet interface, the hardwired input acquisition port, and the hardwired output control port, high-speed communication between the two MCUs can be achieved, and the synchronous operation of the two MCUs can be ensured. By using the secure protocol mechanism, the secure, efficient, and synchronous transmission of the data to be synchronized and voted on can be realized. Without using a voting arbitration module, the hardware cost can be reduced, and the communication transceiver efficiency and security can be improved, thereby enhancing the stability of the system.

[0044] Optionally, the specific implementation manner of step 303 includes: The first MCU parses the secure protocol message to obtain the data to be synchronized and voted on; the first MCU performs a voting process on the data to be synchronized and voted on to obtain a voting result.

[0045] Specifically, after the first MCU receives the secure protocol message corresponding to the data to be synchronized and voted on sent by the second MCU through the second Ethernet interface, it can parse the secure protocol message to obtain the data to be synchronized and voted on; then perform a voting process on the data to be synchronized and voted on to obtain a voting result.

[0046] Optionally, the method further includes any one of the following: When the first MCU receives the data to be synchronized and voted on sent by the second MCU, it sets the first hardwired output control port from a high level to a low level; when the first MCU does not receive the data to be synchronized and voted on sent by the second MCU, it maintains the high level of the first hardwired output control port; when the first MCU fails to parse the secure protocol message, it maintains the high level of the first hardwired output control port.

[0047] Specifically, when the first MCU receives the vote data to be synchronized sent by the second MCU, it can set the first hard-wired output control port from high level to low level, that is, pull the hard-wired output to low level; or, when the first MCU does not receive the vote data to be synchronized sent by the second MCU, it can maintain the high level of the first hard-wired output control port and wait for the second MCU to re-send the vote data to be synchronized; or, when the first MCU fails to parse the security protocol message, it indicates that the vote data to be synchronized sent by the second MCU fails to be sent or is lost, and it can maintain the high level of the first hard-wired output control port.

[0048] Optionally, after the first MCU finishes the vote processing on the vote data to be synchronized, the method further includes: The first MCU collects the low level of the second hard-wired output control port of the second MCU based on the first hard-wired input acquisition port; when the collected second hard-wired output control port is not low level and the acquisition time exceeds the preset time, the first MCU re-sends the vote data to be synchronized to the second MCU through the first Ethernet interface; where the number of re-sends is less than the preset maximum number.

[0049] Specifically, after the first MCU finishes the vote processing on the vote data to be synchronized, the first MCU can collect the low level of the second hard-wired output control port of the second MCU based on the first hard-wired input acquisition port, that is, wait for the hard-wired of the second hard-wired output control port of the second MCU to be pulled low; when the collected second hard-wired output control port is not low level and the acquisition time exceeds the preset time, that is, the second MCU does not receive the vote data to be synchronized sent by the first MCU, and the second MCU still maintains the high level and does not pull the hard-wired output to low level, and the first MCU's acquisition time exceeds the preset time, that is, in the case of timeout, the first MCU re-sends the vote data to be synchronized to the second MCU through the first Ethernet interface, where the number of re-sends is less than the preset maximum number. For example, the preset maximum number is 3 times, and the preset time can be flexibly set according to the actual situation.

[0050] In this application, by adding a communication re-send mechanism, in a complex environment, even if the communication fails due to environmental interference, the stability of the dual-CPU vote can be ensured through re-sending.

[0051] Optionally, the method further includes: At the end of the clock cycle, the first MCU sets the first hard-wired output control port to high level; when the first MCU collects that the second hard-wired output control port of the second MCU is high level, it re-sets the time of the timing register that controls the clock cycle time of the first MCU and enters the next clock cycle.

[0052] Specifically, at the end of the clock cycle, the first MCU can set the first hard-wired output control port to high level. The second MCU collects the high level output by the first hard-wired output control port through the second hard-wired input acquisition port, and then the second MCU sets the second hard-wired output control port to high level.

[0053] When the first MCU detects that the second hard-wired output control port of the second MCU is at high level, that is, after the first MCU detects the high-level output of the corresponding MCU hard-wired, the first MCU can reset the time of the timing register for controlling the clock cycle time of the first MCU and enter the next clock cycle. Similarly, after the second MCU collects the high level output by the first hard-wired output control port through the second hard-wired input acquisition port, the second MCU can reset the time of the timing register for controlling the clock cycle time of the second MCU and enter the next clock cycle, thus eliminating the cycle error of the two MCUs running independently. For example, assume that the operating clock cycles of the two MCUs are both 200 ms, but the two clock cycles differ by ±0.01 ms. After the two MCUs run continuously for 24 hours, an operating error of more than 10 ms may occur, resulting in the failure of the two-out-of-two voting.

[0054] In this application, at the end of the clock cycle, the first MCU sets the first hard-wired output control port to high level. When the first MCU detects that the second hard-wired output control port of the second MCU is at high level, the first MCU resets the time of the timing register for controlling the clock cycle time of the first MCU and enters the next clock cycle, thus eliminating the cycle error of the two MCUs running independently. This can solve the problem that the two MCUs running independently for a long time will accumulate clock errors, resulting in the out-of-sync of the two MCU cycles and ultimately leading to communication timeout.

[0055] Figure 5 is a schematic diagram of the dual-CPU communication voting process provided by the present invention. As Figure 5 shown, the dual-CPU communication voting process is divided into three parts: hard-wired synchronization, data interaction, and clock calibration. It should be noted that the first MCU corresponds to one CPU. After the start of a clock cycle, functional logic processing is performed on each MCU.

[0056] Hard-wired synchronization stage: The first hard-wired output control port of the first MCU (MCU1) directly outputs high level and waits for the hard-wired of the second MCU (MCU2) to become high level. When MCU2 detects that the output hard-wired of MCU1 becomes high level, MCU2 directly hard-wires and outputs high level. At this time, the two MCUs simultaneously enter the data interaction stage.

[0057] Data interaction stage: Both MCUs use gigabit full-duplex Ethernet to synchronize the vote data to be synchronized to the other MCU and conduct voting. That is, MCU1 sends the vote data to be synchronized to MCU2 in the form of a secure protocol message through the first Ethernet interface, and MCU2 receives the secure protocol message sent by MCU1. At the same time, MCU2 sends the vote data to be synchronized to MCU1 in the form of a secure protocol message through the second Ethernet interface, and MCU1 receives the secure protocol message sent by MCU2. MCU1 and MCU2 respectively parse the secure protocol message to obtain the vote data to be synchronized, and then respectively perform voting processing on the vote data to be synchronized to obtain the voting processing results.

[0058] When MCU1 and MCU2 receive the vote data to be synchronized sent by the other MCU, they respectively set their respective hard-wired output control ports from high level to low level; or, when MCU1 and MCU2 do not receive the vote data to be synchronized sent by the other MCU, they maintain the high level of their respective hard-wired output control ports; or, when MCU1 and MCU2 fail to parse the received secure protocol message, they maintain the high level of their respective hard-wired output control ports.

[0059] After MCU1 and MCU2 complete the voting processing on the vote data to be synchronized of the other MCU, MCU1 and MCU2 collect the low level of the hard-wired output control port of the other MCU based on their respective hard-wired input acquisition ports, that is, wait for the output hard wire of the other MCU to be pulled low. If the waiting times out, the vote data to be synchronized is resent, where the number of resends is less than the preset maximum number. For example, it can be resent at most three times.

[0060] Clock calibration stage: At the end of the clock cycle, the first hard-wired output control port of MCU1 directly outputs a high level and waits for the hard wire of MCU2 to become high. When the second hard-wired input acquisition port of MCU2 collects that the hard wire of MCU1 becomes high, the hard wire of MCU2 outputs a high level. After MCU1 and MCU2 collect the high level of the hard-wired output of the other MCU, they reset the time of the timing register that controls the clock cycle time of their respective MCUs, and enter the next cycle from this moment to eliminate the cycle error of the independent operation of the two MCUs.

[0061] The two-out-of-two voting device provided by the present invention will be described below. The two-out-of-two voting device described below can be correspondingly referred to the two-out-of-two voting method described above.

[0062] Figure 6 is a schematic structural diagram of the two-out-of-two voting device provided by the present invention, as Figure 6As shown in the figure, the first microprocessor unit MCU applied to the two-out-of-two architecture. The two-out-of-two architecture includes two MCUs. Each MCU includes an Ethernet interface, a hardwired input acquisition port, and a hardwired output control port. The two-out-of-two voting device 600 includes: a sending module 601, a receiving module 602, and a voting module 603; where, The sending module 601 is configured to, when the first hardwired output control port of the first MCU and the second hardwired output control port of the second MCU are both at a high level, send the to-be-synchronized voting data to the second MCU in the form of a secure protocol message through the first Ethernet interface; The receiving module 602 is configured to receive the secure protocol message corresponding to the to-be-synchronized voting data sent by the second MCU through the second Ethernet interface; The voting module 603 is configured to determine the voting processing result of the to-be-synchronized voting data based on the secure protocol message sent by the second MCU.

[0063] The two-out-of-two voting device provided by the present invention is applied to the first microprocessor unit MCU in the two-out-of-two architecture. The two-out-of-two architecture includes two MCUs. Each MCU includes an Ethernet interface, a hardwired input acquisition port, and a hardwired output control port. The method includes: when the first hardwired output control port of the first MCU and the second hardwired output control port of the second MCU are both at a high level, sending the to-be-synchronized voting data to the second MCU in the form of a secure protocol message through the first Ethernet interface; receiving the secure protocol message corresponding to the to-be-synchronized voting data sent by the second MCU through the second Ethernet interface; determining the voting processing result of the to-be-synchronized voting data based on the secure protocol message sent by the second MCU. Through the Ethernet interface, the hardwired input acquisition port, and the hardwired output control port, high-speed communication between the two MCUs is enabled and the synchronous operation of the two MCUs can be ensured. And by using the secure protocol mechanism, the secure, efficient, and synchronous transmission of the to-be-synchronized voting data is realized. Without using a voting arbitration module, the hardware cost is reduced, and the communication transceiver efficiency and security can be improved, thereby enhancing the stability of the system.

[0064] Optionally, the voting module 603 is specifically configured to: Parse the secure protocol message to obtain the to-be-synchronized voting data; Perform voting processing on the to-be-synchronized voting data to obtain a voting processing result.

[0065] Optionally, the two-out-of-two voting device 600 further includes any one of the following: The first setting module is configured to, when receiving the to-be-synchronized voting data sent by the second MCU, set the first hardwired output control port from a high level to a low level; The second setting module is used to keep the high level of the first hard - wire output control port when the to - be - synchronized voting data sent by the second MCU is not received. The third setting module is used to keep the high level of the first hard - wire output control port when the parsing of the security protocol message fails.

[0066] Optionally, after the first MCU finishes the voting process on the to - be - synchronized voting data, the two - out - of - two voting device 600 further includes: The acquisition module is used to acquire the low level of the second hard - wire output control port of the second MCU based on the first hard - wire input acquisition port. The re - transmission module is used to re - transmit the to - be - synchronized voting data to the second MCU through the first Ethernet interface when the acquired second hard - wire output control port is not at the low level and the acquisition time exceeds the preset time; wherein, the number of re - transmissions is less than the preset maximum number.

[0067] Optionally, the two - out - of - two voting device 600 further includes: The fourth setting module is used to set the first hard - wire output control port to the high level at the end of the clock cycle. The fifth setting module is used to reset the time of the timing register for controlling the clock cycle time of the first MCU and enter the next clock cycle when the second hard - wire output control port of the second MCU is acquired to be at the high level.

[0068] Optionally, the security protocol message includes at least one of the following: source identifier, destination identifier, sequence number, cycle number, data length, data content, and cyclic redundancy check CRC; wherein, the source identifier and the destination identifier are both used to identify the first MCU or the second MCU, the sequence number is used to indicate the error of the security protocol message, the cycle number is used to indicate the clock cycle, the data length is used to indicate the length of the to - be - synchronized voting data, and the CRC is used to verify the to - be - synchronized voting data.

[0069] Figure 7 It is a schematic diagram of the physical structure of the electronic device provided by the present invention, as Figure 7As shown in the figure, the electronic device may include: a processor 710, a communications interface 720, a memory 730, and a communication bus 740. Among them, the processor 710, the communications interface 720, and the memory 730 complete communication with each other through the communication bus 740. The processor 710 may call the logical instructions in the memory 730 to execute the two-out-of-two voting method, which includes: when the first hard-wired output control port of the first MCU and the second hard-wired output control port of the second MCU are both at a high level, the first MCU sends the data to be synchronized and voted in the form of a secure protocol message to the second MCU through the first Ethernet interface; the first MCU receives the secure protocol message corresponding to the data to be synchronized and voted sent by the second MCU through the second Ethernet interface; the first MCU determines the voting result of the data to be synchronized and voted based on the secure protocol message sent by the second MCU.

[0070] In addition, when the logical instructions in the above-mentioned memory 730 are implemented in the form of software functional units and sold or used as independent products, they may be stored in a computer-readable storage medium. Based on such an understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or a part of the technical solution, may be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in various embodiments of the present invention. The foregoing storage medium includes: various media such as USB flash drives, mobile hard disks, read-only memories (ROM, Read-Only Memory), random access memories (RAM, Random Access Memory), magnetic disks, or optical discs that can store program codes.

[0071] On the other hand, the present invention also provides a computer program product, which includes a computer program that can be stored on a non-transitory computer-readable storage medium. When the computer program is executed by a processor, the computer can execute the two-out-of-two voting method provided by the above-mentioned various methods. The method includes: when the first hardwired output control port of the first MCU and the second hardwired output control port of the second MCU are both at a high level, the first MCU sends the data to be synchronized and voted in the form of a security protocol message to the second MCU through a first Ethernet interface; the first MCU receives the security protocol message corresponding to the data to be synchronized and voted sent by the second MCU through a second Ethernet interface; the first MCU determines the voting result of the data to be synchronized and voted based on the security protocol message sent by the second MCU.

[0072] In another aspect, the present invention also provides a non-transitory computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, it realizes the two-out-of-two voting method provided by the above-mentioned various methods. The method includes: when the first hardwired output control port of the first MCU and the second hardwired output control port of the second MCU are both at a high level, the first MCU sends the data to be synchronized and voted in the form of a security protocol message to the second MCU through a first Ethernet interface; the first MCU receives the security protocol message corresponding to the data to be synchronized and voted sent by the second MCU through a second Ethernet interface; the first MCU determines the voting result of the data to be synchronized and voted based on the security protocol message sent by the second MCU.

[0073] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed to multiple network units. Some or all of the modules can be selected according to actual needs to achieve the purpose of the solution of this embodiment. Those of ordinary skill in the art can understand and implement it without creative labor.

[0074] Through the description of the above embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus a necessary general hardware platform, and of course, it can also be implemented by hardware. Based on such an understanding, the essence of the above technical solution, or the part that contributes to the prior art, can be embodied in the form of a software product. The computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods described in each embodiment or some parts of the embodiments.

[0075] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements for some of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A two-out-of-two voting method, characterized in that: A first microprocessing unit MCU is applied in a two-out-of-two architecture, wherein the two-out-of-two architecture includes two MCUs, each of which includes an Ethernet interface, a hard-line input acquisition port, and a hard-line output control port, and the method includes: When the first hard-line output control port of the first MCU and the second hard-line output control port of the second MCU are both at high levels, the first MCU sends the voting data to be synchronized to the second MCU in the form of a security protocol message through the first Ethernet interface; The first MCU receives a security protocol message corresponding to the voting data to be synchronized and sent by the second MCU through the second Ethernet interface; The first MCU determines a voting processing result of the voting data to be synchronized based on the security protocol message sent by the second MCU.

2. The two-out-of-two voting method according to claim 1, characterized in that: The first MCU determines, based on the security protocol message sent by the second MCU, a voting processing result of the voting data to be synchronized, including: The first MCU parses the security protocol message to obtain the voting data to be synchronized; The first MCU performs voting processing on the voting data to be synchronized to obtain a voting processing result.

3. The two-out-of-two voting method according to claim 2, characterized in that: The method further comprises any of the following: When the first MCU receives the voting data to be synchronized sent by the second MCU, the first hard-line output control port is set from a high level to a low level; When the first MCU does not receive the voting data to be synchronized sent by the second MCU, the first MCU maintains a high level of the first hard-line output control port; When the first MCU fails to parse the security protocol message, the first hard-line output control port maintains a high level.

4. The two-out-of-two voting method according to claim 2, characterized in that: After the first MCU completes the voting process on the voting data to be synchronized, the method further includes: The first MCU collects the low level of the second hard-line output control port of the second MCU based on the first hard-line input collection port; When the collected second hard-wire output control port is not at a low level and the collection time exceeds a preset time, the first MCU resends the voting data to be synchronized to the second MCU through the first Ethernet interface; wherein the number of retransmissions is less than the preset maximum number.

5. The two-out-of-two voting method according to any one of claims 1 to 4, characterized in that: The method further comprises: At the end of the clock cycle, the first MCU sets the first hard-wired output control port to a high level; When the first MCU detects that the second hard-line output control port of the second MCU is at a high level, the first MCU resets the time of the timing register of the control clock cycle time of the first MCU and enters the next clock cycle.

6. The two-out-of-two voting method according to any one of claims 1 to 4, characterized in that: The security protocol message includes at least one of the following: a source identifier, a destination identifier, a sequence number, a cycle number, a data length, a data content, and a cyclic redundancy check CRC; wherein the source identifier and the destination identifier are both used to identify the first MCU or the second MCU, the sequence number is used to indicate an error in the security protocol message, the cycle number is used to indicate a clock cycle, the data length is used to indicate the length of the voting data to be synchronized, and the CRC is used to verify the voting data to be synchronized.

7. A two-out-of-two voting device, characterized in that: A first microprocessing unit MCU applied to a two-out-of-two architecture, wherein the two-out-of-two architecture includes two MCUs, each of which includes an Ethernet interface, a hard-line input acquisition port, and a hard-line output control port, and the device includes: A sending module, configured to send the voting data to be synchronized in the form of a security protocol message to the second MCU through the first Ethernet interface when the first hard-line output control port of the first MCU and the second hard-line output control port of the second MCU are both at high levels; A receiving module, used for receiving a security protocol message corresponding to the voting data to be synchronized, which is sent by the second MCU through the second Ethernet interface; A voting module is used to determine a voting processing result of the voting data to be synchronized based on the security protocol message sent by the second MCU.

8. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein: When the processor executes the computer program, the two-out-of-two voting method according to any one of claims 1 to 6 is implemented.

9. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the two-out-of-two voting method according to any one of claims 1 to 6 is implemented.

10. A computer program product, comprising a computer program, characterized in that When the computer program is executed by a processor, the two-out-of-two voting method according to any one of claims 1 to 6 is implemented.

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