A single-chip microcomputer (MCU) delay reset circuit
By introducing an RC delay network circuit and a feedback circuit self-tuning mechanism, the delay time is adjusted in real time, which solves the problem of false reset of the MCU system under power supply voltage fluctuations and improves the stability and reliability of the system.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- SHENZHEN JUWEI SEMICON CO LTD
- Filing Date
- 2025-03-24
- Publication Date
- 2026-05-26
AI Technical Summary
The delay reset circuit of existing microcontroller (MCU) systems is easily affected by power supply voltage fluctuations, making it difficult to guarantee the accuracy of the reset timing, which may lead to false resets or startup failures.
An RC delay network circuit, a Schmitt trigger, and a feedback circuit are used. Through a self-tuning mechanism composed of a varactor and an operational amplifier, the power supply voltage is monitored in real time and the delay time is adjusted to ensure the stability of the delay time under power supply voltage fluctuations.
It achieves stability of delay time under power supply voltage fluctuations, avoids false resets, improves the robustness and reliability of the system, and is suitable for complex application scenarios and strong electromagnetic environments.
Smart Images

Figure CN120215365B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of microcontroller technology, and specifically to a microcontroller (MCU) delay reset circuit. Background Technology
[0002] In microcontroller (MCU) systems, the reset circuit is a crucial component for ensuring reliable system operation. Traditional reset circuits trigger the reset signal directly upon power-on, but unstable power supply voltage can lead to false resets or startup failures. To address this, delayed reset circuits delay the reset signal after power-on to ensure power stability. However, existing delayed reset circuits are susceptible to delay time fluctuations when the power supply voltage changes, making it difficult to guarantee the accuracy of the reset timing. Therefore, designing a reset circuit that can adaptively adjust the delay time based on power supply voltage variations is key to improving the stability and innovation of microcontroller systems. Summary of the Invention
[0003] The purpose of this invention is to provide a microcontroller (MCU) delay reset circuit to solve the problem of accidental reset at the moment of power-on, and to achieve adaptive adjustment of the delay time through a feedback circuit and a self-tuning varactor transistor to ensure that the delay time remains stable under power supply voltage fluctuations.
[0004] To achieve the above objectives, the technical solution of the present invention is as follows:
[0005] A microcontroller (MCU) delay reset circuit includes an RC delay network circuit, a Schmitt trigger U1A, and a feedback circuit;
[0006] RC delay network circuit: including resistor R1 and varactor C1;
[0007] Resistor R1: One end is connected to the power supply Vcc, and the other end is connected to the input terminal of varactor C1 and Schmitt trigger U1A;
[0008] Varactor C1: As a variable capacitor element, one end of it is connected to resistor R1 and the input terminal of Schmitt trigger U1A, and the other end is grounded;
[0009] Schmitt trigger U1A: The input terminal is connected to the common node of resistor R1 and varactor C1, and the output terminal is connected to the reset pin of the microcontroller;
[0010] Feedback circuit: includes voltage detection circuit and bias voltage control circuit, used to monitor power supply voltage Vcc and adjust bias voltage of varactor C1, self-tuning its capacitance value; Voltage detection circuit: includes voltage divider network composed of resistor R2 and resistor R3, one end of resistor R2 is connected to Vcc, the other end is connected to resistor R3; the other end of resistor R3 is grounded.
[0011] Bias voltage control circuit: includes operational amplifier U2 and resistor R4; the negative input terminal of operational amplifier U2 is connected to the reference voltage Vref, the positive input terminal is connected to the common node of resistor R2 and resistor R3, and the output terminal is connected to the control terminal of varactor C1 through resistor R4.
[0012] Preferably, when the RC delay network circuit is powered on, the varactor C1 is charged through the resistor R1, and the voltage gradually rises. The delay time is determined by the capacitance of the resistor R1 and the varactor C1.
[0013] Preferably, the voltage detection of the feedback circuit is achieved by dividing the voltage through resistors R2 and R3 to output the voltage. This reflects the changes in Vcc.
[0014] Preferably, the bias control of the feedback circuit is achieved by comparing the output voltage through operational amplifier U2. With reference voltage Output bias voltage When Vcc increases, the output voltage... Increase the bias voltage When Vcc increases, the capacitance of the varactor diode C1 increases; when Vcc decreases, the output voltage... Decrease bias voltage As the capacitance decreases, the capacitance value of the variable capacitance tube C1 decreases.
[0015] Preferably, the capacitance of the varactor C1 varies with the bias voltage. The changes are adjusted to compensate for the impact of Vcc fluctuations on the delay time, keeping the delay time t stable, thus forming a self-tuning mechanism.
[0016] Preferably, the Schmitt trigger U1A converts the output of the RC delay network circuit into a digital signal; when the input voltage reaches a high-level threshold... When this happens, a reset signal is output.
[0017] Preferably, the delay network time of the RC delay network circuit ,in The capacitance value of the variable capacitance tube C1, It is dynamically adjusted by the feedback circuit.
[0018] By adopting the above solution, the beneficial effects of the present invention are:
[0019] This invention provides a delay-reset circuit for a single-chip microcomputer (MCU). The circuit's adaptability is achieved by a feedback circuit that monitors Vcc in real time and adjusts the capacitance value of the varactor transistor C1. This ensures that the delay time remains stable under voltage fluctuations, avoids false resets, and improves system robustness. The implementation incorporates a feedback circuit with operational amplifier U2 and a self-tuning mechanism with varactor C1. The circuit is simple, cost-effective, and solves the reset and crash problem of the microcontroller (MCU) in complex application scenarios and strong electromagnetic environments. Attached Figure Description
[0020] Figure 1 This is a circuit schematic diagram of an embodiment of the present invention; Detailed Implementation
[0021] Typical embodiments embodying the features and advantages of this invention will be described in detail in the following description. It should be understood that the invention can have various variations in different embodiments without departing from the scope of the invention, and the descriptions and illustrations herein are for illustrative purposes only and not intended to limit the invention. Those skilled in the art can understand the specific meaning of the terms in this application document according to the specific circumstances.
[0022] This invention provides a microcontroller (MCU) delay reset circuit, which is applied to the on-chip reset module of a microcontroller.
[0023] Circuit structure
[0024] like Figure 1 As shown, the present invention provides a microcontroller (MCU) delay reset circuit, including an RC delay network circuit, a Schmitt trigger U1A, and a feedback circuit;
[0025] RC delay network circuit: including resistor R1 and varactor C1;
[0026] Resistor R1: One end is connected to Vcc, and the other end is connected to the varactor C1 and the input terminal IN of the Schmitt trigger U1A;
[0027] Varactor C1: One end is connected to resistor R1 and the input terminal IN of Schmitt trigger U1A, the other end is grounded, and the control terminal is connected to the feedback circuit;
[0028] Schmitt trigger U1A: The input terminal IN is connected to the common node of resistor R1 and varactor C1, and the output terminal OUT is connected to the microcontroller reset pin NRST;
[0029] Feedback circuit: includes voltage detection circuit and bias voltage control circuit, used to monitor power supply voltage Vcc and adjust bias voltage of varactor C1, and self-tune its capacitance value;
[0030] Voltage detection circuit: includes a voltage divider network composed of resistors R2 and R3; one end of resistor R2 is connected to Vcc, the other end is connected to one end of resistor R3, and the other end of resistor R3 is grounded;
[0031] Bias voltage control circuit: includes operational amplifier U2 and resistor R4; the negative input terminal of operational amplifier U2 is connected to Vref, the positive input terminal is connected to the common node of resistors R2 and R3, and the output terminal is connected to the control terminal of varactor C1 via R4.
[0032] When the RC delay network circuit is powered on, the varactor C1 is charged through the resistor R1, and the voltage gradually rises. The delay time is determined by the capacitance of the resistor R1 and the varactor C1.
[0033] The voltage detection of the feedback circuit outputs a voltage through a voltage divider formed by resistors R2 and R3.
[0034] The bias control of the feedback circuit compares the output voltage through operational amplifier U2. With reference voltage Output bias voltage When Vcc increases, the output voltage... Increase the bias voltage When Vcc increases, the capacitance of the varactor diode C1 increases; when Vcc decreases, the output voltage... Decrease bias voltage As the capacitance decreases, the capacitance value of the variable capacitance tube C1 decreases.
[0035] The capacitance of the varactor C1 varies with the bias voltage. The changes are made to compensate for the impact of Vcc fluctuations on the delay time, keep the delay time t stable, and form a self-tuning mechanism.
[0036] The Schmitt trigger U1A converts the output of the RC delay network circuit into a digital signal; when the input voltage reaches a high-level threshold... When this happens, a reset signal is output.
[0037] The delay network time of the RC delay network circuit, wherein The capacitance value of the variable capacitance tube C1, It is dynamically adjusted by the feedback circuit.
[0038] The present invention provides a microcontroller (MCU) delay reset circuit, the operation of which is as follows:
[0039] 1. After Vcc is powered on, the varactor C1 is charged through resistor R1, and the voltage at the input terminal IN of the Schmitt trigger U1A rises.
[0040] 2. Feedback circuit:
[0041] The output voltage is generated by the voltage divider between resistors R2 and R3. Operational amplifier U2 compares the output voltage With reference voltage Vref;
[0042] If Vcc increases >Vref, output voltage Increase the output bias voltage of operational amplifier U2 Increase the capacitance of variable container C1 Increase; if Vcc decreases, the output voltage... Decrease bias voltage Decrease the capacitance value of C1 in the variable capacitance tube. Decrease.
[0043] 3. When the IN voltage reaches the high-level threshold Vth of the Schmitt trigger U1A, the OUT flips and outputs a reset signal.
[0044] Parameter Design
[0045] Target delay: t=100ms, nominal Vcc=5V, Vth=3V.
[0046] Component selection: R1=100kΩ, varactor tube C1 nominal ( =2V), R2=20kΩ, R3=10kΩ, Vref=1.5V, R4=1kΩ.
[0047] Self-tuning verification:
[0048] When Vcc=5V Operational amplifier U2 adjustment , , .
[0049] When Vcc=5.5V, Bias voltage Decrease the capacitance value of the variable capacitance tube C1 Reduced to approximately t remains close to 100ms. Implementation effect.
[0050] Experiments show that with Vcc fluctuations of ±10%, the delay time deviation is <5%, significantly better than traditional designs. The circuit is suitable for industrial control, the Internet of Things, and other fields.
[0051] As can be seen from the above embodiments, the adaptiveness of the circuit of the present invention is achieved by the feedback circuit monitoring Vcc in real time and adjusting the capacitance value of the varactor C1. This ensures that the delay time remains stable under voltage fluctuations, avoids false resets, and improves system robustness. The implementation incorporates a feedback circuit with an operational amplifier and a varactor self-tuning mechanism, resulting in a simple circuit with controllable cost. It solves the reset and crash problem of microcontrollers (MCUs) in complex application scenarios and strong electromagnetic environments.
[0052] The above are merely preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the protection scope of the present invention.
Claims
1. A microcontroller (MCU) delay-reset circuit, characterized in that, This includes an RC delay network circuit, a Schmitt trigger U1A, and a feedback circuit; RC delay network circuit: including resistor R1 and varactor C1; Resistor R1: One end is connected to the power supply Vcc, and the other end is connected to the input terminal of varactor C1 and Schmitt trigger U1A; Varactor C1: As a variable capacitor element, one end of it is connected to resistor R1 and the input terminal of Schmitt trigger U1A, and the other end is grounded; Schmitt trigger U1A: The input terminal is connected to the common node of resistor R1 and varactor C1, and the output terminal is connected to the reset pin of the microcontroller; Feedback circuit: includes voltage detection circuit and bias voltage control circuit, used to monitor power supply voltage Vcc and adjust bias voltage of varactor C1, and self-tune its capacitance value; Voltage detection circuit: includes a voltage divider network composed of resistors R2 and R3; one end of resistor R2 is connected to Vcc, and the other end is connected to one end of resistor R3; the other end of resistor R3 is grounded; Bias voltage control circuit: includes operational amplifier U2 and resistor R4; the negative input terminal of operational amplifier U2 is connected to the reference voltage Vref, the positive input terminal is connected to the common node of resistor R2 and resistor R3, and the output terminal is connected to the control terminal of varactor C1 through resistor R4.
2. The MCU delay reset circuit according to claim 1, characterized in that, When the RC delay network circuit is powered on, the varactor C1 is charged through the resistor R1, and the voltage gradually rises. The delay time is determined by the capacitance of the resistor R1 and the varactor C1.
3. The microcontroller (MCU) delay reset circuit according to claim 1, characterized in that, The voltage detection of the feedback circuit outputs a voltage through a voltage divider formed by resistors R2 and R3. .
4. The MCU delay reset circuit according to claim 3, characterized in that, The bias control of the feedback circuit compares the output voltage through operational amplifier U2. With reference voltage Output bias voltage ; When Vcc increases, the output voltage Increase the bias voltage When Vcc increases, the capacitance of the varactor diode C1 increases; when Vcc decreases, the output voltage... Decrease bias voltage As the capacitance decreases, the capacitance value of the variable capacitance tube C1 decreases.
5. A microcontroller (MCU) delay reset circuit according to claim 4, characterized in that, The capacitance of the varactor C1 varies with the bias voltage. The changes are made to compensate for the impact of Vcc fluctuations on the delay time, keep the delay time t stable, and form a self-tuning mechanism.
6. The MCU delay reset circuit according to claim 1, characterized in that, The Schmitt trigger U1A converts the output of the RC delay network circuit into a digital signal; when the input voltage reaches a high-level threshold... When this happens, a reset signal is output.
7. A microcontroller (MCU) delay reset circuit according to claim 6, characterized in that, The delay network time of the RC delay network circuit ,in The capacitance value of the variable capacitance tube C1, It is dynamically adjusted by the feedback circuit.