Packet combining identification circuit and energy storage system

Abstract

The application relates to a parcel merging identification circuit and an energy storage system, the parcel merging identification circuit comprises a number identification circuit, a type identification circuit and a controller, the number identification circuit and the type identification circuit are respectively connected with the controller, when an external battery pack is merged into a host, the number identification circuit generates a first identification signal, the level state of the first identification signal is related to the number of the external battery packs, the type identification circuit generates a second identification signal, and the voltage of the second identification signal is related to the type of the external battery packs. The controller calculates the number of the external battery packs according to the level state of the first identification signal, and identifies the type parameters of the external battery packs according to the voltage of the second identification signal, thereby achieving the identification of the number and types of the external battery packs.

Description

Technical Field

[0001] The present application relates to the field of energy storage, and particularly to a parallel battery pack identification circuit and an energy storage system. Background Art

[0002] With the popularization of electronic devices, the scenario of multi-battery pack collaborative power supply has increased. However, the existing energy storage systems have the following defects: First, they cannot accurately detect the number of battery packs. When multiple battery packs are connected in parallel, it is easy to cause misjudgment due to the lack of a detection mechanism, affecting power distribution and charge-discharge control. Second, battery packs include various types, and the electrical characteristics of various types of battery packs are different. For example, the electrical characteristics of lithium-ion and nickel-metal hydride battery packs are different. If the type of the incorporated battery pack cannot be identified, it will lead to a mismatch in the charge-discharge strategy, shortening the battery life and even posing a safety hazard. Therefore, there is an urgent need for a parallel battery pack identification circuit that can identify both the number and type of battery packs. Summary of the Invention

[0003] Embodiments of the present application aim to provide a parallel battery pack identification circuit and an energy storage system, which can identify the number and type parameters of externally connected battery packs.

[0004] To solve the above technical problems, the embodiments of the present application provide the following technical solutions: In a first aspect, an embodiment of the present application provides a parallel battery pack identification circuit. The parallel battery pack identification circuit is characterized in that it is applied to an energy storage system. The energy storage system includes a host and i externally connected battery packs for connecting to the host. The parallel battery pack identification circuit includes: a quantity identification circuit, a type identification circuit, and a controller; The quantity identification circuit is connected to the controller. The quantity identification circuit is configured to generate a first identification signal in response to the externally connected battery packs being incorporated into the host, where the level state of the first identification signal is related to the number of the externally connected battery packs; The type identification circuit is connected to the controller. The type identification circuit is configured to generate a second identification signal in response to the externally connected battery packs being incorporated into the host, where the voltage of the second identification signal is related to the type of the externally connected battery packs; The controller is configured to calculate the number of the externally connected battery packs according to the level state of the first identification signal, and identify the type parameters of the externally connected battery packs according to the voltage of the second identification signal.

[0005] In a second aspect, an embodiment of the present application provides an energy storage system. The energy storage system includes a host, i externally connected battery packs, and the parallel battery pack identification circuit as described above. Each of the externally connected battery packs is connected in parallel to the host, and the parallel battery pack identification circuit is configured to identify the number and type parameters of the externally connected battery packs.

[0006] In various embodiments of the present application, the parallel-pack identification circuit includes a quantity identification circuit, a type identification circuit, and a controller. The quantity identification circuit and the type identification circuit are respectively connected to the controller. When an external battery pack is incorporated into the host, the quantity identification circuit generates a first identification signal, wherein the level state of the first identification signal is related to the quantity of the external battery pack. The type identification circuit generates a second identification signal, wherein the voltage of the second identification signal is related to the type of the external battery pack. The controller calculates the quantity of the external battery pack according to the level state of the first identification signal and identifies the type parameter of the external battery pack according to the voltage of the second identification signal. When external battery packs with different quantities are connected to the host, the level states of the first identification signal are different. When external battery packs of different types are incorporated into the host, the voltages of the second identification signal are different. Thus, the parallel-pack identification circuit can identify the quantity of the external battery pack based on the level state of the first identification signal and identify the type of the external battery pack based on the voltage of the second identification signal, realizing the identification of the quantity and type of the external battery pack. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] One or more embodiments are exemplarily illustrated by the pictures in the corresponding drawings. These exemplary illustrations do not limit the embodiments. Elements with the same reference numerals in the drawings are represented as similar elements. Unless otherwise stated, the drawings in the figures do not constitute a proportional limitation.

[0008] Figure 1 is a schematic structural diagram of one of the energy storage systems provided by an embodiment of the present application; Figure 2 is a schematic structural diagram of one of the parallel-pack identification circuits provided by an embodiment of the present application; Figure 3 is a schematic structural diagram of one of the parallel-pack identification circuits provided by an embodiment of the present application; Figure 4 is a schematic circuit diagram of one of the parallel-pack identification circuits provided by an embodiment of the present application; Figure 5 is a schematic circuit diagram of one of the parallel-pack identification circuits provided by an embodiment of the present application; Figure 6 is a schematic circuit diagram of one of the parallel-pack identification circuits provided by an embodiment of the present application; Figure 7 is a schematic circuit diagram of one of the parallel-pack identification circuits provided by an embodiment of the present application; Figure 8 is a schematic circuit diagram of one of the parallel-pack identification circuits provided by an embodiment of the present application. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0009] In order to make the objectives, technical solutions and advantages of the present application more clear and understandable, the present application will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0010] When the energy storage system is expanded, the externally connected battery pack is connected in parallel with the host in the energy storage system through a connector. As Figure 1 shown, the energy storage system includes a host 100 and N externally connected battery packs 200, where N is an integer greater than or equal to 1. It can be three, four or more battery packs. The specific number of battery packs can be set according to needs and is not limited herein.

[0011] As Figure 1 shown, when the first externally connected battery pack 200 is incorporated into the host 100, the first externally connected battery pack 200 and the host 100 are connected in parallel through a connector 300. When the second externally connected battery pack 200 is incorporated into the host 100, the second externally connected battery pack 200 and the first externally connected battery pack 200 are connected in parallel through a connector 300, and so on until the Nth externally connected battery pack 200 is incorporated. After each externally connected battery pack 200 is incorporated into the host 100, the host 100 controls operations such as charging, discharging or balancing of the externally connected battery pack 200.

[0012] Expansion can be carried out in both the upper and lower directions of the host 100 ( Figure 1 expansion in the lower part of the host 100 is shown as an example in

[0013] ), but there is a limit to the number of expandable battery packs. The system needs to identify the number of incorporated expansion devices and operate within the limited number. Therefore, the energy storage system needs to identify the number of externally connected battery packs to control operations such as charging and discharging.

[0014] At the same time, the types of the externally connected battery packs incorporated into the host 100 are the same. For example, the types of the i battery packs incorporated into the host are all of the first type, or the types of the i battery packs incorporated into the host are all of the second type. When the energy storage system controls the charging and discharging operations, it also needs to identify the type of the externally connected battery pack, because for different types of externally connected battery packs, the required charging voltage or charging current is different, and their discharging voltage or discharging current is also different. Therefore, the energy storage system needs to identify the type of the externally connected battery pack to enable fast charging and discharging.

[0015] As Figure 2As shown in the figure, the parallel battery pack identification circuit includes a quantity identification circuit 20, a type identification circuit 10, and a controller 30. Among them, the quantity identification circuit 20 is connected to the controller 30. When an external battery pack is incorporated into the host, the quantity identification circuit 20 generates a first identification signal, and the level state of the first identification signal is related to the quantity of the external battery pack. The controller 30 samples the first identification signal and determines the quantity of the external battery pack based on the level state of the first identification signal.

[0016] The type identification circuit is connected to the controller. When an external battery pack is incorporated into the host, the type identification circuit generates a second identification signal, and the voltage of the second identification signal is related to the type of the external battery pack. The controller samples the second identification signal and identifies the type parameters of the external battery pack based on the voltage of the second identification signal. Among them, the type parameters include parameters such as the type of the external battery pack, the device ID, the charging voltage, or the charging current.

[0017] When different quantities of external battery packs are incorporated into the host, the level states of the first identification signal are different. When different types of external battery packs are incorporated into the host, the voltages of the second identification signal are different.

[0018] For example, when i external battery packs are incorporated into the host, the level state of the first identification signal is the first level state. When i + 1 external battery packs are incorporated into the host, the level state of the first identification signal is the second level state. Then, the controller identifies the quantity of the external battery pack according to the level state of the received first identification signal.

[0019] For example: when the first type of external battery pack is incorporated into the host, the voltage of the second identification signal generated by the type identification circuit is the first voltage. When the second type of external battery pack is incorporated into the host, the voltage of the second identification signal generated by the type identification circuit is the second voltage. Then, the controller identifies the type of the external battery pack based on the voltage of the second identification signal, realizing the identification of the quantity and type of the external battery pack.

[0020] Please refer to Figure 3 , Figure 3 which is a schematic structural diagram of a parallel battery pack identification circuit provided by an embodiment of the present application. As Figure 3 shown, the type identification circuit 10 includes a first reference resistor R 02 and i coding resistors (respectively R 1B , R 2B ... and R iB ). The first end of the first reference resistor R 02 is connected to the first power supply VSS. Among them, the first reference resistor R 02 and the controller 30 are arranged in the host, and the coding resistors are arranged in the external battery pack. The first end of the coding resistor is grounded.

[0021] The type recognition circuit 10 further includes a sensorless control circuit. Each sensorless control circuit corresponds to an external battery pack one by one. The sensorless control circuit includes a microcontroller, a radio frequency identification switch, and a radio frequency identification tag. The microcontroller is respectively connected to the control end of the radio frequency identification switch and the radio frequency identification tag. The first end of the radio frequency identification switch is connected to the second end of the coding resistor belonging to the same external battery pack. As Figure 3 shown, the i microcontrollers are respectively the microcontroller 1, the microcontroller 2... and the microcontroller i. The i radio frequency identification switches are respectively the switch S1, the switch S2... and the switch Si. The i radio frequency identification tags are respectively the radio frequency identification tag 1, the radio frequency identification tag 2... and the radio frequency identification tag i. Among them, each sensorless control circuit can be arranged in an external battery pack.

[0022] It should be noted that when the host and each external battery pack form a stacked structure through the connector 300, the coding resistors in each external battery pack, the first reference resistor R 02 in the host, the device of the first power supply VSS in the host, and the sensorless control circuit in each battery pack can form Figure 3 and Figure 4 the connection relationship shown.

[0023] When the external battery pack is incorporated into the host, the second end of the radio frequency identification switch is connected to the second end of the first reference resistor, that is, the radio frequency identification switch controls the connection state between the second end of the coding resistor and the second end of the first reference resistor. When the radio frequency identification switch is closed, the second end of the coding resistor is connected to the second end of the first reference resistor. When the radio frequency identification switch is opened, the second end of the coding resistor is disconnected from the second end of the first reference resistor.

[0024] When the i external battery packs are incorporated into the host, the controller sequentially sends radio frequency signals of different frequencies. The radio frequency identification tag of each external battery pack responds to the radio frequency signal corresponding to its frequency. If the radio frequency identification tag responds to the radio frequency signal, the microcontroller connected to the radio frequency identification tag controls the radio frequency identification switch to close, so that the second end of the coding resistor belonging to the same external battery pack as the radio frequency identification switch is connected to the second end of the first reference resistor.

[0025] It can be understood that each radio frequency identification tag is unique. When the controller sends a radio frequency signal, when the radio frequency identification tag of an external battery pack incorporated into the host responds to the radio frequency signal, the microcontroller of the external battery pack controls the corresponding radio frequency identification switch to close, so that the second end of the coding resistor in the external battery pack is connected to the second end of the first reference resistor.

[0026] It should be noted that in order to identify the types of different types of external battery packs, before identification, resistance coding is performed based on the analog-to-digital sampling range of the controller 30. Coding resistors with different resistance values are assigned to different types of external battery packs, and then ideal resistors corresponding one-to-one to the coding resistors are assigned. The resistance value of each ideal resistor is equal to the resistance value of its corresponding coding resistor. Coding resistors with different resistance values are assigned to different types of external battery packs, and the ideal resistors with resistance values equal to those of the coding resistors are corresponded one-to-one to the type parameters of their corresponding external battery packs to establish a mapping relationship, so as to form a set of mapping relationships.

[0027] When performing the resistance coding and assignment operation, resistance coding is performed based on the analog-to-digital sampling range of the controller 30, and coding resistors with different resistance values are assigned to multiple external battery packs.

[0028] Moreover, when performing the resistance coding and assignment operation, the resistance value of the coding resistor in an external battery pack is determined by connecting one external battery pack to the host.

[0029] First, the maximum resistance value and the minimum resistance value of the coding resistor are determined based on the analog-to-digital sampling range of the controller 30. In some embodiments, the controller 30 includes an ADC sampling unit. The ADC sampling unit samples the voltage-dividing signal, and the ADC sampling unit performs analog-to-digital conversion on the voltage-dividing signal to obtain the voltage value of the voltage-dividing signal. Therefore, the analog-to-digital sampling range of the controller 30 is the range of the ADC sampling unit.

[0030] Then the first reference resistor R 02 and the coding resistor divide the voltage of the first power supply VSS. The obtained first voltage-dividing signal needs to be within the range of the ADC sampling unit to achieve correct sampling. Based on this principle, the maximum resistance value and the minimum resistance value of the coding resistor can be obtained.

[0031] If the sampling range of the ADC sampling unit is [V min ,V max , then in order to satisfy correct sampling, the voltage V ADC of the first voltage-dividing signal needs to satisfy the following constraint conditions: V min <V ADC <V max (1) Also, V ADC =(R m ×VSS) / (R 02 +R m ), where R m is the resistance value of the coding resistor, and R 02 is the resistance value of the first reference resistor. Then based on formula (1), it can be obtained that: (V min ×R 02) / (VSS - V min ) < R m < (V max × R 02 ) / (VSS - V max ) (2) Thus, for the accuracy of sampling, the resistance value R of the encoded resistor m ranges from [R min , R max ], the minimum resistance value is R min , and the maximum resistance value is R max , where, R min = (V min × R 02 ) / (VSS - V min ), R max = (V max × R 02 ) / (VSS - V max ).

[0032] Then, based on the minimum resistance value R min and the maximum resistance value R max to perform the resistance encoding operation to obtain the resistance values of multiple encoded resistors. When generating the resistance values of each encoded resistor, if the resistance values of each encoded resistor are relatively close, due to measurement errors and other reasons, it may cause mis - matching of the external battery pack type and confusion may occur.

[0033] Based on the above problems, when performing the resistance encoding operation to generate the resistance values of the encoded resistors, a differential resistance interval design is carried out for the resistance values of each encoded resistor to prevent confusion and reduce the risk of mis - matching of multiple external battery pack types.

[0034] In the embodiment of the present application, first, based on the analog - to - digital sampling range of the controller 30, the voltage of the first power supply VSS, and the resistance value of the first reference resistor R 02 to determine the median resistance value, and then determine the minimum allowable interval based on the median resistance value. Specifically, when the median voltage of the analog - to - digital sampling range is used as the voltage of the first voltage - dividing signal, the resistance value of the corresponding encoded resistor is determined as the median resistance value. Based on the analog - to - digital sampling range of the controller 30, the median voltage is determined, where the median voltage is the middle value of the analog - to - digital sampling range.

[0035] The median resistance value is determined by the following formula: R base = V mid × R 02 / (VSS - V mid ) (3) where, R base is the median resistance value, V mid is the median voltage, R02 is the resistance value of the first reference resistor.

[0036] If the analog-to-digital sampling range is [V min , V max , then the median voltage V mid = (V max + V min ) / 2. When the resistance value of the coding resistor is the median resistance value, it divides the first power supply VSS, and the voltage of the generated first divided voltage signal is the median voltage. Therefore, the corresponding median resistance value can be deduced based on the median voltage. 02

[0037] Then, based on the median resistance value, the minimum allowable interval is determined. The minimum allowable interval can make the interval between the resistance values of adjacent coding resistors large enough to avoid recognition conflicts caused by measurement errors.

[0038] Specifically, first, the maximum measurement error is obtained, and then the minimum allowable interval is determined through the following formula: R gap = w × ε × R base (4) where R gap is the minimum allowable interval, w is the weight, ε is the maximum measurement error, and R base is the median resistance value.

[0039] w can be set as needed. In the embodiments of the present application, w is 2. ε is the maximum measurement error, which refers to the maximum allowable error between the measured resistance value of the coding resistor and the assigned resistance value of the coding resistor. It can be set as needed. In the embodiments of the present application, ε is 5%, that is, if the error between the actual measured value and the assigned resistance value of the coding resistor is less than or equal to ε, it is considered that the actual measured value and the assigned resistance value of the coding resistor meet the error requirements or match.

[0040] In some embodiments, in order to also consider the noise interference into the minimum allowable interval to further reduce the measurement error, the minimum allowable interval can also be superimposed with a safety margin δ on the basis of the median resistance value R gap to obtain the final minimum allowable interval. Multiply the median resistance value R gap by the weight corresponding to the noise interference to obtain the safety margin δ. For example, the safety margin δ = 2% × R base .

[0041] Finally, based on the minimum allowable interval, the resistance values from the minimum resistance value to the maximum resistance value are divided to obtain the resistance values of several coding resistors. That is, [R min , R maxis split, and the difference between the split resistance values meets the minimum allowable interval. For example, the resistance values of each coded resistor are R min , R min +R gap , R min +2.5×R gap ... and so on until the resistance value of the last coded resistor is obtained.

[0042] It should be noted that when splitting [R min , R max to obtain the resistance values of each coded resistor, it can be evenly split so that the difference between the resistance values of each coded resistor is equal, or it can be unevenly split so that the difference between the resistance values of each coded resistor is equal or unequal, as long as the difference between the resistance values of two adjacent coded resistors meets the minimum allowable interval.

[0043] After obtaining the resistance values of each coded resistor, each coded resistor is assigned to different types of external battery packs, and each coded resistor corresponds to each type of external battery pack one by one. For example, the coded resistor with a resistance value of R min is assigned to the first type of external battery pack, and the coded resistor with a resistance value of R min +R gap is assigned to the second type of external battery pack, and the coded resistor with a resistance value of R min +2.5×R gap is assigned to the third type of external battery pack, and so on until the last coded resistor is assigned to an external battery pack different from the aforementioned types.

[0044] Among them, the coded resistor can be a single resistor or multiple resistors connected in parallel. For example, the coded resistor is a single resistor, and the resistance value of the single resistor is the resistance value of the coded resistor. If the coded resistor is multiple resistors, the resistance value of the multiple resistors connected in parallel is the resistance value of the coded resistor.

[0045] Then a mapping relationship set is established. Among them, the mapping relationship set includes multiple mapping data units. The construction of multiple mapping data units is as follows: For each mapping data unit, an ideal resistor corresponding one by one to the coded resistor is assigned, and the resistance value of each ideal resistor is equal to the resistance value of its corresponding coded resistor. Then, a mapping relationship is established between the ideal resistor of each mapping data unit and the type parameter of the external battery pack corresponding to its coded resistor.

[0046] That is, the encoded resistors correspond one-to-one with the ideal resistors, and the resistance values of the encoded resistors are equal to those of the ideal resistors. Then, a mapping relationship is established between the ideal resistors and the type parameters of the corresponding external battery packs. For example, if the type parameters include the model of the external battery pack, the ID number of the external battery pack, the target output voltage of the external battery pack, and the maximum current, the mapping relationship can be expressed as (M, R m , I DM , V _targetM , I _maxM ), where M is the device model of the external battery pack, R m is the resistance value of the ideal resistor, I DM is the ID number of device M, V _targetM is the target output voltage of device M, and I _maxM is the maximum current of device M.

[0047] Taking the allocation of encoded resistors to two types of external battery packs and the construction of two mapping data units as an example, the establishment process of the resistor encoding and the mapping relationship set is described.

[0048] Different resistance values are assigned to the encoded resistors in the two types of external battery packs. If the two types of external battery packs are the first external battery pack and the second external battery pack respectively, and their corresponding encoded resistors are the first encoded resistor and the second encoded resistor respectively, then the first encoded resistor with a resistance value of the first resistance value is assigned to the first external battery pack, and the second encoded resistor with a resistance value of the second resistance value is assigned to the second external battery pack. Moreover, the first resistance value and the second resistance value are obtained by splitting and dividing [R min , R max , and the difference between the first resistance value and the second resistance value satisfies the minimum allowable interval. For example, the first resistance value and the second resistance value are R min and R min + R gap .

[0049] Then, two mapping data units are constructed. The first ideal resistor corresponding to the first resistance value is assigned to the first mapping data unit. The resistance value of the first ideal resistor is equal to the first resistance value. Then, a mapping relationship is established between the first ideal resistor and the type parameters of the first external battery pack. The mapping relationship is expressed as (M1, R m1 , I DM1 , V _targetM1 , I _maxM1 ), where M1 refers to the device model of the first external battery pack, R M1 refers to the resistance value of the first ideal resistor, I DM1 refers to the ID number of device M1, V _targetM1 refers to the target output voltage of device M1, and I _maxM1It refers to the maximum current of device M1. Allocate a second ideal resistor corresponding to the second resistance value to the second mapping data unit. The resistance value of the second ideal resistor is equal to the second resistance value, and then establish a mapping relationship between the second ideal resistor and the type parameters of the second external battery pack. The mapping relationship is expressed as (M2, R m2 , I DM2 , V _targetM2 , I _maxM2 ), where M2 refers to the device model of the second external battery pack, R M2 refers to the resistance value of the second ideal resistor, I DM2 refers to the ID number of device M2, V _targetM2 refers to the target output voltage of device M2, and I _maxM2 refers to the maximum current of device M2. Finally, the two mapping data units form a mapping relationship set.

[0050] Thus, the mapping relationship set contains the mapping relationships between the type parameters of each external battery pack and the ideal resistors, and the ideal resistors have the same resistance value as the coded resistors of the external battery packs, corresponding one by one.

[0051] In the first specific embodiment, during the sequential closing process of the i radio frequency identification switches, when the i-th radio frequency identification switch is closed, the i-th coded resistor forms an i-th voltage division node at the connection with the first reference resistor after being connected in parallel with the previous i - 1 coded resistors, and an i-th first voltage division signal is generated at each of the i voltage division nodes; when the number of the first voltage division signals reaches the number of the external battery packs, the controller is further configured to stop sending the radio frequency signal, and the i first voltage division signals form the second identification signal. In this embodiment, the radio frequency identification switch remains closed after being closed and does not open.

[0052] For example: If the controller sends a radio frequency signal with a frequency of f1, the radio frequency identification tag in the external battery pack corresponding to the frequency f1 responds to the radio frequency signal, and other radio frequency identification tags do not respond to this frequency signal. Then the microcontroller in the external battery pack controls the corresponding radio frequency identification switch to close, so that the second end of the coded resistor in the external battery pack is connected to the second end of the first reference resistor.

[0053] If the controller sends a radio frequency signal with a frequency of f2, the radio frequency identification tag in the external battery pack corresponding to the frequency f2 responds to the radio frequency signal, and other radio frequency identification tags do not respond to this frequency signal. Then the microcontroller in the external battery pack controls the corresponding radio frequency identification switch to close, so that the second end of the coded resistor in the external battery pack is connected to the second end of the first reference resistor.

[0054] If the external battery packs are sorted according to the closing sequence of the RFID switches. For example, when the controller sends the first radio frequency signal, the RFID switch corresponding to the first radio frequency signal closes, and the external battery pack corresponding to this RFID switch is called the first external battery pack. The coding resistor in the first external battery pack is connected to the first reference resistor, and the coding resistor and the first reference resistor divide the voltage of the first power supply VSS to generate the first first-divided voltage signal.

[0055] When the controller sends the second radio frequency signal, the RFID switch corresponding to the second radio frequency signal closes, and the external battery pack corresponding to this RFID switch is the second external battery pack. After the coding resistor in the second external battery pack is connected in parallel with the coding resistor in the first external battery pack, it is then connected to the first reference resistor. The two parallel coding resistors and the first reference resistor divide the voltage of the first power supply VSS to generate the second first-divided voltage signal.

[0056] And so on. When the controller sends the i-th radio frequency signal, the RFID switch corresponding to the i-th radio frequency signal closes, and the external battery pack corresponding to this RFID switch is the i-th external battery pack. Then the coding resistor in the i-th external battery pack is connected in parallel with the previous i - 1 coding resistors and then connected to the first reference resistor. The i parallel coding resistors and the first reference resistor divide the voltage of the first power supply VSS to generate the i-th first-divided voltage signal. Among them, in order to avoid the controller from sending invalid radio frequency signals, the controller judges the number of the received first-divided voltage signals. When the number of the first-divided voltage signals reaches the number of the external battery packs, the controller stops sending radio frequency signals.

[0057] Specifically, as Figure 3 shown, when the controller sends the first radio frequency signal, the RFID switch S1 in the first external battery pack closes. The external battery pack corresponding to the RFID switch S1 is the first external battery pack. Then the coding resistor R 1B is connected to the first reference resistor R 02 . A first voltage-dividing node is formed at the connection point, and the coding resistor R 1B and the first reference resistor R 02 divide the voltage of the first power supply VSS to generate the first first-divided voltage signal at the first voltage-dividing node. The controller samples this first-divided voltage signal.

[0058] When the controller sends the second radio frequency signal, the RFID switch S2 closes. The external battery pack corresponding to the RFID switch S2 is the second external battery pack. Then the coding resistor R 2B is connected to the first reference resistor R 02 , and the coding resistor R 1B is connected in parallel with the coding resistor R 2B and then connected to the first reference resistor R02 Connect, and a second voltage dividing node is formed at the connection point. The encoded resistors R after parallel connection 1B and the encoded resistor R 2B , together with the first reference resistor R 02 divide the voltage of the first power supply VSS, and a second first voltage dividing signal is generated at both the first voltage dividing node and the second voltage dividing node. The controller samples this second first voltage dividing signal.

[0059] And so on. When the controller sends the i-th radio frequency signal, the radio frequency identification switch S i closes. The external battery pack corresponding to the radio frequency identification switch S i is the i-th external battery pack. Then the encoded resistor R iB is connected to the first reference resistor R 02 , and the encoded resistor R 1B , the encoded resistor R 2B until the encoded resistor R iB are connected in parallel, and then connected to the first reference resistor R 02 to form the i-th voltage dividing node. The encoded resistors R after parallel connection 1B , the encoded resistor R 2B until the encoded resistor R iB , together with the first reference resistor R 02 divide the voltage of the first power supply VSS, and the i-th first voltage dividing signal is generated at the i voltage dividing nodes. The controller samples this i-th first voltage dividing signal. Among them, when the number of the first voltage dividing signals reaches the number of the external battery packs, the controller stops sending radio frequency signals, and the i first voltage dividing signals form a second identification signal.

[0060] In the first specific embodiment, the controller 30 identifies the types of the i external battery packs according to the voltages of the i first voltage dividing signals received.

[0061] Specifically, first, based on the (i-1)th first voltage-dividing signal, the voltage-dividing principle, and the first reference resistor, a first parallel resistor is determined, where the first parallel resistor is the total resistance of the parallel connection of the first (i-1) coded resistors. Then, based on the ith first voltage-dividing signal, the voltage-dividing principle, and the first reference resistor, a second parallel resistor is determined, where the second parallel resistor is the total resistance of the parallel connection of the first i coded resistors. Next, based on the first parallel resistor, the second parallel resistor, and the parallel connection principle, the measured resistance value of the ith coded resistor is determined. Finally, a resistance value search is performed in the mapping relationship set to obtain a target ideal resistor and a target type parameter, where the target ideal resistor is an ideal resistor that matches the numerical value of the measured resistance value, and the target type parameter is the type parameter of the ith external battery pack. The mapping relationship set includes the ideal resistor that matches the coded resistor and the type parameter of the external battery pack that corresponds one-to-one with the ideal resistor.

[0062] For example: as Figure 3 shown, assume that the RFID switches S1, S2... S i are sequentially closed. When the first closed RFID switch S1 is closed and i is 1, then based on the first voltage-dividing signal, the voltage-dividing principle, and the first reference resistor, the measured resistance value of the first coded resistor is determined by the following formula: R 并1 =R 1B =V1×R 02 / (VSS - V1) (5) where, R 并1 is the total resistance of the parallel connection of the first 1 coded resistors, R 1B is the measured resistance value of the first coded resistor, V1 is the voltage of the first voltage-dividing signal, R 02 is the resistance value of the first reference resistor, and VSS is the voltage of the first power supply.

[0063] When i is any integer from 2 to i, the second RFID switch S2 to the ith RFID switch S i are sequentially closed, and the first parallel resistor is determined by the following formula: R 并（i-1） =V i-1 ×R 02 / (VSS - V i-1 ) (6) where, R 并（i-1） is the total resistance of the parallel connection of the first (i - 1) coded resistors, and V i-1 is the voltage of the (i - 1)th first voltage-dividing signal.

[0064] Then, the second parallel resistor is determined by the following formula: R 并i =Vi ×R 02 / (VSS - V i ) (7) Among them, R 并i is the total resistance after parallel connection of the first i coded resistors, and V i is the voltage of the i-th first voltage-dividing signal.

[0065] Then, the measured resistance value of the i-th coded resistor is determined by the following formula: R iB = R 并（i-1） ×R 并i / (R 并（i-1） - R 并i ) (8) For the above formula (7), it is the resistance value after parallel connection of multiple external battery packs, rather than the measured value corresponding to the coded resistor of each external battery pack. Thus, when the i-th switch is closed, according to the voltage of the first voltage-dividing signal generated by the i - 1-th closing situation, the measured value of the coded resistor of the external battery pack to which the current closed radio frequency identification switch S i belongs is obtained.

[0066] Taking the first external battery pack and the second external battery pack as examples to describe the process of obtaining the type parameter, where the first external battery pack and the second external battery pack are battery packs of different types. When the first external battery pack and the second external battery pack are incorporated into the host, the controller issues the first radio frequency signal. The radio frequency identification tag in the first external battery pack responds to this radio frequency signal, and the microcontroller in the first external battery pack controls the corresponding radio frequency identification switch to close. The first coded resistor in the first external battery pack is connected to the first reference resistor, and a first voltage-dividing node is formed at the connection point, and a first first voltage-dividing signal is generated at the first voltage-dividing node. The controller issues the second radio frequency signal. The radio frequency identification tag in the second external battery pack responds to this radio frequency signal, and the microcontroller in the second external battery pack controls the corresponding radio frequency identification switch to close. The second coded resistor in the second external battery pack is connected in parallel with the first coded resistor, and the first coded resistor and the second coded resistor after parallel connection are connected to the first reference resistor, and a second voltage-dividing node is formed at the connection point, and a second first voltage-dividing signal is generated at the second voltage-dividing node.

[0067] Then, the measured resistance value of the first coded resistor is calculated by the following formula: R 并1 = R 1B = V1 × R 02 / (VSS - V1) (9) Among them, R 并1 is the total resistance after parallel connection of the previous coded resistor (i.e., the first coded resistor R 1B ), R 1Bis the measured resistance value of the first coded resistor, V1 is the voltage of the first first-divided voltage signal, and R 02 is the resistance value of the first reference resistor, and VSS is the voltage of the first power supply.

[0068] In the embodiment of the present application, the first parallel resistor is equal to the measured resistance value of the first coded resistor, and then the second parallel resistor is calculated by the following formula: R 并2 = V2 × R 02 / (VSS - V2) (10) wherein, R 并2 is the total resistance after parallel connection of the first two coded resistors (i.e., the first coded resistor R 1B and the second coded resistor R 2B ), and V2 is the voltage of the second first-divided voltage signal.

[0069] Then, the measured resistance value of the second coded resistor is determined by the following formula: R 2B = R 并1 × R 并2 / (R 并1 - R 并2 ) = R 1B × R 并2 / (R 1B - R 并2 ) (11) The measured resistance value of the first coded resistor and the measured resistance value of the second coded resistor can be calculated through the voltage of the first first-divided voltage signal and the voltage of the second first-divided voltage signal.

[0070] Thus, based on the voltage of the (i - 1)th first-divided voltage signal and the voltage of the ith first-divided voltage signal, the measured resistance value of the ith coded resistor can be obtained. Then, the mapping relationship set is obtained, and the target ideal resistor corresponding to the measured resistance value is searched from the mapping relationship set, so as to obtain the target ideal type parameter corresponding to the target ideal resistor, that is, the type parameter of the ith external battery pack.

[0071] When i different types of external battery packs are connected to the host, i first-divided voltage signals are generated at the voltage division node. The controller 30 can sequentially determine the measured resistance values of the i coded resistors through the i first-divided voltage signals (as shown in the above formula (5) to the above formula (8)), and then determine the target ideal resistor matching therewith from the mapping relationship set through the measured resistance value, so as to further determine the type parameter matching therewith through the target ideal resistor.

[0072] The controller 30 traverses the ideal resistances in the mapping relationship. If the absolute value of the difference between the ideal resistance and the measured resistance value is less than the preset error, it is determined that the ideal resistance value matches the measured resistance value. This ideal resistance value is the target ideal resistance value, and then the type parameter of the external battery pack corresponding to the target ideal resistance is determined from the mapping relationship set.

[0073] In the second specific embodiment, after a preset time after the RFID switch is closed, the microcontroller controls the RFID switch to open, and then the second end of the coded resistance belonging to the same external battery pack as the RFID switch is disconnected from the second end of the first reference resistance.

[0074] Then, during the sequential closing of the i RFID switches, when the i-th RFID switch is closed, the connection between the i-th coded resistance and the first reference resistance forms the i-th voltage division node, and the i-th first voltage division signal is generated at the i-th voltage division node. When the number of the first voltage division signals reaches the number of external battery packs, the controller stops sending RF signals.

[0075] For example: as Figure 3 shown, when the controller 30 sends the first RF signal, the RFID switch S1 in the first external battery pack is closed. The external battery pack corresponding to the RFID switch S1 is the first external battery pack. Then, the coded resistance R 1B is connected to the first reference resistance R 02 . The connection forms the first voltage division node, and the coded resistance R 1B and the first reference resistance R 02 divide the voltage of the first power supply to generate the first first voltage division signal, and the controller 30 samples this first voltage division signal.

[0076] After a preset time, the microcontroller 1 controls the RFID switch S1 in the first external battery pack to open, and the first coded resistance R 1B is disconnected from the first reference resistance R 02 . The controller 30 sends the second RF signal, and the RFID switch S2 is closed. The external battery pack corresponding to the RFID switch S2 is the second external battery pack. Then, the coded resistance R 2B is connected to the first reference resistance R 02 , and the coded resistance R 2B is connected to the first reference resistance R 02 . The connection forms the second voltage division node. The coded resistance R 2B and the first reference resistance R 02 divide the voltage of the first power supply to generate the second first voltage division signal, and the controller 30 samples this second first voltage division signal.

[0077] After a preset time, the microcontroller 2 controls the radio frequency identification switch S2 in the second external battery pack to disconnect, and the second coded resistor R 2B is disconnected from the first reference resistor R 02 The controller 30 sends a third radio frequency signal, the radio frequency identification switch S3 closes, and the external battery pack corresponding to the radio frequency identification switch S3 is the third external battery pack. Then the coded resistor R 3B is connected to the first reference resistor R 02 A third voltage division node is formed at the connection point, and the coded resistor R 3B and the first reference resistor R 02 divide the voltage of the first power supply to generate a third first voltage division signal, and the controller 30 samples this third first voltage division signal.

[0078] And so on. After a preset time, the microcontroller i controls the radio frequency identification switch in the (i - 1)-th external battery pack to disconnect, and the (i - 1)-th coded resistor R （i-1）B is disconnected from the first reference resistor R 02 The controller 30 sends the i-th radio frequency signal, the radio frequency identification switch S i closes, and the external battery pack corresponding to the radio frequency identification switch Si is the i-th external battery pack. Then the coded resistor R iB is connected to the first reference resistor R 02 A connection point forms the i-th voltage division node, and the coded resistor R iB and the first reference resistor R 02 divide the voltage of the first power supply VSS to generate the i-th first voltage division signal, and the controller 30 samples this i-th first voltage division signal. Among them, when the number of the first voltage division signals reaches the number of external battery packs, the controller stops sending radio frequency signals, and the i first voltage division signals form a second identification signal.

[0079] The controller 30 identifies the types of the i external battery packs according to the voltages of the i first voltage division signals received.

[0080] Specifically, first, based on the i-th first voltage division signal, the voltage division principle, and the first reference resistor, determine the measured resistance value of the i-th coded resistor, and then search for the resistance value in the mapping relationship set to obtain the target ideal resistor and the target type parameter. Among them, the target ideal resistor is the ideal resistor that matches the value of the measured resistance value, and the target type parameter is the type parameter of the i-th external battery pack. The mapping relationship set includes the ideal resistor matching the coded resistor and the type parameter of the external battery pack corresponding one-to-one to the ideal resistor.

[0081] For example: as Figure 3 shown, based on the i-th first voltage division signal, the voltage division principle, and the first reference resistor, determine the measured resistance value of the i-th coded resistor through the following formula: R iB =V i ×R 02 / (VSS - V i ) (12) Among them, R iB is the measured resistance value of the i-th encoded resistor, V i is the voltage of the i-th first divided voltage signal, R 02 is the resistance value of the first reference resistor, and VSS is the voltage of the first power supply.

[0082] Thus, based on the voltage of the i-th first divided voltage signal, the measured resistance value of the i-th encoded resistor can be obtained. Then, obtain the mapping relationship set, and search in the mapping relationship set to obtain the target ideal resistor corresponding to the measured resistance value, so as to obtain the target ideal type parameter corresponding to the target ideal resistor, that is, the type parameter of the i-th external battery pack.

[0083] In some embodiments, the measured resistance value inversely deduced by the controller 30 according to the voltage value of the first divided voltage signal is the original resistance value of the encoded resistor. In order to improve the measurement accuracy, after temperature compensation is performed on the original resistance value, the measured resistance value is obtained. The measured resistance value after temperature compensation is more accurate, more in line with the actual resistance value of the encoded resistor, and improves the resistance value measurement accuracy of the encoded resistor.

[0084] Due to measurement errors or measurement accuracy and other issues, the measured resistance value R iB is not necessarily the same as the resistance value of the ideal resistor. Therefore, traverse each ideal resistor in the mapping relationship set, and judge whether the absolute value of the difference between the resistance value of each ideal resistor and the measured resistance value R iB is less than the preset error. If it is less than the preset error, it is confirmed that the resistance value of the ideal resistor matches the measured resistance value R iB , and the ideal resistor matching the measured resistance value R iB is determined as the target ideal resistor. Then, determine the type parameter of the external battery pack corresponding to the target ideal resistor.

[0085] In the above embodiments, as Figure 3 shown, the type recognition circuit 10 further includes a filter circuit. The filter circuit includes a resistor R 03 and a capacitor C1. The resistor R 03 is connected between the controller and the voltage division node. One end of the capacitor C1 is connected to the controller and the resistor R 03 respectively, and the other end is grounded. After the first divided voltage signal is filtered by the filter circuit, it is then transmitted to the controller 30.

[0086] In the above embodiments, in order to reduce measurement errors, in the above type recognition circuit, the coding resistor assigned to the external battery pack may be formed by the parallel connection of a first resistor, a second resistor, and a third resistor, that is, R iB may be formed by the parallel connection of three resistors.

[0087] Please refer to Figure 4 , Figure 4 which is a schematic structural diagram of a parallel battery pack recognition circuit provided by an embodiment of the present application. As Figure 4 shown, the quantity recognition circuit 20 includes: i matching resistors (resistor R 1A , resistor R 2A ... resistor R iA ), a second reference resistor R 01 and N comparison circuits 21, where i is a positive integer from 0 to N, and N is a positive integer greater than or equal to 1.

[0088] It should be noted that when the host and each external battery pack form a vertically stacked structure through the connector 300, the matching resistors in each external battery pack, the second reference resistor R 01 in the host, and the devices of the second power supply VDD in the host can form Figure 4 and Figure 5 the connection relationships shown.

[0089] The first end of the second reference resistor R 01 is connected to the second power supply VDD. The matching resistors are arranged in the external battery packs and are in one-to-one correspondence with the external battery packs, and the resistance values of the matching resistors are the same. When the i-th external battery pack is incorporated into the host, the i matching resistors are connected in parallel to form a parallel voltage division module. The first end of the parallel voltage division module is connected to the second end of the second reference resistor R 01 , the second end of the parallel voltage division module is grounded to GND, and the second reference resistor R 01 and the parallel voltage division module divide the second power supply VDD to obtain a second voltage division signal. Thus, the first end of the parallel voltage division module can obtain the second voltage division signal regarding the second power supply.

[0090] For example: If the i matching resistors are respectively resistor R 1A , resistor R 2A ... resistor R iA , then when the first external battery pack is incorporated into the host, the first end of resistor R 1A is connected to the second end of the second reference resistor R 01 , and resistor R 1A and the second reference resistor R 01 divide the second power supply VDD to obtain a second voltage division signal. Then the voltage of the second voltage division signal is Vin1 = VDD×R 1A / (R 01+R 1A )。

[0091] When the second external battery pack is incorporated into the host, the resistor R 1A is connected in parallel with the resistor R 2A to form a voltage-dividing resistor module. The first end of the resistor R 2A is connected to the second end of the second reference resistor R 01 . And the resistors R 1A , R 2A and the second reference resistor R 01 divide the voltage of the second power supply VDD to obtain a second voltage-dividing signal. Then the voltage of the second voltage-dividing signal is Vin2 = VDD × (R 1A ||R 2A ) / (R 01 + (R 1A ||R 2A ))), where || is the parallel symbol, and R 1A ||R 2A represents the total resistance after R 1A and R 2A are connected in parallel.

[0092] By analogy, when the i-th external battery pack is incorporated into the host, the resistors R 1A , R 2A up to the resistor R iA are all connected in parallel to form a voltage-dividing resistor module. The first end of the resistor R iA is connected to the second end of the second reference resistor R 01 . And the resistors R 1A , R 2A up to the resistor R iA together with the second reference resistor R 01 divide the voltage of the second power supply VDD to obtain a second voltage-dividing signal. Then the voltage of the second voltage-dividing signal is Vin i = VDD × (R 1A ||R 2A ||...||R iA ) / (R 01 + (R 1A ||R 2A ||...||R iA ))), where || is the parallel symbol, and R 1A ||R 2A ||...||R iA represents the total resistance after R 1A , R 2A ,... and R iA are connected in parallel.

[0093] Therefore, when different numbers of external battery packs are incorporated into the host, the voltage of the second voltage-dividing signal is different. The voltage of the second voltage-dividing signal decreases as the number of external battery packs increases, and is less than the voltage of the second power supply VDD.

[0094] The first input terminal of each comparison circuit 21 is connected to the second voltage-dividing signal, and a reference voltage is connected to the second input terminal of each comparison circuit 21. For example, the second input terminal of the first comparison circuit is connected to the first reference voltage Vref1, the second input terminal of the second comparison circuit is connected to the second reference voltage Vref2, and so on. The second input terminal of the Nth comparison circuit is connected to the Nth reference voltage Vref N , where the voltages of the respective reference voltages are different. For example, the voltages of the respective reference voltages increase or decrease in sequence, that is, Vref1 < Vref2 <... < Vref N , or, Vref1 > Vref2 >... > Vref N .

[0095] And the voltage of the second power supply VDD is greater than the maximum value of the reference voltages. If the values of the respective reference voltages increase in sequence, the voltage of the second power supply VDD is greater than Vref N , if the values of the respective reference voltages decrease in sequence, the voltage of the second power supply VDD is greater than Vref1.

[0096] The comparison circuit 21 compares the voltage of the second voltage-dividing signal with the corresponding reference voltage and outputs a corresponding comparison signal. These N comparison signals reflect the number of external battery packs.

[0097] For example, if the values of the reference voltages increase in sequence, that is, Vref1 < Vref2 <... < Vref N , and when the voltage of the first input terminal of the comparison circuit is less than the voltage of its second input terminal, the comparison circuit outputs a comparison signal with a high level.

[0098] Then when no external battery pack is incorporated, the first input terminals of the N comparison circuits are all connected to the second power supply VDD. The voltage of the second power supply VDD is greater than any one of the reference voltages, so the N comparison circuits all output comparison signals with a low level, determining that no external battery pack is incorporated.

[0099] When one external battery pack is incorporated, the resistor R 1A and the second reference resistor R 01 divide the voltage of the second power supply VDD to obtain a second voltage-dividing signal. The voltage of the second voltage-dividing signal is Vin1. Among them, Vin1 is transmitted to the first input terminals of the N comparison circuits, and Vref N-1 <Vin1 < Vref N, the Nth comparison circuit outputs a comparison signal with a high level, and other comparison circuits output comparison signals with a low level, then it is determined that the number of externally connected battery packs is one.

[0100] When two externally connected battery packs are incorporated, resistor R 1A , resistor R 2A and the second reference resistor R 01 divide the second power supply VDD to obtain a second divided voltage signal, and the voltage of the second divided voltage signal is Vin2. Among them, Vin2 is transmitted to the first input terminal of N comparison circuits, and Vref N-2 <Vin2<Vref N-1 , the Nth comparison circuit outputs a comparison signal with a high level, the N - 1th comparison circuit outputs a comparison signal with a high level, and other comparison circuits output comparison signals with a low level, then it is determined that the number of externally connected battery packs is two.

[0101] And so on, when N externally connected battery packs are incorporated, resistor R 1A to resistor R N and the second reference resistor R 01 divide the second power supply VDD to obtain a second divided voltage signal, and the voltage of the second divided voltage signal is Vin N , among them, Vin N is transmitted to the first input terminal of N comparison circuits, and Vin N <Vref1, then the first comparison circuit outputs a comparison signal with a high level, the second comparison circuit outputs a comparison signal with a high level, and so on, the Nth comparison circuit also outputs a comparison signal with a high level, then it is determined that the number of externally connected battery packs is N.

[0102] For another example, if the values of the reference voltages decrease in sequence, that is, Vref N <Vref N-1 <...<Vref1, and when the voltage at the first input terminal of the comparison circuit is less than the voltage at its second input terminal, the comparison circuit outputs a comparison signal with a high level.

[0103] When no externally connected battery pack is incorporated, the first input terminals of N comparison circuits are all connected to the second power supply VDD, and the voltage of the second power supply VDD is greater than any reference voltage, then N comparison circuits all output comparison signals with a low level, and it is determined that no externally connected battery pack is incorporated.

[0104] When one externally connected battery pack is incorporated, resistor R 1A and the second reference resistor R 01The second power supply VDD is divided in voltage to obtain a second divided voltage signal. The voltage of the second divided voltage signal is Vin1. Among them, Vin1 is transmitted to the first input ends of N comparison circuits, and Vref2 < Vin1 < Vref1. Then the first comparison circuit outputs a comparison signal with a high level, and the other comparison circuits output comparison signals with a low level. Then it is determined that the number of externally connected battery packs is one.

[0105] When two externally connected battery packs are incorporated, resistor R 1A , resistor R 2A and the second reference resistor R 01 divide the second power supply VDD in voltage to obtain a second divided voltage signal. The voltage of the second divided voltage signal is Vin2. Among them, Vin2 is transmitted to the first input ends of N comparison circuits, and Vref3 < Vin2 < Vref2. Then the first comparison circuit outputs a comparison signal with a high level, the second comparison circuit outputs a comparison signal with a high level, and the other comparison circuits output comparison signals with a low level. Then it is determined that the number of externally connected battery packs is two.

[0106] And so on. When N externally connected battery packs are incorporated, resistors R 1A to resistor R N and the second reference resistor R 01 divide the second power supply VDD in voltage to obtain a second divided voltage signal. The voltage of the second divided voltage signal is Vin N , among which, Vin N is transmitted to the first input ends of N comparison circuits, and Vin N < Vref N . Then the first comparison circuit outputs a comparison signal with a high level, the second comparison circuit outputs a comparison signal with a high level, and so on. The Nth comparison circuit also outputs a comparison signal with a high level. Then it is determined that the number of externally connected battery packs is N.

[0107] Also, for example, if the values of the reference voltages increase in sequence, that is, Vref1 < Vref2 <... < Vref N , and when the voltage at the first input end of the comparison circuit is greater than the voltage at its second input end, the comparison circuit outputs a comparison signal with a high level.

[0108] Then when no externally connected battery pack is incorporated, the first input ends of N comparison circuits are all incorporated into the second power supply VDD. The voltage of the second power supply VDD is greater than any one of the reference voltages. Then N comparison circuits all output comparison signals with a high level, and it is determined that no externally connected battery pack is incorporated.

[0109] When one externally connected battery pack is incorporated, resistor R 1A and the second reference resistor R 01The second power supply VDD is divided in voltage to obtain a second divided voltage signal, and the voltage of the second divided voltage signal is Vin1. Among them, Vin1 is transmitted to the first input ends of N comparison circuits, and Vref N-1 <Vin1 < Vref N , then the Nth comparison circuit outputs a comparison signal with a low level, and other comparison circuits output comparison signals with a high level, then it is determined that the number of externally connected battery packs is one.

[0110] And so on, when N externally connected battery packs are incorporated, resistor R 1A to resistor R N and the second reference resistor R 01 divide the second power supply VDD in voltage to obtain a second divided voltage signal, and the voltage of the second divided voltage signal is Vin N , among which, Vin N is transmitted to the first input ends of N comparison circuits, and Vin N < Vref1, then the first to the Nth comparison circuits all output comparison signals with a low level, then it is determined that the number of externally connected battery packs is N.

[0111] For another example, if the values of the reference voltages decrease in sequence, that is, Vref N <Vref N-1 <...<Vref1, and when the voltage at the first input end of the comparison circuit is greater than the voltage at its second input end, the comparison circuit outputs a comparison signal with a high level.

[0112] When no externally connected battery pack is incorporated, the first input ends of N comparison circuits are all incorporated into the second power supply VDD, and the voltage of the second power supply VDD is greater than any one of the reference voltages, then N comparison circuits all output comparison signals with a high level, and it is determined that no externally connected battery pack is incorporated.

[0113] When one externally connected battery pack is incorporated, resistor R 1A and the second reference resistor R 01 divide the second power supply VDD in voltage to obtain a second divided voltage signal, and the voltage of the second divided voltage signal is Vin1. Among them, Vin1 is transmitted to the first input ends of N comparison circuits, and Vref2<Vin1 < Vref1, then the first comparison circuit outputs a comparison signal with a low level, and other comparison circuits output comparison signals with a high level, then it is determined that the number of externally connected battery packs is one.

[0114] And so on, when N externally connected battery packs are incorporated, resistor R 1A to resistor R N and the second reference resistor R 01 divide the second power supply VDD in voltage to obtain a second divided voltage signal, and the voltage of the second divided voltage signal is Vin N , among which, VinN is transmitted to the first input ends of N comparison circuits, and Vin N < Vref N , then the comparison signals output by the first to the Nth comparison circuits are all low-level signals, and it is determined that the number of externally connected battery packs is N.

[0115] In some embodiments, the second reference resistor R 01 and the N comparison circuits 21 are both provided in the host. When an externally connected battery pack is incorporated, the externally connected battery pack is connected in parallel with the host through a connector. The matching resistor in the externally connected battery pack is connected to the second end of the second reference resistor R 01 in the host. When multiple externally connected battery packs are incorporated, the multiple externally connected battery packs are connected in parallel through a connector and then connected in parallel with the host through the connector. The matching resistors in each externally connected battery pack form a parallel voltage dividing module and are then connected to the second end of the second reference resistor R 01 .

[0116] In some embodiments, in order to make the circuit design simpler, the resistance values of the N matching resistors can be set to the same value, that is, the resistance values of resistor R 1A to resistor R iA are all the same, so that each time an externally connected battery pack is incorporated, the voltage of the second voltage dividing signal changes.

[0117] The output ends of the N comparison circuits are respectively connected to the controller 30. For example: the output end of the first comparison circuit is electrically connected to the first pin of the controller 30, the output end of the second comparison circuit is electrically connected to the second pin of the controller 30, and so on. The output end of the Nth comparison circuit is electrically connected to the Nth pin of the controller 30.

[0118] The controller 30 analyzes the N comparison signals to obtain an identification result. For example: if the values of the reference voltages increase in sequence, that is, Vref1 < Vref2 <... < Vref N , and when the voltage at the first input end of the comparison circuit is less than the voltage at its second input end, the comparison circuit outputs a high-level comparison signal.

[0119] If low-level comparison signals are received at all the first to Nth pins of the controller 30, it is determined that no battery pack is incorporated.

[0120] If a high-level comparison signal is received at the Nth pin of the controller 30 and low-level comparison signals are received at all the first to (N - 1)th pins of the controller 30, it is determined that the number of externally connected battery packs is one.

[0121] If the Nth pin of the controller 30 receives a high-level comparison signal, the (N - 1)th pin of the controller 30 receives a high-level comparison signal, and the first pin to the (N - 2)th pin of the controller 30 all receive low-level comparison signals, it is determined that the number of externally connected battery packs is two.

[0122] If the first pin to the Nth pin of the controller 30 all receive high-level comparison signals, it is determined that the number of externally connected battery packs is N.

[0123] For another example, if the values of the reference voltages decrease in sequence, i.e., Vref N <Vref N-1 <...<Vref1, and when the voltage at the first input terminal of the comparison circuit is less than the voltage at its second input terminal, the comparison circuit outputs a high-level comparison signal.

[0124] If the controller 30 receives N low-level comparison signals, it is determined that no externally connected battery pack is incorporated.

[0125] If the first pin of the controller 30 receives a high-level comparison signal, and the second pin to the Nth pin of the controller 30 all receive low-level comparison signals, it is determined that the number of externally connected battery packs is one.

[0126] If the first pin of the controller 30 receives a high-level comparison signal, the second pin of the controller 30 receives a high-level comparison signal, and the third pin to the Nth pin of the controller 30 all receive low-level comparison signals, it is determined that the number of externally connected battery packs is two.

[0127] If the first pin to the Nth pin of the controller 30 all receive high-level comparison signals, it is determined that the number of externally connected battery packs is N.

[0128] For another example, if the values of the reference voltages increase in sequence, i.e., Vref1<Vref2<...<Vref N , and when the voltage at the first input terminal of the comparison circuit is greater than the voltage at its second input terminal, the comparison circuit outputs a high-level comparison signal.

[0129] If the controller 30 receives N high-level comparison signals, it is determined that no externally connected battery pack is incorporated.

[0130] If the first pin to the (N - 1)th pin of the controller 30 all receive high-level comparison signals, and the Nth pin of the controller 30 receives a low-level comparison signal, it is determined that the number of externally connected battery packs is one.

[0131] If the comparison signals received by the first pin to the Nth pin of the controller 30 are all low-level signals, it is determined that the number of externally connected battery packs is N.

[0132] For another example, if the values of the reference voltages decrease successively, i.e., Vref N <Vref N-1 <...<Vref1, and when the voltage at the first input terminal of the comparison circuit is greater than the voltage at its second input terminal, the comparison circuit outputs a high-level comparison signal.

[0133] If the controller 30 receives N high-level comparison signals, it is determined that no externally connected battery pack is incorporated.

[0134] If the first pin of the controller 30 receives a low-level comparison signal and the second pin to the Nth pin of the controller 30 receive high-level comparison signals, it is determined that the number of externally connected battery packs is one.

[0135] If the comparison signals received by the first pin to the Nth pin of the controller 30 are all low-level signals, it is determined that the number of externally connected battery packs is N.

[0136] In some embodiments, the controller 30 may be a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), a single-chip microcomputer, an ARM (Acorn RiASC Machine), or other programmable logic devices, discrete gate or transistor logic, discrete hardware components, or any combination of these components. Additionally, the controller 30 may also be any conventional processor, controller, microcontroller, or state machine. The controller 30 may also be implemented as a combination of computing devices, for example, a combination of a DSP and a microprocessor, multiple microprocessors, one or more microprocessors in combination with a DSP and / or any other such configuration. The controller 30 may also be the battery management unit of a host.

[0137] Please refer to Figure 5 , Figure 5 which is a schematic diagram of the circuit structure of a quantity recognition circuit provided by an embodiment of the present application. As Figure 5 shown, the comparison circuit 21 in the quantity recognition circuit 20 includes a comparator, a first voltage-dividing resistor, and a second voltage-dividing resistor. Among them, the first end of the first voltage-dividing resistor is electrically connected to the first end of the second voltage-dividing resistor and the second input terminal of the comparator respectively. The second end of the first voltage-dividing resistor is used to connect to the third power supply VCC. The second end of the second voltage-dividing resistor is grounded to GND. The first voltage-dividing resistor and the second voltage-dividing resistor divide the third power supply VCC to obtain a reference voltage. The first input terminal of the comparator is used to connect to the second voltage-dividing signal, and the second input terminal of the comparator is used to connect to the corresponding reference voltage.

[0138] As Figure 5 shown, if the number of comparison circuits is N, then the number of first voltage-dividing resistors is N, the number of second voltage-dividing resistors is N. The first comparison circuit includes a comparator U1, a first voltage-dividing resistor R 11 and a second voltage-dividing resistor R 21 . The second comparison circuit includes a comparator U2, a first voltage-dividing resistor R 12 and a second voltage-dividing resistor R 22 . The third comparison circuit includes a comparator U3, a first voltage-dividing resistor R 13 and a second voltage-dividing resistor R 23 . And so on, the Nth comparison circuit includes a comparator U N , a first voltage-dividing resistor R 1N and a second voltage-dividing resistor R 2N .

[0139] Moreover, the first voltage-dividing resistor R 11 and the second voltage-dividing resistor R 21 divide the third power supply VCC to obtain a first reference voltage Vref1, that is, Vref1 = VCC × R 21 / (R 11 +R 21 ). The first voltage-dividing resistor R 12 and the second voltage-dividing resistor R 22 divide the third power supply VCC to obtain a second reference voltage Vref2, that is, Vref2 = VCC × R 22 / (R 12 +R 22 ). The first voltage-dividing resistor R 13 and the second voltage-dividing resistor R 23 divide the third power supply VCC to obtain a third reference voltage Vref3, that is, Vref3 = VCC × R 23 / (R 13 +R 23 ). And so on, the first voltage-dividing resistor R 1N and the second voltage-dividing resistor R 2N divide the third power supply VCC to obtain a third reference voltage Vref N , that is, Vref N =VCC × R 2N / (R 1N +R 2N ).

[0140] If the voltages of the reference voltages increase in sequence, that is, Vref1 < Vref2 <... < Vref N , Vref1 = VCC × R 21 / (R 11 +R21 ) <Vref2 = VCC × R 22 / (R 12 + R 22 ) <... <Vref N = VCC × R 2N / (R 1N + R 2N ), then R 21 / (R 11 + R 21 ) <R 22 / (R 12 + R 22 ) <... <R 2N / (R 1N + R 2N ), and at the same time, the second power supply VDD is greater than the maximum value in the reference voltage, then VDD > Vref N = VCC × R 2N / (R 1N + R 2N ), that is, VDD > VCC × R 2N / (R 1N + R 2N ).

[0141] If the values of the reference voltage decrease successively, that is, Vref N < Vref N-1 <... <Vref1, Vref N = VCC × R 2N / (R 1N + R 2N ) <Vref N-1 = VCC × R 2(N-1) / (R 1(N-1) + R 2(N-1) ) <... <Vref1 = VCC × R 21 / (R 11 + R 21 ), then R 2N / (R 1N + R 2N ) <R 2(N-1) / (R 1(N-1) + R 2(N-1) ) <... <R 21 / (R 11 + R 21 ), and at the same time, the voltage of the second power supply VDD is greater than the maximum value in the reference voltage, then VDD > Vref1 = VCC × R 21 / (R 11 + R 21 ), that is, VDD > VCC × R 21 / (R 11 + R21 )。

[0142] Thus, by configuring the proportional relationship between the first voltage-dividing resistor and the second voltage-dividing resistor in each comparison circuit, the voltage of the reference voltage can be made to satisfy the constraint conditions of increasing or decreasing in sequence.

[0143] When i external battery packs are incorporated into the host, the i matching resistors are connected in parallel, and then connected to the second terminal of the second reference resistor R 01 to generate a second voltage-dividing signal at the second terminal of the second reference resistor R 01 . The resistance values of each matching resistor are the same. If the resistance value of each matching resistor is R, the voltage of the second voltage-dividing signal is: Vin i = R / (R + i × R 01 )(13) where Vin i is the voltage of the second voltage-dividing signal when i external battery packs are incorporated into the host, R is the resistance value of the matching resistor, and R 01 is the resistance value of the second reference resistor R 01 , and i is a positive integer from 0 to N.

[0144] In order to be able to identify the number of external battery packs by comparing the level states of the signals, each time an external battery pack is connected, the level states of the N comparison signals need to change bit by bit. If the voltage of the reference voltage is gradually increasing, the voltage of the second voltage-dividing signal and the voltages of each reference voltage need to satisfy the following first constraint condition: When i = 0, Vin0 = VDD > Vref N , when i is a positive integer from 1 to N - 1, Vref N-i <Vin i < Vref N-i+1 , when i = N, Vin N < Vref1. Where VDD is the voltage of the second power supply, Vin i is the voltage of the second voltage-dividing signal when i external battery packs are incorporated into the host, and Vref i is the voltage of the i-th reference voltage.

[0145] Correspondingly, the first voltage-dividing resistor and the second voltage-dividing resistor satisfy the third constraint condition: When i = 0, Vin0 = VDD > VCC × R 2N / (R 1N + R 2N ), when i is a positive integer from 1 to N - 1, VCC × R 2(N-i) / (R 1(N-i) + R 2(N-i) )<Vin i<VCC×R 2(N-i+1) / (R 1(N-i+1) +R 2(N-i+1) ), if i is N, Vin N <VCC×R 21 / (R 11 +R 21 ).

[0146] Among them, VCC is the voltage of the third power supply, and R 1i is the first voltage-dividing resistor in the i-th comparison circuit, and R 2i is the second voltage-dividing resistor in the i-th comparison circuit.

[0147] Similarly, if the reference voltage is gradually decreasing, the voltage of the second voltage-dividing signal and the voltages of each reference voltage need to satisfy the second constraint condition: If i is 0, Vin0 = VDD > Vref1. If i is a positive integer from 1 to N - 1, Vref i+1 <Vin i <Vref i , if i is N, Vin N <Vref N .

[0148] Correspondingly, the first voltage-dividing resistor and the second voltage-dividing resistor satisfy the fourth constraint condition: If i is 0, Vin0 = VDD > VCC×R 21 / (R 11 +R 21 ), if i is a positive integer from 1 to N - 1, VCC×R 2(i+1) / (R 1(i+1) +R 2(i+1) ) < Vin i <VCC×R 2i / (R 1i +R 2i ), if i is N, Vin N <VCC×R 2N / (R 1N +R 2N ).

[0149] Thus, by designing the magnitude relationship between the first voltage-dividing resistor and the second voltage-dividing resistor, the voltages of N reference voltages satisfy an increasing or decreasing relationship in sequence, and the voltage of each second voltage-dividing signal satisfies the above first constraint relationship or third constraint relationship.

[0150] In some embodiments, as Figure 5 shown, the inverting input terminal of the comparator is the first input terminal of the comparator, and the non-inverting input terminal of the comparator is the second input terminal of the comparator.

[0151] The comparison circuit further includes a pull-up resistor R', which is connected in series between the third power supply VCC and the output terminal of the comparator. The pull-up resistor R' is an open-drain pull-up resistor of the comparator, which enables the comparator to output a high level.

[0152] Taking N as 4 as an example, the working principle of the quantity recognition circuit 20 is described. As Figure 6 shown, the inverting input terminal of the comparator is the first input terminal of the comparator, the non-inverting input terminal of the comparator is the second input terminal of the comparator, and the comparison signal output by the first comparator is Vout1, the comparison signal output by the second comparator is Vout2, the comparison signal output by the third comparator is Vout3, and the comparison signal output by the fourth comparator is Vout4.

[0153] If the voltage of the reference voltage is gradually increasing, that is, Vref1 < Vref2 < Vref3 < Vref4, and Vref1 = 2.7V, Vref2 = 3.5V, Vref3 = 5.0V, Vref4 = 9.0V, VDD = 12.0V.

[0154] When no external battery pack is incorporated into the host, i is 0, then the voltage of the second divided voltage signal is Vin0 = VDD, VDD > Vref4, so all four comparators output low-level comparison signals.

[0155] When one external battery pack is incorporated into the host, i is 1, then the voltage of the second divided voltage signal is Vin1 = R / (R + 1×R 01 ) = 6.0V, Vref3 < Vin1 < Vref4, so the comparison signal Vout1 output by the first comparator U1 is a high-level signal, and the other comparators output low-level signals.

[0156] When two external battery packs are incorporated into the host, i is 2, then the voltage of the second divided voltage signal is Vin2 = R / (R + 2×R 01 ) = 4.0V, Vref2 < Vin2 < Vref3, so the comparison signals Vout1 and Vout2 output by the first comparator U1 and the second comparator U2 are both high-level signals, and the other comparators output low-level signals.

[0157] When three external battery packs are incorporated into the host, i is 3, then the voltage of the second divided voltage signal is Vin3 = R / (R + 3×R 01 ) = 3.0V, Vref1 < Vin3 < Vref2, so the comparison signals Vout1, Vout2, and Vout3 output by the first comparator U1, the second comparator U2, and the third comparator U3 are all high-level signals, and the fourth comparator outputs a low-level signal.

[0158] When four external battery packs are incorporated into the host, i = 4, and the voltage of the second voltage-dividing signal is Vin4 = R / (R + 4×R 01 ) = 2.4V. Since Vin4 < Vref1, the comparison signals Vout1, Vout2, Vout3, and Vout4 output by the four comparators are all high-level signals.

[0159] The determination relation comparison table of the quantity recognition circuit 20 can be as shown in Table 1: Table 1 Determination relation comparison table of the quantity recognition circuit 20

[0160] Thus, based on the level states of the four comparison signals, the controller 30 can identify the quantity of the external battery packs.

[0161] In some embodiments, if the voltage of the reference voltage decreases gradually, i.e., Vref4 < Vref3 < Vref2 < Vref1, and Vref4 = 2.7V, Vref3 = 3.5V, Vref2 = 5.0V, Vref1 = 9.0V, and VDD = 12.0V.

[0162] Then the working principle of the quantity recognition circuit 20 is similar to that of the above embodiment and will not be elaborated here. The determination relation comparison table of the quantity recognition circuit 20 can be as shown in Table 2: Table 2 Determination relation comparison table of the quantity recognition circuit 20

[0163] Thus, the controller 30 can determine the quantity of the external battery packs according to the level states of the four comparison signals. The controller 30 identifies that the quantity of the external battery packs is 4, and then inversely calculates the measurement resistance value R of the coding resistor R 1B from the voltages of the four first voltage-dividing signals, the measurement resistance value R of the coding resistor R m1 , the measurement resistance value R of the coding resistor R 2B , the measurement resistance value R of the coding resistor R m2 , the measurement resistance value R of the coding resistor R 3B , the measurement resistance value R of the coding resistor R m3 , and the measurement resistance value R of the coding resistor R 4B . Then, the target ideal resistor matching the measurement resistance value R m4 is determined from the mapping relation set, and the type parameter of the first external battery pack corresponding to the target ideal resistor is obtained. The target ideal resistor matching the measurement resistance value R m1 is determined from the mapping relation set, and the type parameter of the second external battery pack corresponding to the target ideal resistor is obtained. The target ideal resistor matching the measurement resistance value R m2 is determined from the mapping relation set, and the type parameter of the third external battery pack corresponding to the target ideal resistor is obtained. The target ideal resistor matching the measurement resistance value R m3The target ideal resistance that matches it is obtained, and the type parameter of the third external battery pack corresponding to the target ideal resistance is obtained. The one corresponding to the measured resistance value R is determined from the mapping relationship set m4 The target ideal resistance that matches it is obtained, and the type parameter of the fourth external battery pack corresponding to the target ideal resistance is obtained.

[0164] Please refer to Figure 7 , Figure 7 FIG. is a schematic circuit diagram of a quantity recognition circuit 20 provided by an embodiment of the present application Figure 7 and Figure 5 The difference is that the non-inverting input terminal of the comparator is the first input terminal of the comparator, and the inverting input terminal of the comparator is the second input terminal of the comparator. Figure 7 The constraint relationships that each resistor and the reference voltage in need to satisfy are the same as those in Figure 4 and will not be elaborated here.

[0165] Taking N as 4 as an example, the working principle of the quantity recognition circuit 20 is described. As Figure 8 shown, the non-inverting input terminal of the comparator is the first input terminal of the comparator, the inverting input terminal of the comparator is the second input terminal of the comparator, and the comparison signal output by the first comparator is Vout1, the comparison signal output by the second comparator is Vout2, the comparison signal output by the third comparator is Vout3, and the comparison signal output by the fourth comparator is Vout4.

[0166] If the voltage of the reference voltage is gradually increasing, that is, Vref1 < Vref2 < Vref3 < Vref4, and Vref1 = 2.7V, Vref2 = 3.5V, Vref3 = 5.0V, Vref4 = 9.0V, VDD = 12.0V.

[0167] Then when no external battery pack is incorporated into the host, i is 0, and the voltage of the second divided voltage signal is Vin0 = VDD. Since VDD > Vref4, the comparison signals output by all four comparators are high-level signals.

[0168] When one external battery pack is incorporated into the host, i is 1, and the voltage of the second divided voltage signal is Vin1 = R / (R + 1×R 01 ) = 6.0V. Since Vref3 < Vin1 < Vref4, the comparison signals Vout1, Vout2, and Vout3 output by the first comparator U1, the second comparator U2, and the third comparator U3 are all high-level signals, and the comparison signal output by the fourth comparator U4 is a low-level signal.

[0169] When two external battery packs are incorporated into the host, i is 2, and the voltage of the second divided voltage signal is Vin2 = R / (R + 2×R 01If Vref2 < Vin2 < Vref3 and Vref2 = 4.0V, then the comparison signals Vout1 and Vout2 output by the first comparator U1 and the second comparator U2 are both high-level signals, and the output signals of other comparators are low-level signals.

[0170] When three external battery packs are incorporated into the host, i = 3, and the voltage of the second divided voltage signal is Vin3 = R / (R + 3 × R 01 If Vref1 < Vin3 < Vref2 and Vref2 = 3.0V, then the comparison signal Vout1 output by the first comparator U1 is a high-level signal, and the output signals of other comparators are low-level signals.

[0171] When four external battery packs are incorporated into the host, i = 4, and the voltage of the second divided voltage signal is Vin4 = R / (R + 4 × R 01 If Vin4 < Vref1 and Vin4 = 2.4V, then all four comparators output low-level signals.

[0172] Thus, the controller 30 can identify the number of external battery packs according to the level states of the four comparators.

[0173] The determination relation comparison table of the quantity identification circuit 20 can be shown in Table 3 as follows: Table 3 Determination relation comparison table of the quantity identification circuit 20

[0174] In some embodiments, if the reference voltages are gradually decreasing, i.e., Vref4 < Vref3 < Vref2 < Vref1, and Vref4 = 2.7V, Vref3 = 3.5V, Vref2 = 5.0V, Vref1 = 9.0V, and VDD = 12.0V.

[0175] Then the working principle of the quantity identification circuit 20 is similar to that of the above embodiments, which will not be elaborated here, and the determination relation comparison table of the quantity identification circuit 20 can be shown in Table 4 as follows: Table 4 Determination relation comparison table of the quantity identification circuit 20

[0176] Thus, the controller 30 can determine the number of external battery packs according to the level states of the four comparison signals.

[0177] The controller 30 identifies that the number of external battery packs is 4, and then inversely calculates the measurement resistance value R of the coding resistor R from the voltages of the four first divided voltage signals 1B of the measurement resistance value R m1 of the coding resistor R 2B of the measurement resistance value R m2 of the coding resistor R 3BMeasured resistance value R m3 and the encoded resistance R 4B Measured resistance value R m4 , and then determine the target ideal resistance that matches the measured resistance value R m1 , obtain the type parameter of the first external battery pack corresponding to the target ideal resistance, determine the target ideal resistance that matches the measured resistance value R m2 , obtain the type parameter of the second external battery pack corresponding to the target ideal resistance, determine the target ideal resistance that matches the measured resistance value R m3 , obtain the type parameter of the third external battery pack corresponding to the target ideal resistance, determine the target ideal resistance that matches the measured resistance value R m4 , obtain the type parameter of the fourth external battery pack corresponding to the target ideal resistance.

[0178] In summary, when different numbers of external battery packs are incorporated into the host, the level states of the corresponding first identification signals are different, and the controller identifies the number of external battery packs based on different first identification signals. When different types of external battery packs are incorporated into the host, the voltages of the corresponding second identification signals are different, and the controller can identify the type parameters of the external battery packs based on the voltages of the second identification signals. Thus, this parallel-pack identification circuit can identify the number and type of external battery packs incorporated into the host.

[0179] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them; under the idea of the present application, the technical features in the above embodiments or different embodiments can also be combined, and the steps can be implemented in any order, and there are many other variations in different aspects of the present application as described above. For the sake of brevity, they are not provided in detail; although the present application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements for some of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A parallel wrapping recognition circuit, characterized in that, Applied to an energy storage system, the energy storage system includes a host and i external battery packs for connecting to the host. The parallel battery pack identification circuit includes: a quantity identification circuit, a type identification circuit, and a controller; The quantity identification circuit is connected to the controller. The quantity identification circuit is configured to generate a first identification signal in response to the external battery pack being incorporated into the host, wherein the level state of the first identification signal is related to the quantity of the external battery packs; The type identification circuit is connected to the controller. The type identification circuit is configured to generate a second identification signal in response to the external battery pack being incorporated into the host, wherein the voltage of the second identification signal is related to the type of the external battery packs; The controller is configured to calculate the quantity of the external battery packs according to the level state of the first identification signal and identify the type parameters of the external battery packs according to the voltage of the second identification signal.

2. The packet encapsulation recognition circuit according to claim 1, characterized in that, The type identification circuit includes: A first reference resistor disposed in the host, and a first end of the first reference resistor is connected to a first power supply; Coded resistors distributed to the external battery packs, each coded resistor corresponding to one external battery pack, wherein the resistance values of the coded resistors corresponding to different types of external battery packs are different, and a first end of the coded resistor is grounded; Non-inductive control circuits distributed to the external battery packs, each non-inductive control circuit corresponding to one external battery pack; The non-inductive control circuit includes a microcontroller, a radio frequency identification switch, and a radio frequency identification tag. The radio frequency identification tag is configured to receive and identify a radio frequency signal transmitted by the controller. The microcontroller is connected to a control end of the radio frequency identification switch and the radio frequency identification tag. A first end of the radio frequency identification switch is connected to a second end of the coded resistor belonging to the same external battery pack. When the external battery pack is incorporated into the host, a second end of the radio frequency identification switch is connected to a second end of the first reference resistor; The controller is further configured to sequentially transmit radio frequency signals of different frequencies. Each radio frequency identification tag in each external battery pack is configured to respond to the radio frequency signal; each microcontroller is configured to control the radio frequency identification switch to close when the radio frequency identification tag connected thereto responds to the radio frequency signal, so that a second end of the coded resistor belonging to the same external battery pack as the radio frequency identification switch is connected to a second end of the first reference resistor.

3. The parallel battery pack identification circuit according to claim 2, wherein During the sequential closing of the i radio frequency identification switches, when the i-th radio frequency identification switch is closed, a i-th voltage division node is formed at a connection point where the i-th coded resistor is connected in parallel with the previous i - 1 coded resistors and then connected to the first reference resistor, and a i-th first voltage division signal is generated at each of the i voltage division nodes; when the number of the first voltage division signals reaches the quantity of the external battery packs, the controller is further configured to stop transmitting the radio frequency signal, and the i first voltage division signals form the second identification signal.

4. The encapsulation recognition circuit according to claim 3, wherein The controller is configured to identify the type parameters of the external battery pack according to the voltage of the second identification signal, including: When i is 1, determine the measured resistance value of the first coding resistor based on the first voltage division signal, the voltage division principle, and the first reference resistor; When i is greater than 1, determine a first parallel resistor based on the (i - 1)-th first voltage division signal, the voltage division principle, and the first reference resistor, where the first parallel resistor is the total resistance of the parallel connection of the first (i - 1) coding resistors; Determine a second parallel resistor based on the i-th first voltage division signal, the voltage division principle, and the first reference resistor, where the second parallel resistor is the total resistance of the parallel connection of the first i coding resistors; Determine the measured resistance value of the i-th coding resistor based on the first parallel resistor, the second parallel resistor, and the parallel principle; Search for the resistance value in the mapping relationship set to obtain a target ideal resistor and target type parameters, where the target ideal resistor is an ideal resistor that matches the value of the measured resistance value, and the target type parameters are the type parameters of the i-th external battery pack. The mapping relationship set includes the ideal resistors that match the coding resistors and the type parameters of the external battery packs that correspond one-to-one to the ideal resistors.

5. The parallel battery pack identification circuit according to claim 2, wherein: Each microcontroller is further configured to control the radio frequency identification switch to disconnect after a preset time after the radio frequency identification switch is closed, so that the second end of the coding resistor belonging to the same external battery pack as the radio frequency identification switch is disconnected from the second end of the first reference resistor; Wherein, during the sequential closing of the i radio frequency identification switches, when the i-th radio frequency identification switch is closed, a i-th voltage division node is formed at the connection between the i-th coding resistor and the first reference resistor, and a i-th first voltage division signal is generated at the i-th voltage division node. When the number of the first voltage division signals reaches the number of the external battery packs, the controller is configured to stop sending the radio frequency signal, and the i first voltage division signals form the second identification signal.

6. The packet encapsulation recognition circuit according to claim 5, wherein The controller is configured to identify the type parameters of the external battery pack according to the number of the external battery packs and the voltage of the second identification signal, including: Determine the measured resistance value of the i-th coding resistor based on the i-th first voltage division signal, the voltage division principle, and the first reference resistor; Search for the resistance value in the mapping relationship set to obtain a target ideal resistor and target type parameters, where the target ideal resistor is an ideal resistor that matches the value of the measured resistance value, and the target type parameters are the type parameters of the i-th external battery pack. The mapping relationship set includes the ideal resistors that match the coding resistors and the type parameters of the external battery packs that correspond one-to-one to the ideal resistors.

7. The packet encapsulation recognition circuit according to claim 1, wherein The quantity identification circuit includes: i matching resistors, and the i matching resistors respectively belong to the i external battery packs and have the same resistance value; A second reference resistor and N comparison circuits. The first end of the second reference resistor is connected to a second power supply. When i of the external battery packs are incorporated into the host, the i matching resistors are connected in parallel to form a parallel voltage division module. The first end and the second end of the parallel voltage division module are respectively connected to the second end of the second reference resistor and the ground terminal. The first end of the parallel voltage division module obtains a second voltage division signal with respect to the second power supply, and the second voltage division signal is connected to the first input terminal of the N comparison circuits; A reference voltage is connected to the second input terminal of each of the comparison circuits, wherein the values of the N reference voltages are different; The N comparison circuits are configured to output N comparison signals reflecting the number of the external battery packs according to the voltage of the second voltage division signal and the N reference voltages, and the N comparison signals together constitute the first identification signal; Wherein, i is a positive integer from 0 to N, and N is a positive integer greater than or equal to 1.

8. The encapsulation recognition circuit according to claim 7, wherein Each of the comparison circuits includes a first voltage division resistor, a second voltage division resistor, and a comparator; The first end and the second end of the first voltage division resistor are respectively connected to a third power supply and the first end of the second voltage division resistor. The second end of the second voltage division resistor is connected to the ground terminal. The connection between the first voltage division resistor and the second voltage division resistor is connected to the second input terminal of the corresponding comparator. The first voltage division resistor and the second voltage division resistor divide the voltage of the third power supply to obtain the reference voltage, and each reference voltage is connected to the second input terminal of the corresponding comparator; The first input terminal of the comparator is configured to be connected to the second voltage division signal, and the N comparators are configured to output the N comparison signals according to the second voltage division signal and the N reference voltages.

9. The packet encapsulation recognition circuit according to claim 7, wherein When the values of the N reference voltages increase in sequence, the voltage of the second voltage division signal and the N reference voltages satisfy a first constraint condition: When i is 0, Vin0 = VDD > Vref N ; When i is a positive integer from 1 to N - 1, Vref N-i < Vin i < Vref N-i+1 ; When i is N, Vin N < Vref1; When the values of the N reference voltages decrease in sequence, the voltage of the second voltage division signal and the N reference voltages satisfy a second constraint condition: If i = 0, Vin0 = VDD > Vref1; When i is a positive integer from 1 to N - 1, Vref i+1 <Vin i <Vref i ; When i is N, Vin N < Vref N ; Among them, VDD is the voltage of the second power supply, Vin i is the voltage of the second voltage-dividing signal when the i-th external battery pack is incorporated into the host, Vref i is the i-th reference voltage.

10. The packet identification circuit according to any one of claims 2-9, characterized in that, The resistance value of the coding resistor is obtained by performing resistance coding and distribution based on the analog-to-digital sampling range of the controller, including: Determining the maximum resistance value and the minimum resistance value of the coding resistor based on the analog-to-digital sampling range of the controller; Determining a reference resistance value based on the analog-to-digital sampling range of the controller, the voltage of the first power supply, and the resistance value of the first reference resistor; Determining a minimum allowable interval based on the reference resistance value; Based on the minimum allowable interval, dividing the resistance values from the minimum resistance value to the maximum resistance value to obtain the resistance values of several coding resistors, wherein the difference between the resistance values of two adjacent coding resistors is greater than or equal to the minimum allowable interval; Allocating several coding resistors to multiple different types of external battery packs respectively; Wherein, one coding resistor can be a single resistor or formed by multiple resistors connected in parallel.

11. A energy storage system, characterized in that, The energy storage system includes a host, i external battery packs, and a parallel battery pack identification circuit as described in any one of claims 1-10. Each of the external battery packs is connected in parallel with the host, and the parallel battery pack identification circuit is used to identify the number and type parameters of the external battery packs.

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