Signal encryption and decryption method and system based on fractional order memristor neural network

Abstract

The invention provides a signal encryption and decryption method and system based on a fractional order memristor neural network, relates to the technical field of digital signal processing, and aims to solve the problems that the decryption accuracy and stability are influenced due to the adoption of finite time synchronization in the existing signal encryption and decryption technology, and the encryption efficiency is low due to the adoption of integer order to limit the signal encryption security. According to the method, a chaotic signal is acquired through a fractional order memristor neural network model, encryption and decryption are realized by combining random signal preprocessing and chaotic encryption strategies based on predefined time synchronization characteristics of the model, and a random signal and a plaintext signal before synchronization form a mask signal at a sending end according to preset adjustable synchronization time; encrypting the mask signal by using a chaos sequence; at a receiving end, decoding is carried out according to preset synchronization time; therefore, the accuracy and the high efficiency of decryption are ensured. The problems in the prior art are solved, efficient and safe signal encryption and decryption are achieved, and reliable guarantee is provided for communication safety.

Description

Technical Field

[0001] The present invention belongs to the technical field of digital signal processing, and particularly relates to a signal encryption and decryption method and system based on a fractional-order memristive neural network. Background Technique

[0002] The statements in this part only provide background technical information related to the present invention, and do not necessarily constitute prior art.

[0003] The fractional-order memristive neural network combines the variable resistance characteristics of memristors and the powerful modeling ability of fractional-order calculus, and has excellent dynamic characteristics and adaptability. Memristors simulate the connection strength between neurons, enabling high-parallel processing and low energy consumption, and are widely used in fields such as machine learning and image recognition. After introducing fractional-order calculus, the network can more accurately describe the memory effect and nonlinear dynamic behavior of the system, improving the accuracy and robustness of the system. The non-integer-order differential operator of fractional-order calculus enhances the dynamic control ability of the neural network, enabling it to better adapt to complex and changing environments and task requirements.

[0004] Synchronization is a key dynamic behavior in neural networks, referring to the state consistency achieved by multiple nodes through mutual interaction. Synchronization control aims to synchronize multiple dynamic systems (such as neurons) through strategies. Among them, finite-time synchronization is a common control strategy, which can achieve synchronization within a finite time, but is sensitive to initial conditions and vulnerable to parameter changes and external disturbances. At the same time, in a signal encryption and decryption system, finite-time synchronization may affect the decryption accuracy due to initial errors or channel interference. Therefore, a stable and controllable synchronization time is crucial.

[0005] In addition, most of the existing signal encryption and decryption methods use integer orders, while fractional-order encryption and decryption methods are still in the exploratory stage. The key space of integer-order methods is relatively small, which limits the security of signal encryption and at the same time the encryption efficiency is relatively low. Summary of the Invention

[0006] To overcome the deficiencies of the above-mentioned prior art, the present invention provides a signal encryption and decryption method and system based on a fractional-order memristive neural network. By integrating the predefined time synchronization control theory with the fractional-order memristive neural network model, the stability and anti-interference performance of the system are significantly improved, and the reliability and security of signal encryption are effectively enhanced.

[0007] To achieve the above object, one or more embodiments of the present invention provide the following technical solutions:

[0008] The first aspect of the present invention provides a signal encryption and decryption method based on a fractional-order memristive neural network, including:

[0009] At the sending end, a drive system based on a fractional-order memristive neural network model is constructed to obtain the chaotic sequence of the drive system;

[0010] At the receiving end, a response system based on a fractional-order memristive neural network model is constructed to obtain the chaotic sequence of the response system;

[0011] At the sending end, according to the preset adjustable synchronization time, before synchronization, a random signal is used to replace the plaintext signal. After synchronization, the random signal before synchronization and the plaintext signal after synchronization are combined to form a mask signal;

[0012] The chaotic sequence of the drive system is used to encrypt the mask signal to obtain the encrypted ciphertext signal, which is then transmitted to the receiving end;

[0013] At the receiving end, according to the preset adjustable synchronization time, the chaotic sequence of the response system is used to decrypt the ciphertext signal to obtain the restored plaintext signal.

[0014] As an implementation, a fractional-order memristive neural network model is constructed as follows: According to the fractional-order neural network, an activation function with time delay and an activation function without time delay are fused to construct a fractional-order memristive neural network model, where the fractional-order memristive neural network model includes a drive system, a response system, and a synchronization error system.

[0015] As an implementation, the formula for the drive system of the fractional-order memristive neural network model is:

[0016]

[0017] where time t is greater than or equal to 0, k represents the number of neurons in the drive system and the response system, q represents the order of the fractional order, x i (t) represents the state number of the i-th neuron of the drive system at time t, C i represents the self-inhibition rate of the neuron and is a constant; represents the j-th activation function without time delay of the drive system, g j (x j (t - τ ι (t))) represents the j-th activation function with time delay of the drive system, and each activation function satisfies the Lipschitz condition; m represents the number of time delays introduced in the drive system and the response system, τ ι (t) represents the time delay and satisfies 0 ≤ τ ι (t) ≤ 1, I i represents the external input of the drive system; the connection weight value of the memristor is respectively satisfy the following conditions:

[0018]

[0019] Among them, are all constants, N i , is the switching boundary value.

[0020] As an implementation, the response system of the fractional-order memristive neural network model has the formula:

[0021]

[0022] Among them, represents the j-th activation function without time delay of the response system, g j (y j (t - τ ι (t))) represents the j-th activation function with time delay of the response system, and each activation function satisfies the Lipschitz condition; J i represents the external input of the response system, U i (t) represents the designed feedback controller; the connection weight value of the memristor is respectively satisfy the following conditions:

[0023]

[0024] As an implementation, after synchronization, the random signal before synchronization and the plaintext signal after synchronization are combined to form a mask signal, and the formula is:

[0025]

[0026] Among them, M i (t) represents the mask signal, r i (t) represents the random signal, T c represents the synchronization time, m i (t - T c ) represents a delay process of T i seconds for the original signal m c (t).

[0027] As an implementation, the mask signal is encrypted using the chaotic sequence of the drive system. Specifically, the mask signal is added to the corresponding chaotic sequence of the drive system to generate a ciphertext signal.

[0028] As an implementation, according to the preset adjustable synchronization time, the ciphertext signal is decrypted using the chaotic sequence of the response system, and the formula is:

[0029]

[0030] Among them, M i (t) represents the mask signal, r i (t) represents the random signal, Tc Represents the synchronization time, C i (t +

[0031] T c ) represents the ciphertext signal to be decrypted received by the receiving end after the system reaches synchronization. RS(y i (t + Tc represents the chaotic sequence after the response system synchronization, and CH(xi(t + Tc)) represents the chaotic sequence after the drive system synchronization.

[0032] The second aspect of the present invention provides a signal encryption and decryption system based on a fractional-order memristive neural network, including:

[0033] A chaotic sequence acquisition module, which is used at the sending end to construct a drive system based on a fractional-order memristive neural network model and obtain the chaotic sequence of the drive system;

[0034] At the receiving end, construct a response system based on a fractional-order memristive neural network model and obtain the chaotic sequence of the response system;

[0035] An encryption module, which is used at the sending end to, according to a preset adjustable synchronization time, replace the plaintext signal with a random signal before synchronization, and after synchronization, form a mask signal by combining the random signal before synchronization and the plaintext signal after synchronization;

[0036] Use the chaotic sequence of the drive system to encrypt the mask signal to obtain the encrypted ciphertext signal and transmit it to the receiving end;

[0037] A decryption module, which is used at the receiving end to, according to a preset adjustable synchronization time, use the chaotic sequence of the response system to decrypt the ciphertext signal to obtain the restored plaintext signal.

[0038] The third aspect of the present invention provides a computer device, including a memory, a processor, and a program stored on the memory and executable on the processor. When the processor executes the program, the steps in the method described in the first aspect of the present invention are implemented.

[0039] The fourth aspect of the present invention aims to provide a computer-readable storage medium, on which a program is stored. When the program is executed by a processor, the steps in the method described in the first aspect of the present invention are implemented.

[0040] The above one or more technical solutions have the following beneficial effects:

[0041] In this embodiment, based on the predefined time synchronization characteristics of the fractional-order memristive neural network, combined with the random signal preprocessing and chaotic encryption strategy, efficient and secure signal encryption and decryption are achieved, providing a reliable guarantee for communication security.

[0042] In this embodiment, in the signal encryption and decryption system, the predefined time synchronization customizes the synchronization time by the user, ensuring that the upper limit of the synchronization time is independent of the initial conditions. Even affected by noise or parameter changes, the stable decryption of the signal can still be guaranteed, and the security can be improved at a smaller cost, enhancing the system stability and anti-interference ability.

[0043] Advantages of additional aspects of the present invention will be given in part in the following description, become apparent in part from the following description, or be learned through the practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] The accompanying drawings forming a part of this specification are used to provide a further understanding of the present invention. The schematic embodiments and descriptions thereof of the present invention are used to explain the present invention and do not constitute an improper limitation to the present invention.

[0045] Figure 1 Schematic diagram of a signal encryption and decryption method based on a fractional-order memristive neural network for Embodiment 1;

[0046] Figure 2 Flowchart of a signal encryption and decryption method based on a fractional-order memristive neural network for Embodiment 1;

[0047] Figure 3 Plaintext signal diagram for Embodiment 1;

[0048] Figure 4 Mask signal diagram for Embodiment 1;

[0049] Figure 5 Ciphertext signal diagram for Embodiment 1;

[0050] Figure 6 Decryption signal diagram for Embodiment 1;

[0051] Figure 7 Phase diagram of the drive systems x1(t), x2(t) for Embodiment 1;

[0052] Figure 8 Trajectory diagram of the drive systems x1(t), y1(t), x2(t), y2(t) without applying a controller in Embodiment 1;

[0053] Figure 9 Error system e in Embodiment 1 under the control of the synchronization controller i (t) reaches synchronization curve graph, where the synchronization time in the graph is T c = 0.3;

[0054] Figure 10 Error system e in Embodiment 1 under the control of the synchronization controller i(t) Curve graph for achieving synchronization, where the synchronization time in the graph is T c = 1. Detailed implementation manners

[0055] It should be noted that the following detailed description is exemplary and is intended to provide further illustration of the present invention. Unless otherwise specified, all technical and scientific terms used herein have the same meaning as commonly understood by those of ordinary skill in the technical field to which the present invention belongs.

[0056] It should be noted that the terms used herein are only for describing the specific implementation manners and are not intended to limit the exemplary embodiments according to the present invention.

[0057] In the case of no conflict, the embodiments in the present invention and the features in the embodiments can be combined with each other.

[0058] Embodiment 1

[0059] This embodiment discloses a signal encryption and decryption method based on a fractional-order memristive neural network.

[0060] To more clearly elaborate this embodiment, the implementation process of signal encryption and decryption based on a fractional-order memristive neural network can be specifically described as follows:

[0061] A signal encryption and decryption method based on a fractional-order memristive neural network includes:

[0062] S1. At the sending end, construct a drive system based on a fractional-order memristive neural network model, and obtain the chaotic sequence of the drive system;

[0063] At the receiving end, construct a response system based on a fractional-order memristive neural network model, and obtain the chaotic sequence of the response system;

[0064] S2. At the sending end, according to the preset adjustable synchronization time, before synchronization, use a random signal to replace the plaintext signal. After synchronization, form a mask signal with the random signal before synchronization and the plaintext signal after synchronization;

[0065] Use the chaotic sequence of the drive system to encrypt the mask signal to obtain the encrypted ciphertext signal, and transmit it to the receiving end;

[0066] S3. At the receiving end, according to the preset adjustable synchronization time, use the chaotic sequence of the response system to decrypt the ciphertext signal to obtain the restored plaintext signal.

[0067] As Figure 1 , Figure 2 shown, in step S1, at the sending end, construct a drive system based on a fractional-order memristive neural network model, and obtain the chaotic sequence of the drive system;

[0068] At the receiving end, a response system based on a fractional-order memristive neural network model is constructed to obtain the chaotic sequence of the response system.

[0069] Construct a fractional-order memristive neural network model.

[0070] According to the fractional-order neural network, fuse the activation function with time delay and the activation function without time delay to construct a fractional-order memristive neural network model.

[0071] Among them, the fractional-order memristive neural network model includes a drive system x i (t), a response system y i (t), and a synchronization error system e i (t).

[0072] S1-1. Construct the drive system of the fractional-order memristive neural network model.

[0073] In this embodiment, the drive system e of the fractional-order memristive neural network model i (t) is constructed by the formula:

[0074]

[0075] Among them, the time t is greater than or equal to 0, k represents the number of neurons in the drive system and the response system, q represents the order of the fractional order, x i (t) represents the state number of the i-th neuron of the drive system at time t, C i represents the self-inhibition rate of the neuron and is a constant; represents the j-th activation function without time delay of the drive system, g j (x j (t - τ ι (t))) represents the j-th activation function with time delay of the drive system, and each activation function satisfies the Lipschitz condition; m represents the number of time delays introduced in the drive system and the response system, τ ι (t) represents the time delay and satisfies 0 ≤ τ ι (t) ≤ 1, I i represents the external input of the drive system; the connection weight value of the memristor is respectively satisfy the following conditions:

[0076]

[0077] Among them, are all constants, N i , is the switching threshold.

[0078] S1-2. Construct the response system of the fractional-order memristive neural network model.

[0079] In this embodiment, the fractional-order memristive neural network model response system y i (t) is constructed by the formula:

[0080]

[0081] where represents the j-th activation function without time delay of the response system, and g j (y j (t - τ ι (t))) represents the j-th activation function with time delay of the response system. Each activation function satisfies the Lipschitz condition; J i represents the external input of the response system, and U i (t) represents the designed feedback controller; the connection weight value of the memristor is points, respectively satisfying the following conditions:

[0082]

[0083] S1-3. Construct the synchronization error system of the fractional-order memristive neural network model.

[0084] (1) Set the synchronization error between the drive system and the response system.

[0085] According to the drive system x i (t) and the response system y i (t) of the established fractional-order memristive neural network model, set the error between the drive system and the response system as:

[0086] e i (t) = y i (t) - x(t) (3)

[0087] After the above steps, subtract the drive system from the response system to obtain the error system, aiming to transform the synchronization problem of the drive-response system into the problem of studying the stability of the error system.

[0088] (2) Design the feedback controller according to the set error between the systems.

[0089] In this embodiment, 1) adopt the predefined time stability theorem with lower conservatism.

[0090] Let V(·): R n → R be a continuously differentiable, strictly positive definite and radially unbounded function. The time derivative along the system solution trajectory satisfies the corresponding conditions:

[0091]

[0092] where Tc For custom synchronization time, 0 < ω < 1, μ > 1, ψ > 0, Meanwhile, G c needs to satisfy the corresponding constraint conditions, then the system e(t) can achieve predefined-time stability before the critical time T c before, G c The constraint conditions to be satisfied are as follows:

[0093]

[0094] 2) Design a suitable predefined-time synchronization controller, that is, the feedback controller formula is:

[0095]

[0096] where i = 1, 2,..., k, ι = 1, 2,..., m; n1, n2, n3, Θ3 > 0, 0 < Θ1 > 1, Θ2 > 1; sgn(e i (t)) represents the sign function of the synchronization error e i (t); ζ i 、 η i 、G c represent constants that satisfy the control gain; T c represents the custom synchronization time; -η i e i (t) is used to handle the interaction of neurons. The main purpose is to directly suppress the error, and through the negative feedback mechanism, the state of the error system gradually tends to 0; is the time delay and error processing term, which helps the system to make a more comprehensive adjustment according to the historical trend of the error, compensates for the system response lag caused by time delay, and improves the stability and robustness of the system;

[0097] is the error state processing term, which is used to make the error state become 0, and it provides a basic adjustment benchmark.

[0098] Predefined-time synchronization ensures that the upper limit of the synchronization time is independent of the initial conditions by customizing the synchronization time by the user, improving the system stability and anti-interference ability.

[0099] In the signal encryption and decryption system, predefined-time synchronization can complete synchronization within the custom time. Even if affected by noise or parameter changes, the signal can still be stably decrypted. Implementing signal encryption and decryption under the predefined time can improve security at a lower cost.

[0100] 3) Based on the predefined-time stability theorem, prove the predefined-time stability of the error system in combination with the controller.

[0101] In this embodiment, the specific process is as follows:

[0102] The Lyapunov function is constructed as:

[0103]

[0104] Take the derivative of the Lyapunov function in formula (6):

[0105]

[0106] Add the controller, and finally obtain:

[0107]

[0108] Here, n1 = γ, n2 = ν, n3 = θ, Θ1 = ω, Θ2 = μ, Θ3 = ψ.

[0109] According to the predefined-time stability theorem, when G c satisfies certain conditions, the drive-response system can achieve predefined-time synchronization under the action of the controller. When G c the conditions satisfied are:

[0110]

[0111] According to the above formula and the Lyapunov asymptotic stability theorem, it can be known that the synchronization error asymptotically approaches 0, that is, the drive system and the response system can achieve synchronization under the action of the predefined-time synchronization controller.

[0112] (3) Establish a synchronization error system.

[0113] In this embodiment, according to the set synchronization error and combining the specific expressions of the drive system and the response system, a specific synchronization error system is obtained, and the formula is:

[0114]

[0115] Under the action mechanism of the feedback controller U i (t), the response system y i (t) reaches a synchronous state with the drive system x i (t). Subsequently, the chaotic signal generated after the synchronization of the drive system and the response system is acquired.

[0116] Through the above steps, a fractional-order memristive neural network model is successfully constructed, and the predefined-time synchronization of the drive system and the response system is achieved by designing a feedback controller.

[0117] S1-3. At the sending end, construct a drive system \(x(t)\) based on the fractional-order memristive neural network model, and obtain the chaotic sequence \(CH(x(t))\) of the drive system. i (t), and obtain the chaotic sequence \(CH(x i (t)) of the drive system.

[0118] In this embodiment, the order \(q\) of the fractional order is used as the key and introduced into the fractional-order multi-modal memristive neural network model, and then the chaotic sequence \(CH(x i (t)) of the drive system generated after the synchronization time is obtained.

[0119] S1-4. At the receiving end, construct a response system \(y(t)\) based on the fractional-order memristive neural network model, and obtain the chaotic sequence \(RS(y i (t)) of the response system. i (t).

[0120] In the fractional-order memristive neural network model, obtain the chaotic sequence \(RS(y c after the synchronization time \(T\) i (t)) of the response system.

[0121] As Figure 1 、 Figure 2 shown, in step S2, at the sending end, according to the preset adjustable synchronization time, a random signal is used to replace the plaintext signal before synchronization, and after synchronization, the random signal before synchronization and the plaintext signal after synchronization are combined to form a mask signal;

[0122] Use the chaotic sequence \(CH(x i (t)) of the drive system to encrypt the mask signal to obtain the encrypted ciphertext signal, and transmit it to the receiving end.

[0123] In this embodiment, the process of obtaining the encrypted ciphertext signal is as follows:

[0124] 1) Use the order of the fractional order as the key and input it into the drive system of the fractional-order memristive neural network model to obtain the chaotic sequence of the drive system after synchronization.

[0125] 2) According to the preset adjustable synchronization time, a random signal is used to replace the plaintext signal before synchronization, and after synchronization, the random signal before synchronization and the plaintext signal after synchronization are combined to form a mask signal.

[0126] Select the synchronization time \(T\) c , before the synchronization time \(T\) c , introduce the random signal \(r(t)\) i , and when the synchronization time is reached, the plaintext signal \(m(t)\) i is formally introduced.

[0127] The mask signal \(M\) i(t) is composed of the random signal r i (t) before synchronization and the plaintext signal m i (t) after synchronization, and the formula is:

[0128]

[0129] where M i (t) represents the mask signal, r i (t) represents the random signal, T c represents the synchronization time, and m i (t - T c ) represents delaying the original signal m i (t) by T c seconds.

[0130] Among them, the synchronization time T c can be regulated and the user can set it by themselves.

[0131] 3) Encrypt the mask signal using the chaotic sequence of the synchronized drive system to obtain the encrypted ciphertext signal.

[0132] Add the mask signal to the corresponding chaotic sequence CH(x i (t)) of the drive system to generate the ciphertext signal C i (t), and the formula is:

[0133] C i (t) = M i (t) + CH(x i (t))(10).

[0134] 4) Transmit the ciphertext signal C i (t) and the order q of the fractional order through the transmission channel to the receiving end.

[0135] In this embodiment, the fractional order q is used as the encryption key and added to the fractional order neural network model. First, the sender selects the plaintext signal to be encrypted and sets the synchronization time required for predefined synchronization. Before the synchronization time, a random signal is used to replace the plaintext signal to enhance the security of the system. When the synchronization time is reached, the plaintext signal is formally introduced to obtain the mask signal composed of the random signal and the plaintext signal. Subsequently, the mask signal is encrypted using the chaotic signal generated by the drive system. During the encryption process, the mask signal and the corresponding chaotic signal are added for operation, thereby generating the ciphertext signal.

[0136] Through the above steps, the encryption of the plaintext signal is realized, and the encrypted signal can effectively cover the original information and improve the anti - attack ability.

[0137] Such as Figure 1, Figure 2 As shown in Figure 2 , in step S3, at the receiving end, according to the preset adjustable synchronization time, the ciphertext signal is decrypted using the chaotic sequence of the response system to obtain the restored plaintext signal.

[0138] In this embodiment, the process of obtaining the restored plaintext signal is as follows:

[0139] 1) The receiving end obtains the key and the encrypted ciphertext signal.

[0140] 2) According to the key, through the fractional-order memristive neural network model response system, the chaotic sequence RS(y i (t)) of the synchronized response system is obtained.

[0141] In this embodiment, according to the key, using the fractional-order memristive neural network model, the chaotic sequence RS(y c after the synchronization time T i (t)) of the response system is obtained.

[0142] Among them, during the decryption process, the chaotic sequence RS(y i (t)) of the response system is equivalent to the chaotic sequence CH(x i (t)) of the drive system.

[0143] 3) Use the chaotic sequence of the response system to perform an inverse operation on the encrypted ciphertext signal to obtain the plaintext signal.

[0144] In this embodiment, the encrypted ciphertext signal C i (t) is subtracted from the chaotic sequence RS(y i (t)) of the response system to obtain the decrypted plaintext signal The formula is:

[0145]

[0146] Among them, represents the restored plaintext signal, T c represents the synchronization time, C i (t + T c ) represents the ciphertext signal to be decrypted received by the receiving end after the system reaches synchronization. RS(y i (t + T c )) represents the chaotic sequence after the response system is synchronized, and CH(x i (t + T c )) represents the chaotic sequence after the drive system is synchronized.

[0147] In this embodiment, the receiving end obtains the ciphertext signal and the key, and selects the corresponding response system to generate the synchronized chaotic sequence RS(yi (t)); By using the chaotic signal generated by the response system, the original plaintext signal is recovered from the ciphertext signal through inverse operation.

[0148] Through the above steps, the decryption of the ciphertext signal is realized. This decryption process relies on the predefined time synchronization characteristics of the drive system and the response system, thus ensuring the accuracy and efficiency of decryption.

[0149] In this embodiment, a fractional-order memristive neural network model is used to encrypt and decrypt the plaintext signal to be encrypted.

[0150] Specifically, for example, (1) when generating the fractional-order order q = 0.9 as the key, in the drive system of the fractional-order memristive neural network model, when the number of neurons k = 2 and the number of time delays m = 2, the drive system of the fractional-order memristive neural network model is substituted into formula (1) as;

[0151]

[0152] The response system of the fractional-order memristive neural network model is substituted into formula (2) as:

[0153]

[0154] Among them, the parameters, C1 = 0.5, C2 = 1.1; activation function

[0155] g i (x j (t - τ ι (t))) = tanh(x j (t - τ ι (t))),

[0157] τ1(t) = 0.2|sin(t)|, τ2(t) = 0.2, I1 = 0.9sin(t), I2 = 1.3sin(t), x(0) = [0.1, -0.4]T, J1 = 0.5sin(t), J2 = 0.6sin(t), y(0) = [1.2, -0.9] T .

[0158]

[0159] The controller parameters are:

[0160] η1 = 3.3, η2 = 3, n1 = 0, n2 = 2, n3 = 1.5, G c = 1.06, T c =

[0161] 1, ζ1 = ζ2 = 6, Θ1 = 0.1, Θ2 = 2.5, Θ3 = 2,

[0162] Substitute the controller parameters into formula (5) to obtain the current controller as follows:

[0163]

[0164] (2) According to the predefined-time stability theorem, under the action of the controller, the drive-response system can achieve predefined-time synchronization under the constraint of G within time T c time: c constraint:

[0165]

[0166] (3) The plaintext signal to be encrypted is as shown in Figure 3 . Intercept the chaotic sequences CH(x1(t)) and CH(x2(t)) of the drive system after the synchronization time T c :

[0167] Combine the plaintext signal with a random signal to generate a mask signal, as shown in Figure 4 , to increase complexity;

[0168] Use the chaotic sequences CH(x1(t)) and CH(x2(t)) to encrypt the mask signal and generate a ciphertext signal, as shown in Figure 5 .

[0169] (4) Obtain the ciphertext signal and the key, substitute the key into the drive-response system, and intercept the chaotic sequences RS(y1(t)) and RS(y2(t)) of the response system after the synchronization time T c :

[0170] Use the chaotic sequences RS(y1(t)) and RS(y2(t)) to perform an inverse operation on the encrypted ciphertext signal to decrypt the plaintext signal, as shown in Figure 6 .

[0171] (5) Perform numerical simulation operations on the parameters given in the above example. Among them, Figure 7 the phase diagram of the drive system is shown. By observing and analyzing this diagram, it can be found that this system presents a chaotic state.

[0172] Figure 8 The motion trajectories of the drive system and the response system are presented under the condition that no controller is applied. It can be clearly seen from the figure that when there is no controller, these two systems cannot achieve synchronization.

[0173] Figure 9 and Figure 10 As shown, under the condition of applying the controller, the error system can gradually tend to 0 within the predefined time, T c = 0.3 and T c = 1.

[0174] Based on the predefined time synchronization characteristics of the fractional-order memristive neural network model, this embodiment combines random signal preprocessing and chaotic encryption strategies to achieve efficient and secure signal encryption and decryption, providing a reliable guarantee for communication security.

[0175] Embodiment 2

[0176] The purpose of this embodiment is to provide a signal encryption and decryption system based on a fractional-order memristive neural network, including:

[0177] A chaotic sequence acquisition module, which is used at the sending end to construct a drive system based on a fractional-order memristive neural network model and obtain the chaotic sequence of the drive system;

[0178] At the receiving end, construct a response system based on a fractional-order memristive neural network model and obtain the chaotic sequence of the response system;

[0179] An encryption module, which is used at the sending end to, according to the preset adjustable synchronization time, replace the plaintext signal with a random signal before synchronization, and after synchronization, form a mask signal with the random signal before synchronization and the plaintext signal after synchronization;

[0180] Use the chaotic sequence of the drive system to encrypt the mask signal to obtain the encrypted ciphertext signal and transmit it to the receiving end;

[0181] A decryption module, which is used at the receiving end to, according to the preset adjustable synchronization time, use the chaotic sequence of the response system to decrypt the ciphertext signal to obtain the restored plaintext signal.

[0182] Based on providing a signal encryption and decryption system based on a fractional-order memristive neural network, the method steps in Embodiment 1 are implemented.

[0183] Embodiment 3

[0184] The purpose of this embodiment is to provide a computer device, including a memory, a processor, and a computer program stored on the memory and executable on the processor. When the processor executes the program, the steps of the above method are implemented.

[0185] Embodiment 4

[0186] The purpose of this embodiment is to provide a computer-readable storage medium.

[0187] A computer-readable storage medium having a computer program stored thereon, and when the program is executed by a processor, the steps of the above method are executed.

[0188] Embodiment 5

[0189] The purpose of this embodiment is to provide a computer program product containing instructions, which, when running on a computer, enables the computer to execute the methods and functions involved in any one of the above embodiments.

[0190] The steps involved in the devices of the above embodiments correspond to those of Method Embodiment 1. For the specific implementation manners, reference may be made to the relevant description part of Embodiment 1. The term "computer-readable storage medium" should be understood to include a single medium or multiple media containing one or more instruction sets; it should also be understood to include any medium that can store, encode, or carry an instruction set for execution by a processor and enable the processor to execute any method in the present invention.

[0191] Those skilled in the art should understand that the above-mentioned modules or steps of the present invention can be implemented by a general-purpose computer device. Optionally, they can be implemented by program codes executable by a computing device, so that they can be stored in a storage device for execution by the computing device, or they can be separately fabricated into individual integrated circuit modules, or multiple modules or steps among them can be fabricated into a single integrated circuit module for implementation. The present invention is not limited to any specific combination of hardware and software.

[0192] Although the specific implementation manners of the present invention have been described above in conjunction with the accompanying drawings, it is not a limitation to the protection scope of the present invention. Those skilled in the art should understand that based on the technical solutions of the present invention, various modifications or deformations that can be made without creative efforts by those skilled in the art are still within the protection scope of the present invention.

Claims

1. A signal encryption and decryption method based on fractional-order memristor neural network, characterized in that: include: At the transmitting end, a driving system based on a fractional-order memristor neural network model is constructed to obtain the chaotic sequence of the driving system. At the receiving end, a response system based on a fractional-order memristor neural network model is constructed to obtain the chaotic sequence of the response system. At the sending end, according to the preset adjustable synchronization time, a random signal is used to replace the plaintext signal before synchronization, and after synchronization, the random signal before synchronization and the plaintext signal after synchronization are combined into a mask signal; The mask signal is encrypted using a chaotic sequence of the driving system to obtain an encrypted ciphertext signal, and the encrypted ciphertext signal is transmitted to a receiving end; At the receiving end, according to the preset adjustable synchronization time, the chaotic sequence of the response system is used to decrypt the ciphertext signal to obtain the restored plaintext signal.

2. A signal encryption and decryption method based on a fractional-order memristor neural network as claimed in claim 1, characterized in that: A fractional-order memristor neural network model is constructed, specifically: based on the fractional-order neural network, an activation function with a time delay and an activation function without a time delay are integrated to construct a fractional-order memristor neural network model, wherein the fractional-order memristor neural network model includes a drive system, a response system and a synchronization error system.

3. The signal encryption and decryption method based on fractional-order memristor neural network as claimed in claim 1, characterized in that: The driving system of the fractional-order memristor neural network model is as follows: Wherein, time t is greater than or equal to 0, k represents the number of neurons in the driving system and the response system, q represents the order of the fractional order, and x i (t) represents the state number of the i-th neuron of the driving system at time t, C i represents the self-inhibition rate of the neuron, which is a constant; represents the jth activation function of the drive system without delay, g j (x j (t-τ ι (t))) represents the jth activation function with time delay in the drive system, and each activation function satisfies the Lipschitz condition; m represents the number of time delays introduced by the drive system and the response system, τ ι (t) represents the delay and satisfies 0≤τ ι (t)≤1,I i Represents the external input of the driving system; the memristor connection weight value is The following conditions are met respectively: in, are constants, N i , is the switching threshold.

4. The signal encryption and decryption method based on fractional-order memristor neural network as claimed in claim 1, characterized in that: The response system of the fractional-order memristor neural network model is: in, represents the jth activation function of the response system without delay, g j (y j (t-τ ι (t))) represents the jth activation function with time delay of the response system, and each activation function satisfies the Lipschitz condition; J i represents the external input of the response system, U i (t) represents the designed feedback controller; the memristor connection weight value is The following conditions are met respectively:

5. The signal encryption and decryption method based on fractional-order memristor neural network as claimed in claim 1, characterized in that: After synchronization, the random signal before synchronization and the plaintext signal after synchronization are combined into a mask signal, and the formula is: Among them, M i (t) represents the mask signal, r i (t) represents a random signal, T c Indicates synchronization time, m i (tT c ) represents the original signal m i (t)T c Seconds of delay processing.

6. The signal encryption and decryption method based on fractional-order memristor neural network as claimed in claim 1, characterized in that: The mask signal is encrypted using the chaotic sequence of the driving system. Specifically, the mask signal is added to the corresponding chaotic sequence of the driving system to generate a ciphertext signal.

7. The signal encryption and decryption method based on fractional-order memristor neural network as claimed in claim 1, characterized in that: According to the preset adjustable synchronization time, the chaotic sequence of the response system is used to decrypt the ciphertext signal. The formula is: Among them, M i (t) represents the mask signal, r i (t) represents a random signal, T c Indicates synchronization time, C i (t+ T c ) indicates the ciphertext signal to be decrypted received by the receiver after the system reaches synchronization. RS(y i (t+T c )) represents the chaotic sequence after the response system is synchronized, CH(x i (t+T c )) represents the chaotic sequence after the drive system is synchronized.

8. A signal encryption and decryption system based on fractional-order memristor neural network, characterized in that: include: A chaotic sequence acquisition module is used to construct a driving system based on a fractional-order memristor neural network model at the transmitting end to obtain a chaotic sequence of the driving system; At the receiving end, a response system based on a fractional-order memristor neural network model is constructed to obtain the chaotic sequence of the response system. The encryption module is used to replace the plaintext signal with a random signal before synchronization according to a preset adjustable synchronization time at the sending end, and after synchronization, the random signal before synchronization and the plaintext signal after synchronization are combined into a mask signal; The mask signal is encrypted using a chaotic sequence of the driving system to obtain an encrypted ciphertext signal, and the encrypted ciphertext signal is transmitted to a receiving end; The decryption module is used to decrypt the ciphertext signal at the receiving end according to the preset adjustable synchronization time and the chaotic sequence of the response system to obtain the restored plaintext signal.

9. A computer device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein: When the processor executes the program, the steps of the method according to any one of claims 1 to 7 are implemented.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the program is executed by a processor, the steps of the method according to any one of claims 1 to 7 are performed.

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