Fast recovery diode and forming method thereof

Abstract

The invention discloses a fast recovery diode and a forming method thereof. The forming method comprises the following steps: providing a substrate; forming an active region and a plurality of voltage dividing rings in the substrate; forming a plurality of field oxide layers and a plurality of polycrystalline silicon layers on the substrate; forming a first dielectric layer on the substrate, wherein a plurality of contact holes are formed in the first dielectric layer; diffusing platinum atoms in the substrate by adopting platinum diffusion treatment; and performing proton irradiation treatment on the platinum atoms diffused in the substrate, so that the platinum atoms are concentrated at a preset depth in the substrate. Because the vacancy defect induced by proton irradiation in the irradiation area in the proton irradiation treatment has an attraction effect on the platinum atoms, the proton irradiation treatment is carried out on the platinum atoms diffused in the substrate, so that the platinum atoms are concentrated at the preset depth in the substrate, and the precise control on the platinum diffusion depth is realized. In addition, the proton irradiation technology can avoid the situation that the depth of platinum diffusion is controlled by additionally introducing an ion implantation technology, and therefore the defects caused by additionally introducing ion implantation into the substrate can be effectively avoided.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor manufacturing technology, and particularly to a fast recovery diode and a method for forming the same. Background Art

[0002] A fast recovery diode (FRD) is a diode that can conduct and cut off quickly. It is used in cooperation with three-terminal power switching devices such as insulated gate bipolar transistors (IGBTs) and integrated gate-commutated thyristors (IGCTs) to conduct the reactive current in the load, shorten the charging time of the capacitor, and suppress the high voltage induced by the instantaneous reverse of the load current. It is widely used in power electronics and communication devices such as AC-DC converters and pulse width modulators.

[0003] However, there are still many problems with the fast recovery diodes in the prior art. Summary of the Invention

[0004] The technical problem solved by the present invention is to provide a fast recovery diode and a method for forming the same, so as to accurately control the diffusion depth of platinum atoms in the substrate, and at the same time avoid the problem of internal defects in the substrate caused by the introduction of additional ions.

[0005] To solve the above problems, the present invention provides a method for forming a fast recovery diode, including: providing a substrate, the substrate including opposite first and second sides; forming an active region and a plurality of voltage dividing rings sequentially surrounding the active region in the substrate, the active region and the voltage dividing rings having a first ion, and the surface of the active region and the voltage dividing rings being exposed on the first side of the substrate; forming a plurality of field oxide layers on the substrate, the field oxide layers being located on the first side of the substrate; forming a plurality of polysilicon layers on the substrate, the polysilicon layers being located on the first side of the substrate; forming a first dielectric layer on the substrate, the first dielectric layer covering the field oxide layers and the polysilicon layers, and the first dielectric layer having a plurality of contact holes; after forming the first dielectric layer, performing a platinum diffusion treatment to diffuse platinum atoms from the first side to the second side of the substrate in the substrate; forming an anode metal layer after the platinum diffusion treatment, the anode metal layer being located on the first side of the substrate, and the anode metal layer filling the contact holes; forming a buffer layer in the substrate, the surface of the buffer layer being exposed on the second side of the substrate, the buffer layer having a second ion, and the electrical types of the first ion and the second ion being different; forming a cathode metal layer, the cathode metal layer being located on the second side of the substrate, and the cathode metal layer covering the exposed surface of the buffer layer; after forming the cathode metal layer, performing a proton irradiation treatment on the platinum atoms diffused in the substrate to make the platinum atoms concentrate at a preset depth in the substrate.

[0006] Optionally, the method for forming the active region and the voltage dividing ring includes: performing an implantation process of the first ions on the substrate from the first side to the second side of the substrate to form the active region and the voltage dividing ring in the substrate.

[0007] Optionally, the field oxide layer is located between adjacent voltage dividing rings, or between an adjacent active region and the voltage dividing ring.

[0008] Optionally, the polysilicon layer covers a part of the field oxide layer.

[0009] Optionally, a plurality of the contact holes respectively expose partial surfaces of the active region, partial surfaces of the voltage dividing ring, and partial surfaces of the polysilicon layer.

[0010] Optionally, after forming the first dielectric layer and before performing the platinum diffusion process, it further includes: using the first dielectric layer as a mask to perform an implantation process of the first ions on the active region and the voltage dividing ring to form a first heavily doped layer in the active region and the voltage dividing ring.

[0011] Optionally, the method for the platinum diffusion process includes: depositing a platinum material layer using the first dielectric layer as a mask; performing a first annealing process to form metal silicide layers between the platinum material layer and the active region and the voltage dividing ring respectively; after forming the metal silicide layers, removing the platinum material layer using a wet etching process; performing a second annealing process on the metal silicide layers to cause platinum atoms in the metal silicide layers to diffuse in the substrate from the first side to the second side of the substrate.

[0012] Optionally, the temperature range of the second annealing process is: 700°C to 1000°C.

[0013] Optionally, after forming the anode metal layer and before forming the buffer layer, it further includes: forming a second dielectric layer on the substrate, the second dielectric layer is located on the second side, and the second dielectric layer covers a part of the anode metal layer.

[0014] Optionally, the method for forming the buffer layer includes: performing an implantation process of the second ions on the substrate from the second side to the first side of the substrate to form the buffer layer in the substrate.

[0015] Optionally, after forming the buffer layer and before performing the proton irradiation, it further includes: performing an implantation process of the second ions on the buffer layer from the second side to the first side of the substrate to form a second heavily doped layer in the buffer layer.

[0016] Optionally, the energy range of the proton irradiation is: 2 MeV to 12 MeV; the irradiation depth range of the proton irradiation is: 50 μm to 500 μm.

[0017] Correspondingly, the technical solution of the present invention also provides a fast recovery diode, which is formed by using the formation method of the fast recovery diode described in any one of the above technical solutions. The fast recovery diode includes: a substrate, the substrate includes opposite first and second sides; an active region located in the substrate, and a plurality of voltage dividing rings sequentially surrounding the active region. The active region and the voltage dividing rings have first ions, and the surface of the active region and the voltage dividing rings is exposed on the first side of the substrate; a plurality of field oxide layers located on the substrate, the field oxide layers are located on the first side of the substrate; a plurality of polysilicon layers located on the substrate, the polysilicon layers are located on the first side of the substrate; a first dielectric layer located on the substrate, the first dielectric layer covers the field oxide layers and the polysilicon layers, and the first dielectric layer has a plurality of contact holes; an anode metal layer, the anode metal layer is located on the first side of the substrate, and the anode metal layer fills the contact holes; a buffer layer located in the substrate, the surface of the buffer layer is exposed on the second side of the substrate, the buffer layer has second ions, and the electrical types of the first ions and the second ions are different; a cathode metal layer, the cathode metal layer is located on the second side of the substrate, and the cathode metal layer covers the exposed surface of the buffer layer; platinum atoms diffused in the substrate, and the platinum atoms are concentrated at a preset depth in the substrate.

[0018] Optionally, the field oxide layers are located between adjacent voltage dividing rings, or between adjacent active regions and voltage dividing rings.

[0019] Optionally, the polysilicon layers cover part of the field oxide layers.

[0020] Optionally, some of the contact holes respectively expose partial surfaces of the active region, partial surfaces of the voltage dividing rings, and partial surfaces of the polysilicon layers.

[0021] Optionally, it further includes: a first heavily doped layer located in the active region and the voltage dividing rings, and the first heavily doped layer has the first ions.

[0022] Optionally, it further includes: a second dielectric layer located on the substrate, the second dielectric layer is located on the second side, and the second dielectric layer covers part of the anode metal layer.

[0023] Optionally, it further includes: a second heavily doped layer located in the buffer layer, and the second heavily doped layer has the second ions.

[0024] Compared with the prior art, the technical solution of the present invention has the following advantages:

[0025] In the method for forming the fast recovery diode of the technical solution of the present invention, since the vacancy defects induced by proton irradiation (such as helium atoms or hydrogen atoms) on the irradiation region in the proton irradiation treatment have an attracting effect on platinum atoms, by performing proton irradiation treatment on the platinum atoms diffused in the substrate, the platinum atoms are concentrated at a preset depth in the substrate to realize the preparation of a deep platinum doping layer, and thus the precise control of the platinum diffusion depth can be achieved. In addition, the proton irradiation technology can also avoid controlling the platinum diffusion depth by additionally introducing ion implantation technology, and thus can effectively avoid the defects brought by the additional introduction of ion implantation in the substrate.

[0026] Further, after forming the first dielectric layer and before performing the platinum diffusion treatment, it further includes: using the first dielectric layer as a mask, performing implantation treatment of the first ions on the active region and the voltage dividing ring to form a first heavily doped layer in the active region and the voltage dividing ring. By forming the first heavily doped layer, the contact resistance of the active region and the voltage dividing ring can be effectively reduced.

[0027] Further, after forming the buffer layer and before performing the proton irradiation, it further includes: performing implantation treatment of the second ions on the buffer layer from the second side to the first side of the substrate to form a second heavily doped layer in the buffer layer. By forming the second heavily doped layer, the contact resistance of the buffer layer can be effectively reduced.

[0028] In the fast recovery diode of the technical solution of the present invention, since the vacancy defects induced by proton irradiation (such as helium atoms or hydrogen atoms) on the irradiation region in the proton irradiation treatment have an attracting effect on platinum atoms, by performing proton irradiation treatment on the platinum atoms diffused in the substrate, the platinum atoms are concentrated at a preset depth in the substrate to realize the preparation of a deep platinum doping layer, and thus the precise control of the platinum diffusion depth can be achieved. In addition, the proton irradiation technology can also avoid controlling the platinum diffusion depth by additionally introducing ion implantation technology, and thus can effectively avoid the defects brought by the additional introduction of ion implantation in the substrate.

[0029] Further, it further includes: a first heavily doped layer located in the active region and the voltage dividing ring, and the first heavily doped layer contains the first ions. The first heavily doped layer can effectively reduce the contact resistance of the active region and the voltage dividing ring.

[0030] Further, it further includes: a second heavily doped layer located in the buffer layer, and the second heavily doped layer contains the second ions. The second heavily doped layer can effectively reduce the contact resistance of the buffer layer. Description of the Drawings

[0031] Figures 1 to 10 are schematic structural diagrams of each step of the method for forming a fast recovery diode in an embodiment of the present invention. Detailed implementation manners

[0032] As described in the background art, there are many problems with fast recovery diodes in the prior art. Specific descriptions will be given below.

[0033] The life control means of traditional fast recovery diodes mainly rely on electron irradiation, but there are problems such as poor softness of device reverse recovery and large high-temperature leakage current, so it will restrict the entry of power device products into high-end applications. By introducing the life control technology of platinum diffusion, the switching performance of the device is improved, thereby enhancing the comprehensive competitiveness of the device in the power platform. However, in the current platinum diffusion technology, the diffusion depth of platinum atoms in the substrate cannot be accurately controlled.

[0034] On this basis, the present invention provides a fast recovery diode and a method for forming the same. Since the vacancy defects induced by proton irradiation (such as helium atoms or hydrogen atoms) on the irradiation area have an attracting effect on platinum atoms during the proton irradiation treatment, by performing proton irradiation treatment on the platinum atoms diffused in the substrate, the platinum atoms are concentrated at a preset depth in the substrate to achieve the preparation of a deep platinum doping layer, thereby enabling accurate control of the platinum diffusion depth. In addition, the proton irradiation technology can also avoid controlling the depth of platinum diffusion by additionally introducing ion implantation technology, and thus can effectively avoid the defects brought by the additional introduction of ion implantation in the substrate.

[0035] To make the above objects, features, and advantages of the present invention more obvious and understandable, the following will describe the specific embodiments of the present invention in detail with reference to the accompanying drawings.

[0036] Figures 1 to 10 are schematic structural diagrams of each step of the method for forming a fast recovery diode in an embodiment of the present invention.

[0037] Please refer to Figure 1 , provide a substrate 100, and the substrate 100 includes opposite first side 100a and second side 100b.

[0038] In this embodiment, the surface of the first side 100a of the substrate 100 is the top surface of the substrate 100, and the surface of the second side 100b of the substrate 100 is the bottom surface of the substrate 100.

[0039] In this embodiment, the material of the substrate 100 includes a semiconductor material. Specifically, the material of the substrate 100 includes silicon.

[0040] In other embodiments, the material of the substrate may further include silicon carbide, silicon germanium, a multi-element semiconductor material composed of group III-V elements, silicon on insulator (SOI), or germanium on insulator (GOI), etc. Among them, the multi-element semiconductor material composed of group III-V elements includes InP, GaAs, GaP, InAs, InSb, InGaAs, or InGaAsP, etc.

[0041] Please refer to Figure 2 , an active region 101 and a plurality of voltage dividing rings 102 that sequentially surround the active region 101 are formed in the substrate 100. The active region 101 and the voltage dividing rings 102 have first ions, and the first side 100a of the substrate 100 exposes the surfaces of the active region 101 and the voltage dividing rings 102.

[0042] In this embodiment, the forming method of the active region 101 and the voltage dividing rings 102 includes: performing an implantation process of the first ions on the substrate 100 from the first side 100a of the substrate 100 to the second side 100b, and forming the active region 101 and the voltage dividing rings 102 in the substrate 100.

[0043] In this embodiment, the first ions are P-type ions.

[0044] Please refer to Figure 3 , a plurality of field oxide layers 103 are formed on the substrate 100, and the field oxide layers 103 are located on the first side 100a of the substrate 100.

[0045] In this embodiment, the field oxide layers 103 are located between adjacent voltage dividing rings 102, or between adjacent active regions 101 and voltage dividing rings 102.

[0046] Please refer to Figure 4 , a plurality of polysilicon layers 104 are formed on the substrate 100, and the polysilicon layers 104 are located on the first side 100a of the substrate 100.

[0047] In this embodiment, the polysilicon layers 104 cover part of the field oxide layers 103.

[0048] Please refer to Figure 5 , a first dielectric layer 105 is formed on the substrate 100. The first dielectric layer 105 covers the field oxide layers 103 and the polysilicon layers 104, and a plurality of contact holes 106 are formed in the first dielectric layer 105.

[0049] In this embodiment, the plurality of contact holes 106 respectively expose partial surfaces of the active region 101, partial surfaces of the voltage dividing rings 102, and partial surfaces of the polysilicon layers 104.

[0050] In this embodiment, the material of the first dielectric layer 105 includes a low dielectric constant (low-K) material. Specifically, the low dielectric constant material can be a material with a dielectric constant K less than 4, such as silicon dioxide.

[0051] Please continue to refer to Figure 5 , in this embodiment, after forming the first dielectric layer 105, using the first dielectric layer 105 as a mask, the first ion implantation process is performed on the active region 101 and the voltage dividing ring 102, and a first heavily doped layer 107 is formed in the active region 101 and the voltage dividing ring 102. By forming the first heavily doped layer 107, the contact resistance of the active region 101 and the voltage dividing ring 102 can be effectively reduced.

[0052] Please refer to Figure 6 , after forming the first heavily doped layer 107, platinum diffusion treatment is used to diffuse platinum atoms in the substrate 100 from the first side 100a to the second side 100b of the substrate 100.

[0053] In this embodiment, the method of the platinum diffusion treatment includes: depositing a platinum material layer (not shown) using the first dielectric layer 105 as a mask; performing a first annealing treatment to form metal silicide layers (not shown) between the platinum material layer and the active region 101 and the voltage dividing ring 102 respectively; after forming the metal silicide layers, using a wet etching process to remove the platinum material layer; performing a second annealing treatment on the metal silicide layers to make the platinum atoms in the metal silicide layers diffuse in the substrate 100 from the first side 100a to the second side 100b of the substrate 100.

[0054] In this embodiment, the temperature range of the second annealing treatment is: 700°C to 1000°C.

[0055] Please refer to Figure 7 , after the platinum diffusion treatment, an anode metal layer 108 is formed. The anode metal layer 108 is located on the first side 100a of the substrate 100, and the anode metal layer 108 fills the contact hole 106.

[0056] In this embodiment, the material of the anode metal layer 108 is a titanium-nickel-silver alloy or an aluminum-titanium-nickel-silver alloy.

[0057] In this embodiment, the anode metal layer 108 is used to lead out the active region 101, the voltage dividing ring 102, and the polysilicon layer 104.

[0058] Please continue to refer to Figure 7, after forming the anode metal layer 108, a second dielectric layer 109 is formed on the substrate 100. The second dielectric layer 109 is located on the second side 100b, and the second dielectric layer 109 covers a part of the anode metal layer 108.

[0059] In this embodiment, the material of the second dielectric layer 109 includes a low dielectric constant (low-K) material. Specifically, the low dielectric constant material can be a material with a dielectric constant K less than 4, such as silicon dioxide.

[0060] Please refer to Figure 8 , after forming the second dielectric layer 109, a buffer layer 110 is formed in the substrate 100. The surface of the buffer layer 110 is exposed on the second side 100b of the substrate 100. The buffer layer 110 contains second ions, and the electrical types of the first ions and the second ions are different.

[0061] In this embodiment, the method for forming the buffer layer 110 includes: implanting the second ions into the substrate 100 from the second side 100b to the first side 100a of the substrate 100 to form the buffer layer 110 in the substrate 100.

[0062] In this embodiment, the second ions are N-type ions.

[0063] Please continue to refer to Figure 8 , after forming the buffer layer 110, implanting the second ions into the buffer layer 110 from the second side 100b to the first side 100a of the substrate 100 to form a second heavily doped layer 111 in the buffer layer 110. By forming the second heavily doped layer 111, the contact resistance of the buffer layer 110 can be effectively reduced.

[0064] Please refer to Figure 9 , after forming the second heavily doped layer 111, a cathode metal layer 112 is formed. The cathode metal layer 112 is located on the second side 100b of the substrate 100, and the cathode metal layer 112 covers the exposed surface of the buffer layer 110.

[0065] In this embodiment, the material of the cathode metal layer 112 is a titanium-nickel-silver alloy or an aluminum-titanium-nickel-silver alloy.

[0066] In this embodiment, the cathode metal layer 112 is used to lead out the buffer layer 110.

[0067] Please refer to Figure 10 , after forming the cathode metal layer 112, performing proton irradiation on the platinum atoms diffused in the substrate 100 so that the platinum atoms are concentrated at a preset depth in the substrate 100.

[0068] Since the vacancy defects induced by proton irradiation on the irradiation region in the proton irradiation treatment have an attracting effect on platinum atoms (such as helium atoms or hydrogen atoms), platinum atoms diffused in the substrate 100 are subjected to proton irradiation treatment, so that the platinum atoms are concentrated at a preset depth in the substrate 100, thereby realizing the preparation of a deep platinum-doped layer, and further enabling precise control of the platinum diffusion depth. In addition, the proton irradiation technology can also avoid controlling the platinum diffusion depth by additionally introducing ion implantation technology, and thus can effectively avoid the defects brought by the additional introduction of ion implantation in the substrate 100.

[0069] In this embodiment, the energy range of the proton irradiation is: 2 MeV to 12 MeV; the irradiation depth range of the proton irradiation is: 50 μm to 500 μm

[0070] Correspondingly, an embodiment of the present invention also provides a fast recovery diode. Please continue to refer to Figure 10 The fast recovery diode is formed by using the formation method of the fast recovery diode described in any one of the above embodiments. The fast recovery diode includes: a substrate 100, the substrate 100 includes opposite first side 100a and second side 100b; an active region 101 located in the substrate 100, and a plurality of voltage dividing rings 102 sequentially surrounding the active region 101. The active region 101 and the voltage dividing rings 102 have first ions. The first side 100a of the substrate 100 exposes the surfaces of the active region 101 and the voltage dividing rings 102; a plurality of field oxide layers 103 located on the substrate 100, the field oxide layers 103 are located on the first side 100a of the substrate 100; a plurality of polysilicon layers 104 located on the substrate 100, the polysilicon layers 104 are located on the first side 100a of the substrate 100; a first dielectric layer 105 located on the substrate 100, the first dielectric layer 105 covers the field oxide layers 103 and the polysilicon layers 104, and the first dielectric layer 105 has a plurality of contact holes 106; an anode metal layer 108, the anode metal layer 108 is located on the first side 100a of the substrate 100, and the anode metal layer 108 fills the contact holes 106; a buffer layer 110 located in the substrate 100, the second side 100b of the substrate 100 exposes the surface of the buffer layer 110, the buffer layer 110 has second ions, and the electrical types of the first ions and the second ions are different; a cathode metal layer 112, the cathode metal layer 112 is located on the second side 100b of the substrate 100, and the cathode metal layer 112 covers the exposed surface of the buffer layer 110; platinum atoms diffused in the substrate 100, and the platinum atoms are concentrated at a preset depth in the substrate 100.

[0071] Since the vacancy defects induced by proton irradiation on the irradiation area in the proton irradiation treatment have an attracting effect on platinum atoms (such as helium atoms or hydrogen atoms), platinum atoms diffused in the substrate 100 are subjected to proton irradiation treatment, so that the platinum atoms are concentrated at a preset depth in the substrate 100, thereby realizing the preparation of a deep platinum doping layer, and further enabling precise control of the platinum diffusion depth. In addition, the proton irradiation technology can also avoid controlling the platinum diffusion depth by additionally introducing ion implantation technology, and thus can effectively avoid the defects brought by the additional introduction of ion implantation in the substrate 100.

[0072] In this embodiment, the surface of the first side 100a of the substrate 100 is the top surface of the substrate 100, and the surface of the second side 100b of the substrate 100 is the bottom surface of the substrate 100.

[0073] In this embodiment, the material of the substrate 100 includes semiconductor materials. Specifically, the material of the substrate 100 includes silicon.

[0074] In other embodiments, the material of the substrate may also include silicon carbide, silicon germanium, a multi-element semiconductor material composed of group III-V elements, silicon on insulator (SOI), or germanium on insulator (GOI), etc. Among them, the multi-element semiconductor material composed of group III-V elements includes InP, GaAs, GaP, InAs, InSb, InGaAs, or InGaAsP, etc.

[0075] In this embodiment, the first ion is a P-type ion.

[0076] In this embodiment, the material of the first dielectric layer 105 includes a low dielectric constant (low-K) material. Specifically, the low dielectric constant material may be a material with a dielectric constant K less than 4, such as silicon dioxide.

[0077] In this embodiment, the field oxide layer 103 is located between adjacent voltage dividing rings 102, or between adjacent active regions 101 and voltage dividing rings 102.

[0078] In this embodiment, the polysilicon layer 104 covers part of the field oxide layer 103.

[0079] In this embodiment, several contact holes 106 respectively expose partial surfaces of the active region 101, partial surfaces of the voltage dividing ring 102, and partial surfaces of the polysilicon layer 104.

[0080] In this embodiment, the fast recovery diode further includes: a first heavily doped layer 107 located in the active region 101 and the voltage dividing ring 102, and the first ions are present in the first heavily doped layer 107. The first heavily doped layer 107 can effectively reduce the contact resistance between the active region 101 and the voltage dividing ring 102.

[0081] In this embodiment, the material of the anode metal layer 108 is a titanium-nickel-silver alloy or an aluminum-titanium-nickel-silver alloy.

[0082] In this embodiment, the anode metal layer 108 is used to lead out the active region 101, the voltage dividing ring 102, and the polysilicon layer 104.

[0083] In this embodiment, the fast recovery diode further includes: a second dielectric layer 109 located on the substrate 100, the second dielectric layer 109 is located on the second side 100b, and the second dielectric layer 109 covers a part of the anode metal layer 108.

[0084] In this embodiment, the material of the second dielectric layer 109 includes a low dielectric constant (low-K) material. Specifically, the low dielectric constant material can be a material with a dielectric constant K less than 4, such as silicon dioxide.

[0085] In this embodiment, the fast recovery diode further includes: a second heavily doped layer 111 located in the buffer layer 110, and the second ions are present in the second heavily doped layer 111. The second heavily doped layer 111 can effectively reduce the contact resistance of the buffer layer 110.

[0086] In this embodiment, the second ions are N-type ions.

[0087] In this embodiment, the material of the cathode metal layer 112 is a titanium-nickel-silver alloy or an aluminum-titanium-nickel-silver alloy.

[0088] In this embodiment, the cathode metal layer 112 is used to lead out the buffer layer 110.

[0089] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention should be subject to the scope defined by the claims.

Claims

1. A method for forming a fast recovery diode, characterized in that: include: providing a substrate comprising opposing first and second sides; An active region and a plurality of voltage divider rings sequentially surrounding the active region are formed in the substrate, wherein the active region and the voltage divider rings contain first ions, and the first side of the substrate exposes surfaces of the active region and the voltage divider rings; forming a plurality of field oxide layers on the substrate, wherein the field oxide layers are located on a first side of the substrate; forming a plurality of polysilicon layers on the substrate, wherein the polysilicon layers are located on a first side of the substrate; forming a first dielectric layer on the substrate, wherein the first dielectric layer covers the field oxide layer and the polysilicon layer, and has a plurality of contact holes in the first dielectric layer; After forming the first dielectric layer, using platinum diffusion processing to diffuse platinum atoms in the substrate from the first side to the second side of the substrate; forming an anode metal layer after the platinum diffusion process, wherein the anode metal layer is located on the first side of the substrate and fills the contact hole; forming a buffer layer in the substrate, wherein the second side of the substrate exposes a surface of the buffer layer, the buffer layer has second ions, and the first ions and the second ions are of different electrical types; forming a cathode metal layer, wherein the cathode metal layer is located on the second side of the substrate and covers the exposed surface of the buffer layer; After forming the cathode metal layer, the platinum atoms diffused in the substrate are subjected to proton irradiation treatment so that the platinum atoms are concentrated at a preset depth in the substrate.

2. The method for forming a fast recovery diode according to claim 1, wherein: The method for forming the active area and the voltage divider ring comprises: performing a first ion implantation process on the substrate from a first side to a second side of the substrate to form the active area and the voltage divider ring in the substrate.

3. The method for forming a fast recovery diode according to claim 1, wherein: The field oxide layer is located between adjacent voltage divider rings, or between adjacent active regions and voltage divider rings.

4. The method for forming a fast recovery diode according to claim 1, wherein: The polysilicon layer covers a portion of the field oxide layer.

5. The method for forming a fast recovery diode according to claim 1, wherein: The plurality of contact holes respectively expose a portion of the surface of the active region, a portion of the surface of the voltage divider ring, and a portion of the surface of the polysilicon layer.

6. The method for forming a fast recovery diode according to claim 5, characterized in that: After forming the first dielectric layer and before performing the platinum diffusion process, the method further includes: using the first dielectric layer as a mask, performing the first ion implantation process into the active area and the voltage divider ring to form a first heavily doped layer in the active area and the voltage divider ring.

7. The method for forming a fast recovery diode according to claim 1, wherein: The method for platinum diffusion treatment includes: depositing a platinum material layer using the first dielectric layer as a mask; performing a first annealing treatment so that the platinum material layer forms a metal silicide layer with the active area and the voltage divider ring respectively; after forming the metal silicide layer, removing the platinum material layer by a wet etching process; performing a second annealing treatment on the metal silicide layer so that the platinum atoms in the metal silicide layer diffuse in the substrate from the first side of the substrate to the second side.

8. The method for forming a fast recovery diode according to claim 7, wherein: The temperature range of the second annealing treatment is: 700°C~1000°C.

9. The method for forming a fast recovery diode according to claim 1, wherein: After forming the anode metal layer and before forming the buffer layer, the method further includes: forming a second dielectric layer on the substrate, wherein the second dielectric layer is located on the second side and covers a portion of the anode metal layer.

10. The method for forming a fast recovery diode according to claim 1, wherein: The method for forming the buffer layer includes: performing a second ion implantation process on the substrate from the second side of the substrate toward the first side to form the buffer layer in the substrate.

11. The method for forming a fast recovery diode according to claim 1, wherein: After forming the buffer layer and before performing the proton irradiation, the method further includes: implanting the second ions into the buffer layer from the second side of the substrate toward the first side to form a second heavily doped layer in the buffer layer.

12. The method for forming a fast recovery diode according to claim 1, wherein: The energy range of the proton irradiation is 2 mega-electron volts to 12 mega-electron volts; the irradiation depth range of the proton irradiation is 50 microns to 500 microns.

13. A fast recovery diode, characterized in that: The fast recovery diode is formed by the method for forming a fast recovery diode according to any one of claims 1 to 12, and the fast recovery diode comprises: a substrate comprising opposing first and second sides; An active region located in the substrate, and a plurality of voltage divider rings sequentially surrounding the active region, wherein the active region and the voltage divider rings contain first ions, and the first side of the substrate exposes surfaces of the active region and the voltage divider rings; A plurality of field oxide layers located on the substrate, wherein the field oxide layers are located on a first side of the substrate; a plurality of polysilicon layers located on the substrate, the polysilicon layers being located on a first side of the substrate; a first dielectric layer located on the substrate, the first dielectric layer covering the field oxide layer and the polysilicon layer, and having a plurality of contact holes in the first dielectric layer; an anode metal layer, the anode metal layer being located on the first side of the substrate and filling the contact hole; A buffer layer is located in the substrate, the second side of the substrate exposes a surface of the buffer layer, the buffer layer has second ions, and the first ions and the second ions are of different electrical types; a cathode metal layer, the cathode metal layer being located on the second side of the substrate and covering the exposed surface of the buffer layer; Platinum atoms are diffused in the substrate and concentrated at a predetermined depth in the substrate.

14. The fast recovery diode according to claim 13, characterized in that: The field oxide layer is located between adjacent voltage divider rings, or between adjacent active regions and voltage divider rings.

15. The fast recovery diode according to claim 13, characterized in that: The polysilicon layer covers a portion of the field oxide layer.

16. The fast recovery diode according to claim 13, characterized in that: The plurality of contact holes respectively expose a portion of the surface of the active region, a portion of the surface of the voltage divider ring, and a portion of the surface of the polysilicon layer.

17. The fast recovery diode according to claim 13, characterized in that: Also includes: A first heavily doped layer is located in the active region and the voltage divider ring, wherein the first heavily doped layer has the first ions.

18. The fast recovery diode according to claim 13, characterized in that: Also includes: A second dielectric layer is located on the substrate, the second dielectric layer is located on the second side, and the second dielectric layer covers a portion of the anode metal layer.

19. The fast recovery diode according to claim 13, characterized in that: Also includes: A second heavily doped layer is located in the buffer layer, and the second heavily doped layer has the second ions.

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