Groove apex angle rounding structure, rounding method and power semiconductor device

Abstract

The invention belongs to the technical field of power semiconductors, and particularly relates to a groove vertex angle rounding structure, a rounding method and a power semiconductor device. The groove vertex angle rounding structure comprises at least two rounding parts arranged at vertex angles on two sides of a groove; the at least two rounding parts are arranged in a step shape on the vertex angle of the single side of the groove in the depth direction of the groove, electric field concentration is reduced, meanwhile, distribution of an electric field in the vertex angle area is further dispersed, and therefore compared with an existing rounding structure, the rounding structure has the advantages that under the condition that the overall width and height size of the rounding structure are the same, the size of the rounding structure is reduced. The leakage current improvement effect is better, the leakage current is reduced in a scene with large voltage, and the method can be applied to more scenes. Under the same improvement effect, the width and height of the rounded structure can be made smaller, the damage of plasma on the silicon surface on the inner side of the groove is reduced, and the reliability of gate oxide in the groove is improved.

Description

Technical Field

[0001] The present invention belongs to the technical field of power semiconductors, and particularly relates to a trench top corner rounding structure, a rounding method, and a power semiconductor device. Background Art

[0002] There are currently two gate structures for power semiconductor devices IGBT (Insulated Gate Bipolar Transistor), namely planar gate and trench gate. In the manufacturing process of trench gate IGBT, after etching the trench silicon substrate, a trench structure is formed. The angle between the top of the trench structure and the substrate surface (the top corner of the trench) is approximately 90° right angle. This right angle region is prone to causing electric field concentration and generating leakage current, which will have an adverse impact on the performance and yield of power semiconductor devices. Therefore, in the prior art, rounding treatment is performed on the trench top corner to reduce electric field concentration and improve the leakage current problem. Figure 1 This is the current existing rounding structure. However, power semiconductor devices have different requirements for leakage current in different application scenarios. Figure 1 In the existing rounding structure shown, there will still be a situation of relatively large leakage current in the scenario of relatively large voltage, such as in the scenario where the voltage is greater than 50V. If the rounding radian is increased, although the improvement effect can be further enhanced and the leakage current can be reduced in the scenario of relatively large voltage, increasing the rounding radian will increase the plasma damage to the silicon surface inside the trench, thereby affecting the reliability of the gate oxide in the trench. Summary of the Invention

[0003] The technical problem to be solved by the present invention is to provide a trench top corner rounding structure, a rounding method, and a power semiconductor device with good leakage improvement effect and ensuring the reliability of the gate oxide in the trench.

[0004] The present invention provides a trench top corner rounding structure, which includes rounding parts arranged at the top corners on both sides of the trench. There are at least two rounding parts arranged at the top corner on one side of the trench, and the at least two rounding parts are arranged in a stepped manner along the depth direction of the trench at the top corner on one side of the trench.

[0005] Furthermore, the number of rounding parts at the top corner on one side of the trench is two.

[0006] Furthermore, the sizes of all rounding parts at the top corner on one side of the trench in the trench width direction and in the trench depth direction are the same.

[0007] Furthermore, the size of a single said rounding part in the trench width direction and in the trench depth direction is greater than or equal to 5nm.

[0008] Furthermore, the size of a single said rounding part in the trench width direction and in the trench depth direction is less than or equal to 100nm.

[0009] Furthermore, the sum of the dimensions of all the rounded portions at the single-side top corner of the trench in the trench width direction is less than half of the distance between the trench side and the adjacent other trench.

[0010] The present invention also provides a rounding method for a rounded structure of a trench top corner, comprising the following steps: S1. Form an oxide layer on a substrate; S2. Set a photoresist on the oxide layer, and form a photolithography pattern through an exposure and development process; S3. Etch the oxide layer and the substrate on the photolithography pattern to form a trench; S4. Push the photoresist laterally along the width direction of the trench, and etch the area of the oxide layer and the substrate where the trench top corner is located in the area after the photoresist is pushed laterally to form a first rounded portion; S5. Continuously push the photoresist laterally and etch the oxide layer and the trench top corner, and form the next rounded portion at a position higher than the previous rounded portion on the trench top corner, so that at least two rounded portions are formed on the single-side top corner of the trench, and all the rounded portions on the single-side top corner of the trench are arranged in a stepped manner along the depth direction of the trench.

[0011] Furthermore, in the S1, the thickness of the oxide layer is 50 - 1000 Å, and the thickness of the photoresist is 0.5 - 3 μm.

[0012] Furthermore, in the S2, the width of the trench is 0.2 - 2 μm, and the depth is 2 - 30 μm.

[0013] The present invention also provides a power semiconductor device, comprising a substrate, wherein a trench is provided on the substrate, and the top corner of the trench is provided with the above-mentioned rounded structure of the trench top corner.

[0014] The beneficial effects of the present invention are that the rounding structure of the present invention has at least two rounded portions arranged in a stepped manner on the single-side top corner of the trench. The setting of the at least two rounded portions reduces the electric field concentration and further disperses the distribution of the electric field in the top corner region. Compared with the existing rounding structure, when the overall width and height dimensions of the rounding structure are the same, the leakage current improvement effect of the rounding structure provided by the present invention is better. In the scenario with a relatively large voltage, the leakage current is reduced, and more applicable scenarios can be achieved. And under the same improvement effect, the width and height dimensions of the rounding structure of the present invention can be made smaller, reducing the plasma damage to the silicon surface inside the trench and improving the reliability of the gate oxide in the trench. Description of the Drawings

[0015] Figure 1 It is a schematic diagram of an existing rounding structure.

[0016] Figure 2 It is a schematic diagram of the substrate provided by the present invention.

[0017] Figure 3 Schematic diagram of an oxide layer formed on the substrate of the present invention.

[0018] Figure 4 Schematic diagram of a photoresist disposed on the oxide layer of the present invention.

[0019] Figure 5 Schematic diagram after forming a groove on the substrate of the present invention.

[0020] Figure 6 Schematic diagram after forming a rounding structure of the present invention.

[0021] Figure 7 Of the present invention Figure 6 Schematic diagram after removing the photoresist and the oxide layer.

[0022] Figure 8 Of the present invention Figure 7 Schematic diagram of the sizes of two rounding parts of the rounding structure in the present invention.

[0023] Figure 9 IGES turning curve diagram of the double-rounding-part rounding structure and the existing rounding structure of the present invention.

[0024] In the figure: 1. Substrate; 11. Groove; 12. Rounding part; 2. Oxide layer; 3. Photoresist. Detailed implementation manners

[0025] As Figures 2 - 8 shown, the present invention provides a groove top angle rounding structure, which includes rounding parts 12 provided at the top angles on both sides of the groove 11. There are at least two rounding parts 12 provided at the top angle on one side of the groove 11, and the at least two rounding parts 12 are arranged in a stepped manner along the depth direction of the groove 11 at the top angle on one side of the groove 11. Specifically, as Figures 6 - 8 shown, all the rounding parts 12 at the top angle on one side of the groove 11 are arranged in a stepped manner in the direction from the bottom of the groove 11 to the top of the groove 11. A single rounding part 12 is a single step, and all the rounding parts 12 at the top angle on one side of the groove 11 together form the rounding structure of the top angle on this side of the groove 11. At this time, the width dimension of the rounding structure is the sum of the dimensions of all the rounding parts 12 on this side in the width direction of the groove 11, and the height dimension of the rounding structure is the sum of the dimensions of all the rounding parts 12 on this side in the depth direction of the groove 11. Figure 1 In the existing rounding structure shown, its height and width dimensions are respectively the dimension in the depth direction of the rounding structure in the groove 11 and the dimension in the width direction of the groove 11.

[0026] Different from the existing single-rounding structure, the rounding structure of the present invention has at least two rounding portions 12 arranged in a stepped manner on the unilateral top corner of the trench 11. The setting of the at least two rounding portions 12 reduces the electric field concentration and further disperses the electric field distribution in the top corner region, so that the rounding structure provided by the present invention has a better leakage current improvement effect compared with the existing rounding structure as shown in Figure 1 When the overall width and height dimensions of the rounding structure are the same, it can reduce the leakage current in the scenario of relatively large voltage and is applicable to more scenarios. Under the same improvement effect, the width and height dimensions of the rounding structure of the present invention can be made smaller, reducing the plasma damage to the silicon surface inside the trench 11 and improving the reliability of the gate oxide in the trench 11.

[0027] Among them, the sizes of all the rounding portions 12 at the unilateral top corner of the trench 11 are determined according to actual requirements. In the embodiment as shown in Figures 6 - 8 , the sizes of all the rounding portions 12 at the unilateral top corner of the trench 11 in the width direction of the trench 11 and in the depth direction of the trench 11 are the same. In this embodiment, the size of a single rounding portion 12 is not too small to ensure the rounding effect of each rounding portion 12. When the rounding effect can be guaranteed by each single rounding portion 12, the sizes of the rounding portions 12 can also be different.

[0028] All the rounding portions 12 at one top corner of the trench 11 are symmetrically arranged with all the rounding portions 12 at the other top corner of the trench 11 to ensure the same improvement effect on both top corners of the trench 11.

[0029] In the present invention, the size of a single rounding portion 12 in the width direction of the trench 11 and in the height direction of the trench 11 is greater than or equal to 5 nm, avoiding the problems of difficult processing and insufficient rounding effect caused by too small a size. The size of a single rounding portion 12 in the width direction of the trench 11 and in the height direction of the trench 11 is less than or equal to 100 nm, avoiding great plasma damage to the silicon surface inside the trench 11 due to too large a size. And the sum of the sizes of all the rounding portions 12 at the unilateral top corner of the trench 11 in the width direction of the trench 11 is less than half of the distance between the trench 11 and the adjacent other trench 11 on this side, avoiding interfering with the rounding processing of the top corner of the other trench 11.

[0030] Preferably, there are two rounding portions 12 at the unilateral top corner of the trench 11, which can improve the improvement effect while avoiding the problems of difficult processing caused by too many rounding portions 12 and insufficient rounding effect due to too small a size of a single rounding portion 12. In the preferred embodiment where there are two rounding portions 12 at the unilateral top corner of the trench 11, as shown in Figure 8 shown Figure 8Among them, A1 is the dimension of one of the rounded parts 12 in the width direction of the groove 11, B1 is the dimension of this rounded part 12 in the depth direction of the groove 11, A2 is the dimension of the other rounded part 12 in the width direction of the groove 11, and B1 is the dimension of this rounded part 12 in the depth direction of the groove 11.

[0031] Taking Figure 1 the existing rounding structure in Figure 8 and the double-rounded-part 12 rounding structure of the present invention in Figure 9 as test objects, the overall dimensions (A1, B1, A2, B2 are all 50 nm) of the double-rounded-part rounding structure in the width and depth directions of the groove 11 are the same as those of the existing rounding structure (the dimensions in the width and depth directions of the groove 11 are 100 nm). Through Figure 9 the IGES (leakage current between the gate and the emitter) turning curve shown in Figure 9 it can be seen that under the above-mentioned rounding dimensions, the voltage at which the leakage current of the existing rounding structure has an obvious rising inflection point is about 50 V, and Figure 9 it can be clearly seen that after the voltage is greater than 50 V, the leakage current of the existing rounding structure has an obvious increase. The voltage at which the leakage current of the double-rounded-part rounding structure of the present invention has an obvious rising inflection point is greater than 70 V. After the voltage is greater than 50 V, the leakage current of the double-rounded-part rounding structure is less than that of the existing rounding structure. Therefore, after the voltage is greater than 50 V, the leakage current (breakdown) performance of the double-rounded-part rounding structure of the present invention is better than that of the existing rounding structure.

[0032] The present invention also provides a rounding method for a groove top angle rounding structure, and this rounding method includes the following steps: S1. As Figure 2 shown, provide a substrate 1, and this substrate 1 includes but is not limited to silicon materials containing semiconductor elements, such as silicon or silicon germanium with single-crystal, polycrystalline or amorphous structures. In this method, a silicon substrate 1 is specifically selected. As Figure 3 shown, an oxide layer 2 is formed on the aforementioned substrate 1.

[0033] S2. As Figure 4 shown, a photoresist 3 is provided on the oxide layer 2. A photolithography pattern is formed through the exposure and development processes.

[0034] S3. On the photolithography pattern, the oxide layer 2 and the substrate 1 are etched to form a groove 11.

[0035] S4. Push the photoresist 3 laterally along the width direction of the groove 11, and etch the area where the top angle of the groove 11 is located on the oxide layer 2 and the substrate 1 in the area after the lateral push of the photoresist 3 to form the first rounded part 12, that is Figure 8The rounded portion 12 with a width of A1 and a height of B1. Among them, one or both of CF4 and O2 can be used to laterally push the photoresist 3, and a CF-based gas is used for etching the oxide layer 2; a CF-based gas is used for etching the top corner of the trench 11, or Ar can be supplemented simultaneously.

[0036] S5. According to the processing requirements of the target rounded portion 12, continue to laterally push the photoresist 3, etch the oxide layer 2 and the top corner of the trench 11, and form the next rounded portion 12 at a position higher than the previous rounded portion 12 on the top corner of the trench 11, and gradually form the subsequent rounded portions 12, so that at least two rounded portions 12 are formed on the single-side top corner of the trench 11, and all the rounded portions 12 on the single-side top corner of the trench 11 are arranged in a stepped manner along the depth direction of the trench 11.

[0037] In the above S1, the thickness of the oxide layer 2 is 50 - 1000 Å, such as 500 Å or 1000 Å, and the thickness of the photoresist 3 is 0.5 - 3 μm, such as 2 μm or 3 μm. The specific thickness is determined according to the actual processing requirements. In the above S2, the width of the trench 11 is 0.2 - 2 μm, and the depth is 2 - 30 μm. The specific width and depth are determined according to the actual processing requirements. After S5, the photoresist 3 and the oxide layer 2 are removed to obtain the structure as Figure 7 shown.

[0038] The present invention also provides a power semiconductor device, which includes a substrate 1, and a trench 11 is provided on the substrate 1, and the top corner of the trench 11 is provided with the trench top corner rounding structure as described above. In the case of a relatively large voltage, for example, when the voltage is greater than 50 V, the leakage current improvement effect is better, and more applicable scenarios can be applied.

[0039] Those of ordinary skill in the art should understand that the discussion of any of the above embodiments is only exemplary, and is not intended to imply that the protection scope of the present application is limited to these examples; under the idea of the present application, the technical features in the above embodiments or different embodiments can also be combined, the steps can be implemented in any order, and there are many other variations in different aspects of one or more embodiments in the present application as described above, and they are not provided in detail for the sake of brevity.

[0040] One or more embodiments in the present application are intended to cover all such substitutions, modifications, and variations that fall within the broad scope of the present application. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of one or more embodiments in the present application shall be included within the protection scope of the present application.

Claims

1. A grooved top angle rounding structure, characterized in that, It includes a rounding portion (12) provided at the top corners on both sides of the groove (11), and at least two rounding portions (12) are provided at the top corner on one side of the groove (11), and the at least two rounding portions (12) are arranged in a stepped manner along the depth direction of the groove (11) at the top corner on one side of the groove (11).

2. The grooved top corner rounding structure according to claim 1, characterized in that, The number of rounding portions (12) at the top corner on one side of the groove (11) is two.

3. The grooved top corner rounding structure according to claim 1 or 2, characterized in that, The dimensions of all the rounding portions (12) at the top corner on one side of the groove (11) in the width direction of the groove (11) and in the depth direction of the groove (11) are the same.

4. The grooved top corner rounding structure according to claim 1 or 2, characterized in that, The dimension of a single said rounding portion (12) in the width direction of the groove (11) and in the depth direction of the groove (11) is greater than or equal to 5 nm.

5. The grooved top angle rounding structure according to claim 4, wherein, The dimension of a single said rounding portion (12) in the width direction of the groove (11) and in the depth direction of the groove (11) is less than or equal to 100 nm.

6. The grooved top angle rounding structure according to any one of claims 1, 2, and 4, characterized in that, The sum of the dimensions of all the rounding portions (12) at the top corner on one side of the groove (11) in the width direction of the groove (11) is less than one half of the spacing between the groove (11) on this side and the adjacent other groove (11).

7. A rounding method for the rounding structure of the groove top angle as described in any one of claims 1-6, characterized in that, It includes the following steps: S1. Form an oxide layer (2) on the substrate (1); S2. Set a photoresist (3) on the oxide layer (2), and form a photolithography pattern through an exposure and development process; S3. Etch the oxide layer (2) and the substrate (1) on the photolithography pattern to form a groove (11); S4. Push the photoresist (3) laterally along the width direction of the groove (11), and etch the area at the top corner of the groove (11) on the oxide layer (2) and the substrate (1) in the area after the lateral pushing of the photoresist (3) to form a first rounding portion (12); S5. Continue to laterally push the photoresist (3) and etch the oxide layer (2) and the top corner of the groove (11) to form the next rounding portion (12) at a position higher than the previous rounding portion (12) at the top corner of the groove (11), so that at least two rounding portions (12) are formed at the top corner on one side of the groove (11), and all the rounding portions (12) at the top corner on one side of the groove (11) are arranged in a stepped manner along the depth direction of the groove (11).

8. The rounding method according to claim 7, characterized in that, In the said S1, the thickness of the oxide layer (2) is 50 - 1000 Å, and the thickness of the photoresist (3) is 0.5 - 3 μm.

9. The rounding method according to claim 7 or 8, characterized in that, In the said S2, the width of the groove (11) is 0.2 - 2 μm, and the depth is 2 - 30 μm.

10. A power semiconductor device, characterized in that, It includes a substrate (1), and a groove (11) is provided on the substrate (1), and the top corner of the groove (11) is provided with a groove top corner rounding structure as described in any one of claims 1 - 6.

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