Preparation method of battery, battery and photovoltaic module

Abstract

The invention discloses a preparation method of a battery, the battery and a photovoltaic module. The preparation method of the battery comprises the following steps: forming a silicon-based intermediate; preparing a transparent conductive film layer on the first surface and / or the second surface of the silicon-based intermediate; preparing an antireflection layer on the surface of the transparent conductive film layer; a first opening area is formed in the antireflection layer through an acid solution containing fluorine ions, the first opening area is arranged to be a groove extending towards the direction of the silicon-based intermediate, and a transparent conductive film layer is arranged at the bottom in the groove; and preparing an electrode structure in the formed first opening area, wherein the electrode structure is in direct contact with the transparent conductive film layer or extends into the transparent conductive film layer. Therefore, it can be guaranteed that the surface of the silicon-based intermediate is complete and free of damage, it can also be guaranteed that follow-up electrode growth obtains sufficient contact, and meanwhile through mild reaction and no excessive extra energy input, the fill factor and the open-circuit voltage forming the first opening area are not reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of photovoltaics, and in particular to a method for preparing a battery, a battery, and a photovoltaic module. Background Art

[0002] Copper electroplated battery electrodes are the ultimate route for silver removal in the existing photovoltaic industry. Implementing copper interconnection technology can effectively reduce the cost of heterojunction batteries and enhance the competitiveness of heterojunction battery products.

[0003] For the formation of the first opening region by copper electroplating on the dielectric film, the method of directly grooving and removing by laser is usually adopted. Due to the additional energy input, it will inevitably cause damage to the silicon substrate (the semiconductor film layers such as amorphous silicon / microcrystalline silicon / polycrystalline silicon that have been formed on the surface of the silicon substrate). The damage to the interface will directly affect the subsequent growth of the seed layer and the electrode. An excessive contact resistance will significantly reduce the fill factor (FF) of the battery, and excessive energy will cause damage to the passivation layer, significantly reducing the fill factor and open circuit voltage (Voc) of the battery. Summary of the Invention

[0004] The present invention aims to at least solve one of the technical problems existing in the prior art. For this purpose, the present invention provides a method for preparing a battery. The method for preparing the battery can ensure the integrity and non-damage of the surface of the silicon-based intermediate, which can also ensure sufficient contact for subsequent electrode growth. At the same time, through a mild reaction and without excessive additional energy input, the fill factor and open circuit voltage of the formed first opening region can be prevented from decreasing.

[0005] The present invention further provides a battery.

[0006] The present invention also provides a photovoltaic module.

[0007] According to an embodiment of the first aspect of the present invention, a method for preparing a battery includes: forming a silicon-based intermediate having a first surface and a second surface disposed opposite to each other; preparing a transparent conductive film layer on the first surface and / or the second surface of the silicon-based intermediate; preparing an antireflection layer on the surface of the transparent conductive film layer; forming a first opening region on the antireflection layer by an acidic solution containing fluoride ions, the first opening region being set as a groove extending in the direction of the silicon-based intermediate, and the bottom of the groove being the transparent conductive film layer; and preparing an electrode structure in the formed first opening region, the electrode structure being in direct contact with the transparent conductive film layer or extending into the transparent conductive film layer.

[0008] Thus, the method for preparing the battery can ensure the integrity and non-damage of the surface of the silicon-based intermediate, which can also ensure sufficient contact for subsequent electrode growth. At the same time, through a mild reaction and without excessive additional energy input, the fill factor and open circuit voltage of the formed first opening region can be prevented from decreasing.

[0009] According to some embodiments of the present invention, the step of forming a first opening region in the antireflection layer by an acidic solution containing fluoride ions includes: forming the first opening region in the antireflection layer by using a hydrofluoric acid solution.

[0010] According to some embodiments of the present invention, the step of forming a first opening region in the antireflection layer by using a hydrofluoric acid solution includes: in a preset region for forming the first opening region, jetting the hydrofluoric acid solution in an image pattern by inkjet printing or sputtering to form the first opening region.

[0011] According to some embodiments of the present invention, the step of forming a first opening region in the antireflection layer by using a hydrofluoric acid solution includes: forming a barrier layer on a local surface of the antireflection layer; placing the silicon-based intermediate in the hydrofluoric acid solution to locally remove the antireflection layer to form the first opening region; and removing the barrier layer.

[0012] According to some embodiments of the present invention, the step of forming the first opening region in the antireflection layer by using a hydrofluoric acid solution includes: jetting a solution containing hydrogen ions and a solution containing fluoride ions on the antireflection layer respectively, so as to generate a hydrofluoric acid solution through a chemical reaction in the antireflection layer, and further form the first opening region.

[0013] According to some embodiments of the present invention, the step of jetting a solution containing hydrogen ions and a solution containing fluoride ions on the antireflection layer respectively, so as to generate a hydrofluoric acid solution through a chemical reaction in the antireflection layer, and further form the first opening region includes: jetting a polyacrylic acid solution on the antireflection layer; jetting an ammonium fluoride solution on the antireflection layer, so as to generate the hydrofluoric acid solution through a chemical reaction in the antireflection layer, and further form the first opening region.

[0014] According to some embodiments of the present invention, before the step of jetting the ammonium fluoride solution on the antireflection layer, it further includes: heating the polyacrylic acid solution of the silicon-based intermediate or the antireflection layer until the polyacrylic acid solution becomes gel-like.

[0015] According to some embodiments of the present invention, the step of forming the silicon-based intermediate includes: preparing a textured surface on the surface of a silicon substrate; preparing a passivation layer on the surface of the silicon substrate, and preparing a doped conductive semiconductor layer on the surface of the passivation layer to form the silicon-based intermediate.

[0016] According to some embodiments of the present invention, the step of preparing a textured surface on the surface of the silicon substrate includes: cleaning the surface of the silicon substrate with a hydrofluoric acid solution to remove the oxide layer; immersing the silicon substrate in a solution of potassium hydroxide, sodium hydroxide or tetramethylammonium hydroxide with alcohol added to form a textured surface with a pyramid structure.

[0017] According to some embodiments of the present invention, the steps of preparing a passivation layer on the surface of the silicon substrate and preparing a doped conductive semiconductor layer on the surface of the passivation layer include: placing the silicon substrate into a vacuum chamber; introducing a silicon source gas into the vacuum chamber, and forming the passivation layer on the first surface of the silicon substrate by plasma enhanced chemical vapor deposition, where the passivation layer is a first intrinsic amorphous silicon film; introducing a silicon source gas, hydrogen gas, and a phosphorus-containing gas into the vacuum chamber, and forming the doped conductive semiconductor layer on the surface of the first intrinsic amorphous silicon film by plasma enhanced chemical vapor deposition, where the doped conductive semiconductor layer is an n-type doped conductive semiconductor layer; turning the silicon substrate over; introducing a silicon source gas into the vacuum chamber, and forming the passivation layer on the second surface of the silicon substrate by plasma enhanced chemical vapor deposition, where the passivation layer is a second intrinsic amorphous silicon film; introducing a silicon source gas, hydrogen gas, and a boron-containing gas into the vacuum chamber, and forming the doped conductive semiconductor layer on the surface of the second intrinsic amorphous silicon film by plasma enhanced chemical vapor deposition, where the doped conductive semiconductor layer is a P-type doped conductive semiconductor layer.

[0018] According to some embodiments of the present invention, the steps of preparing the transparent conductive film layer on the surface of the passivation layer include: coating the n-type doped conductive semiconductor layer and the P-type doped conductive semiconductor layer by reactive plasma deposition or magnetron sputtering to form the transparent conductive film layer.

[0019] According to some embodiments of the present invention, the steps of preparing an electrode structure in the formed first opening region include: preparing a seed layer in the formed first opening region; preparing an electrode on the surface of the seed layer to form the electrode structure.

[0020] According to some embodiments of the present invention, the material of the seed layer is at least one of silver, aluminum, copper, magnesium, molybdenum, tungsten, chromium, nickel, and tin; and / or the material of the electrode is at least one of silver, aluminum, copper, magnesium, molybdenum, tungsten, chromium, nickel, and tin.

[0021] According to some embodiments of the present invention, between the step of forming the first opening region in the antireflection layer by an acidic solution containing fluoride ions and the step of preparing an electrode structure in the formed first opening region, it further includes: placing the silicon-based intermediate into an annealing furnace for annealing treatment, where the temperature of the annealing furnace is T and the duration of the annealing treatment is t; where T satisfies the relationship: 180°C ≤ T ≤ 220°C, and t satisfies the relationship: 10 min ≤ t ≤ 20 min.

[0022] The battery according to the second aspect embodiment of the present invention is made by using the above battery preparation method.

[0023] A photovoltaic module according to an embodiment of the third aspect of the present invention includes: the above-mentioned battery.

[0024] The beneficial effects of the present invention compared with the prior art are as follows: The preparation method of the battery can ensure the integrity and non-damage of the surface of the silicon-based intermediate, so as to ensure sufficient contact for subsequent electrode growth. At the same time, through mild reaction and without excessive additional energy input, the fill factor and open-circuit voltage of the formed first opening region can be ensured not to decrease. Moreover, by using a solution containing hydrogen ions and a solution containing fluoride ions to generate a hydrofluoric acid solution through a chemical reaction, it is not necessary to pre-prepare the hydrofluoric acid solution, thereby reducing the risk of handling strongly corrosive substances.

[0025] Additional aspects and advantages of the present invention will be given in part in the following description, become apparent in part from the following description, or be understood through the practice of the present invention. Description of the Drawings

[0026] The above and / or additional aspects and advantages of the present invention will become apparent and easy to understand from the description of the embodiments in conjunction with the following drawings, wherein: Figure 1 is a schematic structural diagram of a battery according to an embodiment of the present invention; Figure 2 is a flowchart of forming a first opening region on the surface of an antireflection layer of a battery according to an embodiment of the present invention, where the surface of the antireflection layer contains a gel-like polyacrylic acid solution; Figure 3 is a schematic diagram of a first opening region containing a seed layer according to an embodiment of the present invention; Figure 4 is a flowchart of forming a first opening region on the surface of an antireflection layer of a battery according to another embodiment of the present invention, where the surface of the antireflection layer contains a barrier layer; Figure 5 is a flowchart of a preparation method of a battery according to an embodiment of the present invention; Figure 6 is a flowchart of rinsing and annealing treatment after forming a first opening region on a silicon-based intermediate according to an embodiment of the present invention; Figure 7 is a flowchart before preparing a transparent conductive film layer on the surface of a silicon substrate according to an embodiment of the present invention.

[0027] Reference Signs: 100, battery; 10, transparent conductive film layer; 20, antireflection layer; 30, silicon substrate; 40, barrier layer; 51, first intrinsic amorphous silicon film; 52, n-type doped conductive semiconductor layer; 53, second intrinsic amorphous silicon film; 54, P-type doped conductive semiconductor layer; 60. Polyacrylic acid solution; 70. Suede; 80. Ammonium fluoride solution source; 81. Seed layer; 82. Metal grid line; 90. First opening area; 91. Silicon-based intermediate. Detailed implementation manners

[0028] The embodiments of the present invention will be described in detail below. The embodiments described with reference to the accompanying drawings are exemplary. The embodiments of the present invention will be described in detail below.

[0029] Reference is made below Figures 1-7 to describe a method for preparing a battery 100 according to an embodiment of the present invention. This preparation method can be used to prepare a heterojunction battery.

[0030] As Figure 5 shown, a method for preparing a battery 100 according to an embodiment of the first aspect of the present invention includes: Forming a silicon-based intermediate 91, the silicon-based intermediate 91 having a first surface and a second surface that are oppositely arranged.

[0031] Specifically, first, a silicon-based intermediate 91 is selected. The silicon-based intermediate 91 can be an N-type silicon wafer with a resistivity of 0.5 Ω·cm to 3 Ω·cm, a thickness of 90 μm to 120 μm, and a size of 210 mm. Of course, the silicon-based intermediate 91 can also be a P-type silicon wafer. Then, the dirt and wire marks on the silicon-based intermediate 91 are cleaned. The surface of the silicon-based intermediate 91 is first treated with a hydrofluoric acid solution to remove the surface oxide layer of the silicon-based intermediate 91. Among them, the dilution concentration of the hydrofluoric acid solution can be between 2% and 10%, and the immersion time of the silicon-based intermediate 91 in the hydrofluoric acid solution can be between 10 s and 50 s. For example, the dilution concentration of the hydrofluoric acid solution can be 2%, 5%, 8%, and 10%, and correspondingly, the immersion time of the silicon-based intermediate 91 in the hydrofluoric acid solution can be 40 s, 30 s, 20 s, and 15 s. The first surface can be the front surface of the silicon-based intermediate 91, and the second surface can be the back surface of the silicon-based intermediate 91.

[0032] S1. Preparing a transparent conductive film layer 10 on the first surface and / or the second surface of the silicon-based intermediate 91.

[0033] Coating is performed on the first surface and the second surface of the silicon-based intermediate 91. The coating method can be reactive plasma deposition (RPD) or magnetron sputtering. The transparent conductive film layer 10 can be a transparent conductive oxide film (TCO), and a transparent conductive oxide film is prepared using a ratio of 99.5% indium oxide and 0.5% tin oxide, so that a transparent conductive film layer 10 can be formed on the surface of the silicon-based intermediate 91.

[0034] S2. Preparing an antireflection layer 20 on the surface of the transparent conductive film layer 10.

[0035] Specifically, an antireflection layer 20 is deposited on the transparent conductive film layer 10 by low-temperature plasma-enhanced chemical vapor deposition (PECVD). The antireflection layer 20 can be set as one or more composite films of silicon nitride (SiNx), silicon oxide (SiOx), and silicon oxynitride (SiNOx), so as to facilitate the preparation of the antireflection layer 20 on the surface of the transparent conductive film layer 10. The low temperature can be between 100°C and 200°C.

[0036] For example, SiNOx and SiNx form a double-layer antireflection layer 20. The optical refractive index n of the outermost layer of SiNOx can be set to 1.9, the thickness of SiNOx can be set to 15 nm, the refractive index n of the inner layer of SiNx can be set to 2.15, and the thickness of the inner layer of SiNx can be set to 35 nm. In this way, the reflection loss can be reduced by optimizing the thickness and refractive index of each layer.

[0037] S3. A first opening region 90 is formed in the antireflection layer 20 through an acidic solution containing fluoride ions, exposing the transparent conductive film layer 10. The first opening region 90 is set as a groove extending in the direction of the silicon-based intermediate 91, and the bottom in the groove is the transparent conductive film layer 10.

[0038] The step of forming the first opening region 90 in the antireflection layer 20 through an acidic solution containing fluoride ions includes: forming the first opening region 90 in the antireflection layer 20 by using an acidic solution containing fluoride ions. The acidic solution containing fluoride ions can be one of hydrofluoric acid solution, fluoboric acid solution, fluorophosphoric acid solution, and hexafluorosilicic acid solution. The acidic solution containing fluoride ions can also be a hydrofluoric acid solution formed by the reaction of a salt solution containing fluoride ions and an acidic solution. For example, ammonium fluoride solution reacts with sulfuric acid to form hydrofluoric acid solution, and potassium fluoride solution reacts with hydrochloric acid to form hydrofluoric acid solution. The acidic solution containing fluoride ions can remove the antireflection layer 20 that needs to form the first opening region 90 through corrosion to form a groove, and the bottom in the groove exposes the transparent conductive film layer 10 of this region. The acidic solution containing fluoride ions is a mild reaction during the corrosion of the antireflection layer 20, without excessive additional energy input, and can prevent the fill factor and open-circuit voltage of the formed first opening region 90 from decreasing.

[0039] In addition, due to the different arrangement densities of silicon atoms in different crystal orientations in the silicon-based intermediate 91, the corrosion rates of the acidic solution containing fluoride ions for each crystal orientation are also different. For example, in single-crystalline silicon, the atomic arrangement on the crystal plane is relatively sparse, so it is more easily corroded, while it is relatively difficult in other crystal orientations. By utilizing this characteristic, by adjusting conditions such as the composition and concentration of the acidic solution containing fluoride ions and the temperature, the corrosion process can be made more targeted, so as to ensure the integrity and non-damage of the surface of the silicon-based intermediate 91, which can ensure sufficient contact for subsequent electrode growth.

[0040] S4. Prepare an electrode structure in the formed first opening region 90, where the electrode structure is in direct contact with the transparent conductive film layer 10 or extends into the transparent conductive film layer 10.

[0041] Among them, after the acidic solution containing fluoride ions forms the first opening region 90, a required metal gate line 82 is prepared in the formed first opening region 90, so that an electrode structure can be formed.

[0042] Thus, in the preparation method of the battery 100, the first opening region 90 is formed by the acidic solution containing fluoride ions, which can ensure the integrity and non-damage of the surface of the silicon-based intermediate 91. In this way, it can also ensure sufficient contact for subsequent electrode growth. At the same time, through a mild reaction and without excessive additional energy input, the fill factor and open-circuit voltage of the formed first opening region 90 can be prevented from decreasing.

[0043] According to some embodiments of the present invention, step S3 includes: S30. Form a first opening region 90 in the antireflection layer 20 using a hydrofluoric acid solution. It can be understood that hydrofluoric acid is a weak acid with extremely strong corrosiveness. It can strongly corrode metals, glass, silicon-containing objects, etc., and will react violently with many compounds. In this way, the hydrofluoric acid solution can corrode the antireflection layer 20 in the region where the first opening region 90 needs to be formed, thereby exposing the corresponding transparent conductive film layer 10. The method of forming the first opening region 90 using the hydrofluoric acid solution is simple, stable, and easy to implement.

[0044] According to some embodiments of the present invention, step S30 includes: in the preset region for forming the first opening region 90, the antireflection layer 20 is sprayed with a hydrofluoric acid solution in an image pattern by inkjet printing or slit sputtering to form the first opening region 90.

[0045] Among them, when the hydrofluoric acid solution is sprayed in an image pattern by inkjet printing to form the first opening region 90, the image pattern method means using computer-aided design (such as CAD) software to create the required pattern for forming the first opening region 90 and converting it into a format that an inkjet printer can recognize. The hydrofluoric acid solution is loaded into the reservoir of the inkjet printer, and according to the preset image, the inkjet printer is started to spray an appropriate amount of hydrofluoric acid solution on the antireflection layer 20. In this way, the antireflection layer 20 within the first opening region 90 or at the position of the preset gate line electrode region can be removed, exposing the transparent conductive film layer 10.

[0046] Alternatively, an image-based method of slit sputtering is used to spray a hydrofluoric acid solution to form the first opening region 90. The image-based method means creating a pattern for forming the first opening region 90 using computer-aided design (such as CAD) software and converting it into a format recognizable by the slit sputtering equipment. The hydrofluoric acid solution is loaded into the reservoir of the slit sputtering equipment, and according to the preset image, the slit sputtering equipment is started, thereby facilitating the spraying of the hydrofluoric acid solution onto the antireflection layer 20.

[0047] Using the above two ways of patterning and opening windows can improve the efficiency of forming the first opening region 90, facilitate the standardization of the first opening region 90, and make the size of the formed pattern precise, thereby facilitating the subsequent preparation of the electrode structure and reducing the loss of battery performance caused by process errors.

[0048] According to some other embodiments of the present invention, step S30 of forming the first opening region 90 in the antireflection layer 20 using a hydrofluoric acid solution includes: S31, preparing a barrier layer 40 on a partial region of the surface of the antireflection layer 20, with the region preset to form the first opening region 90 not covered by the barrier layer 40. The barrier layer 40 can be set as paraffin.

[0049] Among them, the barrier layer 40 exposes the region where the first opening region 90 needs to be formed. That is to say, the barrier layer 40 is provided on the surface of the antireflection layer 20 in the region where the first opening region 90 does not need to be formed, so as to avoid the region other than the first opening region 90 from being immersed in the hydrofluoric acid solution, thereby avoiding the reaction between the antireflection layer 20 in the region other than the first opening region 90 and the hydrofluoric acid solution.

[0050] S32, placing the silicon-based intermediate 91 in the hydrofluoric acid solution to locally remove the antireflection layer 20 and form the first opening region 90. Utilizing the acid resistance of paraffin, the silicon-based intermediate 91 can be immersed in the hydrofluoric acid solution, and the antireflection layer 20 where the first opening region 90 is to be formed can react chemically with the hydrofluoric acid solution, so as to dissolve the antireflection layer 20 at the position where the first opening region 90 needs to be formed, thereby avoiding the blockage of the antireflection layer 20 and exposing the transparent conductive film layer 10 at the position of the metallization grid line. The surface of the transparent conductive film layer 10 is used for subsequent electroplating.

[0051] S33, removing the barrier layer 40.

[0052] Among them, the remaining barrier layer 40 (paraffin) in the non-grid line region can be removed with an alkaline solution.

[0053] Using this method can also form the first opening region 90, and the effect of forming the first opening region 90 is good. Paraffin can also be reused with less consumption.

[0054] According to still some embodiments of the present invention, step S30, the step of forming the first opening region 90 in the antireflection layer 20 includes: spraying a hydrogen ion-containing solution and a fluoride ion-containing solution on the antireflection layer 20 respectively, so that a hydrofluoric acid solution is generated through a chemical reaction in the antireflection layer 20 to form the first opening region 90.

[0055] Among them, using two solutions of a hydrogen ion-containing solution and a fluoride ion-containing solution to generate a hydrofluoric acid solution through a chemical reaction for etching the antireflection layer 20 to form the first opening region 90, this belongs to an indirect way of forming the first opening region 90. The acid-base properties of the hydrogen ion-containing solution and the fluoride ion-containing solution for indirectly forming the first opening region 90 are relatively weak. Compared with directly spraying strong acids such as hydrofluoric acid solution, this can reduce the corrosion of the nozzle.

[0056] According to specific embodiments of the present invention, the step of spraying a hydrogen ion-containing solution and a fluoride ion-containing solution on the antireflection layer 20 respectively, so that a hydrofluoric acid solution is generated through a chemical reaction in the antireflection layer 20, and then the first opening region 90 is formed, includes: S34. Spray a polyacrylic acid solution 60 on the antireflection layer 20. The polyacrylic acid solution 60 can provide a hydrogen ion-containing solution. By adjusting the concentration of the polyacrylic acid (PAA) solution according to specific requirements (for example, 25% vol), it is possible to ensure a sufficient supply of the hydrogen ion-containing solution.

[0057] S35. Spray an ammonium fluoride solution on the antireflection layer 20. Use an instrument and equipment containing an ammonium fluoride solution source 80 to spray the ammonium fluoride solution, so that a hydrofluoric acid solution is generated through a chemical reaction in the antireflection layer 20, and then the first opening region 90 is formed. The ammonium fluoride (NH4F) solution can provide a fluoride ion-containing solution. In this way, the polyacrylic acid solution 60 and the ammonium fluoride solution on the antireflection layer 20 can generate a hydrofluoric acid solution through a chemical reaction, so that it is not necessary to pre-prepare a hydrofluoric acid solution, thereby reducing the risk of handling strongly corrosive substances.

[0058] Furthermore, the ammonium fluoride solution reacts with the bottom antireflection layer 20 (such as SiNOx) to etch the insulating mask at the electrode grid line. After the first opening region 90 is formed, the sample is directly rinsed with deionized water to remove all sprayed coatings (such as the polyacrylic acid solution 60).

[0059] Using this method can also form the first opening region 90, and can avoid the corrosion of the hydrofluoric acid solution to the equipment, can also extend the service life of the preparation equipment, and can also reduce the manufacturing cost.

[0060] According to some embodiments of the present invention, before step S35, a solution containing hydrogen ions and a solution containing fluoride ions are respectively sprayed on the antireflection layer 20, so that hydrofluoric acid solution is generated by chemical reaction in the antireflection layer 20, and further, the step of forming the first opening region 90 further includes: S36. Heat the polyacrylic acid solution 60 of the silicon-based intermediate 91 or the antireflection layer 20 until the polyacrylic acid solution 60 becomes gel-like.

[0061] Specifically, when heating the silicon-based intermediate 91, the temperature of the silicon-based intermediate 91 is between 25°C and 40°C, and the heated silicon-based intermediate 91 can transfer heat to the polyacrylic acid solution 60, so that the polyacrylic acid solution 60 can become gel-like.

[0062] Alternatively, after the polyacrylic acid solution 60 is sprayed onto the antireflection layer 20, heating the polyacrylic acid solution 60 of the antireflection layer 20 can directly make the polyacrylic acid solution 60 become gel-like. In this way, the gel-like polyacrylic acid solution 60 can better maintain the sprayed shape, which corresponds to the first opening region 90 to be formed, so that the polyacrylic acid solution 60 can be prevented from spreading, and the position of forming the first opening region 90 can be made more accurate.

[0063] According to some embodiments of the present invention, the step of forming the silicon-based intermediate 91 includes: preparing a textured surface on the surface of the silicon substrate 30, preparing a passivation layer on the surface of the silicon substrate 30, and preparing a doped conductive semiconductor layer on the surface of the passivation layer to form the silicon-based intermediate 91.

[0064] Specifically, as Figure 7 shown, the step of providing the silicon-based intermediate 91 includes: S10. Prepare a textured surface 70 on the surface of the silicon substrate 30.

[0065] Specifically, select the silicon substrate 30, then clean the dirt and line marks on the silicon substrate 30. First, use a hydrofluoric acid solution with a dilution concentration of 5% on the surface of the silicon substrate 30. The immersion time of the silicon substrate 30 in the hydrofluoric acid solution can be between 10s and 50s, so as to remove the surface oxide layer of the silicon substrate 30. Adopt the method of potassium hydroxide (KOH) or sodium hydroxide (NaOH) or tetra-methyl ammonium hydroxide (TMAH) plus alcohol, and use the anisotropic etching of single crystal silicon to form a relatively shallow pyramid structure on the surface of the silicon substrate 30, that is, form a textured surface 70.

[0066] According to some embodiments of the present invention, the step of S10 includes: Clean the surface of the silicon substrate 30 with a hydrofluoric acid solution to remove the oxide layer, and immerse the silicon substrate 30 in a solution of potassium hydroxide, sodium hydroxide or tetra-methyl ammonium hydroxide plus alcohol to form a textured surface 70 in the shape of a pyramid.

[0067] S11. Prepare a passivation layer on the surface of the silicon substrate 30, and prepare a doped conductive semiconductor layer on the surface of the passivation layer.

[0068] Perform passivation treatment on the surface of the silicon substrate 30, deposit an amorphous silicon film on the surface of the silicon substrate 30, so as to form a passivation layer, and in this way, the passivation layer can play a role in protecting the silicon substrate 30.

[0069] Prepare a doped conductive semiconductor layer on the surface of the passivation layer. In this way, its electrical properties can be greatly changed. The doping process will introduce additional electrons or holes into the passivation layer, thereby increasing the carrier concentration and reducing the resistivity, making it have good electrical conductivity. Among them, the doped conductive semiconductor layer can be set as an amorphous silicon film or a crystalline silicon film.

[0070] According to some embodiments of the present invention, the step of S11 includes: Place the silicon substrate 30 into a vacuum chamber, introduce a silicon source gas (such as SiH4) into the vacuum chamber, and form a passivation layer on the first surface of the silicon substrate 30 by plasma enhanced chemical vapor deposition (PECVD). The passivation layer is a first intrinsic amorphous silicon film 51. Introduce the silicon source gas (such as SiH4), hydrogen gas, and a phosphorus-containing gas (such as PH3) into the vacuum chamber, and form a doped conductive semiconductor layer on the surface of the first intrinsic amorphous silicon film 51 by plasma enhanced chemical vapor deposition. The doped conductive semiconductor layer is an n-type doped conductive semiconductor layer 52.

[0071] Turn the silicon substrate 30 over, introduce a silicon source gas (such as SiH4) into the vacuum chamber, and form a passivation layer on the second surface of the silicon substrate 30 by plasma enhanced chemical vapor deposition (PECVD). The passivation layer is a second intrinsic amorphous silicon film 53. Introduce the silicon source gas (such as SiH4), hydrogen gas, and a boron-containing gas (such as B2H6) into the vacuum chamber, and form a doped conductive semiconductor layer on the surface of the second intrinsic amorphous silicon film 53 by plasma enhanced chemical vapor deposition. The doped conductive semiconductor layer is a P-type doped conductive semiconductor layer 54.

[0072] Among them, the silicon substrate 30 has a first surface and a second surface, and one of the first surface and the second surface is the front surface, and the other is the back surface.

[0073] For example, first, a second intrinsic amorphous silicon film 53 is formed on the second surface (back surface) of the silicon substrate 30 by plasma enhanced chemical vapor deposition (PECVD). Then, the silicon substrate 30 is turned over, and a first intrinsic amorphous silicon film 51 is formed on the first surface (front surface) of the silicon substrate 30 by plasma enhanced chemical vapor deposition (PECVD). Subsequently, a silicon source gas (such as SiH4), hydrogen, and a phosphorus-containing gas (such as PH3) are introduced into the vacuum chamber, and an n-type doped conductive semiconductor layer 52 is formed on the surface of the first intrinsic amorphous silicon film 51 by plasma enhanced chemical vapor deposition. Then, the silicon substrate 30 is turned over again, and a silicon source gas (such as SiH4), hydrogen, and a boron-containing gas (such as B2H6) are introduced into the vacuum chamber, and a p-type doped conductive semiconductor layer 54 is formed on the surface of the second intrinsic amorphous silicon film 53 by plasma enhanced chemical vapor deposition.

[0074] S12. Prepare a transparent conductive film layer 10 on the surface of the passivation layer.

[0075] On the n-type doped conductive semiconductor layer 52 and the p-type doped conductive semiconductor layer 54, a film is deposited by reactive plasma deposition (RPD) or magnetron sputtering. A transparent conductive oxide film (TCO) is deposited, and a transparent conductive oxide film is prepared using a ratio of 99.5% indium oxide and 0.5% tin oxide, so that a transparent conductive film layer 10 can be formed on the surface of the silicon substrate 30.

[0076] According to some embodiments of the present invention, the step S12 includes: A film is deposited on the n-type doped conductive semiconductor layer 52 and the p-type doped conductive semiconductor layer 54 by reactive plasma deposition or magnetron sputtering, thereby forming a transparent conductive film layer 10.

[0077] Among them, when depositing a transparent conductive oxide film (TCO) by reactive plasma deposition, a transparent conductive oxide film is prepared using a ratio of 99.5% indium oxide and 0.5% tin oxide, so that a transparent conductive film layer 10 can be formed on the surface of the silicon substrate 30.

[0078] For example, the p-type doped conductive semiconductor layer 54 is disposed on the back surface of the silicon substrate 30, that is, the surface that does not mainly receive sunlight. The back surface of the silicon substrate 30 is shielded by the edge of the carrier plate design (shielded by a mask), and the specific shielding area around the periphery is 0.8 mm. The thickness of the transparent conductive film layer 10 can be set to 40 nm, and the transparent conductive film layer 10 has high conductivity. For example, the carrier concentration of the transparent conductive film layer 10 is 3×10 20 / cm³ and the mobility is 80 cm² / Vs.

[0079] According to some embodiments of the present invention, step S4. Preparing an electrode structure in the formed first opening region 90 includes: S40. Prepare the seed layer 81 in the formed first opening region 90. As Figure 3 shown, after the formation of the first opening region 90 is completed, the seed layer 81 can be grown by electroplating or electroless plating in the formed first opening region 90. The seed layer 81 contacts the transparent conductive film layer 10 through PVD coating technology. The thickness h1 of the seed layer 81 can be 100 nm to 500 nm. For example, the seed layer 81 is Cu, so that a Cu electrode can be made.

[0080] S41. Prepare an electrode on the surface of the seed layer 81, so that an electrode structure can be prepared. Specifically, the required metal gate line 82 is plated on the seed layer 81 in the formed first opening region 90 to form an electrode. The seed layer 81 and the electrode form an electrode structure, and the electrode structure is electrically connected to the transparent conductive film layer 10, so that current can be output outward.

[0081] According to some embodiments of the present invention, the material of the seed layer 81 is at least one of silver, aluminum, copper, magnesium, molybdenum, tungsten, chromium, nickel, and tin. When its material is a plurality of metals, it is an alloy material. In this way, according to the different characteristics of silver, aluminum, copper, magnesium, molybdenum, tungsten, chromium, nickel, and tin, the seed layer 81 can adapt to different application scenarios. For example, when the material of the seed layer 81 is silver, the seed layer 81 has high conductivity, so that the conductivity of the electrode can be improved.

[0082] Furthermore, the material of the electrode is at least one of silver, aluminum, copper, magnesium, molybdenum, tungsten, chromium, nickel, and tin. Specifically, the electrode is configured as a combination of metal gate lines 82. The required metal gate lines 82 are plated on the seed layer 81 in the formed first opening region 90. The type of the gate lines is the same as that of the seed layer 81, and can be one or more of silver, aluminum, copper, magnesium, molybdenum, tungsten, chromium, nickel, and tin, which can also ensure that the electrode has different characteristics. When the material of the electrode is copper, copper has high conductivity, second only to silver, and the cost is low.

[0083] In addition, to obtain the required fine gate line patterning and then grow the electrode, usually the etching solution is a water-soluble material, which can be effectively dissolved in water without additional backwashing and etching.

[0084] Taking electroplating copper as an example, electroplating copper gate lines are carried out in an electroplating copper solution. The width W of the copper gate lines can be set to 15 μm, and the height h2 can be controlled at 10 μm. The electroplating copper solution includes copper sulfate, sulfuric acid, copper balls, and additives that can optimize the crystal structure of the copper layer. The Cu 2+ concentration in the electroplating copper solution is 50 g / L, and the sulfuric acid concentration is 40 g / L.

[0085] Taking electroplating tin as an example, electroplating tin gate lines are carried out in an electroplating tin solution. The height of the tin layer can be controlled at 3 μm. The electroplating tin solution includes tin methyl sulfonate and tin plating additives. The Sn2+ The concentration is 30 g / L and the concentration of methanesulfonic acid is 200 g / L.

[0086] According to some embodiments of the present invention, as Figure 5 and Figure 6 shown, between steps S3 and S4, that is, between the step of forming the first opening region 90 in the antireflection layer 20 through an acidic solution containing fluoride ions and the step of fabricating the electrode structure in the formed first opening region 90, the manufacturing method further includes: S5. Rinse the silicon-based intermediate 91. Among them, the sample after forming the first opening region 90 is directly rinsed with deionized water to remove all inkjet coatings.

[0087] S6. Place the silicon-based intermediate 91 in an annealing furnace for annealing treatment. The temperature of the annealing furnace is T and the duration of the annealing treatment is t. Among them, T satisfies the relational expression: 180°C ≤ T ≤ 220°C, and t satisfies the relational expression: 10 min ≤ t ≤ 20 min.

[0088] Place the silicon-based intermediate 91 in an annealing furnace, heat the temperature inside the annealing furnace to temperature T, where T satisfies the relational expression: 180°C ≤ T ≤ 220°C, and the annealing treatment time of the silicon-based intermediate 91 in the annealing furnace is t, where t satisfies the relational expression: 10 min ≤ t ≤ 20 min.

[0089] Specifically, during the annealing treatment, the temperature range of the annealing furnace is from 180°C to 220°C. If the temperature of the annealing furnace is less than 180°C, it is not sufficient to provide enough energy to repair the lattice defects in the silicon-based intermediate 91, nor is it sufficient to effectively release the internal stress generated during the manufacturing process of the battery 100, which will cause cracks to appear. Therefore, the temperature T of the annealing furnace is set not to be less than 180°C.

[0090] If the temperature T of the annealing furnace is greater than 220°C, the excessive temperature will cause thermal damage to the silicon-based intermediate 91 or other sensitive materials, such as lattice distortion, out-of-control growth of the oxide layer, etc. The high temperature will also cause changes in the chemical composition or damage to the physical structure of the passivation layer, reducing its passivation effect. Therefore, the temperature T of the annealing furnace is set not to be greater than 220°C.

[0091] Among them, the temperature T of the annealing furnace can be set to 190°C, 200°C, and 210°C. For example, when the temperature T of the annealing furnace is 190°C, there is enough energy to repair the lattice defects in the silicon-based intermediate 91, and it can also effectively release the internal stress generated during the manufacturing process of the battery 100.

[0092] Furthermore, the annealing treatment time t is 10 min to 20 min. If the annealing treatment time t is less than 10 min, it is not sufficient to allow the atoms of the doped conductive semiconductor layer to diffuse into the lattice of the silicon-based intermediate 91 and occupy the appropriate lattice positions, nor is it sufficient to effectively release the internal stress generated during the manufacturing process of the battery 100. Therefore, the annealing treatment time t is set not to be less than 10 min.

[0093] If the annealing treatment time t is greater than 20 min, it will cause changes or damage to the chemical composition of the passivation layer. Prolonging the annealing time means higher energy consumption and also increases the production cost.

[0094] Among them, the annealing treatment time t can be set to 11 min, 13 min, and 15 min. When the annealing treatment time t is 15 min, it can effectively release the internal stress generated during the manufacturing process of the battery 100 and will not cause changes or damage to the chemical composition of the passivation layer.

[0095] Furthermore, putting the silicon-based intermediate 91 into an annealing furnace for heat treatment can densify the antireflection layer 20, so that the antireflection layer 20 can become denser. In this way, when electroplating, the antireflection layer 20 can better play the role of a mask.

[0096] Among them, when electroplating, the antireflection layer 20 can be used to deposit highly conductive metal materials (such as nickel and gold) in the specified area. In this case, the antireflection layer 20 can play the role of a mask to ensure that only specific areas are electroplated. It can also have good corrosion resistance and oxidation resistance, providing additional protection in harsh environments, thereby extending its service life.

[0097] Furthermore, after step S4, the preparation method further includes: S7. Perform light injection treatment on the battery 100. Specifically, after the alkali cleaning is completed, perform light injection treatment on the prepared battery 100. The temperature of the light injection treatment is 210 °C, and the time of the light injection treatment is 90 s.

[0098] Among them, performing light injection treatment on the silicon-based intermediate 91 can effectively repair the lattice defects in the silicon-based intermediate 91 and can also reduce the surface state density, thereby improving the overall electrical performance. Moreover, performing light injection treatment on the silicon-based intermediate 91 after the alkali cleaning can further optimize the interface characteristics between the silicon-based intermediate 91 and the passivation layer or other functional layers. A high-quality interface can reduce the interface recombination loss, thereby improving the carrier transport efficiency. In addition, appropriate light injection treatment can help release the internal stress generated in the silicon-based intermediate 91 during the manufacturing process and can also prevent cracks or other mechanical damages caused by stress.

[0099] The following is a control experiment.

[0100] Example 1 The antireflection layer 20 copper interconnect technology and laser are used to form the first opening area 90. The line width of the front grid lines of the electrode is selected to be 20 μm, and the number is 150. As can be seen from Table 1, the fill factor (FF) of this Example 1 is 83.90%, the open circuit voltage (Voc) is 749.0 mV, and the efficiency is 26%.

[0101] Example 2 The antireflection layer 20 copper interconnect technology and an acidic solution containing fluoride ions are used to form the first opening area 90. The line width of the front grid lines of the electrode is selected to be 20 μm, and the number is 150. As can be seen from Table 1, the fill factor (FF) of this Example 2 is 84.90%, the open circuit voltage (Voc) is 749.9 mV, and the efficiency is 26.32%.

[0102] Comparative Example 1 Conventional printing technology, using paste printing technology, the line width of the front grid lines of the electrode is selected to be 25 μm, and the number is 60. As can be seen from Table 1, the fill factor (FF) of Comparative Example 1 is 84.75%, the open circuit voltage (Voc) is 749.9 mV, and the efficiency is 26.15%.

[0103] Comparative Example 2 Conventional copper interconnect technology, the line width of the front grid lines of the electrode is selected to be 20 μm, and the number is 100. As can be seen from Table 1, the fill factor (FF) of Comparative Example 2 is 85.30%, the open circuit voltage (Voc) is 749.8 mV, and the efficiency is 26.33%.

[0104] The test results of the electrical properties of the examples and comparative examples using the above preparation method of the battery 100 are shown in Table 1:

[0105] From the above results, the comparison results of the electrical property tests of the batteries in the examples and comparative examples are as follows: Comparing Comparative Example 1 and Comparative Example 2, compared with the conventional printing technology, the conventional copper interconnect technology has thinner grid lines, denser quantity, reduced series resistance (Rs), increased fill factor (FF) by 0.55%, and increased efficiency by 0.18%.

[0106] Comparing Example 1 and Comparative Example 2: In this Example 1, the SiNOx copper electroplating technology and laser are used to form the first opening area 90, damaging the bottom passivation layer and the textured surface 70. Although the antireflection layer 20 exists, the overall short-circuit current density (Jsc) increases, but the fill factor (FF) decreases by 1.4%, and the open circuit voltage (Voc) drops by 0.8 mV. Therefore, the efficiency decreases by 0.33%.

[0107] Example 2 compared with Example 1: In this Example 2, the SiNOx copper electroplating technology and an acidic solution containing fluoride ions are used to form the first opening region 90, avoiding passivation loss and obtaining optical benefits simultaneously. The efficiency is increased by 0.32%. Compared with the conventional screen printing technology (Comparative Example 1), the efficiency is increased by 0.17%.

[0108] Compared with the process of forming the first opening region 90 by laser, the fill factor (FF) and open-circuit voltage (Voc) of the battery 100 are significantly improved, and the overall conversion efficiency (Eff) can be increased by 0.32%. Compared with the traditional ink copper electroplating technology, the efficiency of the battery 100 is comparable, and it has a lower cost advantage with lower equipment cost. It is expected that the cost can be reduced by 0.03 yuan / W (the current HJT cost is expected to be 0.20 yuan / W).

[0109] The battery 100 according to the embodiment of the second aspect of the present invention is manufactured by using the manufacturing method of the battery 100 in the above embodiment.

[0110] The photovoltaic module according to the embodiment of the third aspect of the present invention includes: the battery 100 in the above embodiment.

[0111] In the description of the present invention, it should be understood that the orientation or positional relationship indicated by the terms "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as a limitation to the present invention.

[0112] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "schematic embodiments", "examples", "specific examples", or "some examples", etc. means that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example.

[0113] Although the embodiments of the present invention have been shown and described, those of ordinary skill in the art can understand that various changes, modifications, substitutions, and variations can be made to these embodiments without departing from the principles and spirits of the present invention. The scope of the present invention is defined by the claims and their equivalents.

Claims

1. A method for preparing a battery, characterized in that, Comprising: Forming a silicon-based intermediate body having a first surface and a second surface disposed opposite to each other; Preparing a transparent conductive film layer on the first surface and / or the second surface of the silicon-based intermediate body; Preparing an antireflection layer on the surface of the transparent conductive film layer; Forming a first opening region in the antireflection layer through an acidic solution containing fluoride ions, the first opening region being provided as a groove extending in the direction of the silicon-based intermediate body, and the bottom in the groove being the transparent conductive film layer; Preparing an electrode structure in the formed first opening region, the electrode structure being in direct contact with the transparent conductive film layer or extending into the interior of the transparent conductive film layer.

2. The preparation method of the battery according to claim 1, wherein The step of forming the first opening region in the antireflection layer through an acidic solution containing fluoride ions includes: Forming the first opening region in the antireflection layer using a hydrofluoric acid solution.

3. The method for preparing a battery according to claim 2, wherein The step of forming the first opening region in the antireflection layer using a hydrofluoric acid solution includes: In a preset region for forming the first opening region, jetting the hydrofluoric acid solution in an image pattern by inkjet printing or sputtering to form the first opening region.

4. The preparation method of the battery according to claim 2, characterized in that, The step of forming the first opening region in the antireflection layer using a hydrofluoric acid solution includes: Forming a barrier layer on a partial surface of the antireflection layer; Placing the silicon-based intermediate body in the hydrofluoric acid solution to locally remove the antireflection layer and form the first opening region; Removing the barrier layer.

5. The preparation method of the battery according to claim 2, wherein, The step of forming the first opening region in the antireflection layer using a hydrofluoric acid solution includes: Jetting a solution containing hydrogen ions and a solution containing fluoride ions on the antireflection layer respectively, so as to generate a hydrofluoric acid solution through a chemical reaction in the antireflection layer, and further form the first opening region.

6. The manufacturing method of the battery according to claim 5, characterized in that, The step of jetting a solution containing hydrogen ions and a solution containing fluoride ions on the antireflection layer respectively, so as to generate a hydrofluoric acid solution through a chemical reaction in the antireflection layer, and further form the first opening region includes: Jetting a polyacrylic acid solution on the antireflection layer; Jetting an ammonium fluoride solution on the antireflection layer, so as to generate the hydrofluoric acid solution through a chemical reaction in the antireflection layer, and further form the first opening region.

7. The method for preparing a battery according to claim 6, wherein, Before the step of jetting the ammonium fluoride solution on the antireflection layer, further included is: Heating the silicon-based intermediate body or the polyacrylic acid solution of the antireflection layer until the polyacrylic acid solution becomes gel-like.

8. The preparation method of the battery according to any one of claims 1-7, characterized in that, The step of forming the silicon-based intermediate body includes: Preparing a textured surface on the surface of a silicon substrate; Preparing a passivation layer on the surface of the silicon substrate, and preparing a doped conductive semiconductor layer on the surface of the passivation layer to form the silicon-based intermediate body.

9. The method for preparing a battery according to claim 8, characterized in that, The step of preparing a textured surface on the surface of a silicon substrate includes: Cleaning the surface of the silicon substrate using a hydrofluoric acid solution to remove the oxide layer; Immersing the silicon substrate in a solution of potassium hydroxide, sodium hydroxide or tetramethylammonium hydroxide added with alcohol to form a textured surface with a pyramid structure.

10. The method for preparing a battery according to claim 8, wherein The step of preparing a passivation layer on the surface of the silicon substrate, and preparing a doped conductive semiconductor layer on the surface of the passivation layer to form the silicon-based intermediate body includes: Placing the silicon substrate into a vacuum chamber; Introduce a silicon source gas into the vacuum chamber, and form the passivation layer on the first surface of the silicon substrate by plasma chemical vapor deposition. The passivation layer is a first intrinsic amorphous silicon film; Introduce a silicon source gas, hydrogen gas, and a phosphorus-containing gas into the vacuum chamber, and form the doped conductive semiconductor layer on the surface of the first intrinsic amorphous silicon film by plasma chemical vapor deposition. The doped conductive semiconductor layer is an n-type doped conductive semiconductor layer; Flip the silicon substrate; Introduce a silicon source gas into the vacuum chamber, and form the passivation layer on the second surface of the silicon substrate by plasma chemical vapor deposition. The passivation layer is a second intrinsic amorphous silicon film; Introduce a silicon source gas, hydrogen gas, and a boron-containing gas into the vacuum chamber, and form the doped conductive semiconductor layer on the surface of the second intrinsic amorphous silicon film by plasma chemical vapor deposition. The doped conductive semiconductor layer is a P-type doped conductive semiconductor layer.

11. The method for preparing a battery according to claim 10, wherein The step of preparing the transparent conductive film layer on the surface of the passivation layer includes: Coat the n-type doped conductive semiconductor layer and the P-type doped conductive semiconductor layer by reactive plasma deposition or magnetron sputtering to form the transparent conductive film layer.

12. The preparation method of the battery according to any one of claims 1-7, characterized in that, The step of preparing the electrode structure in the formed first opening region includes: Prepare a seed layer in the formed first opening region; Prepare an electrode on the surface of the seed layer to form the electrode structure.

13. The method for preparing the battery according to claim 12, wherein The material of the seed layer is at least one of silver, aluminum, copper, magnesium, molybdenum, tungsten, chromium, nickel, and tin; and / or, The material of the electrode is at least one of silver, aluminum, copper, magnesium, molybdenum, tungsten, chromium, nickel, and tin.

14. The method for preparing a battery according to claim 1, characterized in that, Between the step of forming the first opening region in the antireflection layer by an acidic solution containing fluoride ions and the step of preparing the electrode structure in the formed first opening region, it further includes: Put the silicon-based intermediate into an annealing furnace for annealing treatment. The temperature of the annealing furnace is T, and the duration of the annealing treatment is t; Wherein, T satisfies the relation: 180°C ≤ T ≤ 220°C, and t satisfies the relation: 10 min ≤ t ≤ 20 min.

15. A battery, characterized in that, Manufactured by using the manufacturing method of the battery according to any one of claims 1-14.

16. A photovoltaic module, characterized in that, Including: The battery according to claim 15.

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