Digitally driven display

Abstract

A display driving circuit includes a plurality of cell rows. A unit row of the plurality of unit rows includes: a plurality of pixel driving circuits for a plurality of light emitters; and a data line including an array of a plurality of data bit storage devices connected in series (e.g., through a switch array) and configured to shift display data bits along the data line. An output of each data bit storage device in the array of the plurality of data bit storage devices is connected (e.g., through a switch) to a corresponding one of the plurality of pixel driving circuits. The pixel driving circuit, for example, includes: a digital storage unit; and a switch controlled by the data bits stored in the digital storage unit to turn on or off the driving current to the corresponding light emitter.

Description

Background Art

[0001] Artificial reality systems such as head-mounted display (HMD) systems or heads-up display (HUD) systems typically include a near-eye display system in the form of a headset or a pair of glasses, and the near-eye display system is configured to present content to a user through an electronic display or an optical display located in front of the user's eyes, for example, within about 10 millimeters (mm) to 20 mm. The near-eye display system may include an image source (e.g., a display panel) and optional display optics, and may display virtual objects or combine an image of a real object with virtual objects, as in virtual reality (VR) applications, augmented reality (AR) applications, or mixed reality (MR) applications. Summary of the Invention

[0002] The present disclosure generally relates to display systems. More specifically and without limitation, the techniques disclosed herein relate to digitally driven displays. Various creative embodiments are described herein, which include devices, systems, circuits, structures, methods, and processes, etc.

[0003] According to one aspect, there is provided a display driving circuit, which includes a plurality of unit rows, and a unit row in the plurality of unit rows includes:

[0004] a plurality of pixel driving circuits for a plurality of light emitters; and

[0005] a data line, which includes an array of a plurality of data bit storage devices, the plurality of data bit storage devices are connected in series and configured to shift display data bits along the data line, and an output terminal of each data bit storage device in the array of the plurality of data bit storage devices is connected to a corresponding pixel driving circuit in the plurality of pixel driving circuits.

[0006] In some embodiments, each unit row in the plurality of unit rows includes a column of units or a row of units.

[0007] In some embodiments, the data line includes a switch array, and the switch array is interleaved with the array of the plurality of data bit storage devices.

[0008] In some embodiments, even switches in the switch array are configured to switch at a time different from a switching time of odd switches in the switch array.

[0009] In some embodiments, the even switches in the switch array are configured to be switched by a first control signal or a first edge of a control signal; and the odd switches in the switch array are configured to be switched by a second control signal or a second edge of the control signal.

[0010] In some embodiments, each data bit storage device in an array of a plurality of data bit storage devices includes an inverter, a transmission gate, a latch, a flip-flop, a register, a storage cell, or a digital buffer.

[0011] In some embodiments, each pixel driving circuit among the plurality of pixel driving circuits includes:

[0012] a digital storage unit electrically connected to a corresponding data bit storage device in an array of a plurality of data bit storage devices and configured to store a display data bit from an output terminal of the data bit storage device; and

[0013] a first switch controlled by the display data bit stored in the digital storage unit to conduct or cut off a driving current to a corresponding light emitter among the plurality of light emitters.

[0014] In some embodiments, the digital storage unit includes a static random access memory (SRAM) cell.

[0015] In some embodiments, the first switch includes a transistor.

[0016] In some embodiments, the digital storage unit is connected to a corresponding data bit storage device through a second switch in each cell of the cell row.

[0017] In some embodiments, the plurality of second switches in each cell row are controlled by the same control signal.

[0018] In some embodiments, the plurality of second switches in the plurality of cell rows are controlled by the same control signal.

[0019] In some embodiments, each pixel driving circuit among the plurality of pixel driving circuits further includes a transmission control switch that connects the first switch to a power supply.

[0020] In some embodiments, the plurality of transmission control switches in each cell row are controlled by a first control signal that is opposite to a second control signal for controlling the plurality of second switches in the cell row.

[0021] In some embodiments, the display driving circuit further includes: a data driver circuit located at a peripheral area of the display driving circuit, and the data driver circuit is connected to the plurality of cell rows.

[0022] In some embodiments, the data driver circuit includes a plurality of data drivers configured to drive different unit rows among the plurality of unit rows.

[0023] In some embodiments, the data driver circuit is configured to provide display data bits of an image frame sub-frame by sub-frame in a plurality of sub-frames; and the plurality of display data bits of each sub-frame among the plurality of sub-frames includes one data bit of each unit among the plurality of unit rows.

[0024] According to another aspect, a display driving circuit is provided, which includes a plurality of unit rows, wherein: each unit of a unit row among the plurality of unit rows includes: a data bit storage device; a digital storage unit electrically coupled to an output end of the data bit storage device and configured to store a display data bit from the output end of the data bit storage device; and a switch controlled by the display data bit stored in the digital storage unit to conduct or cut off a driving current for an optical emitter; and the plurality of data bit storage devices of the unit row are connected in series to form a data line capable of shifting the display data bit along the data line.

[0025] According to another aspect, a display panel is provided, which includes a plurality of unit rows, and the unit rows among the plurality of unit rows include: a plurality of optical emitters; a plurality of pixel driving circuits for the plurality of optical emitters, each pixel driving circuit among the plurality of pixel driving circuits being coupled to a corresponding optical emitter among the plurality of optical emitters; and a data line including an array of a plurality of data bit storage devices connected in series and configured to shift display data bits along the data line, and an output end of each data bit storage device in the array of the plurality of data bit storage devices is connected to a corresponding pixel driving circuit among the plurality of pixel driving circuits.

[0026] In some embodiments, the optical emitters among the plurality of optical emitters include an organic light-emitting diode (OLED), a micro-OLED, a light-emitting diode (LED), or a micro-LED.

[0027] According to some embodiments, a fully digital driven microdisplay and operation of the digital driven microdisplay are disclosed. In the digital driven microdisplay disclosed herein, pixels in a row or a column may be connected to a data line, where the data line may include gates connected in series for latching digital data bits of a page (e.g., a sub-frame) of an image frame and sending the digital data bits to the pixels. For each page of the image frame, display data bits from a data driver may be sent to a gate connected to the first pixel in each row or column in one clock cycle, and in the next clock cycle, the gate may send the received display data bits to a gate connected to the next pixel in that row or column and may also receive new display data bits from the data driver. In this way, after a number of clock cycles, the display data bits of the page may be shifted to the gates connected to the corresponding pixels in all columns and all rows. After the display data bits of the page reach the gates connected to the corresponding pixels, the display data bits may be written into the memory of the pixels during a scan period, and the display data bits may be used to simultaneously turn on or off the drive current of all pixels to turn on or off individual pixels during an emission period of the page. The drive current of all pixels may be substantially the same, so that at a given time, the intensity of the light emitted by the turned-on pixels may be substantially the same. Each image frame may include a plurality of pages. While the display data bits of one page are stored in the memory of the pixels and used to turn on or off the drive current, the display data bits of the next page may be sent to the gates connected to the pixels in the manner described above. Then, the display data bits of the next page may be written into the memory of the pixels during the scan period, and the display data bits may be used to simultaneously turn on or off the drive current of all pixels to turn on or off each pixel during the emission period of the next page. The amount of light emitted by each pixel in an image frame may be the sum of the light emitted by the pixel in all pages (e.g., sub-frames) of the image frame.

[0028] In one example, a display driving circuit may include a plurality of unit (or pixel) rows. Each unit row of the plurality of unit rows may include: a plurality of pixel driving circuits for a plurality of light emitters (e.g., LEDs, OLEDs, micro-LEDs, μOLEDs, etc.); and a data line including an array of a plurality of data bit storage devices, the plurality of data bit storage devices being connected in series and configured to shift display data bits along the data line. The output terminal of each data bit storage device in the array of the plurality of data bit storage devices may be connected to a corresponding pixel driving circuit in the plurality of pixel driving circuits, for example, through a switch. Each pixel driving circuit in the plurality of pixel driving circuits may include, for example: a digital storage unit electrically connected to the output terminal of the corresponding data bit storage device and configured to store the display data bits from the output terminal of the data bit storage device; and a switch controlled by the display data bits stored in the digital storage unit to conduct or cut off the driving current to the corresponding light emitter in the plurality of light emitters.

[0029] In one example, a display driving circuit may include a plurality of unit rows. Each unit of a unit row of the plurality of unit rows may include: a data bit storage device (e.g., a gate, a latch, or a digital buffer); a digital storage unit (e.g., an SRAM unit) electrically coupled to the output terminal of the data bit storage device (e.g., through a switch) and configured to store the display data bits from the output terminal of the data bit storage device; and a switch (e.g., a transistor) controlled by the display data bits stored in the digital storage unit to conduct or cut off the driving current for the light emitter. The plurality of data bit storage devices of the unit row may be connected in series to form a data line capable of shifting display data bits along the data line.

[0030] In another example, a display panel may include a plurality of unit rows. A unit row of the plurality of unit rows may include: a plurality of light emitters; a plurality of pixel driving circuits for the plurality of light emitters; and a data line including an array of a plurality of data bit storage devices, the plurality of data bit storage devices being connected in series to shift display data bits along the data line. Each pixel driving circuit in the plurality of pixel driving circuits may be coupled to a corresponding light emitter in the plurality of light emitters. The output terminal of each data bit storage device in the array of the plurality of data bit storage devices may be connected to a corresponding pixel driving circuit in the plurality of pixel driving circuits.

[0031] The digital-driven display system disclosed herein is different from traditional passive matrix (PM) displays and active matrix (AM) displays, and this digital-driven display system is referred to herein as a digital matrix (DM) display to distinguish it from PM displays and AM displays. The technique of embedding digital circuits in each pixel can be used for emissive displays such as μOLED displays or μLED displays, and can also be used for reflective displays such as digital micromirror devices (DMDs). Compared with analog active matrix displays, the digital matrix displays disclosed herein can dispense with analog drivers and large capacitors for storing analog data, can dispense with analog circuits such as digital-to-analog converters (DACs) and analog buffers, and can dispense with column lines and gate lines for driving (writing data and turning on) pixels row by row. Therefore, the digital matrix displays disclosed herein can reduce power consumption, circuit area, and cost, and can improve display resolution and uniformity.

[0032] This summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used in isolation to determine the scope of the claimed subject matter. The subject matter should be understood by reference to the appropriate portions of the entire specification of this disclosure, any or all of the drawings, and each claim. The foregoing and other features and examples will be described in more detail in the following specification, claims, and drawings.

[0033] It will be recognized that any feature described herein as being suitable for incorporation into one or more aspects or embodiments of this disclosure is intended to be generalizable to any and all aspects and embodiments of this disclosure. Those skilled in the art can understand other aspects of this disclosure based on the specification, claims, and drawings of this disclosure. The foregoing general description and the following detailed description are merely exemplary and explanatory and do not limit the claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Exemplary embodiments are described in detail below with reference to the following drawings.

[0035] Figure 1 is a simplified block diagram of an example of an artificial reality system environment including a near-eye display according to certain embodiments.

[0036] Figure 2 is a perspective view of an example of a near-eye display in the form of a head-mounted display (HMD) device for implementing some of the examples disclosed herein.

[0037] Figure 3 A perspective view of an example of a near-eye display in the form of a pair of glasses for implementing some of the examples disclosed herein.

[0038] Figure 4 Shows an example of a near-eye display system according to certain embodiments.

[0039] Figure 5 Shows an example of a near-eye display system based on a waveguide display.

[0040] Figure 6 Shows an example of an image source component in an augmented reality system according to certain embodiments.

[0041] Figure 7 Is a simplified block diagram of an example of a display system according to certain embodiments.

[0042] Figure 8 Is a simplified block diagram showing an example of a display system according to certain embodiments.

[0043] Figure 9A Shows an example of a light source controlled by an analog drive signal.

[0044] Figure 9B Shows an example of a light source controlled by digital drive data.

[0045] Figure 10A and Figure 10B Shows the operation of an example of an analog active matrix display.

[0046] Figure 11A Shows the operation of an example of an analog-driven display.

[0047] Figure 11B Shows the operation of an example of a digitally-driven display.

[0048] Figure 12A Shows an example of a pulse-width modulation digital drive method.

[0049] Figure 12B Shows an example of a binary-coded digital drive method.

[0050] Figure 12C Shows an example of a sub-frame digital drive method.

[0051] Figure 13A Shows an example of a digital matrix display with a data driver located in the peripheral region according to certain embodiments.

[0052] Figure 13B Shows an example of a digital matrix display with a data driver located in a digital matrix device according to certain embodiments.

[0053] Figure 14 Shows an example operation of a digital matrix display according to certain embodiments.

[0054] Figure 15 Shows an example of a cell of a digital matrix display in a scan period according to certain embodiments.

[0055] Figure 16 Shows the operation of multiple cells in a column or a row of cells of an example of a digital matrix display according to certain embodiments.

[0056] Figure 17A Shows an example of a data line in a digital matrix display according to certain embodiments.

[0057] Figure 17B Includes an example of a timing diagram of pixel data loading, pixel data scanning, and light emission of a page (or sub-frame) of an image frame in an example of a digital matrix display according to certain embodiments.

[0058] Figure 18 Shows an example of the operation of a transmission gate on a data line during a page write period (or emission period) of an example of a digital matrix display according to certain embodiments.

[0059] Figure 19A Includes a timing diagram of an image frame of an example of an active matrix display, the image frame including multiple sub-frames.

[0060] Figure 19B Includes a timing diagram of an image frame of an example of a digital matrix display disclosed herein according to certain embodiments, the image frame including multiple sub-frames.

[0061] Figure 20 Shows an example of an electronic system of an example of a near-eye display for implementing some of the examples disclosed herein.

[0062] The drawings depict embodiments of the present disclosure for illustrative purposes only. Those skilled in the art will readily recognize from the following description that alternative embodiments of the structures and methods shown can be employed without departing from the principles of the present disclosure or the benefits disclosed herein.

[0063] In the drawings, like components and / or features may have the same reference numerals. Additionally, various components of the same type may be distinguished by following the reference numeral with a hyphen and a second label that differentiates the multiple similar components. If only the first reference numeral is used in the specification, the description may apply to any one of the multiple similar components having the same first reference numeral, regardless of the second reference numeral. Detailed Description

[0064] The present disclosure generally relates to display systems. More specifically and without limitation, the techniques disclosed herein relate to digitally driven displays. Various creative embodiments are described herein, which include devices, systems, circuits, structures, methods, and processes, etc.

[0065] Augmented reality (AR) applications and virtual reality (VR) applications can use near-eye displays (e.g., head-mounted displays) to present images to a user. A near-eye display system can include an image source (e.g., a display panel) for generating image frames and display optics for projecting the image frames toward the user's eyes. It is generally desirable for a near-eye display system to have a large field of view and a high resolution, e.g., in order to improve the immersive experience of using the near-eye display system. The field of view of a display system can be proportional to the size of the image source (e.g., the display panel). To achieve a high resolution, a microdisplay with an ultra-high pixels per inch (PPI) may be required. Manufacturing a high-PPI display panel (e.g., a silicon-based μOLED panel, a micro-LED panel, or other display panels) with a large size to cover a wider field of view may pose many technical challenges and cost issues.

[0066] Many traditional display systems use active matrix displays, which may include a row driver (e.g., a gate driver) and a column driver (e.g., a data driver or a source driver) on multiple sides of a display panel. In an analog active matrix display, analog driving may be used to control the amount of light with different intensities at a given time. The active matrix display may be driven row by row. Multiple pixels in the active matrix display share the gate driver and the column driver. The gate driver may enable one row of pixels at a time. The data driver in the analog active matrix display may receive digital video data, convert the digital video data into analog video data (e.g., a voltage signal or a current signal) using a digital-to-analog converter (DAC), distribute the analog video data to the pixels on the currently enabled row using column data lines, and then distribute the video data to the pixels on the next enabled row. Thus, multiple pixels on the same row receive the corresponding video data simultaneously. The multiple pixels may hold the data during a display frame time using, for example, a capacitor. The DAC may need to convert thousands of data within each row time and may thus require a large area, and have high power consumption and high cost. The charging time is another issue because there are parasitic resistances and parasitic capacitances on the data lines. Buffers may be needed to charge and discharge the data lines and the storage capacitors in the pixels in order to transfer the required analog voltage levels to the storage capacitors through the data lines. These thousands of high-speed analog buffers may increase the area, power, and cost of the active matrix device. Thus, the active matrix displays used in microdisplay applications (e.g., near-eye displays) may have high power consumption and limited circuit area for each pixel. A large portion of the power consumption of the analog active matrix display may be consumed by the analog driving circuit (e.g., the DAC that converts digital display data into a voltage / current signal) and the analog buffers that transfer the voltage / current signal to the pixels through long data lines. For low cost and high speed, it is desirable for the microdisplay panel to have a small size, and for image quality, it is desirable for the microdisplay panel to have a high resolution, which may result in a small pixel size and limited area for the driving circuit for each pixel. Advanced pixel circuits can implement large-size and high-resolution panels with a thin film transistor (TFT) backplane, but the TFT backplane may have problems such as low speed, non-uniformity, and instability.

[0067] Digital-driven displays can use a similar active matrix, but the video data used to drive the pixels can be digital ("on" or "off"), where the digital drive can control the amount of light by controlling the emission time of a light source with a constant light intensity. Digital drive can avoid analog circuits such as DACs, analog buffers, and large storage capacitors. Additionally, the digital data charging time is different from the analog charging time. Analog charging may take a longer time to reach the required voltage level, while digital charging can take a shorter time to meet the input tolerance. Therefore, for next-generation displays with high resolution (e.g., above 4K) and low power consumption, digital displays with memory in each pixel may be a promising solution. Due to backplane limitations such as instability, non-uniformity, and low speed of the TFT backplane, digital drive on the TFT board has not been successful. Complementary metal-oxide-semiconductor (CMOS) on a silicon backplane can be used in microdisplays for AR applications and VR applications, enabling high-resolution high-speed drive and eliminating the need for threshold voltage compensation for each transistor.

[0068] According to certain embodiments, a fully digital driven microdisplay and the operation of the digital driven microdisplay are disclosed. In the digital driven microdisplay disclosed herein, pixels in a row or a column may be connected to data lines, where the data lines may include gates connected in series that are configured to latch digital data bits of a page (e.g., a sub-frame) of an image frame and send the digital data bits to the pixels. For each page of the image frame, display data bits from a data driver may be sent to the gate connected to the first pixel in each row or column in one clock cycle, and in the next clock cycle, the gate may send the received display data bits to the gate connected to the next pixel in that row or column and may also receive new display data bits from the data driver. In this way, after a number of clock cycles, the display data bits of the page may be shifted to the gates connected to the corresponding pixels in all columns and all rows. After the display data bits of the page reach the gates connected to the corresponding pixels, the display data bits may be written into the memory of the pixels during a scan period, and the display data bits may be used to simultaneously turn on or off the drive current of all pixels to turn on or off individual pixels during the emission period of the page. The drive current of all pixels may be substantially the same, so that at a given time, the intensity of the light emitted by the turned-on pixels may be substantially the same. Each image frame may include a plurality of pages. While the display data bits of one page are stored in the memory of the pixels and used to turn on or off the drive current, the display data bits of the next page may be sent to the gates connected to the pixels in the manner described above. Then, the display data bits of the next page may be written into the memory of the pixels during the scan period, and the display data bits may be used to simultaneously turn on or off the drive current of all pixels to turn on or off individual pixels during the emission period of the next page. The amount of light emitted by each pixel in an image frame may be the sum of the light emitted by the pixel in all pages (e.g., sub-frames) of the image frame.

[0069] In one example, a display driving circuit may include a plurality of unit (or pixel) rows. Each unit row of the plurality of unit rows may include: a plurality of pixel driving circuits for a plurality of light emitters (e.g., LEDs, OLEDs, micro-LEDs, μOLEDs, etc.); and a data line including an array of a plurality of data bit storage devices, the plurality of data bit storage devices being connected in series and configured to shift display data bits along the data line. The output terminal of each data bit storage device in the array of the plurality of data bit storage devices may be connected to a corresponding pixel driving circuit among the plurality of pixel driving circuits, for example, through a switch. Each pixel driving circuit among the plurality of pixel driving circuits may include, for example: a digital storage unit electrically connected to the output terminal of the corresponding data bit storage device and configured to store the display data bits from the output terminal of the data bit storage device; and a switch controlled by the display data bits stored in the digital storage unit to conduct or cut off the driving current to the corresponding light emitter among the plurality of light emitters.

[0070] In one example, a display driving circuit may include a plurality of unit rows. Each unit of a unit row of the plurality of unit rows may include: a data bit storage device (e.g., a gate, a latch, or a digital buffer); a digital storage unit (e.g., an SRAM unit) electrically coupled to the output terminal of the data bit storage device (e.g., through a switch) and configured to store the display data bits from the output terminal of the data bit storage device; and a switch (e.g., a transistor) controlled by the display data bits stored in the digital storage unit to conduct or cut off the driving current for the light emitter. The plurality of data bit storage devices of the unit row may be connected in series to form a data line capable of shifting display data bits along the data line.

[0071] In another example, a display panel may include a plurality of unit rows. A unit row of the plurality of unit rows may include: a plurality of light emitters; a plurality of pixel driving circuits for the plurality of light emitters; and a data line including an array of a plurality of data bit storage devices, the plurality of data bit storage devices being connected in series to shift display data bits along the data line. Each pixel driving circuit among the plurality of pixel driving circuits may be coupled to a corresponding light emitter among the plurality of light emitters. The output terminal of each data bit storage device in the array of the plurality of data bit storage devices may be connected to a corresponding pixel driving circuit among the plurality of pixel driving circuits.

[0072] The digital-driven display system disclosed herein is different from traditional passive matrix (PM) displays and active matrix (AM) displays, and this digital-driven display system is referred to herein as a digital matrix (DM) display to distinguish it from PM displays and AM displays. The technique of embedding digital circuits in each pixel can be used for emissive displays such as μOLED displays or μLED displays, and can also be used for reflective displays such as digital micromirror devices (DMDs). Compared with analog active matrix displays, the digital matrix displays disclosed herein can dispense with analog drivers and large capacitors for storing analog data, can dispense with analog circuits such as digital-to-analog converters (DACs) and analog buffers, and can dispense with column lines and gate lines for driving (writing data and turning on) pixels row by row. Therefore, the digital matrix displays disclosed herein can reduce power consumption, circuit area, and cost, and can improve display resolution and uniformity.

[0073] The digital-driven displays described herein can be used in combination with various technologies such as artificial reality systems. Artificial reality systems such as head-mounted display (HMD) systems or head-up display (HUD) systems typically include a display configured to present artificial images that depict objects in a virtual environment. The display can present virtual objects or combine images of real objects with virtual objects, as in virtual reality (VR) applications, augmented reality (AR) applications, or mixed reality (MR) applications. For example, in an AR system, a user can view a displayed image of a virtual object (e.g., both computer-generated images (CGIs) and the surrounding environment) by, for example, viewing through transparent display glasses or lenses (commonly referred to as optical see-through) or viewing an image of the surrounding environment captured by a camera that is displayed (commonly referred to as video see-through).

[0074] In the following description, for purposes of explanation, specific details are set forth in order to provide a thorough understanding of examples of the present disclosure. It will be apparent, however, that the various examples may be practiced without these specific details. For example, devices, systems, structures, components, methods, and other elements may be shown as components in block diagram form in order not to obscure the examples in unnecessary detail. In other instances, well-known devices, processes, systems, structures, and techniques may be shown without unnecessary detail in order not to obscure the examples. The figures and description are not intended to be restrictive. The terms and expressions used in this disclosure have been used as descriptive terms and not of limitation, and there is no intention in the use of such terms and expressions of excluding any equivalents of the features shown and described or portions of such features. The term "example" is used herein to mean "serving as an example, instance, or illustration." Any embodiment or design described herein as an "example" is not necessarily to be construed as preferred or advantageous over other embodiments or designs.

[0075] Figure 1 is a simplified block diagram of an example of an artificial reality system environment 100 that includes a near-eye display 120 according to certain embodiments. Figure 1 The illustrated artificial reality system environment 100 may include a near-eye display 120, an optional external imaging device 150, and an optional input / output interface 140, each of which may be coupled to an optional console 110. Although Figure 1 an example of an artificial reality system environment 100 including one near-eye display 120, one external imaging device 150, and one input / output interface 140 is shown, any number of these components may be included in the artificial reality system environment 100, or any of these components may be omitted. For example, there may be multiple near-eye displays 120 that are monitored by one or more external imaging devices 150 in communication with the console 110. In some configurations, the artificial reality system environment 100 may not include the external imaging device 150, the optional input / output interface 140, and the optional console 110. In alternative configurations, different or additional components may be included in the artificial reality system environment 100.

[0076] The near-eye display 120 can be a head-mounted display that presents content to a user. Examples of content presented by the near-eye display 120 include one or more of the following: images; videos; audio; or any combination thereof. In some embodiments, the audio can be presented by an external device (e.g., speakers and / or headphones) that receives audio information from the near-eye display 120, the console 110, or both, and presents audio data based on the audio information. The near-eye display 120 can include one or more rigid bodies that can be rigidly or non-rigidly coupled to each other. A rigid coupling between multiple rigid bodies can cause the coupled rigid bodies to act as a single rigid entity. A non-rigid coupling between multiple rigid bodies can allow the rigid bodies to move relative to each other. In various embodiments, the near-eye display 120 can be implemented in any suitable form factor, including a pair of glasses. The following references Figure 2 and Figure 3 further describe some embodiments of the near-eye display 120. Additionally, in various embodiments, the functions described herein can be used in a head-mounted device that combines images of the environment external to the near-eye display 120 and artificial reality content (e.g., computer-generated images). Thus, the near-eye display 120 can utilize the generated content (e.g., images, videos, sounds, etc.) to enhance the image of the physical real-world environment external to the near-eye display 120 to present augmented reality to the user.

[0077] In various embodiments, the near-eye display 120 can include one or more of display electronics 122, display optics 124, and an eye-tracking unit 130. In some embodiments, the near-eye display 120 can also include one or more locators 126, one or more position sensors 128, and an inertial measurement unit (IMU) 132. In various embodiments, the near-eye display 120 can omit any one of the eye-tracking unit 130, the locator 126, the position sensor 128, and the IMU 132, or can include additional elements. Additionally, in some embodiments, the near-eye display 120 can include elements that combine the functions of the various elements described Figure 1 herein.

[0078] The display electronic device 122 can display an image to a user or facilitate the display of an image to the user based on data received from, for example, the console 110. In various embodiments, the display electronic device 122 can include one or more display panels, such as a liquid crystal display (LCD), an organic light emitting diode (OLED) display, an inorganic light emitting diode (ILED) display, a micro light emitting diode (μLED or micro-LED) display, an active matrix OLED display (AMOLED), a transparent OLED display (TOLED), or some other display. For example, in one implementation of the near-eye display 120, the display electronic device 122 can include a front TOLED panel, a rear display panel, and optical components (e.g., an attenuator, a polarizer, or a diffractive or spectral film) located between the front panel and the rear display panel. The display electronic device 122 can include a plurality of pixels to emit light of a dominant color, such as red, green, blue, white, or yellow. In some implementations, the display electronic device 122 can display a three-dimensional (3D) image through a stereoscopic effect generated by a two-dimensional panel to create a subjective perception of the depth of the image. For example, the display electronic device 122 can include a left display in front of the user's left eye and a right display in front of the user's right eye. The left display and the right display can present multiple copies of the image that are horizontally shifted relative to each other to create a stereoscopic effect (i.e., the perception of the depth of the image when the user views the image).

[0079] In some embodiments, the display optical device 124 can optically display image content (e.g., using optical waveguides and optical couplers), or can magnify the received image light from the display electronics 122, correct optical errors associated with the image light, and present the corrected image light to the user of the near-eye display 120. In various embodiments, the display optical device 124 can include, for example, one or more optical elements such as a substrate, an optical waveguide, an aperture, a Fresnel lens, a convex lens, a concave lens, a filter, an input / output coupler, or any other suitable optical element that can affect the image light emitted from the display electronics 122. The display optical device 124 can include a combination of different optical elements and mechanical couplings that are used to maintain the relative spacing and orientation of these optical elements in the combination. One or more of the optical elements in the display optical device 124 can have an optical coating, such as an anti-reflection coating, a reflective coating, a filter coating, or a combination of different optical coatings.

[0080] The magnification of the image light by the display optical device 124 can allow the display electronics 122 to be physically smaller, lighter, and consume less power than a larger display. Additionally, the magnification can increase the field of view of the displayed content. The amount of magnification of the image light by the display optical device 124 can be changed by adjusting optical elements, adding optical elements, or removing optical elements from the display optical device 124. In some embodiments, the display optical device 124 can project the displayed image onto one or more image planes that can be farther from the user's eyes than the near-eye display 120.

[0081] The display optical device 124 can also be designed to correct one or more types of optical errors, such as two-dimensional optical errors, three-dimensional optical errors, or any combination thereof. Two-dimensional errors can include optical aberrations that occur in two dimensions. Multiple example types of two-dimensional errors can include barrel distortion, pincushion distortion, longitudinal chromatic aberration, and lateral chromatic aberration. Three-dimensional errors can include optical errors that occur in three dimensions. Multiple example types of three-dimensional errors can include spherical aberration, coma aberration, field curvature, and astigmatism.

[0082] The locator 126 can be an object located at specific positions on the near-eye display 120, and these specific positions are related to each other and to a reference point on the near-eye display 120. In some embodiments, the console 110 can identify the locator 126 in an image captured by the external imaging device 150 to determine the position, orientation, or both of the artificial reality headset. The locator 126 can be a light-emitting diode (LED), a corner cube reflector, a reflective marker, a type of light source that contrasts with the environment in which the near-eye display 120 operates, or any combination thereof. In embodiments where the locator 126 is an active component (e.g., an LED or other type of light-emitting device), the locator 126 can emit light in the visible band (e.g., from about 380 nanometers (nm) to 750 nm), in the infrared (IR) band (e.g., from about 750 nm to 1 mm), in the ultraviolet band (e.g., from about 12 nm to about 380 nm), in another part of the electromagnetic spectrum, or in any combination of multiple parts of the electromagnetic spectrum.

[0083] The external imaging device 150 can include one or more cameras, one or more video cameras, any other device capable of capturing an image including one or more of the locators 126, or any combination thereof. Additionally, the external imaging device 150 can include one or more filters (e.g., to increase the signal-to-noise ratio). The external imaging device 150 can be configured to detect light emitted or reflected from the locator 126 located in the field of view of the external imaging device 150. In embodiments where the locator 126 includes passive elements (e.g., a retroreflector), the external imaging device 150 can include a light source that illuminates some or all of the locators 126, and these locators can reflect the light back to the light source in the external imaging device 150. Slow calibration data can be transmitted from the external imaging device 150 to the console 110, and the external imaging device 150 can receive one or more calibration parameters from the console 110 to adjust one or more imaging parameters (e.g., focal length, focus, frame rate, sensor temperature, shutter speed, aperture, etc.).

[0084] The position sensor 128 can generate one or more measurement signals in response to the movement of the near-eye display 120. Examples of the position sensor 128 can include an accelerometer, a gyroscope, a magnetometer, other motion detection sensors or error correction sensors, or any combination thereof. For example, in some embodiments, the position sensor 128 can include multiple accelerometers for measuring translational motion (e.g., forward / backward, up / down, or left / right) and multiple gyroscopes for measuring rotational motion (e.g., pitch, yaw, or roll). In some embodiments, the respective position sensors can be positioned orthogonally to each other.

[0085] The IMU 132 can be an electronic device that generates fast calibration data based on the received measurement signals from one or more of the multiple position sensors 128. The position sensors 128 can be located outside the IMU 132, inside the IMU 132, or any combination thereof. Based on the one or more measurement signals from one or more of the position sensors 128, the IMU 132 can generate fast calibration data that represents the estimated position of the near-eye display 120 relative to the initial position of the near-eye display 120. For example, the IMU 132 can integrate the received measurement signals from the accelerometer over time to estimate the velocity vector and integrate the velocity vector over time to determine the estimated position of a reference point on the near-eye display 120. Alternatively, the IMU 132 can provide the sampled measurement signals to the console 110, which can determine the fast calibration data. Although the reference point can be generally defined as a point in space, in various embodiments, the reference point can also be defined as a point within the near-eye display 120 (e.g., the center of the IMU 132).

[0086] The eye tracking unit 130 may include one or more eye tracking systems. Eye tracking may refer to determining the position of the eyes relative to the near-eye display 120, which position includes the orientation and location of the eyes. The eye tracking system may include an imaging system for imaging one or both eyes, and may optionally include a light emitter that may generate light directed at the eyes such that the light reflected by the eyes can be collected by the imaging system. For example, the eye tracking unit 130 may include an incoherent light source or a coherent light source (e.g., a laser diode) and a camera, the incoherent light source or coherent light source emitting light in the visible spectrum or the infrared spectrum, and the camera collecting the light reflected by the user's eyes. As another example, the eye tracking unit 130 may collect reflected radio waves emitted by a micro radar unit. The eye tracking unit 130 may use a low-power light emitter that emits light at a frequency and intensity that does not harm the eyes and does not cause physical discomfort. The eye tracking unit 130 may be arranged to increase the contrast of the images of the eyes collected by the eye tracking unit 130 while reducing the total power consumed by the eye tracking unit 130 (e.g., reducing the power consumed by the light emitter and the imaging system included in the eye tracking unit 130). For example, in some embodiments, the power consumed by the eye tracking unit 130 may be less than 120 milliwatts.

[0087] The near-eye display 120 may use the orientation of the eyes to, for example, determine the user's inter-pupillary distance (IPD), determine the gaze direction, introduce depth cues (e.g., a blurred image outside the user's primary line of sight), collect heuristic data about user interaction in VR media (e.g., the time spent on any particular subject, object, or frame that varies with the exposed stimuli), some other function based at least in part on the orientation of at least one of the user's eyes, or any combination thereof. Because the orientation of the user's both eyes can be determined, the eye tracking unit 130 may be able to determine where the user is looking. For example, determining the user's gaze direction may include: determining the point of convergence based on the determined orientations of the user's left and right eyes. The point of convergence may be the point where the two foveal axes of the user's both eyes intersect. The user's gaze direction may be the direction of the line passing through the point of convergence and the midpoint between the pupils of the user's both eyes.

[0088] The input / output interface 140 can be a device that allows a user to send action requests to the console 110. An action request can be a request to perform a specific action. For example, the action request can be to start or end an application, or to perform a specific action within an application. The input / output interface 140 can include one or more input devices. Exemplary input devices can include a keyboard, a mouse, a game controller, gloves, buttons, a touch screen, or any other suitable device for receiving an action request and transmitting the received action request to the console 110. The action request received by the input / output interface 140 can be transmitted to the console 110, which can perform an action corresponding to the requested action. In some embodiments, the input / output interface 140 can provide haptic feedback to the user according to instructions received from the console 110. For example, the input / output interface 140 can provide haptic feedback when an action request is received, or when the console 110 has performed the requested action and transmitted instructions to the input / output interface 140. In some embodiments, an external imaging device 150 can be used to track the input / output interface 140, such as tracking the positioning or location of a controller (which can include, for example, an IR light source), or the positioning or location of the user's hand, to determine the user's movement. In some embodiments, the near-eye display 120 can include one or more imaging devices to track the input / output interface 140, such as tracking the positioning or location of a controller, or the positioning or location of the user's hand, to determine the user's movement.

[0089] The console 110 can provide content to the near-eye display 120 for presentation to the user according to information received from one or more of the external imaging device 150, the near-eye display 120, and the input / output interface 140. In Figure 1 the example shown, the console 110 can include an application repository 112, a head-mounted device tracking subsystem 114, an artificial reality engine 116, and an eye tracking subsystem 118. Some embodiments of the console 110 can include devices or subsystems different from or additional to those described in connection with Figure 1 those described. The functions described further below can be distributed among multiple components of the console 110 in a different manner than described here.

[0090] In some embodiments, the console 110 can include a processor and a non-transitory computer-readable storage medium storing instructions executable by the processor. The processor can include multiple processing units that execute instructions in parallel. The non-transitory computer-readable storage medium can be any memory, such as a hard disk drive, a removable memory, or a solid-state drive (e.g., flash memory or dynamic random access memory (DRAM)). In various embodiments, in connection withFigure 1 The devices or subsystems of the described console 110 can be encoded as instructions in a non-transitory computer-readable storage medium that, when executed by a processor, cause the processor to perform the functions further described below.

[0091] The application repository 112 can store one or more applications for execution by the console 110. An application can include a set of instructions that, when executed by a processor, generate content for presentation to a user. The content generated by the application can be responsive to input received from the user via movement of the user's eyes or responsive to input received from the input / output interface 140. Examples of applications can include gaming applications, conferencing applications, video playback applications, or other suitable applications.

[0092] The head-mounted device tracking subsystem 114 can use slow calibration information from an external imaging device 150 to track the movement of the near-eye display 120. For example, the head-mounted device tracking subsystem 114 can use locators observed from the slow calibration information and a model of the near-eye display 120 to determine the position of a reference point of the near-eye display 120. The head-mounted device tracking subsystem 114 can also use position information from fast calibration information to determine the position of the reference point of the near-eye display 120. Additionally, in some embodiments, the head-mounted device tracking subsystem 114 can use portions of the fast calibration information, slow calibration information, or any combination thereof to predict the future positioning of the near-eye display 120. The head-mounted device tracking subsystem 114 can provide the estimated or predicted future position of the near-eye display 120 to the artificial reality engine 116.

[0093] The artificial reality engine 116 can execute applications within the artificial reality system environment 100 and receive position information of the near-eye display 120, acceleration information of the near-eye display 120, velocity information of the near-eye display 120, the predicted future position of the near-eye display 120, or any combination thereof from the head-mounted device tracking subsystem 114. The artificial reality engine 116 can also receive estimated eye position and orientation information from the eye tracking subsystem 118. The artificial reality engine 116 can determine the content to be provided to the near-eye display 120 for presentation to the user based on the received information. For example, if the received information indicates that the user has looked left, the artificial reality engine 116 can generate content for the near-eye display 120 that reflects the user's eye movement in the virtual environment. Additionally, the artificial reality engine 116 can perform an action within an application executed on the console 110 in response to an action request received from the input / output interface 140 and provide feedback to the user indicating that the action has been performed. The feedback can be visual feedback via the near-eye display 120 or auditory feedback, or tactile feedback via the input / output interface 140.

[0094] The eye tracking subsystem 118 can receive eye tracking data from the eye tracking unit 130 and determine the position of the user's eyes based on the eye tracking data. The position of the eyes can include the orientation, the location, or both of the eyes relative to the near-eye display 120 or any element in the near-eye display. Since the axis of rotation of the eyes varies with the position of the eyes in their sockets, determining the position of the eyes in their sockets can allow the eye tracking subsystem 118 to more precisely determine the orientation of the eyes.

[0095] Figure 2 FIG. 6 is a perspective view of an example of a near-eye display in the form of an HMD device 200 for implementing some of the various examples disclosed herein. The HMD device 200 can be part of, for example, a VR system, an AR system, an MR system, or any combination thereof. The HMD device 200 can include a body 220 and a headband 230. Figure 2 The bottom side 223, the front side 225, and the left side 227 of the body 220 are shown in the perspective view. The headband 230 can have an adjustable or extendable length. There can be sufficient space between the body 220 of the HMD device 200 and the headband 230 to allow a user to wear the HMD device 200 on the user's head. In various embodiments, the HMD device 200 can include additional, fewer, or different components. For example, in some embodiments, the HMD device 200 can include, for example, Figure 3 eyeglass temples and temple tips as shown below, and not include the headband 230.

[0096] The HMD device 200 can present media to a user that includes a virtual and / or augmented view of a physical, real-world environment that includes computer-generated elements. Examples of media presented by the HMD device 200 can include images (e.g., two-dimensional (2D) images or three-dimensional (3D) images), videos (e.g., 2D videos or 3D videos), audio, or any combination thereof. Images and videos can be presented to each eye of the user through one or more display components ( Figure 2 not shown) enclosed within the body 220 of the HMD device 200. In various embodiments, the one or more display components can include a single electronic display panel or multiple electronic display panels (e.g., one display panel for each eye of the user). Examples of one or more electronic display panels can include, for example, LCD, OLED displays, ILED displays, μLED displays, AMOLED, TOLED, some other display, or any combination thereof. The HMD device 200 can include two eyebox regions.

[0097] In some embodiments, the HMD device 200 may include various sensors (not shown), such as depth sensors, motion sensors, position sensors, and eye tracking sensors. Some of these sensors may sense using structured light patterns. In some embodiments, the HMD device 200 may include an input / output interface for communicating with a console. In some embodiments, the HMD device 200 may include a virtual reality engine (not shown) that may execute applications within the HMD device 200 and receive depth information, position information, acceleration information, velocity information, predicted future positions, or any combination thereof of the HMD device 200 from various sensors. In some embodiments, the information received by the virtual reality engine may be used to generate signals (e.g., display instructions) sent to one or more display components. In some embodiments, the HMD device 200 may include locators (not shown, such as locator 126) at a plurality of fixed positions on the body 220 that are related to each other and to a reference point. Each of these locators may emit light detectable by an external imaging device.

[0098] Figure 3 is a perspective view of an example of a near-eye display 300 in the form of a pair of glasses for implementing some of the examples disclosed herein. The near-eye display 300 may be Figure 1 a specific implementation of the near-eye display 120 and may be configured to be used as a virtual reality display, an augmented reality display, and / or a mixed reality display. The near-eye display 300 may include a frame 305 and a display 310. The display 310 may be configured to present content to a user. In some embodiments, the display 310 may include display electronics and / or display optics. For example, as described above with respect to Figure 1 the near-eye display 120, the display 310 may include an LCD display panel, an LED display panel, or an optical display panel (e.g., a waveguide display assembly).

[0099] The near-eye display 300 may also include various sensors 350a, 350b, 350c, 350d, and 350e, which are located on or within the frame 305. In some embodiments, the sensors 350a to 350e may include one or more depth sensors, motion sensors, position sensors, inertial sensors, or ambient light sensors. In some embodiments, the sensors 350a to 350e may include one or more image sensors configured to generate image data representing different fields of view in different directions. In some embodiments, the sensors 350a to 350e may be used as input devices to control or affect the content displayed by the near-eye display 300, and / or to provide an interactive VR / AR / MR experience to the user of the near-eye display 300. In some embodiments, the sensors 350a to 350e may also be used for stereoscopic imaging.

[0100] In some embodiments, the near-eye display 300 may also include one or more illuminators 330 to project light into the physical environment. The projected light may be associated with different wavelength bands (e.g., visible light, infrared light, ultraviolet light, etc.) and may be used for various purposes. For example, one or more illuminators 330 may project light in a dark environment (or in an environment with low-intensity infrared light, ultraviolet light, etc.) to assist the sensors 350a to 350e in capturing images of different objects in the dark environment. In some embodiments, one or more illuminators 330 may be used to project a specific light pattern onto an object in the environment. In some embodiments, one or more illuminators 330 may be used as locators, such as the locator 126 described above with reference to Figure 1 the locator 126 described above.

[0101] In some embodiments, the near-eye display 300 may also include a high-resolution camera 340. The high-resolution camera 340 may capture an image of the physical environment in the field of view. The captured image may be processed, for example, by a virtual reality engine (e.g., Figure 1 the artificial reality engine 116) to add virtual objects to the captured image or modify physical objects in the captured image, and the processed image may be displayed to the user by the display 310 for AR or MR applications.

[0102] Figure 4 An example of a near-eye display device 400 according to certain embodiments is shown. The near-eye display device 400 may include an image source 420 (e.g., a display panel) and optional display optics 410. Figure 4Shows the image source 420 in front of the display optics 410. In some other embodiments, the image source 420 may be located outside the field of view of the user's eye 490. For example, one or more deflectors or directional couplers may be used to deflect the light from the image source so that the image source appears to be located at Figure 4 the position of the image source 420 shown. The image source 420 may include a two-dimensional array of light emitters such as semiconductor micro-LEDs or micro-OLEDs. The size and pitch of the light emitters in the image source 420 may be small. For example, each light emitter may have a diameter of less than 2 micrometers (μm) (e.g., about 1.2 μm), and the pitch may be less than 2 μm (e.g., about 1.5 μm). Thus, the number of light emitters in the image source 420 may be equal to or greater than the number of pixels in the display image, the number of pixels being, for example, 960×720 pixels, 1280×720 pixels, 1440×1080 pixels, 1920×1080 pixels, 2160×1080 pixels, 2560×1080 pixels or more pixels. Therefore, the image source 420 can generate the display image simultaneously.

[0103] Light from a region (e.g., pixel or light emitter) of the image source 420 may be guided by the display optics 410 to the user's eye 490. The light guided by the display optics 410 may form a virtual image on the image plane 430. The position of the image plane 430 may be determined based on the position of the image source 420 and the focal length of the display optics 410. The user's eye 490 may use the light guided by the display optics 410 to form a real image on the retina of the user's eye 490. In this way, objects at different spatial positions on the image source 420 may appear to be objects at different viewing angles on the image plane that is away from the user's eye 490.

[0104] Figure 5Shows an example of a near-eye display system 500 based on a waveguide display according to some embodiments. The near-eye display system 500 may include a projector 510 and a combiner 515. The projector 510 may include a light source or image source 512 and projector optics 514. In some embodiments, the light source or image source 512 may include one or more of the micro-LED devices described above. In some embodiments, the image source 512 may include a plurality of pixels that display virtual objects, such as an LCD display panel or an LED display panel. In some embodiments, the image source 512 may include a light source that generates coherent light or partially coherent light. For example, the image source 512 may include a laser diode, a vertical cavity surface emitting laser, an LED, and / or a micro-LED as described above. In some embodiments, the image source 512 may include a plurality of light sources (e.g., an array of micro-LEDs as described above), each light source emitting monochromatic image light corresponding to a primary color (e.g., red, green, or blue). In some embodiments, the image source 512 may include a two-dimensional array of three micro-LEDs, where each two-dimensional array of micro-LEDs may include a plurality of micro-LEDs configured to emit primary color (e.g., red, green, or blue) light. In some embodiments, the image source 512 may include an optical pattern generator, such as a spatial light modulator. The projector optics 514 may include one or more optical components that may condition the light from the image source 512, such as expanding, collimating, scanning the light from the image source 512, or projecting the light from the image source 512 onto the combiner 515. The one or more optical components may include, for example, one or more lenses, liquid lenses, mirrors, apertures, and / or gratings. For example, in some embodiments, the image source 512 may include a one-dimensional array or an elongated two-dimensional array of one or more micro-LEDs, and the projector optics 514 may include one or more one-dimensional scanners (e.g., micro-mirrors or prisms) configured to scan the one-dimensional array or the elongated two-dimensional array of micro-LEDs to generate an image frame. In some embodiments, the projector optics 514 may include a liquid lens (e.g., a liquid crystal lens) having a plurality of electrodes that allows scanning of the light from the image source 512.

[0105] The combiner 515 may include an input coupler 530 that is configured to couple light from the projector 510 into the substrate 520 of the combiner 515. The combiner 515 may transmit at least 50% of the light in a first wavelength range and reflect at least 25% of the light in a second wavelength range. For example, the first wavelength range may be visible light from about 500 nm to about 650 nm, and the second wavelength range may be in the infrared band, such as from about 800 nm to about 1200 nm. The input coupler 530 may include a volume holographic grating, a diffractive optical element (DOE) (e.g., a surface relief grating), an inclined surface of the substrate 520, or a refractive coupler (e.g., a wedge or a prism). For example, the input coupler 530 may include a reflective volume Bragg grating or a transmissive volume Bragg grating. The input coupler 530 may have a coupling efficiency greater than 30%, 50%, 75%, 90% or higher for visible light. The light coupled into the substrate 520 may propagate within the substrate 520 by, for example, total internal reflection (TIR). The substrate 520 may be in the form of a lens of a pair of glasses. The substrate 520 may have a flat surface or a curved surface and may include one or more types of dielectric materials such as glass, quartz, plastic, polymer, poly(methyl methacrylate) (PMMA), crystal, or ceramic. The thickness of the substrate may be in a range such as from less than about 1 mm to about 12 mm or greater. The substrate 520 may be transmissive to visible light.

[0106] The substrate 520 may include or may be coupled to a plurality of output couplers 540, each output coupler being configured to extract at least a portion of the light guided and propagating within the substrate 520 from the substrate 520 and direct the extracted light 560 towards an eyebox 595, where the eye 590 of a user of the near-eye display system 500 may be located when the near-eye display system 500 is in use. The plurality of output couplers 540 may replicate an exit pupil to increase the size of the eyebox 595 such that the displayed image is visible over a larger area. Similar to the input coupler 530, the output coupler 540 may include a grating coupler (e.g., a volume holographic grating or a surface relief grating), other diffractive optical elements, a prism, etc. For example, the output coupler 540 may include a reflective volume Bragg grating or a transmissive volume Bragg grating. The output coupler 540 may have different coupling (e.g., diffractive) efficiencies at different locations. The substrate 520 may also allow light 550 from the environment in front of the combiner 515 to pass through with little or no loss. The output coupler 540 may also allow light 550 to pass through with little loss. For example, in some embodiments, the output coupler 540 may have a very low diffractive efficiency for light 550 such that the light 550 may be refracted or otherwise pass through the output coupler 540 with little loss and thus may have a higher intensity than the extracted light 560. In some embodiments, the output coupler 540 may have a high diffractive efficiency for light 550 and may diffract the light 550 with little loss in certain desired directions (i.e., diffraction angles). Thus, the user may be able to view a combined image of the environment in front of the combiner 515 and an image of a virtual object projected by the projector 510.

[0107] In some embodiments, the projector 510, the input coupler 530, and the output coupler 540 may be located on either side of the substrate 520. The input coupler 530 and the output coupler 540 may be reflective gratings (also referred to as reflective gratings) or transmissive gratings (also referred to as transmissive gratings) to couple display light into or out of the substrate 520.

[0108] Figure 5Shows that the exit pupil can be replicated by the output coupler 540 to form a focused exit pupil or eye box, where different regions in the field of view (e.g., different pixels on the image source 512) can be associated with different respective propagation directions towards the eye box, and light from the same field of view (e.g., the same pixel on the image source 512) can have the same propagation direction for different individual exit pupils. Thus, a single image of the image source 512 can be formed by the user's eye located at any position within the eye box, where light from different individual exit pupils and propagating in the same direction can be from the same pixel on the image source 512 and can be focused to the same position on the retina of the user's eye. In other words, the user's eye can convert the angular information (e.g., corresponding to the Fourier plane) in the eye box or exit pupil into spatial information in the form of an image on the retina. Figure 5 Shows that even when the user's eye moves to different positions within the eye box, the user's eye can still see the image of the image source.

[0109] The above display panel or image source (e.g., image source 420 or 512) can be implemented, for example, using the following displays: liquid crystal display (LCD), organic light-emitting diode (OLED) display, micro-OLED display, inorganic light-emitting diode (ILED) display, micro-light-emitting diode (micro-LED) display, active matrix OLED display (AMOLED), transparent OLED display (TOLED), or some other display. The display panel can include the above light source and a drive circuit for driving the light source.

[0110] Figure 6 Shows an example of an image source assembly 610 in a near-eye display system 600 according to certain embodiments. The image source assembly 610 can include, for example, a display panel 640 and a projector 650. The display panel can generate a display image to be projected onto the user's eye, and the projector can project the display image generated by the display panel 640 towards, as described above with respect to Figure 4 and Figure 5The described waveguide display projection. The display panel 640 may include a light source 642 and a drive circuit 644 for the light source 642. The light source 642 may include, for example, the image source 420 or 512. The projector 650 may include, for example, a freeform optical element, a scanning mirror, and / or the projection optics described above. The near-eye display system 600 may also include a controller 620 that synchronously controls the light source 642 and the projector 650. The image source assembly 610 may generate image light and output the image light to the waveguide display or the user's eye. As described above, the waveguide display may receive the image light at one or more input coupling elements and direct the received image light to one or more output coupling elements. The input coupling elements and the output coupling elements may include, for example, diffraction gratings, holographic gratings, prisms, or any combination thereof. The input coupling element may be selected such that total internal reflection occurs in the waveguide display. The output coupling element may couple out a portion of the totally internally reflected image light from the waveguide display.

[0111] As described above, the light source 642 may include a plurality of light emitters arranged in an array or a matrix. Each light emitter may emit monochromatic light, such as red light, blue light, green light, and infrared light, etc. Although RGB colors are often discussed in this disclosure, the embodiments described herein are not limited to using red, green, and blue as the primary colors. Other colors may also be used as the primary colors of the near-eye display system 600. In some embodiments, a display panel according to an embodiment may use more than three primary colors. Each pixel in the light source 642 may include three sub-pixels, which include a red micro-LED, a green micro-LED, and a blue micro-LED. A semiconductor LED typically includes an active light-emitting layer located within a multi-layer semiconductor material. The multi-layer semiconductor material may include different compound materials, or the same base material with different dopants and / or different doping densities. For example, the multi-layer semiconductor material may include an n-type material layer, an active region (which may include a heterostructure (e.g., one or more quantum wells)), and a p-type material layer. The multi-layer semiconductor material may be grown on a surface of a substrate having a specific orientation. In some embodiments, in order to improve the light extraction efficiency, a mesa may be formed that includes at least some of the multi-layer semiconductor materials.

[0112] The controller 620 may control the image rendering operations of the image source assembly 610, such as the operations of the light source 642 and / or the projector 650. For example, the controller 620 may determine instructions for the image source assembly 610 to render one or more display images. These instructions may include display instructions and scan instructions. In some embodiments, the display instructions may include an image file (e.g., a bitmap file). The display instructions may, for example, be received from a console (e.g., as described above with respect to Figure 1The described console 110 receives. The image source component 610 can generate image light using scan instructions. The scan instructions can specify, for example, the type of the source of the image light (e.g., monochromatic or multicolor), the scan rate, the orientation of the scanning device, one or more illumination parameters, or any combination thereof. The controller 620 can include a combination of hardware, software, and / or firmware, which are not shown here so as not to obscure other aspects of the present disclosure.

[0113] In some embodiments, the controller 620 can be a graphics processing unit (GPU) of a display device. In other embodiments, the controller 620 can be other kinds of processors. Operations performed by the controller 620 can include obtaining content for display and dividing the content into a plurality of discrete segments. The controller 620 can provide scan instructions to the light source 642, and these scan instructions include addresses corresponding to individual source elements of the light source 642 and / or electrical bias voltages applied to the individual source elements. The controller 620 can instruct the light source 642 to sequentially present the plurality of discrete segments using light emitters corresponding to one or more rows of pixels in the image ultimately displayed to the user. The controller 620 can also instruct the projector 650 to perform different light adjustments. For example, the controller 620 can control the projector 650 to scan the plurality of discrete segments to different regions of the coupling element of the waveguide display. Thus, at the exit pupil of the waveguide display, the respective discrete portions are presented at different corresponding positions. Although the respective discrete segments are presented at different corresponding times, the presentation and scanning of these discrete segments occur fast enough that the user's eyes can integrate the different segments into a single image or a series of images.

[0114] The image processor 630 can be a general-purpose processor and / or one or more dedicated circuits dedicated to performing the features described herein. In one embodiment, the general-purpose processor can be coupled to a memory to execute software instructions that cause the processor to perform certain processes described herein. In another embodiment, the image processor 630 can be one or more circuits dedicated to performing certain features. Although Figure 6 the image processor 630 in

[0115] is shown as an independent unit separate from the controller 620 and the driver circuit 644, in other embodiments, the image processor 630 can be a subunit of the controller 620 or the driver circuit 644. In other words, in those embodiments, the controller 620 or the driver circuit 644 can perform various image processing functions of the image processor 630. The image processor 630 can also be referred to as an image processing circuit. Figure 6In the example shown, the light source 642 can be driven by a drive circuit 644 based on data or instructions (e.g., display instructions and scan instructions) sent from the controller 620 or the image processor 630. In one embodiment, the drive circuit 644 can include a circuit board that is connected to and mechanically holds the individual light emitters of the light source 642. The light source 642 can emit light according to one or more lighting parameters that are set by the controller 620 and potentially adjusted by the image processor 630 and the drive circuit 644. The light source 642 can generate light using the lighting parameters. The lighting parameters can include, for example, source wavelength, pulse rate, pulse amplitude, beam type (continuous or pulsed), one or more other parameters that can affect the emitted light, or any combination thereof. In some embodiments, the source light generated by the light source 642 can include multiple beams of red light, multiple beams of green light, and multiple beams of blue light, or any combination thereof.

[0116] The projector 650 can perform a set of optical functions, such as focusing, combining, conditioning, or scanning the image light generated by the light source 642. In some embodiments, the projector 650 can include a combining assembly, a light conditioning assembly, or a scanning mirror assembly. The projector 650 can include one or more optical components that optically adjust and potentially redirect the light from the light source 642. An example of an optical adjustment can include conditioning the light, such as expanding the light, collimating the light, correcting one or more optical errors (e.g., field curvature, chromatic aberration, etc.), some other adjustment of the light, or any combination thereof. The optical components of the projector 650 can include, for example, lenses, mirrors, apertures, gratings, or any combination thereof.

[0117] The projector 650 can redirect the image light through one or more of its reflective and / or refractive portions such that the image light is projected toward the waveguide display in a particular orientation. The location at which the image light is redirected toward the waveguide display can depend on the particular orientation of the one or more reflective and / or refractive portions. In some embodiments, the projector 650 includes a single scanning mirror that scans in at least two dimensions. In other embodiments, the projector 650 can include multiple scanning mirrors, each of the multiple scanning mirrors scanning in directions orthogonal to one another. The projector 650 can perform raster scanning, bi-resonant scanning, or any combination thereof (horizontally or vertically). In some embodiments, the projector 650 can perform controlled vibrations along the horizontal direction and / or the vertical direction at a particular oscillation frequency to scan in two dimensions and generate a two-dimensional projected image of the media presented to the user's eyes. In other embodiments, the projector 650 can include a lens or a prism that can perform a similar or identical function as one or more of the scanning mirrors. In some embodiments, the image source assembly 610 can not include a projector, wherein the light emitted by the light source 642 can be directly incident on the waveguide display.

[0118] Figure 7 is a simplified block diagram of an example of a display device 700 according to certain embodiments. The display device 700 can include a display panel 730 that includes an array of multiple pixels 712 (e.g., a 2D array). The display panel 730 can be an example of the display panel 640. Figure 7A block diagram of a pixel 712 is shown, which may be similar to other pixels 712 in a pixel array. The pixel 712 may be an example of a light source 642, and the pixel 712 may be part of a drive circuit 644. Various functional components of each pixel 712 may use digital comparison to generate a digital pulse width modulation (PWM) signal to control a micro-LED. The pixel 712 may include a micro-LED 705, which may emit light at an intensity level controlled by the PWM signal. The circuit for controlling the micro-LED 705 in the pixel 712 may be an example of a part of the drive circuit 644, and the circuit may include a storage device 702, a comparator 704, a PWM latch circuit 706, and an LED driver circuit 708. The storage device 702 may be part of the pixel 712 or may be external to the pixel 712. The storage device 702 may include, for example, SRAM cells, and the storage device 702 may store intensity data of the pixel 712. The storage device 702 may be connected to the comparator 704, which may be connected to the PWM latch circuit 706. The PWM latch circuit 706 may be connected to the LED driver circuit 708 to control the LED driver circuit 708 to provide pulse width modulation to a drive current, which may be an approximately constant current. The LED driver circuit 708 may drive the micro-LED 705 with the drive current during different time periods based on the PWM signal to emit different amounts of light during a PWM frame (also referred to as a PWM period). Generally, the longer the micro-LED 705 is driven at the current level within a PWM period, the brighter the observer can perceive the micro-LED 705 to be.

[0119] The display device 700 may further include a row driver 714, a column driver 716, and a counter 710. In some embodiments, the row driver 714, the column driver 716, and the counter 710 may be parts of the peripheral circuit of the display panel 730. The row driver 714 and the column driver 716 may be connected to the pixel 712. For example, the row driver 714 may be connected to the storage device 702, the comparator 704, and the PWM latch circuit 706. The column driver 716 may be connected to the storage device 1102. The display device 700 may further include a controller 740, which may include a processor 742 and a display storage device 744. The controller 740 may be connected to the row driver 714 and the column driver 716 to control the operations of the row driver 714 and the column driver 716. For example, the processor 742 of the controller 740 may provide control signals to the row driver 714 and the column driver 716 to operate the pixel 712. The counter 710 may be coupled to the display storage device 744, which may store, for example, calibration data and / or a gamma correction look-up table (LUT).

[0120] The storage device 702 may include digital data storage units, such as units of SRAM or units of some other type of memory. For example, the storage device 702 may include a plurality of storage units for storing display data (e.g., intensity data) of the pixels 712. Each unit in the storage device 702 may be connected to the row driver 714 via a wordline (WL), and may be connected to the column driver 716 via a bitline (BL) and an inverse bitline ("inverse bit line, inverse BL"). The storage device 702 may receive WL signals from the row driver 714, which are used for memory word selection, and the storage device 702 may receive control words in the form of data bits from the column driver 716, which are used for writing to the selected storage unit. The bit value of the data bit D defines the intensity level of the pixel of the PWM frame. The number of data bits (or bit cells) in the control word may vary. In one example, each control word in the storage device 702 may include 3 bit cells, which store a 3-bit value (e.g., 000, 001, 010, 011, 100, 101, 70, and 71) representing one of eight brightness levels. In another example, each control word in the storage device 702 may include 8 bit cells, which store an 8-bit value representing one of 256 brightness levels.

[0121] The counter 710 may be used to generate a counter value (e.g., clock cycle count) based on a clock signal. The comparator 704 may compare the counter value of the counter 710 with the value of the control word from the storage device 702 to generate a comparison result. For example, the comparison result may be generated based on the exclusive OR (XOR) of each data bit in the control word and the corresponding bit of the counter value. The comparator 704 may include a dynamic comparison node that switches between a high level and a low level according to the comparison result, and the comparator 704 may output the comparison result to the PWM latch circuit 706 to generate a PWM signal. Alternatively, the comparator 704 may include a static drive comparison node that switches between a high level and a low level according to the comparison result, and the comparator 704 may output the comparison result to the PWM latch circuit 706 to generate a PWM signal.

[0122] The LED driver circuit 708 may include one or more LED driving transistors. One of the one or more LED driving transistors may have a source terminal or a drain terminal connected to the micro-LED 705. One of the one or more LED driving transistors may include a gate terminal connected to the PWM latch circuit 706 to receive a PWM signal for modulating the current flowing into the micro-LED 705 through the source terminal and the drain terminal of the driving transistor.

[0123] Figure 8 FIG. 4 is a simplified block diagram illustrating an example of a display system 800 including a display 810 according to some embodiments. The display 810 may be any display panel as described above, such as an OLED array or a micro-LED array. The display 810 may include a plurality of active pixels 814 arranged in a two-dimensional pixel array. Each active pixel 814 may include three (red, green, and blue) light sources, such as an AOLED or a micro-LED. Each active pixel 814 may further include driving and compensation circuits for each light source. The driving and compensation circuits may receive and store the image data of the active pixel and provide a driving current to the light source for emitting light.

[0124] The two-dimensional pixel array of the active pixels 814 may be directly or indirectly coupled to a plurality of scan lines 812 and a plurality of data lines 840. Each scan line 812 may be coupled to a plurality of active pixels 814 on a row of the two-dimensional pixel array, and each scan line 812 may be used to connect the plurality of active pixels 814 on a row of the two-dimensional pixel array to the corresponding data line 840. Each data line 840 may be coupled to a plurality of active pixels 814 on a column of the two-dimensional pixel array through a switch controlled by the scan line 812. Each data line 840 may be used to send the image data to the active pixels 814 coupled to the scan line 812 that has been selected or activated. Generally, one of the plurality of scan lines may be selected or activated at a time to sequentially connect the plurality of active pixels coupled to the plurality of scan lines to the corresponding data lines. The plurality of data lines 840 may be driven in parallel to simultaneously send data to the plurality of rows of active pixels 814 connected to the selected or activated plurality of scan lines 812.

[0125] The display 810 may further include some on-board peripheral circuits, such as a gate array for driving different scan lines, which is used to select the pixels on the scan line to receive the image data for display. These peripheral circuits may be connected to a control bus 850, which may send one or more control signals to selectively activate (scan) the plurality of scan lines, so as to receive the image data and turn on the light sources for emitting light.

[0126] The data lines 840 and the control bus 850 can be driven by a display driver integrated circuit (DDIC) 820. The DDIC 820 can receive image data from the image processor 830 and send the received image data to the active pixels 814 via the data lines 840. In some embodiments, the DDIC 820 may not include a buffer. In some embodiments, the DDIC 820 can include a frame buffer and thus can temporarily store the received image data and process the image data before sending the image data to the data lines 840. For example, in some embodiments, the DDIC 820 can perform scrambling, distortion, correction, or other transformations on the image data. The DDIC 820 can also generate scan control signals (e.g., clock signals and various trigger signals) and send the scan control signals to the display 810 via the scan control bus 850.

[0127] The image processor 830 can include one or more CPUs or one or more GPUs. The image processor 830 can receive information (e.g., position information, acceleration information, velocity information, predicted future position, or some combination thereof (e.g., from various sensors)) and execute a graphics processing application (e.g., a game) to render an image frame using the received information.

[0128] Light-emitting displays such as organic light-emitting diode (OLED) displays and light-emitting diode (LED) displays can display images represented by the amount of emitted light. Current consumer displays typically use an analog driving method, where a data driver can receive digital video data, convert the digital video data into analog video data (voltage signal or current signal) using a DAC, and distribute the analog video data to the pixels on the selected rows using column data lines. These pixels can store the analog video data using, for example, capacitors during the display frame time. During the emission period, the analog video data can control a current driving transistor to provide the required driving current to a light source (e.g., an OLED or an LED).

[0129] Figure 9A An example of a light source 910 controlled by an analog driving signal is shown. As Figure 9A shown, the analog driving scheme can control the amount of emitted light by controlling the intensity of the light emitted during the emission period. For example, by applying control signals of different amplitudes to a current driver 920 (e.g., a current driving transistor), such that during the emission period controlled by pulses, the driving current and thus the resulting light emission intensity can be different. As described above, the analog control signals of different amplitudes can be generated by the DAC based on the digital video data and can be sent to the storage capacitors of the pixels via the data lines by an analog buffer.

[0130] In contrast, in a digitally-driven display, the video data used to drive the pixels in the display panel can be digital ("on" or "off"), where the amount of light emitted by each pixel in each image frame can be controlled by controlling the emission time of a light source that emits light of a constant amplitude or constant intensity. The emission time can be controlled based on the digital video data of the pixel that can be stored into the storage device of the pixel.

[0131] Figure 9B An example of a light source 912 controlled by digital drive data is shown. As Figure 9B shown, the digital drive scheme can use different durations to control the amount of light, while the amplitude or intensity of the light emitted can be constant. In the example shown, a pulse of constant amplitude can be applied to a current driver 922 to generate a constant drive current, but the drive current can be turned on for different time periods by switching an emission transistor 932 based on digital video data stored in the memory of the pixel.

[0132] As Figure 9A shown, the analog drive method has been dominant for decades. Advanced pixel circuits have made it possible to have large-size and high-resolution display panels with a thin-film transistor (TFT) backplane. However, the analog drive method may require analog devices such as a DAC, analog buffers, and capacitors. The DAC may need to convert thousands of data values in each row time and may therefore require a large area and have high power consumption and high cost. It may be necessary to use analog buffers to charge and discharge the data lines and the storage capacitors in the pixels, and it may be necessary to transfer the required analog voltage levels to the storage capacitors through the data lines. These thousands of high-speed analog buffers may increase the area, power, and cost of the analog active matrix display device. Therefore, an analog active matrix display used in a microdisplay application (e.g., a near-eye display) may have high power consumption and limited circuit area for each pixel. A large portion of the power consumption of an analog active matrix display may be consumed by the analog drive circuit (e.g., the DAC that converts digital display data into voltage / current signals) and the analog buffers that transfer the voltage / current signals. However, digital drive has not been successful due to, for example, the low speed and non-uniformity of the TFT backplane.

[0133] Figure 10A and Figure 10B shows an example operation of an analog active matrix display 1000. As Figure 10AThe analog active matrix display 1000 shown may include an active matrix 1010, a gate driver 1030 (e.g., a row driver), and a data driver (e.g., a column driver or a source driver), and the data driver may include a DAC 1040 external to the active matrix 1010 and an array of sample and hold circuits 1020 (which may include analog buffers). The gate driver 1030, the DAC 1040, and the sample and hold circuits 1020 may be controlled by a timing control circuit 1050. The gate driver 1030 may enable one row of pixels at a time. The data driver may receive digital video data, convert the digital video data into an analog voltage signal or an analog current signal using the DAC 1040, and send the analog video data to the pixels on the enabled row using column data lines. The analog video data may control a current driver for a light source of a pixel to drive the light source with a desired drive current so as to emit light with a desired intensity during an emission period.

[0134] As Figure 10B shown, pixel rows may be sequentially selected (e.g., one row of pixels at a time) to receive data (during a scan period) and emit light (during an emission period). Thus, pixels in different rows may not receive data simultaneously and may not emit light simultaneously. However, pixels on the same row may receive data simultaneously and may emit light simultaneously. The scan time generally includes a reset time, an in-pixel threshold voltage (Vth) compensation time, and a data charging time. The scan time for each row may be determined by the frame rate and the resolution. For example, for a 3K panel with a frame rate of 90 Hertz (Hz), the time for each row may be about 3700 nanoseconds (ns). For a 4K panel with a frame rate of 90 Hz, the time for each row may be about 2800 ns. However, the charging time may need to be, for example, between about 500 ns and about 1000 ns. Thus, higher resolutions such as 5K resolution and 6K resolution may be difficult to achieve.

[0135] Figure 11A An example operation of an analog-driven display 1100 is shown. As Figure 11AThe analog-driven display 1100 shown may include an active matrix 1110, a gate driver 1130 (e.g., a row driver), and a data driver (e.g., a column driver or a source driver), which may include a DAC 1140 external to the active matrix 1110 and an array of sample-and-hold circuits 1120 (which may include analog buffers). The gate driver 1130, the DAC 1140, and the sample-and-hold circuits 1120 may be controlled by a timing control circuit 1150. The active matrix 1110 may include a two-dimensional array of a plurality of pixels 1102. Each pixel 1102 may include a light source 1104 (e.g., an LED or an OLED), a current driving transistor 1106, a capacitor 1108, a transfer gate 1112, and a switching transistor 1114. The pixels 1102 in the same column may be connected to a column data line 1116.

[0136] As Figure 11A shown, the gate driver 1030 may turn on the transfer gate 1112 for the pixels on one row at a time. The data driver may receive digital video data, convert the digital video data into an analog voltage signal or an analog current signal using the DAC 1140, and send the analog video data to the capacitor 1108 of the pixel through the column data line 1116 and the transfer gate 1112. The analog video data may be stored in the capacitor 1108 during a scan period, during which the switching transistor 1114 may be turned off so that no current can pass through the light source 1104. During an emission period, the transfer gate 1112 may be turned off to stop receiving data from the column data line 1116, and the switching transistor 1114 may be turned on. The analog video data stored in the capacitor 1108 may control the current driving transistor 1106 to drive the light source 1104 with a required driving current (e.g., I OLED ) from a power supply to emit light with a required intensity during the emission period. The DAC 1140 may need to convert thousands of data in each row time, and the buffers may need to charge and discharge the column data line 1116 and the capacitors 1108 in the pixels. The buffers need to transfer an analog voltage to the storage capacitor through a line. As described above, these thousands of high-speed analog buffers and DACs may cause problems related to circuit area, power, and cost.

[0137] Figure 11BShows an example operation of a digitally driven display 1105. The digitally driven display 1105 may include a pixel array 1160 (e.g., active matrix), a gate driver 1180 (e.g., row driver), and a data driver 1170 (e.g., column driver or source driver) external to the pixel array 1160. The gate driver 1180 and the data driver 1170 may be controlled by a timing control circuit 1190. The pixel array 1160 may include a two-dimensional array of a plurality of pixels 1162. Each pixel 1162 may include a light source 1164 (e.g., LED or OLED), a current driving transistor 1166, a switching transistor 1168, and a storage unit 1172. The pixels 1162 in the same column may be connected to a data line 1174.

[0138] As Figure 11B shown, the gate driver 1180 may also be used to select the pixels on one row at a time by selectively connecting the storage units 1172 of the pixels on one row to the corresponding data lines 1174. The data driver 1170 may receive digital video data and send the digital video data to the storage units 1172 of the corresponding pixels in that row via the data lines 1174. The digital video data may be stored in the storage units 1172 during a scan period, during which the switching transistor 1168 may be turned off so that no current can pass through the light source 1164. During an emission period, the storage unit 1172 may be disconnected from the corresponding data line 1174, and the switching transistor 1168 may be turned on. During the emission period, the digital video data stored in the storage unit 1172 may turn on the current driving transistor 1166, thereby driving the light source 1164 with a constant driving current (e.g., I MAX ) for a period of time (e.g., corresponding to the digital video data). Similar to the analog driven display 1100, the pixels in different rows of the digitally driven display 1105 may receive data in a rolling manner (e.g., one row at a time) at different times and may also emit light at different times in each frame or sub-frame.

[0139] As Figure 11A and Figure 11BAs shown, digital driving can avoid some problems of the above analog driving circuit. DAC is not used in digital driving. Analog buffers are also not used in digital driving. The storage unit replaces the storage capacitor in the pixel, where the capacitance of the storage unit can be smaller than that of the storage capacitor. In addition, the digital data charging time is different from the analog charging time. Analog charging may take a long time to reach the required voltage level, while digital charging can take a shorter time to meet the input tolerance. Therefore, for next-generation displays with low power consumption and high resolution (e.g., above 4K), digital displays with memories in each pixel may be a promising solution. Due to backplane limitations such as instability, non-uniformity, and low speed of the TFT backplane, digital driving on the TFT board has not been successful. CMOS on the silicon backplane can be used in microdisplays for AR applications and VR applications, enabling high-resolution high-speed driving and eliminating the need for threshold voltage compensation for each transistor.

[0140] Figures 12A to 12C Examples of digital driving schemes are shown, such as pulse width modulation, binary coded modulation, and sub-frame driving methods. Digital driving methods can involve controlling the width of light emission, which can be referred to as the pulse width modulation (PWM) method. The basic PWM method is to change the duty cycle of the on / off ratio of the pulse signal.

[0141] Figure 12A An example of the pulse width modulation digital driving method is shown. In Figure 12A the example shown, 8-bit gray scale can be achieved by dividing each image frame into 256 sub-frames, where the light source can emit light in sub-frames between 0 and 256, thus emitting light at one of 256 levels. For example, the light source of a pixel that needs to display a digital image value of 10 can be turned on during 10 out of 256 sub-frames. Since each frame is evenly divided into multiple sub-frames (where the number of sub-frames is equal to the number of required intensity levels), high-frequency signals may be required to achieve high resolution and high color depth.

[0142] Figure 12B An example of the binary coded digital driving method is shown. In Figure 12BIn the binary-encoded digital driving method shown, binary encoding modulation can utilize the weighted duration of each bit. For example, the most significant bit (MSB) of the image data of a pixel can be used to control the emission of the light source in the pixel during the first sub-frame, where the length of the first sub-frame is approximately half of the frame time. A '1' in the MSB can turn on the light source during the first sub-frame, while a '0' in the MSB can turn off the light source during the first sub-frame. Similarly, the second MSB of the image data of the pixel can be used to control the emission of the light source in the pixel during the second sub-frame, where the length of the second sub-frame is approximately one-fourth of the frame time. A '1' in the second MSB can turn on the light source during the second sub-frame, while a '0' in this MSB can turn off the light source during the second sub-frame. The least significant bit (LSB) of the 8-bit image data of the pixel can be used to control the emission of the light source in the pixel during the eighth sub-frame, where the length of the eighth sub-frame is approximately 1 / 256 of the frame time. A '1' in the LSB can turn on the light source during the eighth sub-frame, while a '0' in the LSB can turn off the light source during the eighth sub-frame. Thus, the highest operating frequency can be determined by the length of the sub-frame used for the LSB and can therefore be approximately the same as Figure 12B the highest operating frequency of the PWM driving method shown.

[0143] As shown above, a digital display having a memory in a pixel is a good alternative to the conventional analog driving method. By removing the capacitors in the pixel and changing the analog signal switches to digital transistors, the driving load on the data buffer can be reduced. However, in a digital display using column data lines as shown in Figure 11B and digital driving schemes as shown in Figure 12A and Figure 12B there are still time constraints for data transfer from the buffer, especially in high-resolution displays.

[0144] Figure 12C An example of a sub-frame digital driving method is shown. Figure 12CThe sub-frame digital driving method shown uses the same sub-frame length. Sub-frames of the same length can be used to implement the MSB, and duty cycle control can be used to implement the LSB to reduce the emission time. For example, 8-bit image data can be divided into 5 MSBs and 3 LSBs. The 5 MSBs can be implemented using sub-frames of the same time length (e.g., 16 sub-frames, 8 sub-frames, 4 sub-frames, 2 sub-frames, and 1 sub-frame for bits 7, 6, 5, 4, and 3 respectively), and the 3 LSBs can be implemented by using smaller duty cycles in three sub-frames (e.g., 1 / 2 of a sub-frame, 1 / 4 of a sub-frame, and 1 / 8 of a sub-frame). The duty cycle can be controlled using, for example, an emission control signal. Thus, 255 gray levels with fewer visual artifacts can be implemented using 34 (16 + 8 + 4 + 2 + 1 + 3) sub-frames. In some embodiments, the 8-bit data can be divided and implemented differently, e.g., using 19 sub-frames, which include 15 (8 + 4 + 2 + 1) sub-frames for 4 MSBs and 4 sub-frames for 4 LSBs (using 1 / 2 of a sub-frame, 1 / 4 of a sub-frame, 1 / 8 of a sub-frame, and 1 / 16 of a sub-frame respectively). In this way, the highest operating frequency (e.g., sub-frame rate) of digital driving can be significantly reduced.

[0145] According to some embodiments, in order to further reduce the power consumption, circuit area, and cost of a microdisplay, and to improve the display resolution and uniformity of the microdisplay, a fully digital-driven microdisplay and the operation of the digital-driven microdisplay are disclosed. In the digital-driven microdisplay disclosed herein, pixels in a row or a column can be connected to data lines, where the data lines can include gates connected in series that are used to latch digital data bits of a page (e.g., a subframe) of an image frame and send these digital data bits to the pixels. For each page of the image frame, the display data bits from the data driver can be sent to the gate connected to the first pixel in each row or column in one clock cycle, and in the next clock cycle, that gate can send the received display data bits to the gate connected to the next pixel in that row or column, and can also receive new display data bits from the data driver. In this way, after a number of clock cycles, the display data bits of the page can be shifted to the gates connected to the corresponding pixels in all columns and all rows. After the display data bits of the page reach the gates connected to the corresponding pixels, the display data bits can be written into the memory of the pixels during a scan period, and these display data bits can be used to simultaneously turn on or off the drive current of all pixels to turn on or off individual pixels during the emission period of the page. The drive current of all pixels can be substantially the same, so at a given time, the intensity of the light emitted by the turned-on pixels can be substantially the same. Each image frame can include multiple pages. While the display data bits of one page are stored in the memory of the pixels and used to turn on or off the drive current, the display data bits of the next page can be sent to the gates connected to the pixels in the above-described manner. Then, the display data bits of the next page can be written into the memory of the pixels during a scan period, and these display data bits can be used to simultaneously turn on or off the drive current of all pixels to turn on or off each pixel during the emission period of the next page. The amount of light emitted by each pixel in an image frame can be the sum of the light emitted by that pixel in all pages (e.g., subframes) of the image frame.

[0146] In one example, a display driving circuit may include a plurality of unit (or pixel) rows. Each unit row of the plurality of unit rows may include: a plurality of pixel driving circuits for a plurality of light emitters (e.g., LEDs, OLEDs, micro-LEDs, μOLEDs, etc.); and a data line including an array of a plurality of data bit storage devices, the plurality of data bit storage devices being connected in series and configured to shift display data bits along the data line. The output terminal of each data bit storage device in the array of the plurality of data bit storage devices may be connected to a corresponding pixel driving circuit among the plurality of pixel driving circuits, for example, through a switch. Each pixel driving circuit among the plurality of pixel driving circuits may include, for example: a digital storage unit electrically connected to the output terminal of the corresponding data bit storage device and configured to store the display data bit from the output terminal of the data bit storage device; and a switch controlled by the display data bit stored in the digital storage unit to conduct or cut off the driving current to the corresponding light emitter among the plurality of light emitters.

[0147] In one example, a display driving circuit may include a plurality of unit rows. Each unit of one unit row of the plurality of unit rows may include: a data bit storage device (e.g., a gate, a latch, or a digital buffer); a digital storage unit (e.g., an SRAM unit) electrically coupled to the output terminal of the data bit storage device (e.g., through a switch) and configured to store the display data bit from the output terminal of the data bit storage device; and a switch (e.g., a transistor) controlled by the display data bit stored in the digital storage unit to conduct or cut off the driving current for the light emitter. The plurality of data bit storage devices of the unit row may be connected in series to form a data line capable of shifting display data bits along the data line.

[0148] In another example, a display panel may include a plurality of unit rows. One unit row of the plurality of unit rows may include: a plurality of light emitters; a plurality of pixel driving circuits for the plurality of light emitters; and a data line including an array of a plurality of data bit storage devices, the plurality of data bit storage devices being connected in series to shift display data bits along the data line. Each pixel driving circuit among the plurality of pixel driving circuits may be coupled to a corresponding light emitter among the plurality of light emitters. The output terminal of each data bit storage device in the array of the plurality of data bit storage devices may be connected to a corresponding pixel driving circuit among the plurality of pixel driving circuits.

[0149] The digital-driven display system disclosed herein is different from traditional passive matrix (PM) displays and active matrix (AM) displays, and this digital-driven display system is referred to herein as a digital matrix (DM) display to distinguish it from PM displays and AM displays. The technique of embedding digital circuits in each pixel can be used for emissive displays such as μOLED displays or μLED displays, and can also be used for reflective displays such as digital micromirror devices (DMDs). Compared with analog active matrix displays, the digital matrix display disclosed herein can dispense with analog drivers and large capacitors for storing analog data, can dispense with analog circuits such as digital-to-analog converters (DACs) and analog buffers, and can dispense with column lines and gate lines for driving (writing data and turning on) pixels row by row. Therefore, the digital matrix display disclosed herein can reduce power consumption, circuit area, and cost, and can improve display resolution and uniformity.

[0150] Figure 13A An example of a digital matrix display 1300 with a data driver 1320 located in the peripheral region is shown according to some embodiments. In the example shown, the digital matrix display 1300 includes a digital matrix 1310 that includes a two-dimensional array of a plurality of cells 1312. As described in more detail below, each cell 1312 can include a corresponding gate (or register, latch, and flip-flop, etc.) for data shifting, a digital memory for storing display data bits, and a pixel (including a driving transistor and a light emitter such as an LED or an OLED). The gates of a plurality of cells in a column (or row) of the digital matrix 1310 can be connected in series to form a data line including a gate array. The data driver 1320 (e.g., DDIC) can be located on a separate device (e.g., a chip or a die) outside the digital matrix 1310 and can be controlled by a timing control circuit 1330 to shift data into the respective cells 1312.

[0151] Figure 13BAn example of a digital matrix display 1305 with a data driver located in a digital matrix device is shown in accordance with certain embodiments. The digital matrix display 1305 may include a digital matrix 1340 and a timing control circuit 1350. The digital matrix 1340 may include a two-dimensional array of a plurality of cells 1342 and an on-chip data driver integrated circuit (DDIC). As described in more detail below, each cell 1342 may include a corresponding gate (or register, latch, and flip-flop, etc.) for data shifting, a digital memory for storing display data bits, and a pixel (including a driving transistor and a light emitter such as an LED or an OLED). Gates of a plurality of cells in a row (or column) of the digital matrix 1340 may be connected in series to form a data line including a gate array. When the data driver is on the same chip as the two-dimensional array of cells, the load of the data driver may be lower, and the data transfer from the data driver to the cells may be faster.

[0152] The operation of the digital matrix 1310 and the cells 1312 of the digital matrix display 1300 and the operation of the digital matrix 1340 and the cells 1342 of the digital matrix display 1305 are different from those of an active matrix display, such as Figure 11B the digital-driven display 1105 shown in. For example, an active matrix display may include a row driver and a column driver for activating row by row. In contrast, a DM display may not use a row driver (or a gate driver). The data driver in a DM display passes the display data of a sub-frame to the first cell, and the first cell passes the data to the next cell, and so on. After one sub-frame period (e.g., after 4K clocks for a 4K panel), each cell of the digital matrix display may have its designated data at the gate (or register, latch, or flip-flop) of the cell. Then, the digital data of the sub-frame (e.g., stored at the gate of the cell) may be written into the memories of all cells of the digital matrix during the same scan period. Then, all pixels may be turned on or off based on the digital data in the sub-frame during the same emission period. During the emission period, the data of the next sub-frame may be shifted into the gate array. In this way, the digital matrix may display an image frame by displaying another page after one page (e.g., a sub-frame). This digital driving scheme allows data to be written into all pixels simultaneously and allows all pixels to emit light simultaneously, where the page writing may be completed during the emission period.

[0153] Figure 14Shows an example of the operation of an example of a digital matrix display 1400 according to certain embodiments. In the example shown, the digital matrix display 1400 includes multiple columns of cells 1410. Each column of cells 1410 may include a plurality of cells. Each cell may include: a gate 1412 (e.g., a digital buffer, an inverter or NOT gate, a latch, a flip-flop, a register, etc.), which can store digital display data and shift the digital display data; a storage unit 1414, which can store pixel data of a sub-frame during the emission period; and a pixel 1416, which includes a current drive circuit that is controlled by the pixel data stored in the storage unit 1414 to provide a drive current to a light emitter during the emission period.

[0154] Figure 14 The left schematic diagram in shows the operation of the digital matrix display 1400 during the scan period after the display data of the sub-frame has been shifted into the array of gates 1412. The sub-frame data of all pixels can be sent to the corresponding storage unit 1414 and stored in the storage unit during the same scan period (e.g., one clock cycle). Figure 14 The right schematic diagram in shows the operation of the digital matrix display 1400 during the emission period after the scan period. During the emission period, the sub-frame data of all pixels stored in the corresponding storage unit 1414 can simultaneously control the current drive circuits in the corresponding pixels. Additionally, during the emission period, the gates 1412 are disconnected from the corresponding storage units, and the data of the next sub-frame can be sequentially shifted as indicated by the vertical arrow.

[0155] Figure 15 Shows an example of a cell 1500 of a digital matrix display (e.g., a micro-LED display or a μOLED display) during the scan period according to certain embodiments. The cell 1500 may be Figure 13A an example of the cell 1312 in, Figure 13B an example of the cell 1342 in, or Figure 14 an example of the cell in. In the example shown, the cell 1500 of the DM display may include a gate array portion, a storage unit 1516, and a drive portion. The gate array portion may be a part of the gate array of a column of cells, and the gate array portion may include, for example, a gate 1518 (e.g., an inverter or NOT gate) and a switch 1520. The switch 1520 can be selectively turned on or off during the page write period (and the emission period), and can be turned off during the scan period. A scan switch 1522 can connect the gate array portion to the storage unit 1516, which may include, for example, a static random access memory (SRAM) cell (e.g., as Figure 15As shown, it includes two inverters connected back-to-back and cross-connected to form a latch for holding data. The scan switch 1522 can be turned on during the scan period to latch the data at the output of the gate 1518 into the storage unit 1516, and during other times (e.g., the page write period or the emission period), the scan switch 1522 can be turned off. The driving part can include a driving transistor 1512, an emission control transistor 1514, and a light emitter 1510 such as an LED or an OLED. The output of the storage unit 1516 can be connected (directly or indirectly through a switch) to the driving transistor 1512, and the driving transistor 1512 can be turned on or off according to the data stored in the storage unit 1516 (e.g., "1" or "0"), thereby driving a current from the source through the emission control transistor 1514 to the light emitter 1510. The emission control transistor 1514 can be connected in series with the driving transistor 1512 and can be turned off during the scan period to turn off the light emitter, and / or (e.g., in the Figure 12C sub-frame driving method shown) control the duty cycle of emission during the emission period.

[0156] The digital driving circuit may not require a reset transistor, which is used in an analog-driven display to connect the anode of the light emitter (LED or OLED) to ground (or another constant voltage level) to write an accurate voltage level into the storage capacitor. The scan switch 1522 can operate in the same manner in multiple cells. The emission control transistor 1514 can also operate in the same manner in multiple cells. In some embodiments, adjacent pixels can share the emission control transistor 1514. In embodiments where the panel system allows the electroluminescent VDD (ELVDD) signal to swing, the emission control signal can be omitted, which means that all pixels in the panel can share the same emission control transistor.

[0157] Figure 16 Shows the operation of the cells in a column or a row of cells of an example of a digital matrix display 1600 according to certain embodiments. Each cell in the digital matrix display 1600 can be similar to the cell 1500. For example, each cell in the digital matrix display 1600 can include a gate 1618 (e.g., an inverter or a NOT gate), a switch 1620, a scan switch 1622, a storage unit 1616 (e.g., including an SRAM cell), an emission control transistor 1614 (or a switch), a driving transistor 1612, and a light emitter (e.g., an LED or an OLED).

[0158] Figure 16The left schematic diagram in [description] shows the operation of the digital matrix display 1600 during the scanning period after the display data of the sub-frame has been shifted into the array of gates 1618. During the scanning period, the scan switches 1622 of all cells can be turned on simultaneously, so that the sub-frame data of all pixels can be sent to the corresponding storage cells 1616 and stored in the storage cells during the same scanning period (e.g., one clock cycle). During the scanning period, the emission control transistor 1614 can be turned off, so that no current can be supplied from the power supply to the light emitter 1610 through the drive transistor 1612.

[0159] Figure 16 The right schematic diagram in [description] shows the operation of the digital matrix display 1600 during the emission period (which can also be a page write period) after the scanning period. During the emission period, the scan switches 1622 can be turned off, and the emission control transistor 1614 can be turned on. During the emission period of the sub-frame, the sub-frame data of all pixels stored in the corresponding storage cells 1616 can turn on or off the drive transistors 1612 in the corresponding pixels based on the stored data (e.g., "1" or "0"). Additionally, during the emission period, the gate 1412 is disconnected from the corresponding storage cell, and the switch 1620 can be turned on or off by a control signal (e.g., a clock signal) to sequentially shift the data of the next sub-frame in multiple clock cycles. Other cells in the DM display 1600 can be similar to Figure 16 the three cells shown, and can operate in a similar manner.

[0160] Figure 17A shows an example of a data line in a digital matrix display according to some embodiments. The data line can include an array of multiple gates 1702 connected by switches (not shown). The array of multiple gates can be connected in series. The connection can be in the vertical or horizontal direction. Each gate can store one bit of data. In one clock cycle (or half a clock cycle or multiple cycles), the data bits can be shifted in steps of one pixel. The data of the sub-frame or page can be loaded bit by bit until the first data bit is shifted through the array of gates to the gate of the last pixel.

[0161] Figure 17BAn example of a timing diagram 1700 is shown that includes pixel data loading, pixel data scanning, and light emission in an example of an image frame in a digital matrix display according to certain embodiments (e.g., a sub-frame). The waveform 1710 in the timing diagram 1700 shows a clock signal, the waveform 1720 in the timing diagram 1700 shows a scan switch control signal, and the waveform 1730 in the timing diagram 1700 shows an emission control signal. As shown, when the scan switch control signal (e.g., for one clock period) is high, the digital matrix display can be in a scan period 1722, during which the gate of each pixel can be connected to the storage unit of the pixel to store data in the storage unit. When the scan switch control signal is high, the emission control signal can be low to turn off the emission control transistor (e.g., emission control transistor 1514 or 1614). After the scan period 1722, in the emission period 1732, the scan switch control signal can be set low, and the emission control signal can be set high. Thus, the gate can be disconnected from the corresponding storage unit, and if the data stored in the storage unit is, for example, "1", the data stored in the storage unit can turn on the driving transistor of the pixel. In this way, as described above, for example, with reference to Figure 15 and Figure 16 the drive current can flow from the power supply through the emission control transistor and the driving transistor to the light emitter of the pixel to turn on the light emitter.

[0162] In the emission period 1732, the scan switch control signal can be set low so that the gate can be disconnected from the corresponding storage unit. Thus, the gate can be controlled to shift to the data of the next page (e.g., sub-frame) during the emission period 1732. In one example, the emission period 1732 can include approximately the same number of clock cycles as the number of cells in the gate array (e.g., the number of cells in a column or a row). In each clock cycle, the data bits in the gate array can be shifted one step (e.g., one bit) towards the end of the gate array. After a certain number of clock cycles (e.g., approximately the number of gates in the gate array, or the number of cells in a column or a row), the first data bit can reach the last gate in the gate array. When the data of the next sub-frame is shifted, the pixel can be in the emission stage, and the data movement through the gate array does not affect pixel emission.

[0163] Figure 18 An example of the operation of a transmission gate on a data line 1800 in an example of a digital matrix display during a page write period (or emission period) according to certain embodiments is shown. The data line 1800 can include a gate array connected in series by a switch array. Figure 18 Only 3 gates and 3 switches of the data line 1800 are shown. The data line 1800 can be implemented using different digital circuits. Figure 18The transmission gate array shown is an example of a circuit for clock-synchronized data transmission, where inverters are used as transmission gates. The transmission gate array can be fast and can require a small area. Digital circuits using more transistors (e.g., D latches and flip-flops) can be a more stable design choice for data lines.

[0164] In Figure 18 the example shown, at the positive clock edge (e.g., rising edge T 0r ) of the first clock cycle, odd switches (e.g., including the first switch 1802 and the third switch 1806) can conduct while even switches (e.g., including the second switch 1804) can be off, such that the first gate 1812 (e.g., an inverter) can obtain input data D1 from a data driver or a previous gate and have data at the output and the third gate 1816 (e.g., an inverter) can obtain input data D0 from the second gate 1814 and have data at the output At the negative clock edge (e.g., T 0f ) of the first clock cycle, odd switches (e.g., the first switch 1802 and the third switch 1806) can be off while even switches (e.g., the second switch 1804) can conduct, such that the second gate 1814 (e.g., an inverter) can obtain input data from the first gate 1812 and have data D1 at the output, while the outputs at the first gate 1812 and the third gate 1816 can remain unchanged (e.g., data and data respectively). Thus, after the first clock cycle, D1 can be at the output of the second gate 1814, while can be at the output of the third gate 1816.

[0165] At the positive clock edge (e.g., rising edge T 1r ) of the second clock cycle, odd switches (e.g., including the first switch 1802 and the third switch 1806) can conduct again while even switches (e.g., including the second switch 1804) can be off, such that the first gate 1812 can obtain input data D2 from a data driver or a previous gate and have data at the output and the third gate 1816 can obtain input data D1 from the second gate 1814 and have data at the output At the negative clock edge (e.g., T 1f ) of the second clock cycle, odd switches (e.g., the first switch 1802 and the third switch 1806) can be off while even switches (e.g., the second switch 1804) can conduct, such that the second gate 1814 (e.g., an inverter) can obtain input data from the first gate 1812 and has data D2 at the output, while the outputs at the first gate 1812 and the third gate 1816 can remain unchanged (e.g., data and data respectively). Thus, after the second clock cycle, D2 can be at the output of the second gate 1814, while can be at the output of the third gate 1816. In this way, the data bits of a page (e.g., a sub-frame) can be shifted into the gate array at a rate of one bit per clock cycle.

[0166] As Figures 16 to 18 shown, in terms of the system, the digital matrix display disclosed herein may not have direct control of pixels through gates and data signals. The scan switch control signal and the emission control signal can be global, and the circuit operation can be synchronized with the clock signal. In some embodiments, adjacent pixels can share the emission control transistor. In some embodiments where the panel system allows the ELVDD signal to swing, the emission control signal may not be required, and all pixels in the digital matrix can share the same emission control transistor. The difference between the active matrix display and the digital matrix display disclosed herein can also be shown by a timing diagram.

[0167] Figure 19A A timing diagram 1900 of an image frame including an example of an active matrix display, the image frame including a plurality of sub-frames. The active matrix display can be similar to Figure 11B the digital drive display 1105 in Figure 19A The digital drive scheme shown can be similar to Figure 12C the sub-frame drive method shown, where the sub-frame for the MSB and the sub-frame for the LSB can have the same duration, and different duty cycles can be used to implement the LSB. As Figure 19A shown and as described above for example with reference to Figure 11B the pixels in different rows of the digital drive display 1105 can be selected (e.g., by a gate driver) to receive data at different times in a scrolling manner (e.g., one row at a time), and can also emit light at different times in each sub-frame.

[0168] Figure 19B A timing diagram 1905 of an image frame including an example of a digital matrix display disclosed herein according to certain embodiments, the image frame including a plurality of sub-frames. The digital matrix display can be similar to Figure 13A the digital matrix display 1300 in Figure 13B or the digital matrix display 1305 in Figure 19B The digital drive scheme shown can be similar to Figure 12CThe sub-frame driving method shown, where the sub-frame for the MSB and the sub-frame for the LSB can have the same duration, and different duty cycles can be used to implement the LSB. As Figure 19B shown, in the DM display disclosed herein, data scanning can be performed simultaneously on all pixels in the digital matrix display (data is transferred from the gate to the storage unit of the pixel), and all pixels of the digital matrix display can emit simultaneously. The page write period can overlap with the emission period.

[0169] Taking a 4K×4K×3 (RGB) panel as an example, it operates at 90 Hz, has 20 sub-frames per frame, each sub-frame time is about 555 microseconds (μs), and 48000000 bits (4K×4K×3 bits) of data can be transferred during one sub-frame time. Using 4K×3 (RGB) columns and the inverter as the gate, 4K data bits can be transferred in each column during one sub-frame time. Therefore, it may be necessary to move one bit to the next gate in about 138 ns, and in the transmission gate array, the clock speed in each gate array can be about 3.6 megahertz (MHz) (or reduced to half if both the rising edge and the falling edge are utilized simultaneously). In an embodiment where the data driver for sub-frame conversion (e.g., DDIC) is set outside the digital matrix chip (e.g., as Figure 13A shown), it may be necessary to transfer 86400000000 bits of display data for 90 frames (each frame includes 20 sub-frames) in one second, which can be achieved by a simple conversion method using a 32-bit data bus with a data rate of about 2.7 gigabits per second (Gbps) on each bus. If the data driver for sub-frame conversion (e.g., DDIC) is in the digital matrix chip (as Figure 13B shown), then in one second, 34560000000 bits of data for 90 frames (each frame includes 4K×4K 8-bit RGB image data) can be transferred to the digital matrix chip through a 32-bit data bus with a data rate of about 1.0 Gbps on each bus. In any embodiment, as described above, the data bits can be internally shifted along the data lines in the digital matrix chip at a speed of about 3.6 MHz, for example.

[0170] An additional advantage of the digital driving technology disclosed herein is that a separate data driver can be used. In analog driving, data mismatch, power consumption, and cost among data drivers are some technical bottlenecks of the data driver. Digital driving does not have the mismatch problem, power, and cost problems in digital data drivers. In addition, the digital matrix can implement sub-block driving.

[0171] The embodiments disclosed herein can be used to implement components in an artificial reality system or can be implemented in conjunction with an artificial reality system. Artificial reality is a form of reality that has been adjusted in some way before being presented to a user, and this form of reality can include, for example, virtual reality, augmented reality, mixed reality, hybrid reality, or some combination and / or derivative thereof. Artificial reality content can include fully generated content or generated content combined with captured (e.g., real-world) content. Artificial reality content can include video, audio, haptic feedback, or some combination thereof, and any of them can be presented in a single channel or in multiple channels (e.g., stereoscopic video that gives a three-dimensional effect to a viewer). Additionally, in some embodiments, artificial reality can also be associated with applications, products, accessories, services, or some combination thereof, which are used, for example, to create content in artificial reality and / or otherwise use in artificial reality (e.g., perform activities in artificial reality). An artificial reality system that provides artificial reality content can be implemented on various platforms, including an HMD connected to a host computer system, a stand-alone HMD, a mobile device or computing system, or any other hardware platform capable of providing artificial reality content to one or more viewers.

[0172] Figure 20 FIG. 4 is a simplified block diagram of an example electronic system 2000 of an example near-eye display (e.g., an HMD device) for implementing some of the examples disclosed herein. The electronic system 2000 can be used as the electronic system of the above-described HMD device or other near-eye display. In this example, the electronic system 2000 can include one or more processors 2010 and a memory 2020. The one or more processors 2010 can be configured to execute instructions for performing operations at multiple components and can be, for example, a general-purpose processor or a microprocessor suitable for implementation within a portable electronic device. The one or more processors 2010 can be communicatively coupled to multiple components within the electronic system 2000. To achieve this communicative coupling, the one or more processors 2010 can communicate with the other components shown via a bus 2040. The bus 2040 can be any subsystem suitable for transmitting data within the electronic system 2000. The bus 2040 can include multiple computer buses for transmitting data and additional circuitry.

[0173] Memory 2020 may be coupled to one or more processors 2010. In some embodiments, memory 2020 may provide both short-term and long-term storage and may be divided into several units. Memory 2020 may be volatile, e.g., static random access memory (SRAM) and / or dynamic random access memory (DRAM), and / or memory 2020 may be non-volatile, e.g., read-only memory (ROM), and flash memory, etc. Additionally, memory 2020 may include removable memory devices, e.g., secure digital (SD) cards. Memory 2020 may provide storage for computer-readable instructions, data structures, program code, and other data for electronic system 2000. In some embodiments, memory 2020 may be distributed across different hardware subsystems. Instruction sets and / or code sets may be stored on memory 2020. These instructions may take the form of executable code executable by electronic system 2000, and / or may take the form of source code and / or installable code, which may be in the form of executable code when compiled and / or installed on electronic system 2000 (e.g., using any of a variety of commonly available compilers, installers, compression / decompression utilities, etc.).

[0174] In some embodiments, memory 2020 may store multiple applications 2022 to 2024, which may include any number of applications. Examples of applications may include gaming applications, conferencing applications, video playback applications, or other suitable applications. These applications may include depth sensing functionality or eye tracking functionality. Applications 2022 to 2024 may include specific instructions to be executed by one or more processors 2010. In some embodiments, certain applications or certain portions of applications 2022 to 2024 may be capable of being executed by other hardware subsystems 2080. In certain embodiments, memory 2020 may additionally include a secure memory, which may include multiple additional security controls to prevent copying of secure information or other unauthorized access to secure information.

[0175] In some embodiments, memory 2020 may include an operating system 2025 loaded in the memory. Operating system 2025 may be operable to initiate execution of instructions provided by applications 2022 to 2024, and / or manage other hardware subsystems 2080 and interact with a wireless communication subsystem 2030, which may include one or more wireless transceivers. Operating system 2025 may be suitable for performing other operations across multiple components in electronic system 2000, these other operations including threading, resource management, data storage control, and other similar functions.

[0176] The wireless communication subsystem 2030 may include, for example, an infrared communication device, a wireless communication device, and / or a chipset (e.g., a Bluetooth device, an IEEE 802.11 device, a Wi-Fi device, a WiMax device, a cellular communication facility, etc.), and / or a similar communication interface. The electronic system 2000 may include one or more antennas 2034 for wireless communication, which are part of the wireless communication subsystem 2030 or separate components coupled to any part of the system. Depending on the desired functionality, the wireless communication subsystem 2030 may include a separate transceiver for communicating with a base transceiver station and other wireless devices and access points, which may include communication with different data networks and / or network types, such as a wireless wide-area network (WWAN), a wireless local area network (WLAN), or a wireless personal area network (WPAN). The WWAN may be, for example, a WiMax (IEEE 802.16) network. The WLAN may be, for example, an IEEE 802.11x network. The WPAN may be, for example, a Bluetooth network, IEEE 802.15x, or some other type of network. The techniques described herein may also be used for any combination of WWAN, WLAN, and / or WPAN. The wireless communication subsystem 2030 may allow for the exchange of data with a network, other computer systems, and / or any other devices described herein. The wireless communication subsystem 2030 may include means for transmitting or receiving data (e.g., an identifier of the HMD device, location data, a geographical map, a heat map, a photo, or a video) using one or more antennas 2034 and one or more wireless links 2032.

[0177] An embodiment of the electronic system 2000 may also include one or more sensors 2090. The one or more sensors 2090 may include, for example, an image sensor, an accelerometer, a pressure sensor, a temperature sensor, a proximity sensor, a magnetometer, a gyroscope, an inertial sensor (e.g., a subsystem combining an accelerometer and a gyroscope), an ambient light sensor, or any other similar device or subsystem operable to provide sensory output and / or receive sensory input (e.g., a depth sensor or a position sensor). For example, in some embodiments, the one or more sensors 2090 may include one or more inertial measurement units (IMUs) and / or one or more position sensors. The IMU may generate calibration data indicating an estimated position of the HMD device relative to an initial position of the HMD device based on measurement signals received from one or more of the plurality of position sensors. The position sensor may generate one or more measurement signals in response to movement of the HMD device. Examples of the position sensor may include, but are not limited to, one or more accelerometers, one or more gyroscopes, one or more magnetometers, another suitable type of sensor for detecting movement, a sensor for error correction of the IMU, or some combination thereof. The position sensor may be located outside the IMU, inside the IMU, or some combination thereof. At least some sensors may sense using a structured light pattern.

[0178] The electronic system 2000 may include a display 2060. The display 2060 may be a near-eye display, and the display 2060 may graphically present information (e.g., images, videos, and various instructions) from the electronic system 2000 to the user. Such information may be obtained from: one or more applications 2022 to 2024; a virtual reality engine 2026; one or more other hardware subsystems 2080; a combination thereof; or any other suitable means for parsing graphical content for the user (e.g., via an operating system 2025). The display 2060 may use liquid crystal display (LCD) technology, light emitting diode (LED) technology (e.g., including OLED, ILED, micro-LED, AMOLED, TOLED, etc.), light emitting polymer display (LPD) technology, or some other display technology.

[0179] The electronic system 2000 may include a user input / output (I / O) interface 2070. The user input / output interface 2070 may allow a user to send action requests to the electronic system 2000. The action requests may be requests to perform specific actions. For example, the action requests may be requests to start or end an application or to perform specific actions within an application. The user input / output interface 2070 may include one or more input devices. Example input devices may include a touch screen, a touch pad, one or more microphones, one or more buttons, one or more knobs, one or more switches, a keyboard, a mouse, a game controller, or any other suitable device for receiving action requests and transmitting the received action requests to the electronic system 2000. In some embodiments, the user input / output interface 2070 may provide haptic feedback to the user according to instructions received from the electronic system 2000. For example, haptic feedback may be provided when an action request is received or when an action request has been executed.

[0180] The electronic system 2000 may include a camera 2050, which may be used to take pictures or videos of the user, for example, for tracking the user's eye position. The camera 2050 may also be used to take pictures or videos of the environment, for example, for VR applications, AR applications, or MR applications. The camera 2050 may include, for example, a complementary metal–oxide–semiconductor (CMOS) image sensor having millions or tens of millions of pixels. In some embodiments, the camera 2050 may include two or more cameras that may be used to acquire 3D images.

[0181] In some embodiments, the electronic system 2000 may include a plurality of other hardware subsystems 2080. Each of the plurality of other hardware subsystems 2080 may be a physical subsystem within the electronic system 2000. Although each of the other hardware subsystems 2080 may be permanently configured as a structure, some of the other hardware subsystems 2080 may be temporarily configured to perform specific functions or be temporarily activated. Examples of the other hardware subsystems 2080 may include, for example, audio output and / or input interfaces (e.g., microphones or speakers), near field communication (NFC) devices, rechargeable batteries, battery management systems, wired / wireless battery charging systems, etc. In some embodiments, one or more functions of the other hardware subsystems 2080 may be implemented in software.

[0182] In some embodiments, the memory 2020 of the electronic system 2000 may also store a virtual reality engine 2026. The virtual reality engine 2026 may execute applications within the electronic system 2000 and receive position information, acceleration information, velocity information, predicted future positions, or any combination thereof of the HMD device from various sensors. In some embodiments, the information received by the virtual reality engine 2026 may be used to generate signals (e.g., display instructions) to the display 2060. For example, if the received information indicates that the user has looked left, the virtual reality engine 2026 may generate content for the HMD device that reflects the user's activity in the virtual environment. Additionally, the virtual reality engine 2026 may execute actions within an application in response to an action request received from the user input / output interface 2070 and provide feedback to the user. The feedback provided may be visual feedback, auditory feedback, or tactile feedback. In some implementations, one or more processors 2010 may include one or more GPUs that may execute the virtual reality engine 2026.

[0183] In various implementations, the hardware and subsystems described above may be implemented on a single device or on multiple devices that may communicate with each other using wired or wireless connections. For example, in some implementations, some components or subsystems (e.g., the GPU, the virtual reality engine 2026, and applications (e.g., tracking applications)) may be implemented on a console separate from the head-mounted display device. In some implementations, a single console may be connected to more than one HMD or support more than one HMD.

[0184] In an alternative configuration, different components and / or additional components may be included in the electronic system 2000. Similarly, the functions of one or more of these components may be distributed among these components in a manner different from the above-described manner. For example, in some embodiments, the electronic system 2000 may be modified to include other system environments, such as an AR system environment and / or an MR system environment.

[0185] The methods, systems, and devices discussed above are all examples. Various embodiments may appropriately omit, substitute, or add various programs or components. For example, in an alternative configuration, the described methods may be performed in an order different from the described order, and / or various stages may be added, omitted, and / or combined. Additionally, the features described with respect to certain embodiments may be combined in various other embodiments. The different aspects and elements in the embodiments may be combined in a similar manner. Furthermore, technology is evolving, so many elements are examples and these examples do not limit the scope of the present disclosure to those specific examples.

[0186] Numerous specific details are given in the description to provide a thorough understanding of the embodiments. However, the embodiments may be practiced without these specific details. For example, well-known circuits, processes, systems, structures, and techniques have been shown without unnecessary detail in order to avoid obscuring the embodiments. This description merely provides example embodiments and is not intended to limit the scope, applicability, or configuration of the invention. Rather, the description of the embodiments above will provide those skilled in the art with an enabling description for implementing various embodiments.

[0187] In addition, some embodiments are described as processes depicted as flowcharts or block diagrams. Although each process may describe multiple operations as a sequential process, many of these operations may be performed in parallel or simultaneously. In addition, the order of these operations may be rearranged. A process may have additional steps not included in the figures. In addition, embodiments of the method may be implemented by hardware, software, firmware, middleware, microcode, hardware description language, or any combination thereof. When implemented in software, firmware, middleware, or microcode, program code or multiple code segments for performing multiple related tasks may be stored in a computer-readable medium such as a storage medium. The processor may execute the multiple related tasks.

[0188] It will be apparent to those skilled in the art that substantial variations may be made in accordance with specific requirements. For example, custom or dedicated hardware may also be used, and / or multiple specific elements may be implemented in hardware, software (including portable software, such as applets, etc.), or both hardware and software. In addition, connections to other computing devices such as network input / output devices may be employed.

[0189] Referring to the accompanying drawings, components that may include a memory may include a non-transitory machine-readable medium. The terms "machine-readable medium" and "computer-readable medium" may refer to any storage medium that participates in providing data that causes a machine to operate in a particular manner. In the embodiments provided above, various machine-readable media may be involved in providing instructions / code to a processing unit and / or one or more other devices for execution. Additionally or alternatively, the machine-readable medium may be used to store and / or carry such instructions / code. In many implementations, the computer-readable medium is a physical and / or tangible storage medium. Such a medium may take many forms, including but not limited to non-volatile media, volatile media, and transmission media. Common forms of computer-readable media include, for example, magnetic and / or optical media such as compact disks (CDs) or digital versatile disks (DVDs), punched cards, paper tapes, any other physical medium with patterns of holes, random access memory (RAM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), flash-EPROM, any other memory chip or cartridge, carrier waves as described below, or any other medium from which a computer can read instructions and / or code. A computer program product may include code and / or machine-executable instructions that may represent a process, function, subroutine, program, routine, application (App), subroutine, module, software package, class, or any combination of instructions, data structures, or program statements.

[0190] Those skilled in the art will recognize that the information and signals used to transmit the messages described herein may be represented using any of a variety of different technologies and techniques. For example, the data, instructions, commands, information, signals, bits, symbols, and chips that may be referred to throughout the above description may be represented using voltages, currents, electromagnetic waves, magnetic fields or magnetic particles, optical fields or optical particles, or any combination thereof.

[0191] As used herein, the terms "and" and "or" can have multiple meanings, and at least in part, these meanings are also expected to be based on the context in which these terms are used. Generally, "or", if used to relate to a list, such as A, B, or C, is intended to mean A, B, and C (used in an inclusive sense here) and A, B, or C (used in an exclusive sense here). In addition, as used herein, the term "one or more" can be used to describe any feature, structure, or property in the singular form, or it can be used to describe a certain combination of multiple features, multiple structures, or multiple properties. However, it should be noted that this is merely an illustrative example, and the claimed subject matter is not limited to this example. In addition, the term "at least one", if used to relate to a list, such as A, B, or C, can be interpreted to mean A, B, C, or any combination of A, B, and / or C (e.g., AB, AC, BC, AA, ABC, AAB, or AABBCCC, etc.).

[0192] In addition, although certain embodiments have been described using a specific combination of hardware and software, it should be recognized that other combinations of hardware and software are also feasible. Certain embodiments can be implemented solely in hardware, or solely in software, or using a combination thereof. In one example, the software can be implemented using a computer program product that includes computer program code or instructions that can be executed by one or more processors to perform any or all of the steps, operations, or processes described in this disclosure, where the computer program can be stored on a non-transitory computer-readable medium. The various processes described herein can be implemented on the same processor or on different processors in any combination.

[0193] In cases where a device, system, component, or module is described as being configured to perform certain operations or functions, such a configuration can be accomplished, for example, by designing an electronic circuit to perform the operation, by programming a programmable electronic circuit (e.g., a microprocessor) to perform the operation (e.g., by executing computer instructions or code), or by a programmed processor or core to execute code or instructions stored on a non-transitory storage medium to perform the operation, or any combination thereof. Processes can communicate using a variety of techniques, including but not limited to traditional techniques for inter-process communication, and different pairs of processes can use different techniques, or the same pair of processes can use different techniques at different times.

[0194] Therefore, the specification and the drawings are to be considered illustrative rather than restrictive. Thus, although specific embodiments have been described, these specific embodiments are not intended to be limiting.

Claims

1. A display driving circuit includes a plurality of unit rows, and one unit row of the plurality of unit rows includes: A plurality of pixel driving circuits for a plurality of light emitters; And A data line, the data line including an array of a plurality of data bit storage devices, the plurality of data bit storage devices being connected in series and configured to shift display data bits along the data line, and an output terminal of each data bit storage device in the array of the plurality of data bit storage devices being connected to a corresponding pixel driving circuit in the plurality of pixel driving circuits.

2. The display driving circuit according to claim 1, wherein, Each unit row of the plurality of unit rows includes a column of units or a row of units.

3. The display driving circuit according to claim 1 or 2, wherein The data line includes a switch array, and the switch array is interleaved with the array of the plurality of data bit storage devices.

4. The display driving circuit according to claim 3, Among them, Even switches in the switch array are configured to switch at a time different from a switching time of odd switches in the switch array, Or wherein: Even switches in the switch array are configured to be switched by a first control signal or a first edge of a control signal; and Odd switches in the switch array are configured to be switched by a second control signal or a second edge of the control signal.

5. The display driving circuit according to any one of the preceding claims, wherein, Each data bit storage device in the array of the plurality of data bit storage devices includes an inverter, a transmission gate, a latch, a flip-flop, a register, a storage cell, or a digital buffer.

6. The display driving circuit according to any one of the preceding claims, wherein, Each pixel driving circuit in the plurality of pixel driving circuits includes: A digital storage unit electrically connected to a corresponding data bit storage device in the array of the plurality of data bit storage devices and configured to store a display data bit from the output terminal of the data bit storage device; and A first switch controlled by the display data bit stored in the digital storage unit to conduct or cut off a driving current to a corresponding light emitter in the plurality of light emitters.

7. The display driving circuit according to claim 6, wherein: The digital storage unit includes a static random access memory (SRAM) cell, and / or The first switch includes a transistor.

8. The display driving circuit according to claim 6, wherein, The digital storage unit is connected to the corresponding data bit storage device through a second switch in each unit of the unit row, and optionally, wherein: A plurality of second switches in each unit row are controlled by the same control signal, and / or A plurality of second switches in the plurality of unit rows are controlled by the same control signal.

9. The display driving circuit according to claim 6, wherein, The digital storage unit is connected to the corresponding data bit storage device through a second switch in each unit of the unit row, wherein each pixel driving circuit in the plurality of pixel driving circuits further includes a transmission control switch that connects the first switch to a power supply, and optionally Wherein, a plurality of transmission control switches in each unit row are controlled by a first control signal, and the first control signal is opposite to a second control signal for controlling a plurality of second switches in the unit row.

10. The display driving circuit according to any one of the preceding claims further comprises: A data driver circuit, the data driver circuit being located at a peripheral area of the display driving circuit, and the data driver circuit being connected to the plurality of unit rows.

11. The display driving circuit according to claim 10, wherein, The data driver circuit includes a plurality of data drivers configured to drive different unit rows among the plurality of unit rows.

12. The display driving circuit according to claim 10, wherein: The data driver circuit is configured to provide display data bits of an image frame sub-frame by sub-frame in a plurality of sub-frames; and The plurality of display data bits of each sub-frame among the plurality of sub-frames includes one data bit of each unit among the plurality of unit rows.

13. A display driving circuit, comprising a plurality of unit rows, wherein: Each unit of a unit row among the plurality of unit rows includes: A data bit storage device; A digital storage unit electrically coupled to an output terminal of the data bit storage device and configured to store a display data bit from the output terminal of the data bit storage device; and A switch controlled by the display data bit stored in the digital storage unit to turn on or off a driving current for an optical emitter; and The plurality of data bit storage devices of the unit row are connected in series to form a data line capable of shifting display data bits along the data line.

14. A display panel, comprising a plurality of unit rows, wherein a unit row among the plurality of unit rows includes: A plurality of optical emitters; A plurality of pixel driving circuits for the plurality of optical emitters, each of the plurality of pixel driving circuits being coupled to a corresponding optical emitter among the plurality of optical emitters; And A data line including an array of a plurality of data bit storage devices connected in series and configured to shift display data bits along the data line, an output terminal of each data bit storage device in the array of the plurality of data bit storage devices being connected to a corresponding pixel driving circuit among the plurality of pixel driving circuits.

15. The display panel according to claim 14, wherein, The optical emitters among the plurality of optical emitters include an organic light emitting diode (OLED), a micro-OLED, a light emitting diode (LED), or a micro-LED.

Images