Photodetector, camera, and imaging system
By designing multiple light detection substrates and circuit substrates in the photo detector, and using row selection circuits and column reading circuits to realize selective reading of specific wavelength bands, the problem of insufficient processing speed of existing hyperspectral imaging technology is solved, and the processing speed is significantly improved.
Patent Information
- Application Number
- CN202380080064.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2022-11-22
- Filing Date
- 2023-09-20
- Publication Date
- 2025-06-27
AI Technical Summary
The existing hyperspectral imaging technology has shortcomings in processing speed and is difficult to achieve high speed.
A light detector is designed, including a plurality of light detection substrates and circuit substrates. The light detection substrates are arranged in the row direction and column direction. Through the row selection circuit and the column readout circuit, selectively read out the detection results of a specific wavelength band, thereby increasing the processing speed.
By only reading the necessary row signals, the processing speed of hyperspectral imaging is significantly improved compared to reading out all row signals in sequence, and the processing speed of hyperspectral imaging is achieved.
Smart Images

Figure CN120226371A_ABST
Abstract
Description
Technical Field
[0001] One aspect of the present disclosure relates to a photodetector, a camera, and an imaging system. Background Art
[0002] In Patent Document 1 described below, a hyperspectral imaging device is described. In hyperspectral imaging, when photographing an object, not only the shape of the object is obtained, but also spectral information is obtained together, and two-dimensional image information for each wavelength is obtained. By using the two-dimensional image information for each wavelength, inspection of an object that cannot be achieved in an RGB image can be realized.
[0003] [Prior Art Document]
[0004] [Patent Document]
[0005] [Patent Document 1] U.S. Patent No. 10,274,368 Summary of the Invention
[0006] [Problems to be Solved by the Invention]
[0007] In inspections based on hyperspectral imaging and the like, high speed is sometimes pursued. Therefore, high-speed processing is pursued for hyperspectral imaging.
[0008] Therefore, an object of one aspect of the present disclosure is to provide a photodetector, a camera, and an imaging system capable of speeding up the processing of hyperspectral imaging.
[0009] [Means for Solving the Problems]
[0010] A photodetector according to one aspect of the present disclosure, [1] "comprises: a plurality of light detection substrates having sensitivity to mutually different wavelength bands; and a circuit substrate on which the plurality of light detection substrates are mounted; and each of the plurality of light detection substrates has a plurality of light detection portions arranged along a row direction and a column direction perpendicular to the row direction, and the plurality of light detection substrates are mounted on the circuit substrate in a manner arranged along the column direction, and the circuit substrate has: a plurality of pixel circuits arranged along the row direction and the column direction, respectively electrically connected to the plurality of light detection portions; a row selection circuit that selects a row for reading out a signal from among the plurality of pixel circuits; and a column readout circuit that reads out signals from the plurality of pixel circuits of the rows selected by the row selection circuit for each column; and the row selection circuit is configured to be able to select any row from among the plurality of rows of the plurality of pixel circuits".
[0011] In this optical detector, a plurality of optical detection substrates having sensitivities for different wavelength bands are placed on a circuit board, and each optical detection substrate has a plurality of optical detection units arranged along the row direction and the column direction. In addition, the plurality of optical detection substrates are placed on the circuit board in a manner arranged along the column direction. Thus, for example, by making the light spectrally split in the column direction by a spectroscopic element incident on the optical detection units of each optical detection substrate (by arranging the optical detector such that the column direction is along the spectroscopic direction), two-dimensional image information for each wavelength can be obtained. In addition, in this optical detector, a row selection circuit that selects a row for reading out signals from among a plurality of pixel circuits is configured to be able to select an arbitrary row from among a plurality of rows of the plurality of pixel circuits. Thus, signals from the pixel circuits of the necessary rows can be read out, while on the other hand, signals from the pixel circuits of the unnecessary rows are not read out. In hyperspectral imaging, inspections and the like can be performed using only the detection results for a specific wavelength band. Therefore, by reading out only the signals from the pixel circuits of the necessary rows, the processing can be speeded up compared to, for example, the case of sequentially reading out the pixel circuits of all rows. Therefore, according to this optical detector, the processing of hyperspectral imaging can be speeded up.
[0012] It is feasible that an optical detector according to one aspect of the present disclosure, [2] "the optical detector as described in [1], further comprising a control unit, the control unit controlling the row selection circuit in such a manner that signals from the plurality of pixel circuits of the row corresponding to the input are read out, while on the other hand, signals from the plurality of pixel circuits of the rows other than the row corresponding to the input are not read out". In this case, for example, the processing can be speeded up compared to the case of sequentially reading out the pixel circuits of all rows.
[0013] It is feasible that an optical detector according to one aspect of the present disclosure, [3] "the optical detector as described in [1] or [2], wherein the plurality of optical detection substrates include a first optical detection substrate and a second optical detection substrate, and the second optical detection substrate is adjacent to the first optical detection substrate with a first gap in the column direction". In this case, for example, by arranging the optical detector such that light in an unnecessary inspection wavelength band among the light spectrally split in the column direction by a spectroscopic unit is incident on the first gap, the processing can be further speeded up. In addition, the optical detection substrate can be reduced, and the manufacturing can be facilitated.
[0014] It is feasible that an optical detector according to one aspect of the present disclosure, [4] "the optical detector as described in [3], wherein a plurality of non-connected pixel circuits not electrically connected to the plurality of optical detection substrates are arranged in a region of the circuit board that overlaps with the first gap when viewed from the thickness direction of the circuit board". In this case, for example, the configuration of the optical detection substrate can be changed such that the optical detection unit is electrically connected to the non-connected pixel circuit, and the degree of freedom can be increased.
[0015] It is feasible that a photodetector according to one aspect of the present disclosure is "the photodetector as described in [4], wherein the capacitance portions of the plurality of non-connected pixel circuits are reset when the capacitance portions of the plurality of pixel circuits are reset". Since no light detection portion is connected to the non-connected pixel circuit, no signal is stored, but sometimes charges generated at the PN junction portion due to the incidence of light are accumulated. In this case, there is a concern that such charges may affect the surrounding pixel circuits as parasitic capacitance. Regarding this point, in the above-described photodetector, since the capacitance portions of the non-connected pixel circuits are reset when the capacitance portions of the pixel circuits are reset, the influence of the charges accumulated in the non-connected pixel circuits on the surrounding pixel circuits can be suppressed.
[0016] It is feasible that a photodetector according to one aspect of the present disclosure is "the photodetector as described in [4], wherein the capacitance portions of the plurality of non-connected pixel circuits are constantly reset". In this case, the influence of the charges accumulated in the non-connected pixel circuits on the surrounding pixel circuits can be more surely suppressed.
[0017] It is feasible that a photodetector according to one aspect of the present disclosure is "the photodetector as described in [3], wherein no pixel circuit is arranged in a region of the circuit substrate that overlaps with the first gap when viewed from the thickness direction of the circuit substrate". In this case, compared with a case where, for example, non-connected pixel circuits are arranged in this region, the amount of current supplied to the pixel circuits can be reduced, and the heat generation of the pixel circuits can be suppressed. In addition, by suppressing the heat generation of the pixel circuits, dark current generated in the light detection substrate can be suppressed.
[0018] It is feasible that a photodetector according to one aspect of the present disclosure is "the photodetector as described in [3], wherein the plurality of light detection substrates further include a third light detection substrate, the third light detection substrate is adjacent to the second light detection substrate with a second gap in the column direction, and the length of the first gap in the column direction is different from the length of the second gap in the column direction". In this case, for example, by arranging the photodetector such that light in an unnecessary inspection wavelength band among the light split in the column direction by the light splitting portion is incident on the second gap, the processing can be further speeded up. In addition, the light detection substrate can be reduced, and the manufacturing can be facilitated.
[0019] It is feasible that a photodetector according to one aspect of the present disclosure is "the photodetector as described in any one of [1] to [8], wherein the column readout circuit has a plurality of output ports electrically connected to columns of the plurality of pixel circuits that are different from each other". In this case, the signal readout speed can be increased.
[0020] It is feasible that, in one form of the optical detector of the present disclosure, "
[10] the optical detector according to any one of [1] to [9], wherein the number of the plurality of pixel circuits arranged along the row direction is larger than the number of the plurality of pixel circuits arranged along the column direction". In this case, the signal readout speed can be increased.
[0021] It is feasible that, in one form of the optical detector of the present disclosure, "
[11] the optical detector according to any one of [1] to
[10] , wherein each of the plurality of pixel circuits has a charge amplifier electrically connected to one of the plurality of light detection parts". In this case, the charge generated in the light detection part can be converted into a voltage signal by the charge amplifier.
[0022] It is feasible that, in one form of the optical detector of the present disclosure, "
[12] the optical detector according to any one of [1] to
[11] , wherein the row selection circuit is configured to be able to switch between a first state and a second state, the first state being able to select any row from the plurality of rows of the plurality of pixel circuits, and the second state being able to sequentially select the plurality of rows of the plurality of pixel circuits according to the arrangement in the column direction". In this case, the state of the row selection circuit can be switched according to the use and the like.
[0023] It is feasible that, in one form of the optical detector of the present disclosure, "
[13] the optical detector according to any one of [1] to
[12] , wherein the plurality of light detection substrates include a first light detection substrate having sensitivity to a first wavelength band and a second light detection substrate having sensitivity to a second wavelength band, and a part of the first wavelength band overlaps with the second wavelength band". In this case, an optical detector that can obtain a wide range of detection wavelengths and has no significant decrease in detection sensitivity in the wavelength band can be realized.
[0024] One form of the camera of the present disclosure, "
[14] includes: a light incident part; a spectroscopic part that spectroscopically analyzes the light incident from the light incident part; and an optical detector that detects the light spectroscopically analyzed by the spectroscopic part; and the optical detector includes: a plurality of light detection parts arranged along the row direction and the column direction perpendicular to the row direction; a plurality of pixel circuits arranged along the row direction and the column direction, respectively electrically connected to the plurality of light detection parts; a row selection circuit that selects the row for reading out the signal from among the plurality of pixel circuits; and a column readout circuit that reads out the signals of the plurality of pixel circuits from the row selected by the row selection circuit for each column; and the row selection circuit is configured to be able to select any row from the plurality of rows of the plurality of pixel circuits, and the spectroscopic part spectroscopically analyzes the light in the column direction".
[0025] In this camera, the beam splitting unit splits light in the column direction. That is, the light detectors are arranged such that the column direction is along the beam splitting direction. Further, in the light detectors, a row selection circuit that selects the row from which to read out signals among a plurality of pixel circuits is configured to be able to select any row from among a plurality of rows of the plurality of pixel circuits. As a result, signals from the pixel circuits of the necessary rows can be read out, while signals from the pixel circuits of the unnecessary rows are not read out. In hyperspectral imaging, inspections and the like can be performed using only the detection results for a specific wavelength band. Therefore, by reading out only the signals from the pixel circuits of the necessary rows, the processing speed can be increased compared to, for example, the case of sequentially reading out the pixel circuits of all rows. Accordingly, with this camera, the processing speed of hyperspectral imaging can be increased.
[0026] In one aspect of the present disclosure, it is feasible that the camera "
[15] is the camera as described in
[14] , further including a slit extending along the row direction, and the light passing through the slit is incident on the beam splitting unit". In this case, the light can be preferably incident on the beam splitting unit.
[0027] In one aspect of the present disclosure, it is feasible that the camera "
[16] is the camera as described in
[14] or
[15] , wherein the light detector includes: a plurality of light detection substrates having sensitivity to mutually different wavelength bands; and a circuit substrate on which the plurality of light detection substrates are mounted; and each of the plurality of light detection substrates has a plurality of light detection portions arranged along the row direction and the column direction, the plurality of light detection substrates are mounted on the circuit substrate in a manner arranged along the column direction, and the circuit substrate has the plurality of pixel circuits, the row selection circuit, and the column readout circuit". In this case, two-dimensional image information for each wavelength can be preferably obtained.
[0028] One aspect of the imaging system of the present disclosure "
[17] includes: a camera as described in any one of
[14] to
[16] ; and a conveying device that conveys an object along the column direction; and light from the object conveyed by the conveying device is incident on the light incident portion". According to this imaging system, for the reasons described above, the processing speed of hyperspectral imaging can be increased. Further, as described above, since signals from only the pixel circuits of the necessary rows can be read out in the light detector of this imaging system, light from an object conveyed along the column direction by the conveying device can be processed at high speed.
[0029] [Effects of the Invention]
[0030] According to one aspect of the present disclosure, there can be provided a light detector, a camera, and an imaging system capable of increasing the processing speed of hyperspectral imaging. BRIEF DESCRIPTION OF THE DRAWINGS
[0031] Figure 1A diagram showing the configuration of the imaging system of the embodiment.
[0032] Figure 2 A perspective view of the light detector.
[0033] Figure 3 A diagram showing the configuration of the pixel circuit of the display circuit board.
[0034] Figure 4 A diagram showing the configuration of the circuit section of the display circuit board.
[0035] Figure 5 A diagram for explaining the readout area of the light detector.
[0036] Figure 6 A diagram showing the configuration of the row selection circuit.
[0037] Figure 7 For showing Figure 6 A diagram showing the configuration of the multiplexer shown.
[0038] Figure 8 A timing diagram showing the operation of the row selection circuit.
[0039] Figure 9 A diagram for explaining the signal flow of the circuit board.
[0040] Figure 10 A diagram showing the row selection circuit in the sequential readout mode.
[0041] Figure 11 A timing diagram showing the operation of the row selection circuit in the sequential readout mode.
[0042] Figure 12 A diagram showing the configuration of the non-connected pixel circuit of the first modification example.
[0043] Figure 13 A diagram showing the configuration of the pixel circuit of the circuit board of the second modification example. Detailed implementation mode
[0044] Hereinafter, the embodiments of the present disclosure will be described in detail with reference to the drawings. Furthermore, the same or corresponding parts are denoted by the same reference numerals in each figure, and repeated descriptions are omitted.
[0045] As Figure 1As shown, the imaging system 1 (hyperspectral imaging system) includes a camera 2 (hyperspectral imaging camera) and a conveying device 3. In the imaging system 1, light Lt from the object B conveyed by the conveying device 3 is captured by the camera 2, and hyperspectral imaging is performed. In hyperspectral imaging, when photographing the object B, not only the shape of the object B is obtained, but also spectral information is obtained together, and two-dimensional image information for each wavelength is obtained. In the imaging system 1, for example, the object B is food, and sorting (inspection) of the food is performed based on the spectral information. Hereinafter, as Figure 1 etc., the X direction, Y direction, and Z direction perpendicular to each other are set for explanation.
[0046] The camera 2 includes a light incident portion 4, a slit portion 5, a spectroscopic portion 6, a light detector 9, and a housing 10. The slit portion 5, the spectroscopic portion 6, and the light detector 9 are disposed inside the housing 10. The housing 10 is formed of, for example, an opaque material, but in Figure 1 it is shown in a perspective view for ease of understanding of the housing 10.
[0047] The light incident portion 4 is a portion that allows light Lt from the object B to enter the housing 10. The light incident portion 4 is configured to include, for example, a lens, condenses the light Lt from the object B through the lens, and guides the light to the slit portion 5. The camera 2 is disposed, for example, vertically above the conveying device 3 such that the light incident portion 4 faces the conveying device 3 in the Z direction. That is, in this example, the Z direction is the vertical direction. A slit 5a is formed in the slit portion 5. The slit 5a is formed in a rectangular shape, for example, and extends straight along the X direction. The light Lt incident from the light incident portion 4 enters the spectroscopic portion 6 through the slit 5a.
[0048] In this example, the spectroscopic portion 6 is a transmissive diffraction grating that extends straight along the X direction. The spectroscopic portion 6 is disposed to face the slit 5a in the Z direction. The spectroscopic portion 6 disperses the light Lt in the Y direction. That is, the spectroscopic portion 6 decomposes the light Lt such that the wavelength continuously changes according to the position (exit angle) in the Y direction.
[0049] The light detector 9 detects the light Lt dispersed by the spectroscopic portion 6. As will be described later, the light detector 9 is an area image sensor having a planar light detection region (a region where light detection portions 71a to 73a described later are disposed) that extends along the X direction and the Y direction. In the camera 2, the light Lt extending in the X direction through the slit 5a is dispersed in the Y direction by the spectroscopic portion 6 and enters the light detection region of the light detector 9. At the incident position to the light detection region, the light Lt becomes a planar light having the same wavelength in the X direction and continuously changing in the Y direction. By detecting the light Lt using the light detector 9, two-dimensional image information for each wavelength can be obtained.
[0050] In this example, the conveying device 3 is a belt conveyor and has an endless belt 3a. The conveying device 3 conveys the object B placed on the endless belt 3a in the Y direction by transporting the endless belt 3a in the Y direction. When inspecting the object B (during the operation of the imaging system 1), the light Lt from the object B conveyed by the conveying device 3 is incident on the light incident portion 4 and detected by the light detector 9. Thus, the object B can be photographed while changing the position in the Y direction (scanning photography), and the entire object B can be photographed. In the imaging system 1, the conveying direction of the conveying device 3 for the object B, the splitting direction of the splitting unit 6 for the light Lt, and the arrangement direction of the light detection substrates 71 to 73 are all in the Y direction. Further, in this example, the imaging system 1 further includes a light source (not shown) that irradiates light to the object B, and the light Lt includes reflected light emitted from the light source and reflected by the object B, but the light source can be omitted.
[0051] As Figure 2 shown, the light detector 9 includes a plurality of light detection substrates 7 and a circuit board 8. The plurality of light detection substrates 7 include a first light detection substrate 71, a second light detection substrate 72, and a third light detection substrate 73. The light detection substrates 71 to 73 are, for example, light detection chips formed of InGaAs and are semiconductor substrates on which a plurality of light detection portions (71a to 73a) are fabricated. The light detection substrates 71 to 73 are placed on the circuit board 8 in an arrangement along the Y direction. Each of the light detection substrates 71 to 73 is, for example, formed in a rectangular plate shape having a long side parallel to the X direction. In this example, the light detection substrates 71 to 73 have the same shape as each other.
[0052] The first light detection substrate 71 has a plurality of first light detection portions 71a, the second light detection substrate 72 has a plurality of second light detection portions 72a, and the third light detection substrate 73 has a plurality of third light detection portions 73a. Each of the light detection portions 71a to 73a is, for example, a photodiode that generates charges corresponding to the amount of incident light. Each of the light detection substrates 71 to 73 is, for example, a two-dimensional photodiode array in which photodiodes are arranged two-dimensionally and in a grid pattern along the row direction and the column direction perpendicular to the row direction. In this example, the row direction is parallel to the X direction, and the column direction is parallel to the Y direction.
[0053] The plurality of first light detection portions 71a are arranged two-dimensionally and in a grid pattern along the row direction and the column direction. Shown schematically in the figure, actually, for example, 320 first light detection portions 71a are arranged in the row direction (X direction) and several tens are arranged in the column direction (Y direction). Similarly, the plurality of second light detection portions 72a are arranged along the row direction and the column direction, and the plurality of third light detection portions 73a are arranged along the row direction and the column direction. In this example, the number of arrangements of the second light detection portions 72a and the third light detection portions 73a in the row direction and the column direction is the same as that of the first light detection portions 71a.
[0054] The light detection substrates 71 to 73 (light detection units 71a to 73a) have sensitivities for different wavelength bands. For example, the first light detection unit 71a has a sensitivity for a first wavelength band of 0.95 to 1.65 μm, the second light detection unit 72a has a sensitivity for a second wavelength band of 1.3 to 2.15 μm, and the third light detection unit 73a has a sensitivity for a third wavelength band of 1.7 to 2.55 μm (all values at -20°C). Thus, in this example, a part of the first wavelength band overlaps with the second wavelength band, and a part of the second wavelength band overlaps with the third wavelength band. The wavelength band having sensitivity is defined as a wavelength band having a sensitivity of 10% or more of the maximum sensitivity. Specifically, the wavelength having the maximum sensitivity is set as λp, and the sensitivity of λp (maximum sensitivity) is set as S(λp). In this case, the wavelength band where the sensitivity S is S(λp) × 0.1 or more is defined as the sensitivity wavelength band. On the other hand, the case where it is less than S(λp) × 0.1 is defined as not having sensitivity.
[0055] The circuit substrate 8 has a plurality of pixel circuits 81 (refer to Figure 3 ). The circuit substrate 8 is, for example, an IC chip formed of Si, and is a semiconductor substrate on which the pixel circuits 81 and the row selection circuit 84, column readout circuit 85, and control circuit 86 described later are fabricated.
[0056] The plurality of pixel circuits 81 are arranged two-dimensionally and in a grid pattern along the row direction (X direction) and the column direction (Y direction). Simplified in the figure, actually, for example, 320 pixel circuits 81 are arranged in the row direction and 256 pixel circuits 81 are arranged in the column direction. Thus, in this example, the number of pixel circuits 81 arranged along the row direction is larger than the number of pixel circuits 81 arranged along the column direction. In this example, the number of pixel circuits 81 arranged along the row direction is equal to the number of the first light detection units 71a arranged along the row direction. The number of pixel circuits 81 arranged along the column direction is larger than the number of the first light detection units 71a arranged along the column direction.
[0057] The plurality of pixel circuits 81 are electrically connected to the light detection units 71a to 73a. Regarding this point, an explanation will be given while referring to Figure 3 as follows. As Figure 3As shown, the first light detection substrate 71, the second light detection substrate 72, and the third light detection substrate 73 are arranged on the circuit substrate 8 at intervals in the Y direction. More specifically, the second light detection substrate 72 is adjacent to the first light detection substrate 71 with a first gap D1 in the Y direction, and the third light detection substrate 73 is adjacent to the second light detection substrate 72 with a second gap D2 in the Y direction. In this example, the length of the first gap D1 in the Y direction is equal to the length of the second gap D2 in the Y direction.
[0058] The first light detection substrate 71, the second light detection substrate 72, and the third light detection substrate 73 are electrically connected to the pixel circuit 81 located directly below. That is, the light detection portions 71a to 73a of the light detection substrates 71 to 73 are electrically connected to the pixel circuit 81 arranged in the region overlapping the light detection substrates 71 to 73 when viewed from the Z direction (the thickness direction of the circuit substrate 8) (the direction perpendicular to the X direction and the Y direction). For example, one light detection portion 71a and one pixel circuit 81 are electrically connected by a connection member such as a bump or solder. In this example, in a state where one light detection portion 71a and one pixel circuit 81 face each other, they are connected by a connection member (flip chip bonding). Similarly, the light detection portions 71a to 73a are electrically connected to the corresponding pixel circuits 81 one by one. Thereby, the charge generated in the light detection portions 71a to 73a can be converted into a voltage signal through the pixel circuit 81. The configuration of the pixel circuit 81 will be described later.
[0059] As there are gaps (the first gap D1 or the second gap D2) between the light detection substrates 71 to 73 as described above, among the plurality of pixel circuits 81, there are pixel circuits that are not electrically connected to the light detection substrates 71 to 73. Hereinafter, the pixel circuit 81 that is not electrically connected to the light detection substrates 71 to 73 is referred to as a non-connected pixel circuit 82. The non-connected pixel circuit 82 is arranged on the circuit substrate 8 in the regions overlapping the first gap D1 and the second gap D2 when viewed from the Z direction (the thickness direction of the circuit substrate 8). The configuration of the non-connected pixel circuit 82 is the same as that of the pixel circuit 81 electrically connected to the light detection substrates 71 to 73.
[0060] As Figure 2 and Figure 4As shown, the circuit board 8 further includes: a row selection circuit 84 (vertical transfer circuit), a column readout circuit 85 (horizontal transfer circuit), and a control circuit 86 (control unit). The row selection circuit 84 selects the row for reading out signals from among the plurality of pixel circuits 81. The column readout circuit 85 reads out the signals from the plurality of pixel circuits 81 of the row selected by the row selection circuit 84 for each column. The control circuit 86 is electrically connected to the row selection circuit 84 and the column readout circuit 85, and controls the operations of the row selection circuit 84 and the column readout circuit 85. The control circuit 86 is, for example, a timing generator.
[0061] In the photodetector 9, the row selection circuit 84 is configured to be able to select any row (specific row) from among the plurality of rows of the plurality of pixel circuits 81. That is, in the photodetector 9, a specific row can be selected from among the plurality of rows of the plurality of pixel circuits 81 and read out (selective readout function). Thereby, the signals of the pixel circuits 81 of the necessary row can be read out, and on the other hand, the signals of the pixel circuits 81 of the unnecessary row are not read out. In hyperspectral imaging, inspections and the like can be performed using only the detection results for a specific wavelength band. Therefore, by reading out only the signals of the pixel circuits 81 of the necessary row, the processing can be speeded up compared to the case of sequentially reading out the pixel circuits 81 of, for example, all rows.
[0062] Figure 5 It is a diagram for explaining an example of the readout area R1 of the photodetector 9. Figure 5 The area R2 in which the pixel circuits 81 are arranged on the circuit board 8 is shown. In the photodetector 9, instead of sequentially reading out all the rows of the pixel circuits 81 in the area R2, only the pixel circuits 81 of the rows included in the readout area R1 are sequentially read out. In hyperspectral imaging, inspections and the like can be performed using only the detection results for a specific wavelength band. Therefore, there is no need to obtain data for wavelength bands other than the specific wavelength band. Therefore, by setting the readout area R1 for the area corresponding to the specific wavelength band, the signals of the pixel circuits 81 of the necessary row can be read out only, and the processing can be speeded up.
[0063] The readout area R1 can be appropriately set according to the type of inspection, etc. In Figure 5In the example of , the readout area R1 includes a plurality (four in this example) of areas R1a, R1b, R1c, and R1d set in a manner arranged along the Y direction. In this example, area R1a is the area corresponding to the pixel circuits 81 of row 10, and areas R1b to R1d are the areas corresponding to the pixel circuits 81 of row 1. Between adjacent areas R1a to R1d, for example, there is an area of about 10 rows (rows not read by the read signal). The readout area R1 can be set, for example, according to an input from the user. For example, the control circuit 86 sets the readout area R1 based on an input from the user. That is, the control circuit 86 can control the row selection circuit 84 in such a way that it reads the signals of the plurality of pixel circuits 81 from the rows corresponding to the input, and on the other hand, does not read the signals of the plurality of pixel circuits 81 from the rows other than the rows corresponding to the input.
[0064] While referring to Figure 4 and Figures 6 to 9 , while explaining the specific circuit configuration. First, while referring to Figure 4 , while explaining the outline of the circuit configuration. The row selection circuit 84 is, for example, a vertical shift register, arranged along the Y direction, and electrically connected to the pixel circuits 81 of each row. The column readout circuit 85 includes a column selection circuit 87 and a plurality of signal processing circuits 88. The column selection circuit 87 is, for example, a horizontal shift register, arranged along the X direction, and electrically connected to the pixel circuits 81 of each column via the signal processing circuits 88.
[0065] The column readout circuit 85 has a plurality (four in this example) of output ports P electrically connected to the columns of a plurality of pixel circuits 81 that are different from each other. For example, when 320 pixel circuits 81 are arranged in the row direction (X direction), the four output ports P are electrically connected to the pixel circuits 81 of 80 different columns. Each output port P includes a pair of buffer amplifiers BF electrically connected to the signal processing circuit 88, and outputs the final signal to the outside from the output port P. When reading the signal, first, the row selection circuit 84 selects a certain row. Then, the column readout circuit 85 reads the signals of the plurality of pixel circuits 81 from that row for each column via the signal processing circuit 88. The read signal is output to the outside from the output port P to which the pixel circuit 81 of that column is electrically connected. This series of signal readout processes is performed in each row included in the above-mentioned readout area R1.
[0066] While referring to Figures 6 to 8 , while explaining the configuration of the row selection circuit 84. As Figure 6 shown, the row selection circuit 84 includes a decoder 841, a plurality of multiplexers 843, and a plurality of D flip-flops 844. The multiplexers 843 and D flip-flops 844 are provided in the same number as the number of rows of the pixel circuits 81. The multiplexers 843 are connected to the decoder 841 via the mode switching switch 842.
[0067] As described below, in the optical detector 9, the row selection circuit 84 is configured to be able to switch between a first state and a second state. In the first state, any row can be selected from among a plurality of rows of the plurality of pixel circuits 81, and in the second state, the plurality of rows of the plurality of pixel circuits 81 are sequentially selected in the arrangement order in the Y direction. That is, the optical detector 9 can operate in two modes: the first state of the row selection circuit 84, which is the selective readout mode, and the second state of the row selection circuit 84, which is the sequential readout mode. The state of the row selection circuit 84 is switched by the mode switching switch 842. In this example, when the mode switching switch 842 is connected to the decoder 841 as shown in Figure 6 , the row selection circuit 84 becomes the first state, and when the mode switching switch 842 is not connected to the decoder 841 as shown in Figure 10 , the row selection circuit 84 becomes the second state.
[0068] Hereinafter, first, the operation of the row selection circuit 84 in the first state, that is, the selective readout mode, will be described. In Figure 6 , the case of sequentially reading three rows a, b, and c is illustrated. The rows a, b, and c are not consecutive rows, but may also be consecutive rows.
[0069] In the decoder 841, a row indication signal Din indicating the row to be read is input from the control circuit 86. The decoder 841 is connected to the multiplexers 843 of each row.
[0070] As shown in Figure 6 and Figure 7 , each multiplexer 843 has: an input terminal Start, an input terminal Sadd, an input terminal Qpre, an input terminal Eadd, and an output terminal Mout. At the input terminal Start, a start signal Startpulse is input from the control circuit 86. The input terminal Sadd is connected to the decoder 841 via the mode switching switch 842, and in the selective readout mode, an output signal Dout from the decoder 841 is input to the input terminal Sadd. At the input terminal Qpre, the row selection signal Vs of the previous row is input. For example, at the input terminal Qpre of the a-th row, the row selection signal Vs[a - 1] of the (a - 1)-th row is input. At the input terminal Eadd, the signal of the input terminal Eadd of the previous row is input. For example, at the input terminal Eadd of the a-th row, the signal Eadd[a - 1] of the input terminal Eadd of the previous row is input.
[0071] As shown in Figure 7As shown, each multiplexer 843 includes a NOT element NO, three NAND elements NA1 to NA3, and an OR element OR. When the signal at the input terminal Sadd is at a high level, a signal having the same level as the start signal Startpulse input to the input terminal Start appears at the output of the NAND element NA3. On the other hand, when the signal at the input terminal Sadd is at a low level, a signal having the same level as the signal input to the input terminal Qpre appears at the output of the NAND element NA3. In the OR element OR, an OR operation is performed on the signal appearing at the output of the NAND element NA3 and the signal at the input terminal Eadd. The output signal is output from the output terminal Mout. Further, for example, the high level (H) has the same potential as the power supply voltage, and the low level (L) has the same potential as the ground voltage.
[0072] As Figure 6 shown, each D flip-flop 844 has an input terminal D, a clk terminal, and an output terminal Q. The input terminal D is connected to the output terminal Mout of the multiplexer 843. A clock signal Clk is input to the clk terminal from the control circuit 86. A row selection signal Vs is output from the output terminal Q.
[0073] While referring to Figure 8 , an operation example of the row selection circuit 84 will be described. In Figure 6 and Figure 8 , the row selection signals Vs[a], Vs[b], and Vs[c] are row indication signals for the a-th, b-th, and c-th rows, respectively. When reading the signal of the a-th row (when the a-th row is selected), first, a start signal Startpulse (T1) is input to the input terminal Start of each multiplexer 843. Next, in the input of the start signal Startpulse, a row indication signal Din (T2) is input to the decoder 841, and the output signal Dout of the decoder 841 is determined (T3). Next, the clock signal Clk is input to the clk terminal (T4). As a result, the row selection signal Vs[a] of the selected a-th row becomes a low level (selected state), and the signal of the a-th row is read out. After the signal is read out, the clock signal Clk is input to the clk terminal again to cancel the selection of the a-th row (T5). The same applies when reading the signals of the b-th and c-th rows.
[0074] While referring to Figure 9 , the configuration of the circuit board 8 will be further described. As Figure 9 shown, each pixel circuit 81 includes a charge amplifier 811 (accumulation mechanism), a sample-and-hold circuit 812, and a part of a source follower circuit 813. The remaining part of the source follower circuit 813 is included in the signal processing circuit 88.
[0075] The charge amplifier 811 includes: an operational amplifier 811a, a capacitor section Cf connected between the first input terminal and the output terminal of the operational amplifier 811a, and a reset switch 811b connected in parallel with the capacitor section Cf. The first input terminal of the operational amplifier 811a is connected to one of the anodes of the light detection sections 71a, 72a, 73a. A bias voltage PDbias is input to one of the cathodes of the light detection sections 71a, 72a, 73a. A voltage INP is input to the second input terminal of the operational amplifier 811a. The voltage INP is generated at the second input terminal of the operational amplifier 811a by the virtual short circuit of the operational amplifier 811a. Therefore, the second input terminal and the anodes of the respective light detection sections 71a, 72a, 73a are at the same potential. The voltage INP is set to a voltage higher than the bias voltage PDbias so as not to be a forward bias in all of the light detection sections 71a, 72a, 73a. The charges generated in the light detection sections 71a, 72a, 73a are accumulated in the capacitor section Cf. The charge amplifier 811 outputs a voltage signal corresponding to the accumulated charge amount. The reset switch 811b is turned on / off by the control circuit 86. If the reset switch 811b is turned on, the charges accumulated in the capacitor section Cf are reset. In this example, the reset switches 811b of all the pixel circuits 81 (including the non-connected pixel circuits 82) are turned on / off collectively. That is, the reset switch 811b is provided as a common reset switch in all of the pixel circuits 81.
[0076] The sample-and-hold circuit 812 includes a sample switch 812a and a capacitor section Ch. The first end of the sample switch 812a is connected to the output terminal of the operational amplifier 811a. The capacitor section Ch is connected to the other end of the sample switch 812a. The sample switch 812a is turned on / off by the control circuit 86.
[0077] The source follower circuit 813 includes: a transistor 813a, a row selection switch 813b, and a constant current source 813c. In Figure 9 this example, the transistor 813a is an NMOS-FET. The gate terminal of the transistor 813a is connected to the second end of the sample switch 812a. The source terminal of the transistor 813a is connected to the first end of the row selection switch 813b. The constant current source 813c is connected to the second end of the row selection switch 813b. In this example, the constant current source 813c is provided in the signal processing circuit 88. The row selection switch 813b is turned on / off by a row selection signal Vs from the row selection circuit 84.
[0078] Each signal processing circuit 88 includes a part of the source follower circuit 813 (constant current source 813c), a reset holding circuit 881, and a sample and hold circuit 882. The reset holding circuit 881 holds the reset output signal output from the pixel circuit 81. The reset holding circuit 881 includes a sampling switch 881a and a capacitor section Cr. The first terminal of the sampling switch 881a is connected to the second terminal of the row selection switch 813b. The second terminal of the sampling switch 881a is connected to the buffer amplifier BF of the output port P via the column selection switch 883a. The column selection switch 883a is turned on / off by the column selection signal HSR. When the column selection switch 883a is turned on, the reset output signal is output from the buffer amplifier BF.
[0079] The sample and hold circuit 882 holds the voltage signal output from the pixel circuit 81. The sample and hold circuit 882 includes a sampling switch 882a and a capacitor section Cs. The first terminal of the sampling switch 882a is connected to the second terminal of the row selection switch 813b. The second terminal of the sampling switch 882a is connected to the buffer amplifier BF of the output port P via the column selection switch 883b. The column selection switch 883b is turned on / off by the column selection signal HSR. When the column selection switch 883b is turned on, the voltage signal is output from the buffer amplifier BF.
[0080] The flow of signals on the circuit board 8 will be described. First, when the reset switch 811b is turned off, the charge amplifier 811 converts the charge accumulated in the capacitor section Cf into a voltage signal. Next, the sampling switch 812a is turned on, and the voltage signal is transmitted to the capacitor section Ch and accumulated. Next, after the sampling switch 812a is turned off, the row selection switch 813b is turned on, and the voltage signal held in the capacitor section Ch is transmitted to the signal processing circuit 88 via the source follower circuit 813. At this time, by turning on the sampling switch 882a, the voltage signal is transmitted to the sample and hold circuit 882 and held in the capacitor section Cs. Thereafter, the sampling switch 882a is turned off.
[0081] Next, with the reset switch 811b and the sampling switch 812a turned on, the sampling switch 881a is turned on, and the reset output signal of the pixel circuit 81 is transmitted to the capacitor section Cr of the reset holding circuit 881 and accumulated. Next, after the sampling switch 881a is turned off, the column selection switches 883a and 883b are turned on using the column selection signal HSR, and the reset output signal VR and the voltage signal VS are output via the buffer amplifier BF. During signal processing, the difference between the reset output signal VR and the voltage signal VS is used as the actual output signal. By obtaining the difference between the reset output signal VR and the voltage signal VS, the influence of the deviation of the characteristics of the charge amplifier 811 and the source follower circuit 813 can be excluded, and the consistency can be improved.
[0082] As described above, since the reset switches 811b of all the pixel circuits 81 including the non-connected pixel circuit 82 are collectively turned on / off in this example, when the reset switch 811b is turned on in the above process, not only the capacitor portion Cf of the charge amplifier 811 of the pixel circuit 81 electrically connected to the light detection substrates 71 to 73 is reset, but also the capacitor portion Cf of the non-connected pixel circuit 82 not electrically connected to the light detection substrates 71 to 73 is reset. That is, the capacitor portion Cf of the charge amplifier 811 of the non-connected pixel circuit 82 is reset when the capacitor portion Cf of the pixel circuit 81 is reset.
[0083] Next, while referring to Figure 10 and Figure 11 , the operation of the row selection circuit 84 in the second state, i.e., the sequential readout mode, will be described. As described above, in this case, the rows of the pixel circuits 81 are sequentially selected in the arrangement order in the Y direction. In Figure 10 , the first row, the second row, and the nth row (for example, the last row, i.e., the 256th row) are displayed. As Figure 10 shows, in the second state, the mode switching switch 842 is not connected to the decoder 841. A high-level signal is input to the input terminal Sadd of the multiplexer 843 in the first row, and low-level signals are input to the input terminal Eadd of the multiplexer 843 in the first row and the input terminals Sadd and Eadd of the multiplexers 843 in the rows other than the first row.
[0084] As Figure 11 shows, in the sequential readout mode, the start signal Startpulse is sequentially shifted by inputting the clock signal Clk to the clk terminal. This operation is the same as that of a normal shift register. In the sequential readout mode, since the input terminal Sadd of the multiplexer 843 in the first row is high level, the start signal Startpulse is valid only in the first row, and the start signal Startpulse is input only in the first row. Since the input terminal Sadd is low level in the rows other than the first row, the start signal Startpulse is not valid, and the input terminal Qpre allows the row selection signal Vs to pass through as it is.
[0085] [Function and Effect]
[0086] In the optical detector 9, a first optical detection substrate 71, a second optical detection substrate 72, and a third optical detection substrate 73 (a plurality of optical detection substrates 7) having sensitivities for different wavelength bands are placed on a circuit substrate 8. The optical detection substrates 71 to 73 have a plurality of optical detection portions 71a to 73a arranged along the X direction (row direction) and the Y direction (column direction). In addition, the optical detection substrates 71 to 73 are placed on the circuit substrate 8 in a manner arranged along the Y direction. Thus, for example, by making the light Lt spectroscopically split in the Y direction by the spectroscopic unit 6 incident on the optical detection portions 71a to 73a (by arranging the optical detector 9 such that the Y direction is along the spectroscopic direction), two-dimensional image information for each wavelength can be obtained. In addition, in the optical detector 9, a row selection circuit 84 that selects the row for reading out signals from among a plurality of pixel circuits 81 is configured to be able to select any row from among a plurality of rows of the plurality of pixel circuits 81. Thus, signals from the pixel circuits 81 of the necessary rows can be read out, while signals from the pixel circuits 81 of the unnecessary rows are not read out. In hyperspectral imaging, inspections and the like can be performed using only the detection results for a specific wavelength band. Therefore, by reading out only the signals from the pixel circuits 81 of the necessary rows, the processing can be speeded up compared to, for example, the case of sequentially reading out the pixel circuits 81 of all rows. Therefore, according to the optical detector 9, the processing of hyperspectral imaging can be speeded up.
[0087] The control circuit 86 controls the row selection circuit 84 in such a way as to read out signals from the plurality of pixel circuits 81 of the row corresponding to the input, while not reading out signals from the plurality of pixel circuits 81 of the rows other than the row corresponding to the input. Thus, for example, the processing can be speeded up compared to the case of sequentially reading out the pixel circuits 81 of all rows.
[0088] The second optical detection substrate 72 is adjacent to the first optical detection substrate 71 with a first gap D1 in the Y direction. In addition, the third optical detection substrate 73 is adjacent to the second optical detection substrate 72 with a second gap D2 in the Y direction. Thus, for example, by arranging the optical detector 9 such that the light Lt of the wavelength band that does not need to be inspected in the light Lt spectroscopically split in the Y direction by the spectroscopic unit 6 is incident on the first gap D1 and the second gap D2, the processing can be further speeded up. In addition, the optical detection substrates 71 to 73 can be reduced, and the manufacturing can be facilitated.
[0089] In a region of the circuit substrate 8 that overlaps with the first gap D1 and the second gap D2 when viewed from the thickness direction (Z direction) of the circuit substrate 8, a plurality of non-connected pixel circuits 82 that are not electrically connected to the optical detection substrates 71 to 73 are arranged. Thus, for example, by changing the arrangement of the optical detection substrates 71 to 73 such that the optical detection portions 71a to 73a are electrically connected to the non-connected pixel circuits 82, the degree of freedom can be increased.
[0090] The capacitance section Cf of the non-connected pixel circuit 82 is reset when the capacitance section Cf of the pixel circuit 81 is reset. Since the light detection sections 71a to 73a are not connected to the non-connected pixel circuit 82, signals are not accumulated, but charges generated at the PN junction due to the incidence of light Lt may sometimes be accumulated. In this case, there is a concern that this charge may affect the surrounding pixel circuits 81 as a parasitic capacitance. Regarding this point, in the optical detector 9, since the capacitance section Cf of the non-connected pixel circuit 82 is reset when the capacitance section Cf of the pixel circuit 81 is reset, the influence of the charges accumulated in the non-connected pixel circuit 82 on the surrounding pixel circuits 81 can be suppressed. Furthermore, in the pixel circuit 81 electrically connected to the light detection sections 71a to 73a, the light Lt advancing toward the pixel circuit 81 is blocked by the light detection sections 71a to 73a.
[0091] The column readout circuit 85 has a plurality of output ports P electrically connected to columns of a plurality of pixel circuits 81 that are different from each other. Thereby, the readout speed of signals can be increased.
[0092] The number of pixel circuits 81 arranged along the X direction is larger than the number of pixel circuits 81 arranged along the Y direction. Thereby, the readout speed of signals can be increased.
[0093] Each pixel circuit 81 has a charge amplifier 811 electrically connected to one of the light detection sections 71a to 73a. Thereby, the charges generated in the light detection sections 71a to 73a can be converted into voltage signals by the charge amplifier 811.
[0094] The row selection circuit 84 is configured to be able to switch between a first state and a second state. In the first state, any row can be selected from a plurality of rows of the pixel circuit 81, and in the second state, a plurality of rows of the pixel circuit 81 are sequentially selected in the arrangement order in the Y direction. Thereby, the state of the row selection circuit 84 can be switched according to the application or the like.
[0095] A part of the first wavelength band of the first light detection substrate 71 overlaps with the second wavelength band of the second light detection substrate 72. Thereby, an optical detector 9 can be realized that obtains a wide range of detection wavelengths and has a wavelength band with no significant decrease in detection sensitivity. In addition, a part of the second wavelength band of the second light detection substrate 72 overlaps with the third wavelength band of the third light detection substrate 73. Thereby, an optical detector 9 can be realized that obtains a wide range of detection wavelengths and has a wavelength band with no significant decrease in detection sensitivity.
[0096] In camera 2, the beam splitter unit 6 splits the light Lt in the Y direction. That is, the light detector 9 is arranged such that the Y direction is along the splitting direction. Further, in the light detector 9, the row selection circuit 84 that selects the row for reading out signals from among the plurality of pixel circuits 81 is configured to be able to select any row from among the plurality of rows of the plurality of pixel circuits 81. Thereby, signals from the pixel circuits 81 of the necessary rows can be read out, while signals from the pixel circuits 81 of the unnecessary rows are not read out. In hyperspectral imaging, inspections and the like can be performed using only the detection results for a specific wavelength band. Therefore, by reading out only the signals from the pixel circuits 81 of the necessary rows, the processing can be speeded up compared to the case of sequentially reading out the pixel circuits 81 of, for example, all rows. Accordingly, with camera 2, the processing of hyperspectral imaging can be speeded up. Further, in the imaging system 1 including camera 2, for the same reason, the processing of hyperspectral imaging can be speeded up. Further, since signals from only the pixel circuits 81 of the necessary rows can be read out in the light detector 9 of the imaging system 1, the light Lt from the object B conveyed in the Y direction by the conveying device 3 can be processed at high speed.
[0097] In camera 2, the light Lt that passes through the slit 5a extending in the X direction is incident on the beam splitter unit 6. Thereby, the light Lt can be preferably incident on the beam splitter unit 6.
[0098] [Modification Example]
[0099] As Figure 12 shown in the first modification example, the reset switch 811b of the non-connected pixel circuit 82 to which the first input terminal of the operational amplifier 811a is not connected can be always turned on. In this case, the capacitor unit Cf of the non-connected pixel circuit 82 is in a state of being constantly reset. According to such a first modification example, as in the above-described embodiment, the processing of hyperspectral imaging can be speeded up. Further, since the capacitor unit Cf of the non-connected pixel circuit 82 is constantly reset, the influence of the charge accumulated in the non-connected pixel circuit 82 on the surrounding pixel circuits 81 can be more reliably suppressed.
[0100] As Figure 13 shown in the second modification example, pixel circuits 81 may not be arranged in the regions that overlap with the first gap D1 and the second gap D2 when viewed from the Z direction in the circuit board 8. That is, the pixel circuits 81 may not include non-connected pixel circuits 82. According to such a second modification example, as in the above-described embodiment, the processing of hyperspectral imaging can be speeded up. Further, compared to the case where non-connected pixel circuits 82 are arranged in this region, for example, the amount of current supplied to the pixel circuits 81 can be reduced, and the heat generation of the pixel circuits 81 can be suppressed. Further, by suppressing the heat generation of the pixel circuits 81, dark current generation in the light detection substrates 71 to 73 can be suppressed.
[0101] The present disclosure is not limited to the above-described embodiments and modifications. For example, the materials and shapes of the respective components are not limited to the above-described materials and shapes, and various materials and shapes can be adopted.
[0102] In the above-described embodiment or the second modification, the length of the first gap D1 in the Y direction may be different from the length of the second gap D2 in the Y direction. In this case, for example, by arranging the photodetector 9 such that light Lt in an unnecessary inspection wavelength band among the light Lt spectrally split in the Y direction by the spectroscopic unit 6 is incident on the second gap D2, the processing can be made faster. In addition, the photodetection substrates 71 to 73 can be reduced in size, and the manufacturing can be facilitated.
[0103] In the above-described embodiment, the row selection circuit 84 is configured to be able to switch between a first state and a second state. In the first state, any row can be selected from among a plurality of rows of the pixel circuit 81, and in the second state, a plurality of rows of the plurality of pixel circuits 81 are sequentially selected in the arrangement order in the Y direction. However, the row selection circuit 84 may not be configured to be able to switch states. For example, the mode switching switch 842 can be omitted, and the row selection circuit 84 always becomes the first state. In this case, the multiplexer 843 and the D flip-flop 844 can be omitted, and the row selection circuit 84 includes only the decoder 841.
[0104] The buffer amplifier BF connected to the reset holding circuit 881, the column selection switch 883a, and the column selection switch 883a can be omitted. In this case, power consumption can be reduced and the frame rate can be increased (the operation time of the reset holding circuit 881 can be reduced). A plurality of rows of pixel circuits 81 can be assigned to one wavelength. In this case, signals from a plurality of rows can be read out and then added (merged). A transimpedance amplifier can be used instead of the charge amplifier 811.
[0105] In the above-described embodiment, three photodetection substrates 7 are provided, but only two photodetection substrates 7 (for example, the first photodetection substrate 71 and the second photodetection substrate 72) may be provided, or four or more photodetection substrates 7 may be provided. Only one photodetection substrate 7 may be provided. The photodetection substrate 7 and the circuit substrate 8 can be integrally formed as a single unit. The three photodetection substrates 7 can be placed on the circuit substrate 8 without a gap in the Y direction.
[0106] The column readout circuit 85 may have only one output port P. The arrangement of the pixel circuits 81 is not limited to the above example. For example, the number of pixel circuits 81 arranged along the X direction may be the same as the number of pixel circuits 81 arranged along the Y direction, or may be less than that number. The first to third wavelength bands of the first to third photodetection substrates 71 to 73 may not overlap each other. The slit portion 5 (slit 5a) can be omitted.
[0107] In the above-described embodiment, the imaging system 1 is used for the picking of food, but hyperspectral imaging can also be used for foreign object inspection, the picking of plastics, the component analysis of an object, or resource exploration, etc. That is, the object B can be other objects such as plastics. For example, in the case where hyperspectral imaging is used for resource exploration, the camera equipped with the light detector 9 can be mounted on a drone (flying moving body). That is, during the photography of hyperspectral imaging, as long as the object B and the camera move relative to each other, the object B can be moved as in the above-described embodiment, or the camera can be moved.
[0108] Explanation of reference numerals
[0109] 1... Imaging system, 2... Camera, 3... Conveyor device, 4... Light incident portion, 5a... Slit, 6... Spectral splitting portion, 7... Light detection substrate, 8... Circuit substrate, 9... Light detector, 71... First light detection substrate, 72... Second light detection substrate, 73... Third light detection substrate, 81... Pixel circuit, 82... Non-connected pixel circuit, 84... Row selection circuit, 85... Column readout circuit, 86... Control circuit (control unit), 811... Charge amplifier, Cf... Capacitance portion, D1... First gap, D2... Second gap, Lt... Light.
Claims
1. A photodetector, wherein, comprising: a plurality of photodetection substrates having sensitivities for different wavelength bands; and a circuit substrate on which the plurality of photodetection substrates are mounted, each of the plurality of photodetection substrates has a plurality of photodetection portions arranged along a row direction and a column direction perpendicular to the row direction, the plurality of photodetection substrates are mounted on the circuit substrate in a manner arranged along the column direction, the circuit substrate includes: a plurality of pixel circuits arranged along the row direction and the column direction and electrically connected to the plurality of photodetection portions respectively; a row selection circuit that selects a row for reading out a signal from among the plurality of pixel circuits; and a column readout circuit that reads out signals from the plurality of pixel circuits of the row selected by the row selection circuit for each column, the row selection circuit is configured to be able to select any row from among the plurality of rows of the plurality of pixel circuits.
2. The photodetector according to claim 1, wherein, further comprising a control unit, the control unit controls the row selection circuit in such a manner that signals from the plurality of pixel circuits of the row corresponding to the input are read out, and signals from the plurality of pixel circuits of rows other than the row corresponding to the input are not read out.
3. The photodetector according to claim 1 or 2, wherein, the plurality of photodetection substrates include a first photodetection substrate and a second photodetection substrate, the second photodetection substrate is adjacent to the first photodetection substrate with a first gap in the column direction.
4. The photodetector according to claim 3, wherein, in a region of the circuit substrate that overlaps with the first gap when viewed from the thickness direction of the circuit substrate, a plurality of non-connected pixel circuits not electrically connected to the plurality of photodetection substrates are arranged.
5. The photodetector according to claim 4, wherein, the capacitance portions of the plurality of non-connected pixel circuits are reset when the capacitance portions of the plurality of pixel circuits are reset.
6. The photodetector according to claim 4, wherein, the capacitance portions of the plurality of non-connected pixel circuits are constantly reset.
7. The photodetector according to claim 3, wherein, in a region of the circuit substrate that overlaps with the first gap when viewed from the thickness direction of the circuit substrate, no pixel circuits are arranged.
8. The photodetector according to claim 3, wherein, the plurality of photodetection substrates further include a third photodetection substrate, the third photodetection substrate is adjacent to the second photodetection substrate with a second gap in the column direction, the length of the first gap in the column direction is different from the length of the second gap in the column direction.
9. The photodetector according to any one of claims 1 to 8, wherein, the column readout circuit has a plurality of output ports electrically connected to columns of the plurality of pixel circuits that are different from each other.
10. The photodetector according to any one of claims 1 to 9, wherein, the number of the plurality of pixel circuits arranged along the row direction is larger than the number of the plurality of pixel circuits arranged along the column direction.
11. The photodetector according to any one of claims 1 to 10, wherein, Each of the plurality of pixel circuits has a charge amplifier electrically connected to one of the plurality of light detection units.
12. The light detector according to any one of claims 1 to 11, wherein the row selection circuit is configured to be switchable between a first state and a second state. In the first state, any row can be selected from the plurality of rows of the plurality of pixel circuits. In the second state, the plurality of rows of the plurality of pixel circuits are sequentially selected in accordance with the arrangement in the column direction.
13. The light detector according to any one of claims 1 to 12, wherein the plurality of light detection substrates include a first light detection substrate having sensitivity to a first wavelength band and a second light detection substrate having sensitivity to a second wavelength band, a part of the first wavelength band overlaps with the second wavelength band.
14. A camera, wherein it includes: a light incident portion; a spectroscopic portion that spectroscopically splits the light incident from the light incident portion; and a light detector that detects the light spectroscopically split by the spectroscopic portion, the light detector includes: a plurality of light detection units arranged along a row direction and a column direction perpendicular to the row direction; a plurality of pixel circuits arranged along the row direction and the column direction, respectively electrically connected to the plurality of light detection units; a row selection circuit that selects a row for reading out a signal from among the plurality of pixel circuits; and a column readout circuit that reads out signals from the plurality of pixel circuits of the row selected by the row selection circuit for each column, the row selection circuit is configured to be able to select any row from the plurality of rows of the plurality of pixel circuits, the spectroscopic portion spectroscopically splits the light in the column direction.
15. The camera according to claim 14, wherein it further includes a slit extending along the row direction, the light passing through the slit is incident on the spectroscopic portion.
16. The camera according to claim 14 or 15, wherein the light detector includes: a plurality of light detection substrates having sensitivity to different wavelength bands; and a circuit substrate on which the plurality of light detection substrates are mounted, each of the plurality of light detection substrates has a plurality of light detection units arranged along the row direction and the column direction, the plurality of light detection substrates are mounted on the circuit substrate in a manner arranged along the column direction, the circuit substrate has the plurality of pixel circuits, the row selection circuit, and the column readout circuit.
17. An imaging system, wherein it includes: the camera according to any one of claims 14 to 16; and a conveying device that conveys an object along the column direction, the light from the object conveyed by the conveying device is incident on the light incident portion.
Citation Information
Patent Citations
Defining software configuration for hyperspectral imaging apparatus
US10274368B2