Supporting structure for chip testing and chip testing device
By designing the support surface of the special-shaped surface to avoid the residual area of the connecting ribs in the support structure for chip testing, the problem of irregular pin forming affecting the test accuracy is solved, and chip testing with high stability and high accuracy is achieved.
Patent Information
- Application Number
- CN202311869680.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-12-29
- Publication Date
- 2025-07-01
AI Technical Summary
In the prior art, during testing, the residual area of the connecting rib caused by irregular pin molding affects the test accuracy.
A support structure for chip testing is designed, including a guide block and a support block. The support surface of the support block forms a gap-shaped surface at the corner of the guide block to avoid the residual area of the connecting ribs and improve support stability.
By improving support stability, the test bit stability of the chip to be tested is improved, thereby improving the test accuracy to more than 98%.
Smart Images
Figure CN120233125A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of semiconductor technology, and particularly to a support structure for chip testing and a chip testing device. Background Art
[0002] For a gravity-type structure sorter used for testing and sorting integrated circuit chips in a bilateral "seagull-shaped" pin "SOP" package form, the test stations perform chip positioning tests through "pin positioning bosses" on the "pin support blocks". During testing, it is necessary to ensure that the chips to be detected accurately and stably stay at the positions to be measured, so as to improve the chip testing accuracy. However, the forming of chip pins is subject to the die-cutting and forming process. When the pins are cut, connected, bent, and extruded into shape, there are residual areas with irregular shapes. The height and width of the protrusions in this residual area vary irregularly within a certain range. The existence of this residual area will affect the testing accuracy. Summary of the Invention
[0003] An embodiment of this application provides a support structure for chip testing, which includes:
[0004] A guiding block, the guiding block having a guiding front surface and a guiding side wall surface that at least partially extend along the length direction of the guiding block, the guiding front surface being connected to the guiding side wall surface and not coplanar;
[0005] A support block, connected to the guiding side wall surface of the guiding block and having a support surface that forms a non-zero angle with the length direction of the guiding block, the support surface being a special-shaped surface with a notch formed at the corner away from the guiding front surface and away from the guiding side wall surface.
[0006] In some embodiments, the guiding side wall surface includes a first side wall portion perpendicular to the width direction of the guiding block and a second side wall portion connecting the first side wall portion and the guiding front surface, the guiding front surface being perpendicular to the thickness direction of the guiding block; any two of the first side wall portion, the second side wall portion, and the guiding front surface are not coplanar;
[0007] Wherein, there are non-zero angles between any two of the length direction, the width direction, and the thickness direction of the guiding block.
[0008] In some embodiments, the second side wall portion is an inclined cutting surface connecting the guiding front surface and the first side wall portion.
[0009] In some embodiments, the support surface has a first side edge located on the guide side wall surface, a second side edge and a third side edge connected to both ends of the first side edge, wherein the second side edge is located on a side close to the guide front surface, and the third side edge is located on a side away from the guide front surface; wherein an angle is formed between the third side edge and the second side edge, and the degree of the angle is 15°-30°; and / or,
[0010] The supporting surface has a first side edge located on the guide side wall surface, a second side edge and a third side edge connected to both ends of the first side edge, and a fourth side edge facing away from the guide side wall surface and connecting the second side edge and the third side edge, wherein the second side edge is located on a side close to the guide front surface, and the third side edge is located on a side facing away from the guide front surface; wherein the length of the fourth side edge is greater than or equal to 0.5 mm.
[0011] In some embodiments, the chip testing support structure further includes a fixing seat connected to a side of the guide block facing away from the guide side wall surface.
[0012] In some embodiments, the fixing seat, the guide block and the support block are integrally formed.
[0013] In some embodiments, the support surface is perpendicular to the length direction of the guide block.
[0014] The embodiment of the present application further provides a chip testing device, which includes a first chip testing support structure and a second chip testing support structure, wherein the first chip testing support structure and the second chip testing support structure both include the chip testing support structure described above; wherein the first chip testing support structure and the second chip testing support structure are symmetrical to each other, the first chip testing support structure and the second chip testing support structure are arranged at intervals in the width direction thereof, and a support block of the first chip testing support structure is arranged opposite to a support block of the second chip testing support structure, and a guide front surface of the first chip testing support structure and a guide front surface of the second chip testing support structure face the same side;
[0015] The chip testing device is used to test a chip to be tested, wherein the chip to be tested includes a product body and a plurality of pins arranged on two opposite side surfaces of the product body; a portion of the plurality of pins are arranged at intervals on one side surface, and another portion of the plurality of pins are arranged at intervals on another side surface; the support surface of the first chip testing support structure and the support surface of the second chip testing support structure respectively support the pins located on the two side surfaces of the product body.
[0016] In some embodiments, the pin includes a first portion close to the product body, a first bending portion located on a side of the first portion away from the product body, a second portion located on a side of the first bending portion away from the first portion, a second bending portion located on a side of the second portion away from the first bending portion, and a third portion located on a side of the second bending portion away from the second portion; at least a part of the pin in the section from the first bending portion to the second bending portion is supported on the support surface, and a positive projection of the first portion in the length direction of the guide block does not overlap with a positive projection of the support surface in the length direction of the guide block.
[0017] In some embodiments, when the first chip test support structure and the second chip test support structure respectively have fixed seats, the chip test device further includes a first driving structure and a second driving structure to respectively correspond to mount the fixed seats of the first chip test support structure and the second chip test support structure, and respectively drive the fixed seats of the first chip test support structure and the second chip test support structure to move.
[0018] The main technical effects achieved by the embodiments of the present application are:
[0019] For the chip test support structure and the chip test device provided by the embodiments of the present application, the support surface of the support block is set as a special-shaped surface with a notch formed at the corner away from the guiding front surface and away from the guiding side wall surface, so that the notch can avoid the connecting rib residue area close to the chip to be tested, which is beneficial to improving the support stability of the support block, improving the stability of the corresponding test position of the chip to be tested, and thus improving the test accuracy. BRIEF DESCRIPTION OF THE DRAWINGS
[0020] Figure 1 is a front view of a partial structure of a chip test device and the chip to be tested supported thereby provided by an exemplary embodiment of the present application;
[0021] Figure 2 is Figure 1 a top view of the partial structure shown;
[0022] Figure 3 is a top view of the chip to be tested provided by an exemplary embodiment of the present application;
[0023] Figure 4 is a partial front view of a chip to be tested provided by an exemplary embodiment of the present application;
[0024] Figure 5 is Figure 1 a top view of the partial structure at A shown;
[0025] Figure 6 It is a perspective three-dimensional structure diagram of a support structure for the first chip test provided by an exemplary embodiment of the present application;
[0026] Figure 7 It is a perspective three-dimensional structure diagram of another perspective of a support structure for the first chip test provided by an exemplary embodiment of the present application;
[0027] Figure 8 It is a perspective three-dimensional structure diagram of a support structure for the second chip test provided by an exemplary embodiment of the present application;
[0028] Figure 9 is Figure 8 The partial enlarged schematic view of part B of the shown support structure for the second chip test. Detailed implementation manners
[0029] Here, the exemplary embodiments will be described in detail, and the examples are shown in the drawings. When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present application. On the contrary, they are merely examples of devices and methods consistent with some aspects of the present application as detailed in the appended claims.
[0030] The terms used in the present application are only for the purpose of describing specific embodiments and are not intended to limit the present application. The singular forms of "a", "the" and "said" used in the present application and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the term "and / or" used herein refers to and includes any or all possible combinations of one or more of the associated listed items.
[0031] It should be understood that although the terms first, second, third, etc. may be used in the present application to describe various information, such information should not be limited to these terms. These terms are only used to distinguish the same type of information from each other. For example, without departing from the scope of the present application, the first information may also be referred to as the second information, and similarly, the second information may also be referred to as the first information. Depending on the context, the word "if" as used herein may be interpreted as "when" or "while" or "in response to determining".
[0032] The present application provides a support structure for chip testing and a chip testing device. The support structure for chip testing includes a guiding block and a supporting block. The guiding block has a guiding front face and a guiding side wall face that at least partially extend along the length direction of the guiding block. The guiding front face is connected to the guiding side wall face and they are not coplanar. The supporting block is connected to the guiding side wall face of the guiding block and has a supporting face that forms a non-zero angle with the length direction of the guiding block. The supporting face is a special-shaped face with a notch formed at the corner away from the guiding front face and away from the guiding side wall face. In the above-mentioned support structure for chip testing, the supporting face of the supporting block is set as a special-shaped face with a notch formed at the corner away from the guiding front face and away from the guiding side wall face, so that the notch can avoid the connecting rib residue area close to the chip to be tested, which is beneficial to improving the supporting stability of the supporting block, improving the stability of the corresponding test position of the chip to be tested, and thus improving the test accuracy rate.
[0033] The following will combine with the attached Figures 1 to 9 drawings to elaborate some embodiments of the present application. Without conflict, the following embodiments and the features in the embodiments can be combined with each other.
[0034] Please refer to Figure 1 and, if necessary, combine with Figures 2 to 9 shown in the drawings. The present application provides a chip testing device, which includes two opposite support structures 10 for chip testing. The chip testing device can be used to support the chip 20 to be tested when testing the chip 20 to be tested. As Figure 1 shown, when the chip 20 to be tested is supported on the chip testing device, it can be located at the test position for testing.
[0035] Please combine with Figures 2 to 4 shown in the drawings. The chip 20 to be tested includes a product body 21.
[0036] The product body 21 has two side faces 211 and 212 that are opposite to each other in its width direction w1. The product body 21 has another two side faces 213 and 214 that are opposite to each other in its length direction L1. The product body 21 also has a front face 215 and a back face 216 that are opposite to each other in its thickness direction T1. The chip 20 to be tested further includes a plurality of pins located on the opposite side faces 211 and 212 of the product body 21. A part of the pins 22 among the plurality of pins are arranged at intervals along the length direction L1 of the product body 21 on the side of the side face 211, and another part of the pins 23 among the plurality of pins are arranged at intervals along the length direction L1 of the product body 21 on the side of the side face 212. The plurality of pins are bent as a whole towards the side where the back face 216 of the product body 21 is located. There is a non-zero angle between any two of the length direction L1, width direction W1, and thickness direction T1 of the product body 21. Preferably, any two of the length direction L1, width direction W1, and thickness direction T1 of the product body 21 are perpendicular to each other.
[0037] The pin 22 includes a first portion 221 close to the product body 21, a first bent portion 222 located on the side of the first portion 221 away from the product body 21, a second portion 223 located on the side of the first bent portion 222 away from the first portion 221, a second bent portion 224 located on the side of the second portion 223 away from the first bent portion 222, and a third portion 225 located on the side of the second bent portion 224 away from the second portion 223. The third portion 225 is connected to a connection piece such as a test gold finger during testing to perform an electrical performance test of the chip 20 to be tested. The pin 23 has a similar structure, and its third portion is connected to a connection piece such as a test gold finger during testing to perform an electrical performance test of the chip 20 to be tested.
[0038] In some embodiments, the first portion 221 has a first dimension h of 0-0.102 mm along the length direction L1 of the product body 21 at the two edges of the first portion 221 relative to the other portions of the pin 22. The second dimension w of the entire first portion 221 in the width direction W1 of the product body 21 is in the range of 0.25 mm to 0.55 mm.
[0039] The pin 23 located on the side 212 and the pin 22 located on the side 211 are symmetrically structured with respect to the product body 21 . For details of the pin 23 , reference may be made to the related description of the pin 22 .
[0040] The chip test support structure 10 may include a first chip test support structure 11 and a second chip test support structure 12 .
[0041] The first chip test support structure 11 at least includes a guide block 102 and a support block 101 connected to the guide block 102. The guide block 102 has a guide front surface 1021 and a guide side wall surface 1022 extending at least partially along the length direction L of the guide block, and the guide front surface 1021 is connected to the guide side wall surface 1022 and is not coplanar. The support block 101 is connected to the guide side wall surface 1022 of the guide block 102, and has a support surface 1010 that forms a non-zero angle with the length direction L of the guide block 102. The support surface 1010 is a profiled surface with a notch formed at a corner away from the guide front surface 1021 and away from the guide side wall surface 1022.
[0042] The special-shaped surface can be a non-rectangular shape, such as a non-rectangular quadrilateral, such as a trapezoid, or a polygon with other multiple sides. All edges can be straight edges, or some can be non-straight edges. For example, the edge forming the notch can be a straight edge or a curved edge.
[0043] Preferably, in some embodiments, the support surface 1010 is perpendicular to the length direction L of the guide block 102.
[0044] The guide block 102 may have a top surface 1101 and a bottom surface 1102 that face away from each other in its length direction L. In some embodiments, the guide block 102 is disposed closer to the bottom surface 1102.
[0045] The first chip test support structure 11 and the second chip test support structure 12 may be symmetrical to each other. The specific structure of the second chip test support structure 12 may refer to the relevant description of the first chip test support structure 11.
[0046] The first chip test support structure 11 and the second chip test support structure 12 are arranged at intervals in the width direction W1 of the two, and the support block 101 of the first chip test support structure 11 is disposed opposite to the support block 104 of the second chip test support structure 12, and the guide front surface 1021 of the first chip test support structure 11 and the guide front surface 1021 of the second chip test support structure face the same side. To facilitate the distinction of the support blocks, the support block of the second chip test support structure 12 is denoted by the reference numeral 104 here.
[0047] Such as Figure 1As shown, when the support structure 10 for chip testing supports the chip 20 to be tested for testing, the length directions L of both the first support structure 11 for chip testing and the second support structure 12 for chip testing are vertically arranged, the top surface 1101 of the support structure 10 for chip testing faces upward, and the bottom surface 1102 of the support structure 10 for chip testing faces downward. The length direction L1 of the chip 20 to be tested is consistent with the length direction L of both the first support structure 11 for chip testing and the second support structure 12 for chip testing, and is also vertically arranged. The back surface 216 of the product body 21 and the guiding front surface 1021 of both the first support structure 11 for chip testing and the second support structure 12 for chip testing face the same side. Before testing, the chip 20 to be tested can slide from the top surface 1101 of the support structure 10 for chip testing towards the bottom surface 1102 of the support structure 10 for chip testing to the testing position, and is supported by the support surfaces 1010 and 1040 of the support blocks 101 and 104. When the chip 20 to be tested slides, the guiding blocks 102 of both the first support structure 11 for chip testing and the second support structure 12 for chip testing can be used as the sliding guiding structure for the chip 20 to be tested. When the chip 20 to be tested slides to the testing position, the support surface 1010 of the support block 101 in the first support structure 11 for chip testing supports the pin 22, and the support surface 1040 of the support block 104 in the second support structure 12 for chip testing supports the pin 23. Among them, the support surface 1010 supports one pin 22 that is closest to the side surface 214 of the product body 21 among the multiple pins 22, and supports the edge of this pin 22 facing the side where the side surface 214 is located. Similarly, the support surface 1040 supports one pin 23 that is closest to the side surface 214 of the product body 21 among the multiple pins 23, and supports the edge of this pin 23 facing the side where the side surface 214 is located.
[0048] At least a part of the pins 22 in the section from the first bending part 222 to the second bending part 224 (i.e., the section including the first bending part 222, the second part 223, and the second bending part 224) is supported on the support surface 1010, and the front projection of the first part 221 in the length direction L of the guiding block does not overlap with the front projection of the support surface 1010 in the length direction L of the guiding block. The cooperation between the pin 23 and the support surface 1040 is similar.
[0049] It should be noted that, please combine Figures 3 to 5As shown, the first part 221 of the pin 22 near the product body 21 is prone to produce residual connection ribs during the process of cutting the connection ribs and bending the pins, forming a residual connection rib area Q1. The third part 225 is used as a test contact area Q3, which is connected to an electrical connection structure such as a test gold finger during testing. The area of the first bending part 222, the second part 223 and the second bending part 224 can be supported on the support surface 1010 as a support area Q2. The structure of the pin 23 is similar. The chip test support structure adopts the above-mentioned arrangement, so that the gaps of the support surface 1010 and the support surface 1040 can avoid the residual connection rib area close to the chip 20 to be tested, which is conducive to improving the support stability of the support block 101 and the support block 104, and improving the stability of the corresponding test position of the chip 20 to be tested, thereby improving the accuracy of the test.
[0050] In some embodiments, the guide side wall surface 1022 includes a first side wall portion 10221 perpendicular to the width direction of the guide block and a second side wall portion 10222 connected to the first side wall portion 10221 and the guide front surface 1021, and the guide front surface 1021 is perpendicular to the thickness direction T of the guide block. The first side wall portion 10221, the second side wall portion 10222 and the guide front surface 1021 are not coplanar with each other.
[0051] Correspondingly, the third part 225 serves as the test contact area Q3. During testing, at least a portion of the surface of the third part 225 facing the guiding front part 10211 is against the guiding front part 10211, and the gold finger or other electrical connection structure is in electrical contact with the first pin 22 from the side of the third part 225 away from the guiding front part 10211.
[0052] There is a non-zero angle between any two of the length direction L of the guide block, the width direction W of the guide block, and the thickness direction T of the guide block.
[0053] Preferably, in some embodiments, the length direction of the guide block, the width direction of the guide block and the thickness direction of the guide block are perpendicular to each other.
[0054] Combination Figure 2 As shown, it can be understood that when the chip to be tested 20 is located at the testing position or is being tested, the thickness direction T1 of the chip to be tested 20 can be consistent with the thickness direction T of the guide block, and the width direction W1 of the chip to be tested 20 can be consistent with the width direction W of the guide block.
[0055] In some embodiments, the second side wall portion 10222 is a chamfered surface connecting the guide front surface 1021 and the first side wall portion 10221 to better adapt to the bending shape of the corresponding pin to avoid part of the pin 22.Figure 2 As shown, the second side wall portion 10222 can be adapted to the pin 22 support area Q2 to avoid the pin portion corresponding to the support area Q2.
[0056] It is understandable that, in some embodiments, the chamfered surface may be provided on the guide block along the entire length region in the length direction L of the guide block, for example Figure 6 The second side wall portion 10222 is shown. Of course, in some other embodiments, the second side wall portion may also be located only in the area above the support surface.
[0057] It should be noted that, in some other embodiments, the guide side wall surface may not be provided with a second side wall portion, but only includes a wall surface perpendicular to the width direction of the guide block, such as only includes a wall surface perpendicular to the guide front surface.
[0058] Please combine Figure 2 As shown, in some embodiments, the supporting surface 1010 has a first side 1011 located at the guiding side wall surface 1022, a second side 1012 and a third side 1013 connected to both ends of the first side 1011, wherein the second side 1012 is located on the side close to the guiding front side 1021, and the third side 1013 is located on the side away from the guiding front side 1021; wherein an angle α is formed between the third side 1013 and the second side 1012, and the degree of the angle α is 15°-30°, which can well avoid the residual area Q1 of the connecting rib of the pin 22 when supporting the pin 22.
[0059] Please continue to combine Figure 2 As shown, in some embodiments, the support surface 1010 has a first side 1011 located on the guide side wall 1022, a second side 1012 and a third side 1013 connected to both ends of the first side 1011, and a fourth side 1014 facing away from the guide side wall 1022 and connecting the second side 1012 and the third side 1013, wherein the second side 1012 is located on the side close to the guide front side 1021, and the third side 1013 is located on the side away from the guide front side 1021; wherein the length of the fourth side is greater than or equal to 0.5 mm to ensure the supporting strength of the support block 101.
[0060] In some embodiments, the first chip testing support structure 11 further includes a fixing seat 103 connected to a side of the guide block 102 away from the guide side wall surface 1022 , so as to facilitate installation of the first chip testing support structure 11 .
[0061] Preferably, in some embodiments, the fixed seat 103, the guiding block 102 and the supporting block 101 are integrally formed, which can reduce the influence on the height of the supporting surface or the levelness of the supporting surface caused by tolerances, assembly processes, etc. when at least two independent structures among the three are assembled, and further improve the measurement accuracy.
[0062] In some embodiments, the chip testing device further includes a first driving structure and a second driving structure (not shown) for respectively installing the fixed seats of the first chip testing support structure 11 and the second chip testing support structure 12, so as to respectively drive the corresponding fixed seats to move.
[0063] For example, as Figure 1 shown, the first driving structure and the second driving structure can respectively drive the fixed seats of the first chip testing support structure 11 and the second chip testing support structure 12 to move in and out along the Figure 1 direction perpendicular to the paper plane as shown. For example, before the chip 20 to be tested slides to the position to be tested as Figure 1 shown, the supporting surface 1010 of the first chip testing support structure 11 and the supporting surface 1040 of the second chip testing support structure 12 are located on one side of the position to be tested in the direction perpendicular to the paper plane and facing inwards. When the chip 20 to be tested slides to the position to be tested, the first chip testing support structure 11 and the second chip testing support structure 12 move in the direction perpendicular to the paper plane and facing outwards, so that the supporting surface 1010 and the supporting surface 1040 respectively support the corresponding pins, and the chip 20 to be tested is fixed at the position to be tested. After the test is completed, the supporting surface 1010 of the first chip testing support structure 11 and the supporting surface 1040 of the second chip testing support structure 12 can be correspondingly driven to move to one side of the position to be tested in the direction perpendicular to the paper plane and facing inwards.
[0064] Based on the above description, the inventors have found through research that by using the above chip testing device of the present application or a testing device having the above chip testing support structure to perform electrical performance testing on a chip to be tested, the test accuracy rate can be increased to 98% or even higher.
[0065] The embodiments of the manufacturing method of the semiconductor structure provided by the embodiments of the present application and the embodiments of the semiconductor structure belong to the same inventive concept. The relevant details and descriptions of the beneficial effects can be referred to each other, and will not be repeated here.
[0066] It should be noted that in the drawings, the dimensions of layers and regions may be exaggerated for clarity of illustration. Also, it will be understood that when an element or layer is referred to as being "on" another element or layer, it can be directly on the other element, or intervening layers may be present. Additionally, it will be understood that when an element or layer is referred to as being "under" another element or layer, it can be directly under the other element, or more than one intervening layer or element may be present. Further, it will be understood that when a layer or element is referred to as being "between" two layers or two elements, it can be the only layer between the two layers or two elements, or more than one intervening layer or element may also be present. Like reference numerals throughout the specification indicate like elements.
[0067] Other embodiments of the present application will be readily apparent to those skilled in the art upon consideration of the specification and practice of the disclosure herein. The present application is intended to cover any variations, uses, or adaptations of the present application that follow the general principles of the present application and include known common knowledge or conventional technical means in the technical field not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of the present application are pointed out by the following claims.
[0068] It should be understood that the present application is not limited to the exact structures described above and shown in the drawings, and various modifications and changes can be made without departing from its scope. The scope of the present application is only limited by the appended claims.
Claims
1. A support structure for chip testing, characterized in that, Comprising: A guiding block, the guiding block having a guiding front face and a guiding side wall face that at least partially extend along the length direction of the guiding block, the guiding front face being connected to the guiding side wall face and not coplanar; A supporting block, connected to the guiding side wall face of the guiding block and having a supporting face that forms a non-zero angle with the length direction of the guiding block, the supporting face being a special-shaped face with a notch formed at the corner away from the guiding front face and away from the guiding side wall face.
2. The support structure for chip testing according to claim 1, wherein The guiding side wall face includes a first side wall portion perpendicular to the width direction of the guiding block and a second side wall portion connecting the first side wall portion and the guiding front face, the guiding front face being perpendicular to the thickness direction of the guiding block; the first side wall portion, the second side wall portion, and the guiding front face are not coplanar with each other in pairs; Wherein, there is a non-zero angle between any two of the length direction of the guiding block, the width direction of the guiding block, and the thickness direction of the guiding block.
3. The support structure for chip testing according to claim 2, wherein, The second side wall portion is an inclined cutting plane connecting the guiding front face and the first side wall portion.
4. The support structure for chip testing according to claim 1, characterized in that, The supporting face has a first side on the guiding side wall face, a second side and a third side connecting the two ends of the first side, wherein the second side is located on the side close to the guiding front face, and the third side is located on the side away from the guiding front face; wherein, there is an angle between the third side and the second side, and the degree of the angle is 15° - 30°; and / or, The supporting face has a first side on the guiding side wall face, a second side and a third side connecting the two ends of the first side, and a fourth side away from the guiding side wall face and connecting the second side and the third side, the second side is located on the side close to the guiding front face, and the third side is located on the side away from the guiding front face; wherein, the length of the fourth side is greater than or equal to 0.5 mm.
5. The support structure for chip testing according to claim 1, wherein The chip testing support structure further includes a fixing base connected to the side of the guiding block away from the guiding side wall face.
6. The support structure for chip testing according to claim 5, wherein, The fixing base, the guiding block, and the supporting block are integrally formed.
7. The support structure for chip testing according to any one of claims 1 to 6, characterized in that, The supporting face is perpendicular to the length direction of the guiding block.
8. A chip testing device, characterized in that, Including a first chip testing support structure and a second chip testing support structure, both the first chip testing support structure and the second chip testing support structure include the chip testing support structure according to any one of claims 1 to 7; wherein, the first chip testing support structure and the second chip testing support structure are symmetrical to each other, the first chip testing support structure and the second chip testing support structure are arranged at intervals in their width directions, and the supporting blocks of the first chip testing support structure and the second chip testing support structure are arranged opposite to each other, and the guiding front face of the first chip testing support structure and the guiding front face of the second chip testing support structure face the same side; The chip testing device is used to test a chip to be tested, wherein the chip to be tested includes a product body and a plurality of pins arranged on two opposite side surfaces of the product body; a portion of the plurality of pins are arranged at intervals on one side surface, and another portion of the plurality of pins are arranged at intervals on another side surface; the support surface of the first chip testing support structure and the support surface of the second chip testing support structure respectively support the pins located on the two side surfaces of the product body.
9. The chip testing device according to claim 8, wherein, The pins of the chip to be tested include a first portion close to the product body, a first bent portion located on a side of the first portion away from the product body, a second portion located on a side of the first bent portion away from the first portion, a second bent portion located on a side of the second portion away from the first bent portion, and a third portion located on a side of the second bent portion away from the second portion; at least a portion of the pin located from the first bent portion to the second bent portion is supported on the supporting surface, and the orthographic projection of the first portion in the length direction of the guide block does not overlap with the orthographic projection of the supporting surface in the length direction of the guide block.
10. The chip testing device according to claim 8, characterized in that, When the first chip testing support structure and the second chip testing support structure respectively have fixed seats, the chip testing device also includes a first driving structure and a second driving structure, so as to respectively correspond to the installation of the fixed seat of the first chip testing support structure and the fixed seat of the second chip testing support structure, and respectively correspond to driving the fixed seat of the first chip testing support structure and the fixed seat of the second chip testing support structure to move.