Array substrate, driving method and touch display device

Abstract

The invention discloses an array substrate, a driving method and a touch display device. The array substrate comprises a common electrode layer, a plurality of gate driving lines, a plurality of GIP units and a time sequence control unit. The common electrode layer comprises a common electrode block array formed by arranging a plurality of common electrode blocks; the plurality of gate driving lines extend along the row direction; each row of gate driving lines at the junction of two adjacent rows of common electrode blocks of the common electrode block array are disconnected in the middle to form a plurality of first front half gate driving lines and a plurality of first rear half gate driving lines, and the plurality of first front half gate driving lines and the plurality of first rear half gate driving lines are electrically connected with the GIP units respectively; one ends of other gate driving lines except the junction of two adjacent rows of common electrode blocks of the common electrode block array are sequentially and electrically connected with the GIP units in a left-right staggered manner; the sequential control unit is electrically connected with the plurality of GIP units. The coupling capacitance of the gate lines and the common electrode blocks can be gradually changed, and the problem of cross grains at the junctions of the common electrode blocks is solved.

Description

Technical Field

[0001] The present invention relates to the technical field of crosshatch processing of touch display devices, and particularly to an array substrate, a driving method, and a touch display device. Background Art

[0002] Some existing display devices use the GIP (Gate in Panel) technology, that is, integrating the gate drive on the display screen, which can achieve a narrow bezel effect. TDDI (Touch and Display Driver Integration) displays have been widely used by applying both the GIP and TDDI technologies to display devices because they integrate display and touch together. However, there will be a crosshatch phenomenon when the existing TDDI is paired with the GIP technology, which affects the consumer experience.

[0003] For example Figure 1 , the TDDI display device divides the display area AA of the display screen into multiple common electrode blocks, which are used as the common electrode of the display screen during the display period and as the touch electrode during the touch stage. For example Figure 2 and Figure 3 , there is capacitive coupling between the gate drive GIP output line and the common electrode. During the actual driving of the gate, it gradually enters the current common electrode block and then gradually exits the current common electrode block, resulting in display crosshatching at the upper and lower boundaries of the common electrode block. One of the reasons for the crosshatch is related to the change in the coupling amount between the gate line and the common electrode block. That is, during the gate drive process, the gate lines Gn-2, Gn-1, and Gn are turned on and off row by row, and the voltage coupling received by the common electrode block corresponding to this row of these gate lines gradually decreases until the coupling amount is zero. The change in the coupling amount is too fast, so that the common electrode block does not recover in time, and related crosshatch phenomena appear nearby. Similarly, during the driving process of the gate lines Gn+1, Gn+2, and Gn+3 corresponding to the common electrode block in the next row, the coupling amount of the corresponding common electrode block gradually increases, and the change in the coupling amount of the common electrode block is relatively large, so that the common electrode block does not recover in time, and display crosshatch phenomena appear nearby. Summary of the Invention

[0004] In the existing touch display device, the coupling capacitance changes too fast at the junction of the row common electrode blocks, resulting in display crosshatch phenomena at the junction.

[0005] In view of the above problems, an array substrate, a driving method, and a touch display device are provided. By disconnecting each row of the gate driving lines at the junction of adjacent two rows of common electrode blocks in the middle, a plurality of first front half gate driving lines and a plurality of first rear half gate driving lines are formed, which are respectively electrically connected to the GIP units, and the timing control unit sequentially performs diagonal driving on the plurality of first front half gate driving lines and the plurality of first rear half gate driving lines, so that the coupling capacitance between the gate lines and the common electrode blocks can be gradually changed, the cross stripe phenomenon at the junction of the common electrode blocks can be alleviated, and the product quality can be improved.

[0006] In a first aspect, an array substrate includes: A common electrode layer; A plurality of gate driving lines; A plurality of GIP units; A timing control unit; The common electrode layer includes a common electrode block array formed by arranging a plurality of common electrode blocks; The plurality of gate driving lines extend in the row direction; At the junction of adjacent two rows of common electrode blocks in the common electrode block array, each row of the gate driving lines is disconnected in the middle, forming a plurality of first front half gate driving lines and a plurality of first rear half gate driving lines, and the plurality of first front half gate driving lines and the plurality of first rear half gate driving lines are respectively electrically connected to the GIP units; At one ends of the other gate driving lines outside the junction of adjacent two rows of common electrode blocks in the common electrode block array, the GIP units are sequentially electrically connected in a left-right staggered manner; The timing control unit is electrically connected to the plurality of GIP units.

[0007] Combined with the array substrate described in the first aspect of the present invention, in a first possible implementation manner, the gate driving lines at the junction of the common electrode blocks in the previous row include two gate driving lines; The disconnection of the two gate driving lines in the middle includes: Two first front left half gate driving lines and two first front right half gate driving lines; The two first front left half gate driving lines and the two first front right half gate driving lines are respectively electrically connected to the GIP units.

[0008] Combined with the first possible implementation manner of the first aspect of the present invention, in a second possible implementation manner, the gate driving lines at the junction of the common electrode blocks in the subsequent row include two gate driving lines; The disconnection of the two gate driving lines in the middle includes: Two first rear left half gate driving lines and two first rear right half gate driving lines; The two first rear left half gate driving lines and the two first rear right half gate driving lines are electrically connected to the GIP unit respectively.

[0009] Combined with the second possible implementation manner of the first aspect of the present invention, in the third possible implementation manner, the timing driving unit is used to output driving timings to the corresponding GIP units to drive in sequence: The first one of the two first front left half gate driving lines and the first one of the two first rear right gate driving lines; The first one of the two first front right half gate driving lines and the first one of the two first rear left half gate driving lines; The next one of the two first front left half gate driving lines and the next one of the two first rear right gate driving lines; The next one of the two first front right half gate driving lines and the next one of the two first rear left half gate driving lines.

[0010] In a second aspect, a driving method uses the array substrate described in the first aspect, and includes: Step 100: Obtain a common electrode block array, disconnect the gate driving lines at the junction of adjacent two rows of common electrode blocks in the middle, and connect to the GIP unit respectively; Step 200: Use the timing control unit to perform diagonal driving on the GIP units of the half row gate driving lines of the adjacent two rows of common electrode blocks at the junction in sequence.

[0011] Combined with the driving method described in the second aspect of the present invention, in the first possible implementation manner, the step 100 includes: Step 110: Layout two gate driving lines at the junction of the front row of common electrode blocks of the adjacent two rows of common electrode blocks; Step 120: Disconnect the two gate driving lines in the middle to obtain two first front left half gate driving lines and two first front right half gate driving lines, and the two first front left half gate driving lines and the two first front right half gate driving lines are electrically connected to the GIP unit respectively.

[0012] Combined with the first possible implementation manner of the second aspect of the present invention, in the second possible implementation manner, the step 100 further includes: Step 130: Layout two gate driving lines at the junction of the rear row of common electrode blocks of the adjacent two rows of common electrode blocks; Step 140: Disconnect the two gate driving lines in the middle to obtain two first rear left half gate driving lines and two first rear right gate driving lines, and the two first rear left half gate driving lines and the two first rear right gate driving lines are electrically connected to the GIP unit respectively.

[0013] Combined with the second possible implementation manner of the second aspect of the present invention, in the third possible implementation manner, the step 200 includes: Step 210: Use the timing driving unit to drive the first one in the first front left half gate driving lines and the first one in the two first rear right gate driving lines; Step 220: Use the timing driving unit to drive the first one in the two first front right half gate driving lines and the first one in the two first rear left half gate driving lines.

[0014] Combined with the third possible implementation manner of the second aspect of the present invention, in the fourth possible implementation manner, the step 200 further includes: Step 230: Use the timing driving unit to drive the next one in the two first front left half gate driving lines and the next one in the two first rear right gate driving lines; Step 240: Use the timing driving unit to drive the next one in the two first front right half gate driving lines and the next one in the two first rear left half gate driving lines.

[0015] In the third aspect, a touch display device includes the array substrate described in the first aspect and is driven by the driving method described in the second aspect.

[0016] Implementing the array substrate, driving method, and touch display device of the present invention, by disconnecting each row of the gate driving lines at the junction of adjacent two rows of common electrode blocks in the middle to form a plurality of first front half gate driving lines and a plurality of first rear half gate driving lines, electrically connecting them to the GIP unit respectively, and using the timing control unit to sequentially perform diagonal driving on the plurality of first front half gate driving lines and the plurality of first rear half gate driving lines, it is possible to gradually change the coupling capacitance between the gate line and the common electrode block, reduce the cross stripe phenomenon at the junction of the common electrode blocks, and improve the product quality. Description of the Drawings

[0017] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the following drawings are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0018] Figure 1 It is the first schematic diagram of the layout of the gate driving lines and the common electrode blocks of the touch display device in the prior art; Figure 2 It is the second schematic diagram of the layout of the gate driving lines and the common electrode blocks of the touch display device in the prior art; Figure 3 It is the driving timing schematic diagram of the touch display device in the prior art; Figure 4 It is a schematic layout diagram of the gate driving line and the common electrode block of the touch display device in the present application; Figure 5 Corresponding to Figure 4 It is a schematic diagram of the driving timing of the touch display device in; Figure 6 It is a schematic flowchart of a specific embodiment of a driving method in the present application; Figure 7 It is Figure 6 A schematic flowchart of a specific embodiment of step 100 in; Figure 8 It is Figure 7 A schematic flowchart of a specific embodiment after step 120 in; Figure 9 It is Figure 6 A schematic flowchart of a specific embodiment of step 200 in; Figure 10 It is Figure 9 A schematic flowchart of a specific embodiment after step 220 in. Detailed implementation manners

[0019] Next, the technical solutions in the present invention will be clearly and completely described in conjunction with the accompanying drawings in the invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments in the present invention, other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0020] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those of ordinary skill in the technical field to which the present invention belongs. The terms used in the specification of the present invention herein are only for the purpose of describing specific embodiments, and are not intended to limit the present invention. The term "and / or" used herein includes any and all combinations of one or more of the related listed items.

[0021] It should be noted that when an element is referred to as being "fixed to" or "disposed on" another element, it can be directly on the other element or indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or indirectly connected to the other element.

[0022] It should be understood that the orientation or positional relationship indicated by terms such as "length", "width", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. is based on the orientation or positional relationship shown in the drawings. It is only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as a limitation to the present application.

[0023] In addition, the terms "first" and "second" are only used for descriptive purposes and should not be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include one or more of such features. In the description of the present application, "a plurality of" means two or more unless otherwise specifically defined.

[0024] In the existing touch display device, the coupling capacitance changes too fast at the junction of the row common electrode blocks, resulting in the appearance of display streaks at the junction. In view of the above problems, an array substrate, a driving method and a touch display device are provided.

[0025] In a first aspect, an array substrate, as Figure 4 , Figure 4 is a schematic layout diagram of the gate driving lines and the common electrode blocks of the touch display device in the present application; it includes a common electrode layer, a plurality of gate driving lines, a plurality of GIP units, and a timing control unit; the common electrode layer includes a common electrode block array formed by arranging a plurality of common electrode blocks; the plurality of gate driving lines extend in the row direction; each row of gate driving lines at the junction of adjacent rows of common electrode blocks in the common electrode block array is disconnected in the middle, forming a plurality of first front half gate driving lines and a plurality of first rear half gate driving lines, and the plurality of first front half gate driving lines and the plurality of first rear half gate driving lines are respectively electrically connected to GIP units (not shown in the figure); one end of the other gate driving lines outside the junction of adjacent rows of common electrode blocks in the common electrode block array is electrically connected to the GIP units in a left-right staggered manner in sequence; the timing control unit is electrically connected to the plurality of GIP units. By disconnecting each row of gate driving lines at the junction of adjacent rows of common electrode blocks in the middle, forming a plurality of first front half gate driving lines and a plurality of first rear half gate driving lines, respectively electrically connecting the GIP units, and using the timing control unit to perform diagonal driving on the plurality of first front half gate driving lines and the plurality of first rear half gate driving lines in sequence, the coupling capacitance between the gate lines and the common electrode blocks can be gradually changed, the streak phenomenon at the junction of the common electrode blocks can be alleviated, and the product quality can be improved.

[0026] In this embodiment, for each half of the gate driving lines in the junction processing, they are respectively connected to the corresponding GIP units. The gate driving lines not at the junction are connected to the GIP units in a left-right staggered manner according to the conventional method, that is, the left end of the previous gate driving line is connected to the GIP unit, and the right end of the subsequent gate driving line is connected to the GIP unit.

[0027] Preferably, as Figure 4 , at the junction of the previous row of common electrode blocks in two adjacent rows of common electrode blocks, two gate driving lines (Gn-1, Gn) are arranged; the two gate driving lines (Gn-1, Gn) are disconnected in the middle to obtain two first front left half gate driving lines (Gn-1_L, Gn_L) and two first front right half gate driving lines (Gn-1_R, Gn_R), and the two first front left half gate driving lines (Gn-1_L, Gn_L) and the two first front right half gate driving lines (Gn-1_R, Gn_R) are respectively electrically connected to GIP units (not shown in the figure).

[0028] Preferably, as Figure 4 , at the junction of the subsequent row of common electrode blocks in two adjacent rows of common electrode blocks, two gate driving lines (Gn+1, Gn+2) are arranged; the two gate driving lines (Gn+1, Gn+2) are disconnected in the middle to obtain two first rear left half gate driving lines (Gn+1_L, Gn+2_L) and two first rear right gate driving lines (Gn+1_R, Gn+2_R), and the two first rear left half gate driving lines (Gn+1_L, Gn+2_L) and the two first rear right gate driving lines (Gn+1_R, Gn+2_R) are respectively electrically connected to GIP units (not shown in the figure).

[0029] As Figure 5 , Figure 5 is the schematic diagram of the driving timing of the touch display device corresponding to Figure 4 ; the timing driving unit is used to output driving timing to the corresponding GIP units to drive in sequence: the first one (Gn-1_L) of the two first front left half gate driving lines, the first one (Gn+1_R) of the two first rear right gate driving lines; the first one (Gn-1_R) of the two first front right half gate driving lines, the first one (Gn+1_L) of the two first rear left half gate driving lines; the next one (Gn_L) of the two first front left half gate driving lines, the next one (Gn+2_R) of the two first rear right gate driving lines; the next one (Gn_R) of the two first front right half gate driving lines, the next one (Gn+2_L) of the two first rear left half gate driving lines.

[0030] Update the gate driving lines from single-sided staggered driving to driving half of the pixels on each side near the boundary of the common electrode block (VCOM block), that is, only half of the gate driving lines corresponding to the common electrode block (VCOM block), and when driving, Gn-1_L and Gn+1_R start driving simultaneously, and the corresponding data (vertical direction, not shown in the figure) lines charge the pixels, and it will not cause incorrect data charging. At this time, the coupling amount corresponding to the gate driving of the common electrode block (VCOM block) in the previous row is reduced by half, and the coupling amount of the common electrode block (VCOM block) in the next row is increased by half, realizing a uniform and gradual transition of the coupling amount, and the coupling amount is reduced by half compared with the prior art. Similarly, continue to drive Gn-1_R and Gn+1_L simultaneously, drive Gn_L and Gn+2_R simultaneously, and drive Gn_R and Gn+2_L simultaneously. After that, it is the same as the prior art for the Gn+3 row driving.

[0031] Compared with the prior art, the technology of this application drives the upper and lower common electrode blocks (VCOM blocks) of the gate driving gradually in half, reducing the coupling amount. At the same time, the coupling amount of the common electrode block (VCOM block) in the previous row gradually decreases, and the coupling amount of the common electrode block (VCOM block) in the next row gradually increases, which can reduce the horizontal stripe phenomenon that appears at the common electrode block (VCOM block) and improve the product competitiveness.

[0032] In the second aspect, a driving method uses the array substrate of the first aspect, such as Figure 6 , Figure 6 is a schematic flow chart of a specific embodiment of a driving method in this application; including: Step 100, obtain the common electrode block array, disconnect the gate driving lines at the junction of adjacent two rows of common electrode blocks in the middle, and connect the GIP units respectively; Step 200, use the timing control unit to perform diagonal driving on the GIP units of the half-row gate driving lines of the adjacent two rows of common electrode blocks at the junction in sequence, such as Figure 5 .

[0033] Such as Figure 7 , Figure 7 is Figure 6 a schematic flow chart of a specific embodiment of Step 100; Step 100 includes: Step 110, layout two gate driving lines (Gn-1, Gn) at the junction of the previous row of common electrode blocks of adjacent two rows of common electrode blocks; Step 120, disconnect the two gate driving lines (Gn-1, Gn) in the middle to obtain two first front left half gate driving lines (Gn-1_L, Gn_L) and two first front right half gate driving lines (Gn-1_R, Gn_R), and the two first front left half gate driving lines (Gn-1_L, Gn_L) and the two first front right half gate driving lines (Gn-1_R, Gn_R) are electrically connected to the GIP units (not shown in the figure) respectively.

[0034] As shown in Figure 8 , Figure 8 is Figure 7 a schematic flow diagram of a specific embodiment after step 120 in ; Step 100 further includes: Step 130, arranging two gate driving lines (Gn+1, Gn+2) at the junction of the common electrode blocks in the row behind the adjacent two rows of common electrode blocks; Step 140, disconnecting the two gate driving lines (Gn+1, Gn+2) in the middle to obtain two first rear left half gate driving lines (Gn+1_L, Gn+2_L) and two first rear right gate driving lines (Gn+1_R, Gn+2_R), and the two first rear left half gate driving lines (Gn+1_L, Gn+2_L) and the two first rear right gate driving lines (Gn+1_R, Gn+2_R) are electrically connected to the GIP unit (not shown in the figure).

[0035] As shown in Figure 9 , Figure 9 is Figure 6 a schematic flow diagram of a specific embodiment of step 200 in ; Step 200 includes: Step 210, driving the first one in the first front left half gate driving line (Gn-1_L) and the first one in the two first rear right gate driving lines (Gn+1_R) by using a timing driving unit; Step 220, driving the first one in the two first front right half gate driving lines (Gn-1_R) and the first one in the two first rear left half gate driving lines (Gn+1_L) by using a timing driving unit.

[0036] As shown in Figure 10 , Figure 10 is Figure 9 a schematic flow diagram of a specific embodiment after step 220 in . Step 200 further includes: Step 230, driving the next one in the two first front left half gate driving lines (Gn_L) and the next one in the two first rear right gate driving lines (Gn+2_R) by using a timing driving unit; Step 240, driving the next one in the two first front right half gate driving lines (Gn_R) and the next one in the two first rear left half gate driving lines (Gn+2_L) by using a timing driving unit. By disconnecting each row of gate driving lines at the junction of the adjacent two rows of common electrode blocks in the middle, a plurality of first front half gate driving lines and a plurality of first rear half gate driving lines are formed, which are respectively electrically connected to the GIP unit, and the timing control unit is used to sequentially perform diagonal driving on the plurality of first front half gate driving lines and the plurality of first rear half gate driving lines, so that the coupling capacitance between the gate line and the common electrode block can be gradually changed, the cross stripe phenomenon at the junction of the common electrode blocks can be reduced, and the product quality can be improved.

[0037] In a third aspect, a touch display device includes the array substrate of the first aspect and is driven by using the driving method of the second aspect.

[0038] For the array substrate, driving method and touch display device implementing the present invention, by disconnecting each row of gate driving lines at the junction of adjacent two rows of common electrode blocks in the middle to form a plurality of first front half gate driving lines and a plurality of first rear half gate driving lines, and electrically connecting them to the GIP unit respectively, and using the timing control unit to perform diagonal driving on the plurality of first front half gate driving lines and the plurality of first rear half gate driving lines in sequence, the coupling capacitance between the gate lines and the common electrode blocks can be gradually changed, the cross stripe phenomenon at the junction of the common electrode blocks can be alleviated, and the product quality can be improved.

[0039] The above are only the preferred embodiments of the present invention, and are not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention shall be included within the protection scope of the present invention.

Claims

1. An array substrate, characterized in that: include: A common electrode layer; Multiple gate drive lines; Multiple GIP units; Timing control unit; The common electrode layer includes a common electrode block array formed by arranging a plurality of common electrode blocks; The plurality of gate driving lines extend along a row direction; The gate driving lines of each row at the junction of two adjacent rows of common electrode blocks of the common electrode block array are disconnected in the middle to form a plurality of first front-half gate driving lines and a plurality of first rear-half gate driving lines, and the plurality of first front-half gate driving lines and the plurality of first rear-half gate driving lines are electrically connected to the GIP units respectively; One end of other gate drive lines outside the junction of two adjacent rows of common electrode blocks in the common electrode block array are electrically connected to the GIP units in a staggered manner from left to right in sequence; The timing control unit is electrically connected to the plurality of GIP units.

2. The array substrate according to claim 1, characterized in that: The gate drive lines at the junction of the common electrode blocks in the previous row include two gate drive lines; The two gate drive lines are disconnected in the middle, comprising: two first front left half gate drive lines and two first front right half gate drive lines; The two first front left-half gate driving lines and the two first front right-half gate driving lines are electrically connected to the GIP unit respectively.

3. The array substrate according to claim 2, characterized in that: The gate drive lines at the junction of the common electrode blocks in the latter row include two gate drive lines; The two gate drive lines are disconnected in the middle, comprising: two first rear left half gate drive lines and two first rear right half gate drive lines; The two first rear left-half gate driving lines and the two first rear right-half gate driving lines are electrically connected to the GIP unit respectively.

4. The array substrate according to claim 3, characterized in that: The timing driving unit is used to output the driving timing to the corresponding GIP unit and drive in sequence: a first of two first front left half gate drive lines, a first of two first rear right half gate drive lines; a first one of the two first front right half gate drive lines, a first one of the two first rear left half gate drive lines; a next one of the two first front left half gate drive lines, a next one of the two first rear right gate drive lines; The next one of the two first front right half gate drive lines, the next one of the two first rear left half gate drive lines.

5. A driving method, using the array substrate according to any one of claims 1 to 4, characterized in that: include: Step 100, obtaining a common electrode block array, disconnecting the gate drive lines at the junction of two adjacent rows of common electrode blocks in the middle, and connecting the GIP units respectively; Step 200: using a timing control unit to diagonally drive the GIP units of the half-row gate drive lines of the two adjacent rows of common electrode blocks at the junction in sequence.

6. The driving method according to claim 5, characterized in that: The step 100 comprises: Step 110, laying out two gate drive lines at the junction of the common electrode blocks in the previous row of the two adjacent rows of common electrode blocks; Step 120 , disconnect the two gate drive lines in the middle to obtain two first front left half gate drive lines and two first front right half gate drive lines, and the two first front left half gate drive lines and the two first front right half gate drive lines are electrically connected to the GIP unit respectively.

7. The driving method according to claim 6, characterized in that: The step 100 further includes: Step 130, laying out two gate drive lines at the junction of the common electrode blocks in the next row between the two adjacent rows of common electrode blocks; Step 140 , disconnect the two gate drive lines in the middle to obtain two first rear left half gate drive lines and two first rear right gate drive lines, and the two first rear left half gate drive lines and the two first rear right gate drive lines are electrically connected to the GIP unit respectively.

8. The driving method according to claim 7, characterized in that: The step 200 comprises: Step 210: using the timing driving unit to drive the first one of the first front left half gate driving lines and the first one of the two first rear right gate driving lines; Step 220 : using the timing driving unit to drive the first one of the two first front right half gate driving lines and the first one of the two first rear left half gate driving lines.

9. The driving method according to claim 8, characterized in that: The step 200 further includes: Step 230, using the timing driving unit to drive the next one of the two first front left half gate driving lines and the next one of the two first rear right gate driving lines; Step 240 : Using the timing driving unit to drive the next one of the two first front right half gate driving lines and the next one of the two first rear left half gate driving lines.

10. A touch display device, characterized in that: It comprises the array substrate according to any one of claims 1 to 4 and is driven by the driving method according to any one of claims 5 to 9.

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