Control circuit and data storage system of battery management system

Abstract

The present application discloses a control circuit and a data storage system for a battery management system, relating to the field of power supply control technology. The system comprises a fast shutdown circuit 301 for a discharge MOS tube of a backup battery unit, for releasing the junction capacitance voltage of the discharge MOS tube when the discharge MOS tube is turned off; a drive protection circuit 302 for the discharge MOS tube, for locking the drive level of the discharge MOS tube when the discharge MOS tube is turned off; and a foolproof protection circuit 303 for the backup battery unit, for shutting off the discharge MOS tube when the positive and negative output terminals of the backup battery unit are connected reversely. This solves the problem that the discharge MOS tube has a long shutdown time in abnormal power supply scenarios, which easily causes loss of the MOS tube and battery cells and affects power supply reliability. The system achieves the effect of quickly shutting off the discharge MOS tube in abnormal power supply scenarios and improving power supply reliability.

Description

Technical Field

[0001] The present application relates to the field of power supply control technology, and in particular to a control circuit of a battery management system and a data storage system. Background Art

[0002] In the context of digital transformation, massive amounts of data are constantly growing, and unified storage systems have emerged. Under normal circumstances, the unified storage system is powered by the power module. If the power module fails, the BBU (Backup Battery Unit) can be switched to provide power, providing hot backup to prevent data loss.

[0003] As unified storage systems are applied in a growing number of scenarios, the need for data security is increasing, placing higher demands on the safety and power supply reliability of the BBU (Backup Battery Unit). In related technologies, the driver circuit used in the BBU discharge field-effect transistor requires the BMS (Battery Management System) to shut down the discharge field-effect transistor in abnormal situations, requiring several hundred nanoseconds for protection. This reduces the field-effect transistor's lifespan and power supply reliability. Furthermore, activating the BMS presents certain safety risks. Summary of the Invention

[0004] The present application provides a control circuit and a data storage system for a battery management system to at least solve the problem in the related art that the discharge field-effect transistor of the backup battery unit has a long shutdown time in an abnormal power supply scenario, which easily causes loss of the field-effect transistor and the battery cell, affecting the power supply reliability.

[0005] The present application provides a control circuit for a battery management system, comprising: a fast shutdown circuit for a discharge field-effect transistor of a backup battery unit, a first end of which is connected to a discharge control signal terminal of a battery management system chip, a second end of which is connected to the gate of the discharge field-effect transistor, and a third end of which is connected to the positive output terminal of the backup battery unit, and is used to release the junction capacitance voltage of the discharge field-effect transistor when the discharge field-effect transistor is turned off; a drive protection circuit for the discharge field-effect transistor, which is connected in series between the source of the discharge field-effect transistor and the positive output terminal of the backup battery unit, and is used to lock the drive level of the discharge field-effect transistor when the discharge field-effect transistor is turned off; and a foolproof protection circuit for the backup battery unit, which is connected in series between the gate of the discharge field-effect transistor and the positive output terminal of the backup battery unit, and is used to shut down the discharge field-effect transistor when the positive output terminal and the negative output terminal of the backup battery unit are connected reversely.

[0006] Exemplarily, the control circuit of the battery management system also includes: an activation circuit of the battery management system chip, which is arranged between the discharge drive signal terminal and the power supply module of the battery management system chip, and is used to provide the battery management system chip with an activation voltage that is lower than the protection voltage of the backup battery cell when the backup battery cell is not charging.

[0007] Exemplarily, the activation circuit includes: a second resistor and a third resistor connected in series, and a third capacitor connected in parallel at both ends of the third resistor, wherein the first end of the second resistor is used to connect to the power supply module, the second end of the second resistor is connected to the first end of the third resistor, and the second end of the third resistor is used to connect to the ground terminal; a first transistor, the emitter is used to connect to the first end of the second resistor, the base is connected to the first end of the third resistor, and the collector is used to connect to the ground terminal and the discharge drive signal terminal.

[0008] Exemplarily, the activation circuit also includes: a first capacitor and a second capacitor, connected in series between the power supply module and the ground terminal; a first diode, the negative electrode of which is connected to the power supply module and the positive electrode is connected to the ground terminal; a second diode, the positive electrode of which is connected to the power supply module and the negative electrode is connected to the first end of the second resistor.

[0009] Exemplarily, the activation circuit also includes: a third diode and a fourth resistor, connected in series between the second end of the third resistor and the collector of the first transistor, wherein the anode of the third diode is connected to the second end of the third resistor, and the cathode of the third diode is connected to the first end of the fourth resistor; a fourth diode and a fifth resistor, connected in series between the collector of the first transistor and the discharge drive signal terminal, wherein the anode of the fourth diode is connected to the collector of the first transistor, and the cathode of the fourth diode is connected to the first end of the fifth resistor.

[0010] Exemplarily, the activation circuit also includes: a first resistor, connected in series between the first end of the second resistor and the emitter of the first transistor; a sixth resistor, connected in series between the discharge drive signal terminal and the positive output end of the backup battery unit; and a seventh resistor, connected in series between the positive output end of the backup battery unit and the ground terminal.

[0011] For example, the resistance of the second resistor and the resistance of the third resistor satisfy the following conditions: LDO *R3 / (R2+R3) is less than the backup battery unit protection voltage, where R2 is the resistance of the second resistor, R3 is the resistance of the third resistor, and U LDO The voltage of the power supply module of the battery management system chip.

[0012] Exemplarily, the fast shutdown circuit includes: a fifth diode and a ninth resistor connected in series, and an eighth resistor connected in parallel across the fifth diode and the ninth resistor, wherein the cathode of the fifth diode is connected to the discharge control signal terminal, the anode of the fifth diode is connected to the first end of the ninth resistor, and the resistance of the ninth resistor is less than the resistance of the eighth resistor; a second transistor, the base of which is connected to the second end of the ninth resistor, the collector of which is connected to the positive output end of the backup battery unit, and the emitter of which is used to connect to the gate of the discharge field effect transistor.

[0013] Exemplarily, the fast shutdown circuit includes: a sixth diode, whose anode is connected to the base of the second transistor and whose cathode is connected to the emitter of the second transistor; and a tenth resistor, which is connected in series between the cathode of the sixth diode and the gate of the discharge field effect transistor.

[0014] Exemplarily, the fast shutdown circuit further includes: an eighteenth resistor connected in series between the collector of the second transistor and the positive output terminal of the backup battery unit.

[0015] For example, the resistance of the ninth resistor satisfies the following conditions: (U2-U1-U D6 ) / R9 is less than or equal to the sink current value, where U2 is the collector voltage of the second transistor, U1 is the turn-off voltage of the discharge field effect tube, and U D6 is the voltage drop of the sixth diode.

[0016] Exemplarily, the foolproof protection circuit includes: a first field effect transistor, a drain for connecting to the gate of the discharge field effect transistor, a source connected to the positive output terminal of the backup battery unit, and a gate for connecting to the ground terminal.

[0017] Exemplarily, the foolproof protection circuit also includes: a twelfth resistor and a ninth diode, which are connected in series between the ground terminal and the gate of the first field effect transistor, wherein the positive electrode of the ninth diode is connected to the ground terminal, the negative electrode of the ninth diode is connected to the first end of the twelfth resistor, and the negative electrode of the twelfth resistor is connected to the gate of the first field effect transistor.

[0018] Exemplarily, the foolproof protection circuit further includes: an eighth diode, the cathode of which is connected to the gate of the first field effect transistor, and the anode of which is connected to the positive output terminal of the backup battery unit; and a thirteenth resistor connected in parallel across the eighth diode.

[0019] Exemplarily, the foolproof protection circuit further includes: a fourteenth resistor, a first end of which is connected to the drain of the first field effect transistor, and a second end of which is used to be connected to the gate of the discharge field effect transistor.

[0020] Exemplarily, the drive protection circuit includes a negative voltage protection circuit, which includes: a fourth capacitor and a fifth capacitor, which are connected in series between the source of the discharge field effect transistor and the gate of the second field effect transistor; the second field effect transistor, the drain of which is used to connect to the gate of the discharge field effect transistor, and the source of which is connected to the positive output end of the backup battery unit.

[0021] Exemplarily, the driving protection circuit further includes: a seventh diode, a cathode of which is used to be connected to the gate of the discharge field effect transistor, and a cathode of which is connected to the drain of the discharge field effect transistor; and an eleventh resistor connected in parallel across the seventh diode.

[0022] Exemplarily, the driving protection circuit further includes: a tenth diode, a cathode of which is connected to the gate of the second field effect transistor, and a cathode of which is connected to the positive output terminal of the backup battery unit; and a sixteenth resistor connected in parallel across the tenth diode.

[0023] Exemplarily, the driving protection circuit further includes: a fifteenth resistor connected in series between the fifth capacitor and the gate of the second field effect transistor; and a seventeenth resistor connected in series between the gate of the discharge field effect transistor and the drain of the second field effect transistor.

[0024] The present application also provides a data storage system, including: a storage device for storing data; a power module for supplying power to the storage device; and a backup battery unit for supplying power to the storage device in the event of an abnormality in the power module, wherein the backup battery unit includes at least a battery pack, a battery management system, and a control circuit of the battery management system.

[0025] Through the present application, due to the fast shutdown circuit of the discharge field effect tube of the backup battery unit, the first end is connected to the discharge control signal terminal of the battery management system chip, the second end is connected to the gate of the discharge field effect tube, and the third end is connected to the positive output terminal of the backup battery unit, which is used to release the junction capacitance voltage of the discharge field effect tube when the discharge field effect tube is turned off, thereby accelerating the shutdown of the discharge field effect tube under abnormal circumstances, and shortening the abnormal shutdown time of the discharge MOS from hundreds of nanoseconds to tens of nanoseconds; the driving protection circuit of the discharge field effect tube is connected in series between the source of the discharge field effect tube and the positive output terminal of the backup battery unit, and is used to lock the driving level of the discharge field effect tube when the discharge field effect tube is turned off, so as to prevent negative voltage from appearing between the gate and drain of the discharge field effect tube, when the system is just powered on or the backup is in operation. When the backup battery unit is plugged in or out, the driving signal of the discharge field effect tube is locked to prevent the discharge field effect tube from being mistakenly turned on by the half-high level, which affects the power-on timing of the system; the anti-mute protection circuit of the backup battery unit is connected in series between the gate of the discharge field effect tube and the positive output terminal of the backup battery unit, and is used to turn off the discharge field effect tube when the positive output terminal and the negative output terminal of the backup battery unit are connected reversely, thereby preventing the safety hazard of the battery cell caused by the reverse connection of the positive and negative output terminals of the backup battery unit. Therefore, it can solve the problem in the related technology that the discharge field effect tube of the backup battery unit is long in the power supply abnormality scenario, which is easy to cause the loss of the field effect tube and the battery cell and affect the power supply reliability, and achieve the technical effect of quickly turning off the discharge field effect tube in the power supply abnormality scenario and improving the power supply reliability. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] In order to more clearly illustrate the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0027] Figure 1 A schematic diagram of a data storage system provided in an embodiment of the present application;

[0028] Figure 2 A schematic diagram of a backup battery unit provided in an embodiment of the present application;

[0029] Figure 3 A schematic diagram of a control circuit of a battery management system provided in an embodiment of the present application;

[0030] Figure 4 A schematic diagram of a control circuit of an optional battery management system provided in an embodiment of the present application. DETAILED DESCRIPTION

[0031] The following will be combined with the accompanying drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0032] It should be noted that, in the description of this application, the terms "comprises," "includes," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. The terms "first," "second," etc., in this application are used to distinguish similar objects, and are not used to describe a particular order or sequence.

[0033] In order to enable those skilled in the art to better understand the present application, the present application is further described in detail below with reference to the accompanying drawings and specific implementation methods.

[0034] First, the terms used in this embodiment are explained:

[0035] A battery management system (BMS) is an electronic system used to manage and control battery packs (especially lithium-ion battery packs). Its main function is to ensure the safety, performance and life of the battery pack.

[0036] A backup battery unit (BBU) is a battery module that provides backup power for devices. It automatically switches power to the backup power source when the main power source fails, ensuring that devices (such as storage devices) can continue to operate normally during a power outage, protecting data security and system stability.

[0037] Figure 1 A schematic diagram of a data storage system provided in an embodiment of the present application; the data storage system includes:

[0038] The storage device 101 is used to store data.

[0039] Storage device 101 is a device used to store data, supporting both storage and access, and providing users with persistent data storage, ensuring complete data recovery after a power outage or system restart. For example, storage device 101 may be a unified storage array. A unified storage array is a high-performance storage system capable of processing and storing different types of data (such as structured and unstructured data), providing a unified platform for managing and accessing various data types such as files, blocks, and objects.

[0040] The power module 102 is configured to supply power to the storage device 101 .

[0041] The power supply module 102 is a unit that provides a stable power supply to the storage device 101, ensuring that the storage device 101 can continue to operate during normal operation without malfunctioning due to insufficient or unstable power. For example, the power supply module 102 can provide a voltage of 220V to the storage device 101.

[0042] The backup battery unit 103 is used to supply power to the storage device 101 when the power module 102 malfunctions. The backup battery unit 103 includes at least a battery pack 201 , a battery management system 202 , and a control circuit 203 of the battery management system 202 .

[0043] It should be noted that when a failure occurs in the storage device 101 or the power module 102 , a data backup mechanism can be used to prevent data loss and ensure service continuity.

[0044] For example, the data storage system may include an NVDIMM (Non-Volatile Dual In-line Memory Module). NVDIMM combines volatile DRAM and non-volatile storage technology (such as NAND flash memory). It can retain data during power outages or system failures, providing read and write performance close to memory bus speeds, making it suitable for latency-sensitive applications. When a power failure is detected, the NVDIMM automatically backs up data in DRAM to flash memory and restores the data after power is restored. The data storage system may also include a Critical Backup Unit (CBU) to provide emergency power support for critical equipment. This is primarily used to maintain the operation of the storage device 101 when the power module 102 is interrupted or insufficient, preventing data loss or service interruption. Considering cost-effectiveness and data backup power density, this embodiment primarily implements data backup indirectly through the backup battery unit 103.

[0045] For example, if power module 102 fails, it may cause a sudden power outage to storage device 101, resulting in the loss of unsaved data. When power module 102 experiences an abnormality (such as a power outage, failure, or voltage instability), backup battery unit 103 will immediately start up and provide power to storage device 101, ensuring that storage device 101 can continue to operate before power module 102 is restored, thereby preventing data loss or damage. For example, backup battery unit 103 can provide short-term power support for key components (such as memory) of storage device 101 in the event of a sudden power outage, such as providing power support for several minutes to several hours, ensuring that data can be securely written to a persistent storage medium, thereby achieving indirect data backup.

[0046] Among them, the components of the backup battery unit 103 include a battery pack 201. The battery pack 201 is a module composed of multiple battery cells. It is the core part of the backup battery unit 103 and is responsible for providing power to the storage device 101 when the power module 102 fails. It can be composed of lithium-ion batteries or lead-acid battery packs 201, and has high energy density and a long service life.

[0047] The backup battery unit 103 also includes a battery management system 202. The battery management system 202 is an electronic system used to manage and monitor the battery pack 201 to ensure the safety and performance of the battery pack 201. Its main functions include voltage monitoring, current monitoring, temperature management, balancing control and fault alarm, etc. By monitoring the battery status in real time, it prevents battery overcharging, over-discharging, overheating and other problems, thereby extending the battery life.

[0048] It should be noted that, on the one hand, in an abnormal scenario, the backup battery unit 103 in the related art controls the driving circuit of the discharge field effect transistor through the battery management system 202 to turn off the discharge field effect transistor, thereby disconnecting the discharge link and realizing abnormal protection of the backup battery unit 103. However, it takes hundreds of nanoseconds to turn off the discharge field effect transistor, and when the positive and negative poles of the battery pack 201 of the battery management system 202 are reversed or the output is short-circuited, it is difficult to quickly turn off the discharge field effect transistor, which reduces the service life and power supply reliability of the MOS.

[0049] On the other hand, if the storage device 101 does not access the battery management system 202 for a period of time (for example, 24 hours), the battery management system 202 will automatically enter the Shut Down mode. The backup battery unit 103 requires the charging link to be activated for normal operation. However, the status of the backup battery unit 103 is unknown during activation, which poses a certain safety risk to the backup battery unit 103.

[0050] For example, if the health of the battery cells of the battery pack 201 is unknown, the battery cells may be in an overcharged, over-discharged, short-circuited, aged or other unhealthy state. If the backup battery unit 103 is blindly activated under these unknown conditions, it may cause the battery to overheat, be damaged, or even cause a fire or explosion. For example, if there is a risk of overvoltage or overcurrent, the battery cell voltage exceeds the normal range, or there is an internal short circuit, etc., the charging field effect transistor may not be able to properly control the charging process when the backup battery unit 103 is charged and activated, resulting in overvoltage or overcurrent, damaging the battery and the charging circuit. For example, if there is a battery balancing problem, a battery that has not been working for a long time may have unbalanced cell voltages. Directly charging and activating the backup battery unit 103 may aggravate this imbalance and reduce the overall life of the battery. For example, if there is a control circuit 203 failure, other control circuits 203 of the backup battery unit 103 fail during the Shut Down mode, such as a failure of the battery management system 202. The battery may not be properly managed and protected when activated, increasing safety risks.

[0051] In order to solve the above problems, the backup battery unit 103 of the present application is also provided with a control circuit 203 of the battery management system 202. The control circuit 203 of the battery management system 202 includes a fast shutdown circuit of the discharge field effect transistor of the backup battery unit 103. The first end of the fast shutdown circuit is connected to the discharge control signal terminal of the battery management system 202, the second end of the fast shutdown circuit is connected to the gate of the discharge field effect transistor, and the third end of the fast shutdown circuit is connected to the positive output terminal of the backup battery unit 103, which is used to release the junction capacitance voltage of the discharge field effect transistor when the discharge field effect transistor is turned off, thereby accelerating the shutdown of the discharge field effect transistor under abnormal circumstances and shortening the abnormal shutdown time of the discharge field effect transistor from hundreds of nanoseconds to tens of nanoseconds. The control circuit 203 of the battery management system 202 also includes a drive protection circuit for the discharge field-effect transistor, which is connected in series between the source of the discharge field-effect transistor and the positive output terminal of the backup battery unit 103. This circuit is used to lock the drive level of the discharge field-effect transistor when the discharge field-effect transistor is turned off, preventing negative voltage from occurring between the gate and drain of the discharge field-effect transistor. When the system is just powered on or when the backup battery unit 103 is plugged in or unplugged, the drive signal of the discharge field-effect transistor is locked to prevent the discharge field-effect transistor from being mistakenly turned on by a half-high level, thereby affecting the system power-on timing. The control circuit 203 of the battery management system 202 also includes a foolproof protection circuit for the backup battery unit 103, which is connected in series between the gate of the discharge field-effect transistor and the positive output terminal of the backup battery unit 103. This circuit is used to shut down the discharge field-effect transistor if the positive and negative output terminals of the backup battery unit 103 are connected reversely, preventing the safety hazards of the battery cells caused by reversed positive and negative output terminals of the backup battery unit 103.

[0052] Therefore, the control circuit 203 of the present application can quickly shut down the charge and discharge field-effect transistors in abnormal scenarios (for example, short circuit abnormalities, reversed positive and negative pole connection, cell damage, and abnormal load), preventing the discharge MOSFET from exceeding its SOA (Safe Operating Area, a power and voltage range within which the discharge MOSFET can operate normally under certain conditions without damage. When the MOSFET operates outside its safe operating area, it may overheat, break down, or even be permanently damaged) to damage the MOSFET. This reduces damage to the discharge MOSFET caused by abnormal scenarios, eliminates the hidden dangers of cell fire and explosion caused by damage to the discharge MOSFET, and improves power supply stability and reliability. It can also isolate the connection between the battery and the storage device 101, preventing secondary faults from spreading to the cell, the charge and discharge control module, and the power supply link due to cell damage, power supply link abnormalities, and load abnormalities (for example, if the cell is unbalanced or over-discharged, quickly shutting down the discharge MOSFET can prevent further damage to the cell and prevent the abnormal state from spreading along the power supply link, protecting other components from collateral effects), thereby improving power supply stability and reliability.

[0053] The control circuit 203 of the battery management system 202 also includes an activation circuit for the battery management system 202, which is disposed between the discharge drive signal terminal of the battery management system 202 and the power supply module. This circuit is configured to provide the battery management system 202 with an activation voltage that is lower than the protection voltage of the backup battery unit 103 when the backup battery unit 103 is not charging. This activation circuit is a Shut Down mode activation circuit. When the storage device 101 is powered on or when the backup battery unit 103 is replaced in Shut Down mode, the activation circuit automatically activates the backup battery unit 103 independently of the charging process. The activation voltage is lower than the permanent protection voltage of the backup battery unit 103, eliminating the need for charging to activate the backup battery unit 103 to exit Shut Down mode. The activation circuit automatically identifies the status of the backup battery unit 103 and, if the status of the backup battery unit 103 is unknown, does not charge the backup battery unit 103. This avoids the problem in related art whereby the charging link needs to be activated to monitor the battery status when the backup battery unit 103 enters Shut Down mode. This can lead to abnormal activation when the system is unaware of the status of the backup battery unit 103, potentially damaging the battery cells or the power supply link.

[0054] The embodiment of the present application also provides a backup battery unit, Figure 2 A schematic diagram of a backup battery unit provided in an embodiment of the present application is shown as follows: Figure 2 As shown:

[0055] Battery Pack 201 ( Figure 2 Cells in ).

[0056] Battery management system 202 (BMS chip, exemplary model may be BQ40Z50 / SH366006). A charging (CHG) link and a discharging (DSG) link are connected in series with a charging field-effect transistor (FET), a discharging field-effect transistor (FET), and a fuse (fuse). The BMS chip manages the charging field-effect transistor (FET) and the discharging field-effect transistor (FET). When the presence signal (system presence signal SYS_PRESENT_L, BBU presence signal BBU_PRESENT_L) is valid and the BMS has no alarm information, the charging field-effect transistor (FET) and the discharging field-effect transistor (FET) are turned on. When the presence signal is invalid and the BMS has an alarm information, the charging field-effect transistor (FET) and the discharging field-effect transistor (FET) are turned off.

[0057] The control circuit 203 of the battery management system 202 is disposed between the DSG terminal and the PACK+ terminal on the backup battery unit. The control circuit 203 includes a fast-shutdown circuit for the backup battery unit's discharge field-effect transistor (FET). The fast-shutdown circuit has a first terminal connected to the discharge control signal terminal of the battery management system 202, a second terminal connected to the gate of the discharge FET, and a third terminal connected to the positive output terminal of the backup battery unit. This circuit is used to release the junction capacitance voltage of the discharge FET when the discharge FET is turned off, accelerating the discharge FET's shutdown in abnormal situations and reducing the abnormal discharge MOSFET shutdown time from hundreds of nanoseconds to tens of nanoseconds. The control circuit 203 also includes a drive protection circuit for the discharge FET, connected in series between the source of the discharge FET and the positive output terminal of the backup battery unit. This circuit is used to lock the drive level of the discharge FET when the discharge FET is turned off, preventing a negative voltage from forming between the gate and drain of the discharge FET. When the system is initially powered on or when the backup battery unit is plugged in or unplugged, the drive signal to the discharge FET is locked to prevent the discharge FET from being mistakenly turned on at a half-high level, which could affect the system's power-up timing. The control circuit 203 includes a foolproof protection circuit for the backup battery unit, which is connected in series between the gate of the discharge field effect transistor and the positive output terminal of the backup battery unit, and is used to shut down the discharge field effect transistor when the positive output terminal and the negative output terminal of the backup battery unit are connected reversely, thereby preventing the backup battery unit output positive and negative poles from being reversed, causing safety hazards to the battery cell.

[0058] The backup battery unit also includes an overvoltage protection chip (OVP) to prevent the battery voltage from exceeding a safe range, thereby avoiding damage to the battery or related components.

[0059] The backup battery unit also includes an Electrically Erasable Programmable Read-Only Memory (EEPROM), which can save data even after the power is turned off. It is used to store the configuration and operation data of the BMS. It is connected to a serial clock line (SCL) for synchronizing data transmission between the EEPROM and an external device (such as a microcontroller), a serial data line (SDA1) for bidirectional data transmission between the EEPROM and an external device, and a write protect signal pin (WP) for controlling the write permission of the EEPROM.

[0060] The backup battery unit also includes a power supply module (LD0), which can be a low-dropout linear regulator or a power conversion module, providing a stable voltage to the BMS chip. Surface mount connectors (SMC and SMD), used for surface mounting technology on circuit boards, provide electrical connections between the BMS and other systems or components. A negative temperature coefficient (NTC) thermistor monitors battery temperature. A resistance sensor (RSNS) indirectly measures the battery current by measuring the voltage drop across a resistor.

[0061] The embodiment of the present application provides a control circuit of a battery management system, Figure 3 A schematic diagram of a control circuit of a battery management system provided in an embodiment of the present application is shown as follows: Figure 3 As shown, the control circuit of the battery management system includes:

[0062] The fast shutdown circuit 301 of the discharge field effect transistor Q3 of the backup battery unit has a first end connected to the discharge control signal terminal DSG of the battery management system chip, a second end connected to the gate of the discharge field effect transistor Q3, and a third end connected to the positive output terminal PACK+ of the backup battery unit, and is used to release the junction capacitance voltage of the discharge field effect transistor when the discharge field effect transistor Q3 is turned off.

[0063] It should be noted that the discharge FET Q3 can be a MOS (Metal-Oxide-Semiconductor Field-Effect Transistor). That is, the fast shutdown circuit 301 of the discharge FET Q3 is part of the drive circuit of the discharge FET Q3. The drive circuit of the discharge FET Q3 is responsible for controlling the discharge process of the backup battery unit, ensuring that the battery pack's discharge circuit can be quickly and safely disconnected when necessary. When the backup battery unit is operating normally, the battery management system chip controls the discharge FET Q3 to conduct via the discharge control signal terminal DSG. When an abnormality is detected, the battery management system chip controls the discharge FET Q3 to shut off, rapidly reducing the voltage at the backup battery unit's positive output terminal DSG, triggering the fast shutdown circuit 301 and rapidly discharging the junction capacitance voltage of the FET Q3.

[0064] Exemplarily, the fast shutdown circuit 301 of the discharge field effect transistor Q3 may include a PNP-type second transistor Q6, the base of the second transistor Q6 is used to connect to the discharge control signal terminal DSG, the emitter of the second transistor Q6 is used to connect to the gate of the discharge field effect transistor Q3, and the collector of the second transistor Q6 is connected to the positive output terminal PACK+ of the backup battery unit. When the discharge field effect transistor Q3 starts to discharge rapidly, the base voltage of the second transistor Q6 drops rapidly, causing the second transistor Q6 to enter the on state. At this time, the junction capacitance voltage of the discharge field effect transistor Q3 is quickly discharged through the emitter and collector pins of the second transistor Q6. The fast shutdown circuit 301 can also include a fifth diode D5 and a ninth resistor R9 connected in parallel, plus an eighth resistor R8 connected in parallel with the two, which together constitute a voltage discharge path. The voltage discharge path is connected in series between the discharge control signal terminal DSG and the base of the second transistor Q6. When the junction capacitance voltage between the gate and drain of the discharge field effect transistor Q3 drops, the junction capacitance voltage discharge speed is accelerated through the voltage discharge path. The resistance value of the ninth resistor R9 is set to be smaller than the resistance value of the eighth resistor R8, providing a faster voltage discharge rate.

[0065] That is, the resistance settings of the second transistor Q6 in the fast shutdown circuit 301 of the discharge field effect transistor Q3 and the ninth resistor R9 in the voltage discharge path greatly shorten the transition time from turning on to turning off the discharge field effect transistor Q3, from hundreds of nanoseconds to tens of nanoseconds, thereby greatly reducing damage to the discharge field effect transistor Q3 and avoiding excessive damage to the battery cells in the backup battery unit, or even the risk of fire and explosion.

[0066] The driving protection circuit 302 of the discharge FET Q3 is connected in series between the source of the discharge FET Q3 and the positive output terminal PACK+ of the backup battery unit, and is used to lock the driving level of the discharge FET Q3 when the discharge FET Q3 is turned off.

[0067] It should be noted that the drive protection circuit 302 of the discharge field effect transistor Q3 is used to further ensure that the discharge field effect transistor Q3 is safely shut down when the powered system is just powered on or the backup battery unit is plugged in or unplugged. When the discharge field effect transistor Q3 is turned off, the drive level of the discharge field effect transistor Q3 is locked to prevent negative voltage from occurring between the gate and drain of the discharge field effect transistor. When the system is just powered on or the backup battery unit is plugged in or unplugged, the drive signal of the discharge field effect transistor is locked to prevent the discharge field effect transistor from being mistakenly turned on by a half-high level, thereby affecting the system power-on timing.

[0068] Exemplarily, the driving protection circuit 302 for the discharge field-effect transistor Q3 may be a fourth capacitor C4, a fifth capacitor C5, and a second field-effect transistor Q5, which are sequentially connected in series between the source of the discharge field-effect transistor Q3 and the positive output terminal PACK+ of the backup battery unit. The gate of the second field-effect transistor Q5 is used to connect to the fifth capacitor C5, the drain of the second field-effect transistor Q5 is used to connect to the gate of the discharge field-effect transistor, and the source of the second field-effect transistor Q5 is connected to the positive output terminal PACK+ of the backup battery unit. When the powered system is just powered on or the backup battery unit is plugged in or unplugged, the charge state of the fourth capacitor C4 and the fifth capacitor C5 will change rapidly, prompting the second field-effect transistor Q5 to turn on, thereby immediately locking the voltage of the junction capacitance between the gate and drain of the discharge field-effect transistor Q3, avoiding possible negative voltage between the gate and drain of the discharge field-effect transistor Q3, and ensuring that the discharge field-effect transistor Q3 is quickly turned off when the backup battery unit is not in use, without generating harmful negative voltage.

[0069] The backup battery unit foolproof protection circuit 303 is connected in series between the gate of the discharge field effect transistor Q3 and the positive output terminal PACK+ of the backup battery unit, and is used to turn off the discharge field effect transistor Q3 when the positive output terminal PACK+ and the negative output terminal PACK- of the backup battery unit are connected reversely.

[0070] It should be noted that when the positive output terminal PACK+ and the negative output terminal PACK- of the backup battery unit are connected reversely, the foolproof protection circuit 303 of the backup battery unit quickly locks the driving level of the discharge field effect transistor Q3 and quickly turns off the discharge field effect transistor Q3 to prevent potential circuit damage and safety hazards.

[0071] Exemplarily, the foolproof protection circuit 303 may include a first field-effect transistor (FET) Q4, wherein the drain of the first FET Q4 is connected to the gate of the discharge FET Q3, the source of the first FET Q4 is connected to the positive output terminal PACK+ of the backup battery unit, and the gate of the first FET Q4 is connected to the ground terminal. When the positive output terminal PACK+ and the negative output terminal PACK- of the backup battery unit are connected reversely, the first FET Q4 turns on, quickly blocking the drive signal of the discharge FET Q3 and immediately shutting off the discharge FET Q3. In other words, the fast response characteristics of the first FET Q4 are utilized to ensure that in extreme situations such as when the positive and negative poles of the backup battery unit are connected reversely, safety measures can be taken immediately to prevent damage to the battery cell.

[0072] Through the present application, the fast shutdown circuit 301 of the discharge field effect tube of the backup battery unit has a first end connected to the discharge control signal terminal of the battery management system chip, a second end connected to the gate of the discharge field effect tube, and a third end connected to the positive output terminal of the backup battery unit, and is used to release the junction capacitance voltage of the discharge field effect tube when the discharge field effect tube is turned off, thereby accelerating the shutdown of the discharge field effect tube under abnormal circumstances and shortening the abnormal shutdown time of the discharge MOS from hundreds of nanoseconds to tens of nanoseconds; the driving protection circuit 302 of the discharge field effect tube is connected in series between the source of the discharge field effect tube and the positive output terminal of the backup battery unit, and is used to lock the driving level of the discharge field effect tube when the discharge field effect tube is turned off to prevent negative voltage from appearing between the gate and drain of the discharge field effect tube, when the system is just powered on or When the backup battery unit is plugged in or out, the driving signal of the discharge field effect tube is locked to prevent the discharge field effect tube from being mistakenly turned on by the half-high level, which affects the power-on timing of the system; the anti-mute protection circuit 303 of the backup battery unit is connected in series between the gate of the discharge field effect tube and the positive output terminal of the backup battery unit, and is used to turn off the discharge field effect tube when the positive output terminal and the negative output terminal of the backup battery unit are connected reversely, to prevent the safety hazard of the battery cell caused by the reverse connection of the positive and negative output terminals of the backup battery unit. Therefore, it can solve the problem in the related technology that the discharge field effect tube of the backup battery unit is long in the power supply abnormality scenario, which is easy to cause the loss of the field effect tube and the battery cell, and affects the power supply reliability, and achieve the technical effect of quickly turning off the discharge field effect tube in the power supply abnormality scenario and improving the power supply reliability.

[0073] In an exemplary embodiment, the control circuit of the battery management system also includes: an activation circuit of the battery management system chip, which is arranged between the discharge drive signal terminal PACK of the battery management system chip and the power supply module, and is used to provide the battery management system chip with an activation voltage that is lower than the protection voltage of the backup battery cell when the backup battery cell is not charging.

[0074] Since the activation circuit provides the battery management system chip with an activation voltage that is lower than the protection voltage of the backup battery unit, when the storage device is started or the backup battery unit is replaced, the activation circuit can automatically activate the backup battery unit without relying on the charging process, avoiding the safety risks that may be caused by charging when the status of the backup battery unit is uncertain, ensuring that the battery cell is not damaged. When the powered system is a unified storage system, the power supply stability and security of the unified storage system are significantly improved, meeting high data security requirements.

[0075] Figure 4 A schematic diagram of a control circuit of an optional battery management system provided in an embodiment of the present application is shown as follows: Figure 4 As shown, in an exemplary embodiment, the activation circuit includes: a second resistor R2 and a third resistor R3 connected in series, and a third capacitor C3 connected in parallel across the third resistor R3, wherein the first end of the second resistor R2 is used to connect to the power supply module, the second end of the second resistor R2 is connected to the first end of the third resistor R3, and the second end of the third resistor R3 is used to connect to the ground terminal; a first transistor Q1, the emitter of which is used to connect to the first end of the second resistor R2, the base of which is connected to the first end of the first resistor R1, and the collector of which is used to connect to the ground terminal and the discharge drive signal terminal PACK.

[0076] Among them, the second resistor R2 plays a current limiting role, controlling the rate at which charge flows from the power supply module to the activation circuit to prevent excessive current from damaging the activation circuit. The third resistor R3 is used in conjunction with the second resistor R2 to jointly determine the activation voltage.

[0077] The third capacitor C3 is connected in parallel across the third resistor R3 and is used to store charge to quickly activate the first PNP transistor Q1 and control the activation time of the activation circuit through its own charge and discharge characteristics.

[0078] Among them, after the third capacitor C3 is charged, the base voltage of the first transistor Q1 rises, and when it reaches the turn-on threshold, it is turned on and transmits the activation voltage to the discharge drive signal terminal PACK to activate the battery management system control chip.

[0079] For example, when the data storage system is started or the backup battery unit is replaced (the backup battery unit is plugged in and out), the voltage of the power supply module is charged to the third capacitor C3 through the second resistor R2. The charging process of the third capacitor C3 raises the voltage of the base of the first transistor Q1. When the voltage of the base of the first transistor Q1 reaches a certain threshold, the first transistor Q1 is turned on, and a path is formed between its emitter and collector, and the activation voltage is transmitted to the discharge drive signal terminal PACK, activating the chip of the battery management system.

[0080] The activation circuit of this embodiment can control the activation voltage generated by the activation circuit to be lower than the protection voltage of the backup battery unit through the cooperation of the first transistor Q1 and the second resistor R2, the third resistor R3, and the third capacitor C3, ensuring that the chip of the battery management system can be reliably started without charging activation, avoiding the safety hazards that may be caused by charging the battery cells of the unknown battery pack during the activation of the backup battery unit, and improving the safety of power supply.

[0081] In one exemplary embodiment, the activation circuit further includes: a first capacitor C1 and a second capacitor C2, connected in series between the power supply module and the ground terminal; a first diode D1, with a cathode connected to the power supply module and a cathode connected to the ground terminal; and a second diode D2, with a cathode connected to the power supply module and a cathode connected to the first end of the second resistor R2.

[0082] The first capacitor C1 and the second capacitor C2 serve as filter capacitors at the inlet of the power supply module, and are used to filter out high-frequency interference between the power supply module and the chip of the battery management system to ensure the stability of the activation voltage.

[0083] The first diode D1 plays an isolation role to implement hot-swap protection for the power supply module of the battery management system chip. For example, the first diode D1 may be a TVS diode (Transient Voltage Suppressor Diode).

[0084] Among them, the second diode D2 plays an isolation role, using its unidirectional conduction characteristics to prevent the voltage of the data storage system from flowing back. For example, when the data storage system is powered off, the second diode D2 prevents the voltage on the third capacitor C3 from flowing back to the power supply module, causing the current to flow back into the system due to disorder in the system power supply logic, affecting the power-off timing.

[0085] The activation circuit of this embodiment prevents the influence of voltage noise on the circuit through the first capacitor C1 and the second capacitor C2. The first diode D1 and the second diode D2 ensure the logical sequence when the data storage system is powered off, and avoid the residual voltage from flowing back to the system end and affecting the normal shutdown process of the equipment, thereby ensuring that the voltage of the power supply module is not affected by the voltage of other parts of the circuit when entering the activation circuit, thereby improving the stability and power supply quality of the activation circuit.

[0086] In one exemplary embodiment, the activation circuit further includes: a third diode D3 and a fourth resistor R4, connected in series between the second end of the third resistor R3 and the collector of the first transistor Q1, wherein the anode of the third diode D3 is connected to the second end of the third resistor R3, and the cathode of the third diode D3 is connected to the first end of the fourth resistor R4; a fourth diode D4 and a fifth resistor R5, connected in series between the collector of the first transistor Q1 and the discharge drive signal terminal PACK, wherein the anode of the fourth diode D4 is connected to the collector of the first transistor Q1, and the cathode of the fourth diode D4 is connected to the first end of the fifth resistor R5.

[0087] The third diode D3 is a voltage stabilizing diode, which is used to prevent the voltage from flowing back from the collector of the first transistor Q1 into the third resistor R3 and the third capacitor C3, thereby protecting the stability of the activation circuit.

[0088] The fourth resistor R4 is a current-limiting resistor, which controls the flow of current from the third diode D3 to the collector of the first transistor Q1.

[0089] The fourth diode D4 utilizes unidirectional conduction characteristics to ensure that the voltage flows unidirectionally from the collector of the first transistor Q1 to the discharge drive signal terminal PACK, thereby preventing the voltage of the battery cell (PACK+) from affecting the activation circuit.

[0090] The fifth resistor R5 is a current limiting resistor, which is connected in series after the fourth diode D4 to control the speed at which the current enters the battery management system chip.

[0091] This embodiment improves the safety of the activation circuit through the isolation effect of the third diode D3 and the fourth diode D4, preventing damage to the circuit caused by the reverse flow of voltage. The current limiting effect of the fourth resistor R4 and the fifth resistor R5 controls the speed at which current enters the battery management system chip, protecting the battery management system chip from the impact of instantaneous large current and extending the chip life.

[0092] In one exemplary embodiment, the activation circuit further includes: a first resistor R1 connected in series between the first end of the second resistor R2 and the emitter of the first transistor Q1; a sixth resistor R6 connected in series between the discharge drive signal terminal PACK and the positive output terminal PACK+ of the backup battery unit; and a seventh resistor R7 connected in series between the positive output terminal PACK+ of the backup battery unit and the ground terminal.

[0093] Among them, the first resistor R1 is a current limiting resistor, which further controls the current from the power supply module to the first transistor Q1 to ensure the stability and safety of the activation circuit.

[0094] The sixth resistor R6 is a current-limiting resistor that controls the current between the discharge drive signal terminal PACK and the positive output terminal PACK+ of the backup battery unit.

[0095] Among them, the seventh resistor R7 is a grounding resistor, which is used to protect the positive output terminal PACK+ of the backup battery unit to prevent abnormal voltage instantaneous impact that affects the health of the battery cell.

[0096] This embodiment enhances the current control capability of the activation circuit through the first resistor R1, the sixth resistor R6 and the seventh resistor R7, avoids damage to the activation circuit and the battery cell due to abnormal current, extends the service life of the activation circuit, and further improves the power supply stability and reliability.

[0097] In an exemplary embodiment, the resistance of the second resistor R2 and the resistance of the third resistor R3 satisfy the following conditions: LDO *R3 / (R2+R3) is less than the backup battery unit protection voltage, where R2 is the resistance of the second resistor R2, R3 is the resistance of the third resistor R3, and U LDO The voltage of the power supply module of the battery management system chip.

[0098] It should be noted that the activation voltage U of the Shut Down mode of the backup battery unit = (12*R3 / (R2+R3)). The resistance values ​​of the second resistor R2 and the third resistor R3 need to be reasonably selected to ensure that the activation voltage U of the Shut Down mode of the backup battery unit is lower than the permanent protection voltage of the backup battery unit, without damaging the backup battery unit, and activating the battery management system chip of the backup battery unit.

[0099] For example, the activation voltage U of the backup battery unit in the Shut Down mode is 3-7V, U LDO The voltage of the power supply module of the battery management system chip can be rated at 12V. The second resistor R2 is selected to be a resistor of 1 kilo-ohm to 2 kilo-ohm, and the third resistor R3 is selected to be a resistor of 0.7 kilo-ohm to 2 kilo-ohm. U=∫Idt / C3. According to actual application requirements, the third resistor C3 is selected to be a capacitor of 0.1 microfarad to 0.47 microfarad to ensure that the voltage U generated by the activation circuit is LDO *R3 / (R2+R3) is less than the protection voltage of the backup battery unit.

[0100] The activation circuit of this embodiment ensures the controllability and safety of the activation voltage generated by the activation circuit by appropriately selecting the resistance values ​​of R2 and R3, so that the activation voltage will not cause overvoltage risk to the backup battery unit, and realizes rapid and safe activation of the battery management system chip, thereby improving the power supply stability and security of the unified storage system and meeting high data security requirements.

[0101] like Figure 3 As shown, in one exemplary embodiment, the fast shutdown circuit 301 includes: a fifth diode D5 and a ninth resistor R9 connected in series, and an eighth resistor R8 connected in parallel across the fifth diode D5 and the ninth resistor R9, wherein the cathode of the fifth diode D5 is connected to the discharge control signal terminal DSG, the anode of the fifth diode D5 is connected to the first end of the ninth resistor R9, and the resistance of the ninth resistor R9 is less than the resistance of the eighth resistor R8; a second transistor Q6, having a base connected to the second end of the ninth resistor R9, a collector connected to the positive output terminal PACK+ of the backup battery unit, and an emitter connected to the gate of the discharge field effect transistor Q3.

[0102] The fifth diode D5 functions as a unidirectional conductor. When the fifth diode D5 is not conducting, the eighth resistor R8 serves as the gate drive path for the discharge field-effect transistor Q3, allowing the discharge control signal (DSG signal) to be smoothly transmitted to the gate of the discharge field-effect transistor Q3. When the fifth diode D5 is conducting, the voltage is allowed to drop rapidly through the ninth resistor R9, causing the base voltage of the second transistor Q6 to drop rapidly.

[0103] The second transistor Q6 is used to be turned on when the base voltage drops, thereby accelerating the discharge of the gate voltage of the discharge field effect transistor Q3 and achieving rapid shutdown.

[0104] Exemplarily, in the backup battery unit discharging state, the discharge field effect transistor Q3 operates normally, the fifth diode D5 is not turned on, and the discharge control signal is transmitted to the gate of the discharge field effect transistor Q3 through the eighth resistor R8. Once an abnormality is detected, such as a short circuit or overcurrent, the discharge field effect transistor Q3 needs to be quickly turned off. There is a junction capacitance between the gate and drain of the discharge field effect transistor Q3. When the discharge field effect transistor Q3 is turned off, the junction capacitance voltage needs to be quickly discharged. The battery management system chip quickly reduces the voltage of the discharge control signal. At this time, the fifth diode D5 is turned on, and the gate voltage of the discharge field effect transistor Q3 is quickly reduced through the low resistance of the ninth resistor R9. The resistance of the ninth resistor R9 is smaller than the resistance of the eighth resistor R8. The base voltage of the second transistor Q6 also drops rapidly. The rapid drop in the base voltage of the second transistor Q6 triggers the second transistor Q6 to turn on, further accelerating the discharge of the junction capacitance voltage between the gate and drain of the discharge field effect transistor Q3, and achieving the shutdown of the discharge field effect transistor Q3 within tens of nanoseconds, significantly shortening the shutdown time and protecting the discharge field effect transistor Q3 from damage.

[0105] The fast shutdown circuit 301 of this embodiment cooperates with the fifth diode D5, the eighth resistor R8 and the ninth resistor R9 so that when the discharge MOS Q3 is turned off, the base voltage of the second transistor Q6 drops rapidly, accelerating the second transistor Q6, and realizing the rapid shutdown of the discharge field effect transistor Q3 under abnormal conditions, ensuring that the battery management chip can quickly isolate the battery pack in an emergency, improving the response speed and safety of the backup battery unit, reducing the risk of thermal damage to the discharge field effect transistor Q3 under abnormal conditions, preventing the spread of faults, and ensuring the overall stability and reliability of the data storage system.

[0106] In one exemplary embodiment, the fast shutdown circuit 301 includes: a sixth diode D6, the anode of which is connected to the base of the second transistor Q6, and the cathode of which is connected to the emitter of the second transistor Q6; and a tenth resistor R10, which is connected in series between the cathode of the sixth diode D6 and the gate of the discharge field effect transistor Q3.

[0107] Among them, the sixth diode D6 is connected in parallel between the base and emitter of the second transistor Q6, and uses its unidirectional conductive characteristics to prevent the junction capacitance voltage of the gate and drain of the discharge field effect transistor Q3 from being rapidly discharged, and the current exceeding the current sinking capacity of the battery management system chip to burn out the battery management system chip.

[0108] Among them, the tenth resistor R10 is a current limiting resistor. Since the gate resistance is very small, there will be oscillation between the drain and the source, which is unsafe for the discharge field effect transistor Q3. The tenth resistor R10 is connected in series between the negative electrode of the second hexagonal transistor D6 and the gate of the discharge field effect transistor Q3 to limit the current and ensure safety during the discharge process.

[0109] The fast shutdown circuit 301 of this embodiment is provided with a sixth diode D6 and a tenth resistor R10. When the gate voltage of the discharge field-effect transistor Q3 drops rapidly, the sixth diode D6 ensures that the current does not flow reversely into the base of the second transistor Q6, thereby protecting the battery management system chip from damage. The tenth resistor R10 limits the current passing through the discharge field-effect transistor Q3, preventing excessive current from damaging the gate of the discharge field-effect transistor Q3, thereby improving the safety of the discharge field-effect transistor Q3 during the shutdown process, ensuring that while achieving efficient shutdown, no damage is caused to the battery management system chip and the discharge field-effect transistor Q3 in the backup battery unit.

[0110] In an exemplary embodiment, the fast shutdown circuit 301 further includes: an eighteenth resistor R18 connected in series between the collector of the second transistor Q6 and the positive output terminal PACK+ of the backup battery unit.

[0111] Among them, the eighteenth resistor R18 is a current limiting resistor, which is connected in series between the collector of the second transistor Q6 and PACK+ to prevent the shutdown current of the second transistor Q6 from being too large under abnormal circumstances and causing damage to the fast shutdown circuit 301, thereby improving the current control capability of the fast shutdown circuit 301 in abnormal scenarios, and ensuring the stability and safety of the backup battery unit.

[0112] In an exemplary embodiment, the resistance of the ninth resistor R9 satisfies the following conditions: (U2-U1-U D6 ) / R9 is less than or equal to the sink current value, where U2 is the collector voltage of the second transistor Q6, U1 is the turn-off voltage of the discharge field effect tube Q3, and U D6 is the voltage drop of the sixth diode D6, which may be 0.3V.

[0113] It should be noted that the turn-off voltage U2 of the discharge field effect tube Q3, the collector voltage U1 of the second transistor Q6 and the U D6 The voltage drop and the current value of the sixth diode D6 are known, so the maximum resistance value of the ninth resistor R9 can be determined. The resistance value of the ninth resistor R9 is designed to meet (U2-U1-U D6 The condition that ) / R9 is less than the sink current value ensures that when the gate voltage of the discharge field effect tube Q3 drops rapidly, the current passing through the ninth resistor R9 will not exceed the sink current capability of the driver chip, thereby preventing the driver chip from being overloaded and damaged.

[0114] It should be noted that the smaller the resistance of the ninth resistor R9, the more obvious the effect of quickly shutting down the discharge field effect transistor Q3. The resistance selection of the ninth resistor R9 should take into account the current sinking capability of the battery management system chip. Within the allowable current sinking range of the battery management system chip (the current sinking can be designed for 10% derating, for example, 10 mA, with a maximum of 9 mA), the resistance of the ninth resistor R9 is as small as possible to ensure that the discharge field effect transistor Q3 is quickly shut down without generating negative pressure.

[0115] The fast shutdown circuit 301 of this embodiment, through the blocking setting of the ninth resistor R9, realizes the rapid shutdown of the discharge field effect transistor Q3 in abnormal scenarios, and at the same time protects the battery management system chip of the backup battery unit, preventing damage to the battery cell and potential safety risks, and providing technical support for the power supply safety and reliability of the data storage system.

[0116] In an exemplary embodiment, the foolproof protection circuit 303 includes: a first field effect transistor Q4, a drain connected to the gate of the discharge field effect transistor Q3, a source connected to the positive output terminal PACK+ of the backup battery unit, and a gate connected to the ground terminal.

[0117] For example, when the backup battery unit is properly plugged in, the gate of the first FET Q4 is typically in a high-impedance state and therefore has no effect on the drain of the discharge FET Q3. However, when the backup battery unit's positive output terminal PACK+ and negative output terminal PACK- are connected reversely, the positive output terminal PACK+ is directly connected to the ground terminal through the drain-source terminal of the first FET Q4, causing the gate potential of the first FET Q4 to increase. Ultimately, the first FET Q4 turns on, cutting off the path from the drain of the discharge FET Q3 to the ground terminal, locking the drive level of the discharge MOSFET Q3, and thus quickly shutting down the discharge FET Q3.

[0118] The foolproof protection circuit 303 of this embodiment is set through the first field effect transistor Q4. When the positive and negative poles of the backup battery unit are connected reversely, it responds promptly to the situation of reverse connection of the positive and negative poles, and quickly shuts off the discharge field effect transistor Q3 to prevent the battery cell from being damaged due to reverse current, avoids the risk of fire or explosion in the storage system, and eliminates safety hazards.

[0119] In an exemplary embodiment, the foolproof protection circuit 303 further includes: a twelfth resistor R12 and a ninth diode D9, which are connected in series between the ground terminal and the gate of the first field effect transistor Q4, wherein the positive electrode of the ninth diode D9 is connected to the ground terminal, the negative electrode of the ninth diode D9 is connected to the first end of the twelfth resistor R12, and the negative electrode of the twelfth resistor R12 is connected to the gate of the first field effect transistor Q4.

[0120] The twelfth resistor R12 is a current-limiting resistor, which is used to control the rising speed of the gate voltage of the first field effect transistor Q4 to prevent malfunction caused by a sudden change in the gate voltage of the first field effect transistor Q4.

[0121] Among them, the ninth diode D9 has a forward conduction characteristic. Under normal operation, the ninth diode D9 prevents current from flowing back. Under abnormal circumstances, the voltage can cause the positive output terminal PACK+ of the backup battery unit to pass through the ninth diode D9 to the gate of the first field effect transistor Q4, triggering the protection mechanism.

[0122] For example, the ninth diode D9 is connected in series with the twelfth resistor R12. When the positive and negative poles of the backup battery unit are connected reversely, the voltage is added to the gate of the first field effect transistor Q4 through the ninth diode D9. The rising gate voltage triggers the first field effect transistor Q4 to turn on, cutting off the path of the discharge field effect transistor Q3. At the same time, the twelfth resistor R12 controls the rising rate of the gate voltage of the first field effect transistor Q4 to prevent instantaneous overload of the first field effect transistor Q4.

[0123] The foolproof protection circuit 303 of this embodiment adds voltage control and current limiting functions on the basis of the foolproof protection function by connecting the twelfth resistor R12 and the ninth diode D9 in series between the ground terminal and the gate of the first field effect transistor Q4, thereby avoiding malfunction of the first field effect transistor Q4 due to sudden changes in the gate voltage, and further improving the stability and safety of the backup battery unit.

[0124] In an exemplary embodiment, the foolproof protection circuit 303 further includes: an eighth diode D8, whose cathode is connected to the gate of the first field effect transistor Q4 and whose anode is connected to the positive output terminal PACK+ of the backup battery unit; and a thirteenth resistor R13, connected in parallel across the eighth diode D8.

[0125] The eighth diode D8 is used to isolate the positive output terminal PACK+ of the backup battery unit and the gate of the first field effect transistor Q4, ensuring that when the positive and negative poles of the backup battery unit are reversed, the current can only flow in one direction to prevent reverse damage to the battery cell.

[0126] Among them, the thirteenth resistor R13 is connected in parallel at both ends of the eighth diode D8. When the eighth diode D8 is subjected to high voltage, the parallel connection of R13 can shunt the current, protecting the eighth diode D8 from breakdown, thereby improving the high voltage resistance of the eighth diode D8 and preventing the eighth diode D8 from being damaged due to excessive voltage.

[0127] The presence of the eighth diode D8 of the foolproof protection circuit 303 in this embodiment ensures a unidirectional current path from PACK+ to the gate, prevents the flow of reverse current, and enhances the isolation capability of the circuit. The thirteenth resistor R13 is used to share the voltage on the eighth diode D8, thereby ensuring the safety of the circuit and battery cell under extreme conditions of high voltage or reverse electrode connection, extending the life of the backup battery unit, and reducing maintenance costs.

[0128] In an exemplary embodiment, the foolproof protection circuit 303 further includes: a fourteenth resistor R14 , a first end of which is connected to the drain of the first field effect transistor Q4 , and a second end of which is connected to the gate of the discharge field effect transistor Q3 .

[0129] The fourteenth resistor R14 is used to control the voltage from the gate of the first field-effect transistor Q4 to the discharge field-effect transistor Q3. When the first field-effect transistor Q4 is turned on, the fourteenth resistor R14 limits the current from the drain of the first field-effect transistor Q4 to ground, thereby controlling the voltage change of the gate of the discharge field-effect transistor Q3, ensuring that no harmful voltage difference is generated when the protection is activated, and preventing the gate of the discharge field-effect transistor Q3 from being subjected to excessively high or low voltage.

[0130] The foolproof protection circuit 303 of this embodiment protects the gate voltage of the discharge field effect transistor Q3 by setting the fourteenth resistor R14, thereby avoiding secondary damage to the battery cell and the drive circuit, so that the drive circuit can respond quickly to protection while improving the overall safety performance of the discharge circuit of the backup battery unit.

[0131] In one exemplary embodiment, the driving protection circuit 302 includes a negative voltage protection circuit, which includes: a fourth capacitor C4 and a fifth capacitor C5, which are connected in series between the source of the discharge field effect transistor Q3 and the gate of the second field effect transistor Q5; the second field effect transistor Q5, the drain of which is used to connect to the gate of the discharge field effect transistor Q3, and the source of which is connected to the positive output terminal PACK+ of the backup battery unit.

[0132] Among them, the fourth capacitor C4 and the fifth capacitor C5 utilize the characteristics of capacitors passing AC and blocking DC to respond quickly when the voltage changes, triggering the opening action of the second field effect transistor Q5. The capacitor C4 and the fifth capacitor C5 are connected in series to prevent the short-circuit characteristics of one of the capacitors from affecting the circuit performance.

[0133] The second FET Q5 is used to conduct when the voltage of the fourth capacitor C4 and the fifth capacitor C5 changes, accelerating the discharge of the voltage from the gate of the discharge FET Q3 to the ground terminal, and realizing rapid shutdown of the discharge FET Q3.

[0134] For example, when an abnormal condition occurs (such as a short circuit), the gate voltage of the discharge MOSFET Q3 drops rapidly. The voltage change between the fourth capacitor C4 and the fifth capacitor C5 triggers the second MOSFET Q5 to turn on, accelerating the discharge of the gate voltage of the discharge MOSFET Q3 and preventing the formation of a negative voltage between the gate and drain of the discharge MOSFET Q3. For example, when the backup battery unit begins to operate (when the data storage system is powered on or the backup battery unit is plugged in or unplugged), the discharge MOSFET Q3 is turned off. The voltage change between the fourth capacitor C4 and the fifth capacitor C5 triggers the second MOSFET Q5 to turn on, locking the drive level of the discharge MOSFET Q3 and preventing the discharge MOSFET Q3 from turning on at half-high level, which could affect the electrical timing of the data storage system.

[0135] The negative voltage protection circuit in the discharge field-effect transistor drive protection circuit 302 of this embodiment is connected in series between the source of the discharge field-effect transistor and the positive output terminal of the backup battery unit. It is used to lock the drive level of the discharge field-effect transistor when the discharge field-effect transistor is turned off, preventing negative voltage from occurring between the gate and drain of the discharge field-effect transistor. When the system is just powered on or the backup battery unit is plugged in or out, the drive signal of the discharge field-effect transistor is locked to prevent the discharge field-effect transistor from being mistakenly turned on at a half-high level. This greatly improves the power supply stability and safety of the storage system, reduces damage to battery cells and circuits in abnormal scenarios, extends the service life of the storage system, and reduces operation and maintenance costs.

[0136] In an exemplary embodiment, the driving protection circuit 302 further includes: a seventh diode D7 , the cathode of which is connected to the gate of the discharge field effect transistor Q3 , and the anode of which is connected to the drain of the discharge field effect transistor Q3 ; and an eleventh resistor R11 connected in parallel across the seventh diode D7 .

[0137] Exemplarily, one end of the resistor R11 and the diode D7 is connected to the gate of the discharge field effect transistor Q3 through the gate driving resistor R10 of the discharge field effect transistor Q3, and the other end is connected to the drain of the discharge field effect transistor Q3.

[0138] Among them, the seventh diode D7 is used to provide a low-impedance path when the gate voltage of the discharge field-effect transistor Q3 needs to be quickly released. When the discharge field-effect transistor Q3 needs to be quickly turned off, the voltage on the gate of the discharge field-effect transistor Q3 can be quickly discharged to the drain of the discharge field-effect transistor Q3 through the seventh diode D7, accelerating the voltage drop and accelerating the turn-off process of the field-effect transistor.

[0139] Among them, the eleventh resistor R11 is connected in parallel across the seventh diode D7 to prevent the seventh diode D7 from being mis-conducted during normal operation. Under normal circumstances, the high impedance characteristic of the eleventh resistor R11 will not affect the normal operation of the discharge field-effect transistor Q3. However, when the gate voltage of the discharge field-effect transistor Q3 is discharged, the eleventh resistor R11 can share the current and limit the current when the seventh diode D7 is turned on, thereby protecting the seventh diode D7 from overheating or damage due to the large current.

[0140] In the driving protection circuit 302 of the discharge field effect transistor of this embodiment, the eleventh resistor R11 and the seventh diode D7 constitute the driving protection circuit 302 of the discharge field effect transistor Q3. The seventh diode D7 can significantly accelerate the shutdown speed of the discharge field effect transistor Q3. The eleventh resistor R11 ensures the stability and safety of the circuit under abnormal conditions, prevents overheating or damage of the discharge field effect transistor Q3, and improves the reliability of the entire backup power supply unit.

[0141] In an exemplary embodiment, the driving protection circuit 302 further includes: a tenth diode D10, whose cathode is connected to the gate of the second field effect transistor Q5 and whose anode is connected to the positive output terminal PACK+ of the backup battery unit; and a sixteenth resistor R16 connected in parallel across the tenth diode D10.

[0142] The tenth diode D10 is used to prevent the second FET Q5 from being mis-turned on when the discharge FET Q3 is turned off, thereby preventing the gate voltage of the second FET Q5 from flowing reversely into the fifth capacitor C5 or the gate of the discharge FET Q3.

[0143] The sixteenth resistor R16 is connected in parallel across the tenth diode D10 for limiting current when the tenth diode D10 is turned on, thereby preventing the gate of the second field effect transistor Q5 from being damaged by an excessive current.

[0144] For example, under normal operation, the tenth diode D10 prevents the voltage at the backup battery cell's positive output terminal PACK+ from leaking through the gate of the second FET Q5 to other circuits. However, when the discharge FET Q3 is turned off, the tenth diode D10 allows the gate voltage to quickly flow through the positive electrode to the backup battery cell's positive output terminal PACK+. The presence of the sixteenth resistor R16 ensures that the current remains within a safe range, thereby protecting the gate of the second FET Q5 from excessive voltage shocks.

[0145] The drive protection circuit 302 of this embodiment achieves electrical isolation between the discharge field-effect transistor Q3 and the second field-effect transistor Q5 through the tenth diode D10, thereby preventing accidental reverse flow of the gate voltage. The sixteenth resistor R16 limits the current, thereby protecting the gate of the second field-effect transistor Q5 from voltage shocks, reducing heat loss of the gate of the second field-effect transistor Q5 during rapid voltage changes, extending the service life of the second field-effect transistor Q5 and the discharge field-effect transistor Q3, and ensuring the long-term stability and safety of the backup battery unit.

[0146] In an exemplary embodiment, the driving protection circuit 302 further includes: a fifteenth resistor R15 connected in series between the fifth capacitor C5 and the gate of the second field effect transistor Q5; and a seventeenth resistor R17 connected in series between the gate of the discharge field effect transistor Q3 and the drain of the second field effect transistor Q5.

[0147] Among them, the fifteenth resistor R15 is a current-limiting resistor, which is used to control the current of the fifth capacitor C5 charging the gate of the second field-effect transistor Q5, ensuring that when the second field-effect transistor Q5 needs to respond quickly under abnormal conditions, it can ensure rapid current transmission and prevent excessive transient current from damaging the gate of the second field-effect transistor Q5, that is, achieving a fast and safe response.

[0148] Among them, the seventeenth resistor R17 is used to control the voltage from the drain of the second field effect transistor Q5 to the gate of the discharge field effect transistor Q3, ensuring that when the gate of the discharge field effect transistor Q3 is turned off, the voltage provided by the drain of the second field effect transistor Q5 is within a safe range and will not generate harmful voltage on the gate of the discharge field effect transistor Q3, thereby preventing the gate of the discharge field effect transistor Q3 from being subjected to negative voltage or excessive voltage, thereby preventing damage to the discharge field effect transistor Q3.

[0149] The drive protection circuit 302 of this embodiment, through the combination of the fifteenth resistor R15 and the fifth capacitor C5, enables the second field-effect transistor Q5 to respond more quickly and accurately in abnormal situations, reducing the time the abnormal situation affects the circuit, improving the circuit's reaction speed and protection efficiency. The seventeenth resistor R17 further enhances the circuit's voltage control capability during the rapid shutdown state, preventing damage to the discharge field-effect transistor Q3 due to voltage fluctuations and ensuring the long-term stability and reliability of the backup power supply unit.

[0150] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus the necessary general hardware platform, and of course it can also be implemented by hardware, but in many cases the former is a better implementation method.

[0151] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the above description has generally described the components and steps of each example according to their functions. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0152] The above is a detailed introduction to the control circuit and data storage system of a battery management system provided by the present application. This article uses specific examples to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method and core ideas of the present application. It should be pointed out that for ordinary technicians in this technical field, without departing from the principles of the present application, several improvements and modifications can be made to the present application, and these improvements and modifications also fall within the scope of protection of the claims of the present application.

Claims

1. A control circuit for a battery management system, characterized in that: include: A fast shutdown circuit for the discharge field-effect transistor of the backup battery unit, wherein the first end is connected to the discharge control signal terminal of the battery management system chip, the second end is connected to the gate of the discharge field-effect transistor, and the third end is connected to the positive output terminal of the backup battery unit, and is used to release the junction capacitance voltage of the discharge field-effect transistor when the discharge field-effect transistor is turned off; The driving protection circuit of the discharge field effect tube is connected in series between the source of the discharge field effect tube and the positive output terminal of the backup battery unit, and is used to lock the driving level of the discharge field effect tube when the discharge field effect tube is turned off; The foolproof protection circuit of the backup battery unit is connected in series between the gate of the discharge field effect tube and the positive output terminal of the backup battery unit, and is used to turn off the discharge field effect tube when the positive output terminal and the negative output terminal of the backup battery unit are reversed; The driving protection circuit includes a negative voltage protection circuit, and the negative voltage protection circuit includes: a fourth capacitor and a fifth capacitor connected in series between the source of the discharge field effect transistor and the gate of the second field effect transistor; The second field effect transistor has a drain connected to the gate of the discharge field effect transistor, and a source connected to the positive output end of the backup battery unit.

2. The control circuit of the battery management system according to claim 1, characterized in that: The control circuit of the battery management system further includes: The activation circuit of the battery management system chip is arranged between the discharge drive signal terminal of the battery management system chip and the power supply module, and is used to provide the battery management system chip with an activation voltage that is lower than the protection voltage of the backup battery unit when the backup battery unit is not charging.

3. The control circuit of the battery management system according to claim 2, characterized in that: The activation circuit comprises: a second resistor and a third resistor connected in series, and a third capacitor connected in parallel across the third resistor, wherein the first end of the second resistor is used to connect to the power supply module, the second end of the second resistor is connected to the first end of the third resistor, and the second end of the third resistor is used to connect to the ground terminal; The first transistor has an emitter connected to the first end of the second resistor, a base connected to the first end of the third resistor, a collector connected to the ground terminal through a third diode, and the collector is also connected to the discharge drive signal terminal through a fourth diode.

4. The control circuit of the battery management system according to claim 3, characterized in that: The activation circuit further includes: A first capacitor and a second capacitor are connected in series between the power supply module and the ground terminal; a first diode, a cathode connected to the power supply module and a positive electrode connected to the ground terminal; A second diode has an anode connected to the power supply module and a cathode connected to the first end of the second resistor.

5. The control circuit of the battery management system according to claim 3, characterized in that: The activation circuit further includes: The third diode and the fourth resistor are connected in series between the second end of the third resistor and the collector of the first transistor, wherein the anode of the third diode is connected to the second end of the third resistor, and the cathode of the third diode is connected to the first end of the fourth resistor; The fourth diode and the fifth resistor are connected in series between the collector of the first transistor and the discharge drive signal terminal, wherein the anode of the fourth diode is connected to the collector of the first transistor, and the cathode of the fourth diode is connected to the first end of the fifth resistor.

6. The control circuit of the battery management system according to claim 3, characterized in that: The activation circuit further includes: a first resistor connected in series between the first end of the second resistor and the emitter of the first transistor; a sixth resistor connected in series between the discharge drive signal terminal and the positive output terminal of the backup battery unit; a seventh resistor connected in series between the positive output terminal of the backup battery unit and the ground terminal.

7. The control circuit of the battery management system according to any one of claims 3 to 6, characterized in that: The resistance of the second resistor and the resistance of the third resistor meet the following conditions: LDO *R3 / (R2+R3) is less than the protection voltage of the backup battery unit, where R2 is the resistance of the second resistor, R3 is the resistance of the third resistor, and U LDO is the voltage of the power supply module of the battery management system chip.

8. The control circuit of the battery management system according to claim 1, characterized in that: The fast shutdown circuit comprises: a fifth diode and a ninth resistor connected in series, and an eighth resistor connected in parallel across the fifth diode and the ninth resistor, wherein a cathode of the fifth diode is connected to the discharge control signal terminal, an anode of the fifth diode is connected to a first end of the ninth resistor, and a resistance of the ninth resistor is smaller than a resistance of the eighth resistor; The second triode has a base connected to the second end of the ninth resistor, a collector connected to the positive output end of the backup battery unit, and an emitter connected to the gate of the discharge field effect transistor.

9. The control circuit of the battery management system according to claim 8, characterized in that: The fast shutdown circuit comprises: a sixth diode, having an anode connected to the base of the second transistor and a cathode connected to the emitter of the second transistor; A tenth resistor is connected in series between the cathode of the sixth diode and the gate of the discharge field effect transistor.

10. The control circuit of the battery management system according to claim 9, characterized in that: The fast shutdown circuit further includes: An eighteenth resistor is connected in series between the collector of the second transistor and the positive output terminal of the backup battery unit.

11. The control circuit of the battery management system according to any one of claims 9 to 10, characterized in that: The resistance of the ninth resistor satisfies the following conditions: (U2-U1-U D6 ) / R9 is less than or equal to the sink current value, wherein U2 is the collector voltage of the second transistor, U1 is the turn-off voltage of the discharge field effect tube, and U D6 is the voltage drop of the sixth diode.

12. The control circuit of the battery management system according to claim 1, characterized in that: The foolproof protection circuit includes: The first field effect transistor has a drain connected to the gate of the discharge field effect transistor, a source connected to the positive output end of the backup battery unit, and a gate connected to the ground terminal.

13. The control circuit of the battery management system according to claim 12, characterized in that: The foolproof protection circuit also includes: The twelfth resistor and the ninth diode are connected in series between the ground terminal and the gate of the first field effect transistor, wherein the anode of the ninth diode is connected to the ground terminal, the cathode of the ninth diode is connected to the first end of the twelfth resistor, and the cathode of the twelfth resistor is connected to the gate of the first field effect transistor.

14. The control circuit of the battery management system according to claim 12, characterized in that: The foolproof protection circuit also includes: an eighth diode, a cathode connected to the gate of the first field effect transistor, and a positive electrode connected to the positive output terminal of the backup battery unit; The thirteenth resistor is connected in parallel at both ends of the eighth diode.

15. The control circuit of the battery management system according to claim 12, characterized in that: The foolproof protection circuit also includes: A fourteenth resistor has a first end connected to the drain of the first field effect transistor, and a second end connected to the gate of the discharge field effect transistor.

16. The control circuit of the battery management system according to claim 15, characterized in that: The driving protection circuit further includes: a seventh diode, the cathode of which is connected to the gate of the discharge field effect transistor, and the anode of which is connected to the drain of the discharge field effect transistor; An eleventh resistor is connected in parallel across the seventh diode.

17. The control circuit of the battery management system according to claim 15, characterized in that: The driving protection circuit further includes: a tenth diode, having a cathode connected to the gate of the second field effect transistor and an anode connected to the positive output terminal of the backup battery unit; The sixteenth resistor is connected in parallel across the tenth diode.

18. The control circuit of the battery management system according to claim 15, characterized in that: The driving protection circuit further includes: a fifteenth resistor connected in series between the fifth capacitor and the gate of the second field effect transistor; A seventeenth resistor is connected in series between the gate of the discharge field effect transistor and the drain of the second field effect transistor.

19. A data storage system, characterized in that: include: Storage devices for storing data; A power module, used to supply power to the storage device; A backup battery unit, used to supply power to the storage device when the power module is abnormal, wherein the backup battery unit comprises at least a battery pack, a battery management system and a control circuit of the battery management system according to any one of claims 1 to 18.

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