Motor control system and multi-resistor current sampling method thereof

Abstract

The invention discloses a permanent magnet synchronous motor multi-resistor current sampling method and a motor control system. The permanent magnet synchronous motor controls a three-phase inverter based on an SVPWM strategy, and successively samples two phases to be sampled in each control period. The sampling method comprises the following steps: judging whether a sampling window of a to-be-sampled short phase is smaller than first minimum sampling time or not; if yes, prolonging the conduction time of the short-phase lower bridge arm to the first minimum sampling time, and enabling the direction of the voltage synthesis vector obtained after prolonging to be unchanged; judging whether the sampling window of the to-be-sampled long phase is smaller than second minimum sampling time or not; if yes, the conduction time of the long-phase lower bridge arm is shifted rightwards; and successively collecting short-phase current and long-phase current in the current control period, and calculating three-phase current according to the short-phase current and the long-phase current. The maximum duty ratio of the upper bridge arm of the to-be-sampled two phases can be increased as much as possible by scaling and adjusting the proportion of the first sampled short phase and combining with the PWM waveform phase shift of the second sampled long phase, so that the maximum output capability of the motor is improved.

Description

Technical Field

[0001] The present disclosure relates to the field of motors, and in particular to a motor control system and a multi-resistance current sampling method thereof. Background Art

[0002] During the control process of a permanent magnet synchronous motor (PMSM), in order to obtain the maximum torque output throughout the control cycle, field-oriented control (FOC) is often used to control the motor.

[0003] In FOC control, three-phase currents i a , i b and i c are required to participate in the control of the current loop. In multi-resistance sampling, three resistors (R a , R b and R c ) provided in the lower arms of the three-phase drive circuit or two of them are used as sampling resistors. Based on the currents collected on two of the sampling resistors and according to Kirchhoff's law, the third-phase current is calculated, thereby reconstructing the three-phase currents.

[0004] When using dual-resistance and triple-resistance sampling, in order to ensure the accuracy of the reconstructed phase currents, it is necessary to sample two-phase currents simultaneously or sequentially. In some cases, when it is not possible to sample two-phase currents simultaneously, only two-phase currents can be sampled sequentially. However, at this time, since sufficient time needs to be reserved for current sampling, the maximum speed and load-carrying capacity that the motor can achieve are limited.

[0005] Therefore, an improved multi-resistance current sampling method is needed. Summary of the Invention

[0006] One technical problem to be solved by the present disclosure is to provide an improved multi-resistance sampling scheme for a permanent magnet synchronous motor. For the case where two-phase currents need to be sampled sequentially, the short phase is sampled first and then the long phase. When the conduction time of the lower arm of the short phase is insufficient, the conduction times of the lower arms of the short phase and the long phase are extended proportionally, and when the conduction time of the lower arm of the long phase is insufficient, the conduction time is phase-shifted. Thus, while ensuring reliable sequential sampling of the two-phase currents, the duty cycle of the PWM waveform output by the micro-control unit during the motor control process is maximized, thereby optimizing the maximum speed and load-carrying capacity of the motor.

[0007] According to a first aspect of the present disclosure, a multi-resistance current sampling method for a permanent magnet synchronous motor is proposed. The permanent magnet synchronous motor controls a three-phase inverter based on an SVPWM strategy, and two phases to be sampled are successively sampled within each control period. Among the two phases to be sampled, the phase with a shorter conduction time of the lower bridge arm is the short-phase to be sampled, and the other phase is the long-phase to be sampled. The method includes: determining whether the sampling window time of the short-phase to be sampled among the two phases to be sampled in the current control period is less than a first minimum sampling time T th1 ; determining that the sampling window time of the short-phase to be sampled is less than the first minimum sampling time T th1 ; in this case, extending the conduction time of the lower bridge arm of the short-phase to be sampled so that the conduction time of the lower bridge arm of the short-phase is not less than the first minimum sampling time T th1 , and making the direction of the voltage synthesis vector obtained after extension consistent with the direction of the predetermined voltage synthesis vector in the current control period without extension; and determining whether the sampling window time of the long-phase to be sampled among the two phases to be sampled in the current control period is less than a second minimum sampling time T th2 ; determining that the sampling window time of the long-phase to be sampled is less than the second minimum sampling time T th2 ; in this case, shifting the conduction time of the lower bridge arm of the long-phase to be sampled so that the end time of the conduction time of the lower bridge arm of the long-phase is separated from the end time of the conduction time of the lower bridge arm of the short-phase by not less than a third minimum sampling time T th3 ; and in the current control period, successively collecting the currents of the short-phase to be sampled and the long-phase to be sampled, and calculating the current of the third phase according to the collected currents of the two phases.

[0008] Optionally, one analog-to-digital converter (ADC) is used to successively sample two phases to be sampled within each control period, and the third minimum sampling time T th3 is not less than the ADC resampling time T resample .

[0009] Optionally, making the direction of the voltage synthesis vector obtained after extension consistent with the direction of the predetermined voltage synthesis vector in the current control period without extension includes: extending the conduction time of the lower bridge arm of the long-phase to be sampled so that the ratio of the conduction times of the two non-zero vectors corresponding to the two phases to be sampled after extension is equal to the ratio of the conduction times of the two non-zero vectors corresponding to the two phases to be sampled without extension.

[0010] Optionally, making the direction of the extended voltage synthesis vector consistent with the direction of the predetermined voltage synthesis vector without extension in the current control period includes: when the permanent magnet synchronous motor controls the three-phase inverter based on the seven-segment SVPWM strategy, adjusting the conduction time of the lower arm of the third phase other than the two phases to be sampled as needed, so that the ratio of the conduction times of the two non-zero vectors corresponding to the three phases after extension is equal to the ratio of the conduction times of the two non-zero vectors corresponding to the three phases without extension.

[0011] Optionally, it is judged whether the sampling window time of the longer phase to be sampled in the two phases to be sampled in the current control period is less than the second minimum sampling time T th2 Including: when it is judged that the sampling window time of the shorter phase to be sampled is not less than the first minimum sampling time T th1 In this case, the conduction time of the lower arm of each of the two phases to be sampled is not extended, and the judgment and delay operation less than the second minimum sampling time T are performed based on the original sampling window time of the longer phase to be sampled; and when it is judged that the sampling window time of the shorter phase to be sampled is less than the first minimum sampling time T th2 In this case, the conduction time of the lower arm of each of the two phases to be sampled is extended, and the judgment and delay operation less than the second minimum sampling time T are performed based on the extended sampling window time of the longer phase to be sampled. th1 th2

[0012] Optionally, when it is judged that the sampling window time of the longer phase to be sampled is less than the second minimum sampling time T th2 In this case, the conduction time of the lower arm of the longer phase to be sampled is phase-shifted so that the end moment of the conduction time of the lower arm of the longer phase is separated from the end moment of the conduction time of the lower arm of the shorter phase by not less than the third minimum sampling time T th3 Including: postponing the start moment of the conduction time of the lower arm of the longer phase to be sampled so that the start moment of the conduction time of the lower arm of the longer phase is not later than the start moment of the conduction time of the lower arm of the shorter phase, and the sampling moment for the longer phase to be sampled is not shorter than the time T for the output voltage of the operational amplifier to stabilize from the start of the conduction of the lower arm. rise .

[0013] Optionally, the multi-resistance sampling is three-resistance sampling, and the two phases to be sampled successively in each control period are the phase with the second-longest conduction time of the lower arm and the phase with the longest conduction time of the lower arm in the sector where the current control period is located; or, the multi-resistance sampling is two-resistance sampling, and the two phases to be sampled successively in each control period are the two phases arranged with sampling resistors.

[0014] Optionally, the first minimum sampling time Tth1 Equal to T rise +T sample and / or the second minimum sampling time T th2 Equal to T rise +3T sample +2T conv and / or the third minimum sampling time T th3 Equal to T conv +T sample where T rise corresponds to the time from the conduction of the lower bridge arm of the phase to be sampled to the stabilization of the operational amplifier output voltage, T sample corresponds to the sampling time required for the ADC to complete one sampling, T conv corresponds to the conversion time required between two samplings of the ADC.

[0015] According to a second aspect of the present disclosure, a motor control system is proposed, including: a motor; a magnetic orientation vector control module for controlling the motor, and including: a current sampling control module for performing the multi-resistance current sampling method as described in the first aspect to obtain three-phase currents for controlling the motor.

[0016] Optionally, the motor control system further includes an analog-to-digital converter for successively sampling two phases to be sampled in each control cycle.

[0017] Thus, compared with the conventional double-resistance and triple-resistance current sampling methods, the multi-resistance sampling scheme of the permanent magnet synchronous motor of the present disclosure can reduce the reserved sampling time, increase the maximum duty ratio of the bridge arm drive PWM waveform, increase the maximum voltage acting on the motor winding, and thus improve the maximum output capacity of the motor. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] By describing the exemplary embodiments of the present disclosure in more detail in conjunction with the drawings, the above and other objects, features, and advantages of the present disclosure will become more apparent, wherein, in the exemplary embodiments of the present disclosure, the same reference numerals generally represent the same components.

[0019] Figure 1 Shows the FOC control schematic diagram for PMSM.

[0020] Figure 2 Shows the three-resistance sampling circuit schematic diagram.

[0021] Figure 3 Shows the space vector diagram of the three-phase inverter.

[0022] Figure 4 Shows the phase voltage diagrams of different sectors under the seven-segment SVPWM strategy.

[0023] Figure 5 It shows the voltage waveform diagram within one control period in Sector I under the seven-segment SVPWM strategy.

[0024] Figure 6A -B shows an example of the current flow direction in Sector I.

[0025] Figure 7 It shows a schematic flowchart of the multi-resistance current sampling method for a permanent magnet synchronous motor according to an embodiment of the present invention.

[0026] Figure 8 It shows the two sampling phases corresponding to each sector during three-resistance sampling.

[0027] Figure 9 It shows an example of using one ADC to complete the sequential sampling of Phase A and Phase B.

[0028] Figure 10 It shows the duration adjustment operation performed when the sampling window time of the short phase to be sampled is less than the first minimum sampling time T th1 when.

[0029] Figure 11 It shows the right shift operation performed when the sampling window time of the long phase to be sampled is less than the second minimum sampling time T th2 when.

[0030] Figure 12 It shows a flow example of the current sampling method of the present disclosure during double-resistance sampling.

[0031] Figure 13 It shows a flow example of the current sampling method of the present disclosure during three-resistance sampling.

[0032] Figure 14 It shows a schematic diagram of the composition of a motor control system according to an embodiment of the present invention.. Detailed implementation manners

[0033] The preferred embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although the preferred embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure can be implemented in various forms and should not be limited by the embodiments set forth herein. On the contrary, these embodiments are provided to make the present disclosure more thorough and complete, and to fully convey the scope of the present disclosure to those skilled in the art.

[0034] During the control process of a permanent magnet synchronous motor (PMSM), in order to obtain the maximum torque output throughout the control period, FOC is often used to control the motor. Figure 1 It shows the schematic diagram of FOC control for PMSM.

[0035] As shown in the figure, a position sensor such as a magnetic encoder acquires the rotor speed n and rotor position θ of the motor M. In practical applications, for example, the speed reference n obtained based on user input ref is subtracted from the acquired rotor speed n and input to PID1 (i.e., the speed-loop PID). The output of the speed-loop PID is the q-axis reference current i qref . For simplicity, when field-weakening control is not performed, the d-axis reference current i dref can be set to 0. At this time, the reference currents i qref and i dref of the q-axis and d-axis can be subtracted from the actual q-axis and d-axis currents i q and i d fed back by the motor, and after being adjusted by PID2 (i.e., the q-axis current loop) and PID3 (i.e., the d-axis current loop) respectively, the q-axis and d-axis voltages V d and V q are output, and then converted to the α-axis and β-axis voltages V α and V β through the inverse Park transformation, and then the three-phase voltages V a 、V b and V c are obtained through SVPWM (Space Vector Pulse Width Modulation), and then the motor M is driven to rotate through the three-phase inverter bridge. In FOC control, the three-phase currents i a 、i b and i c are acquired through the sampling resistor, and after the Clark transformation, the α-axis and β-axis currents i α and i β are obtained, and then after the Park transformation, the feedback d-axis and q-axis currents i d and i g are obtained and input to PID2 and PID3 respectively to participate in the current-loop control.

[0036] When controlling the three-phase inverter based on the SVPWM strategy, the voltage vectors in FOC are all synthesized by one or two voltage vectors among U4 (100), U6 (110), U2 (010), U3 (011), U1 (001), and U5 (101). Since multi-resistance sampling needs to collect the current when the output voltage vector is U0 (000), and in some cases, it is necessary to collect the two-phase current sequentially. This results in too long a period of the output voltage vector U0 (000) required to complete the sequential collection of the two-phase current, thus limiting the maximum duty cycle of the PWM waveform output by the MCU during the motor control process, restricting the maximum voltage acting on the motor, and affecting the achievable speed and load-carrying capacity of the motor.

[0037] To this end, the present disclosure proposes a method of first sampling the short-phase current and then sampling the long-phase current when two-phase currents need to be sampled sequentially to increase the maximum duty cycle of the PWM waveform output by the MCU. Further, when the conduction time of the lower bridge arm in the short phase is too short, the conduction time of the lower bridge arms of the two phases can be extended proportionally to reserve the minimum sampling window required for the first sampling, and the conduction time of the lower bridge arm of the long phase can be shifted to the right to ensure the sampling window required for the second sampling, so that the direction of the original voltage vector can be maintained while minimizing the duration required for the output voltage vector U0(000).

[0038] For the convenience of a thorough understanding of the present disclosure, the relevant principles of multi-resistance current sampling are first described herein.

[0039] Figure 2 The schematic diagram of a three-resistance sampling circuit is shown. As shown, in a three-phase drive circuit composed of six MOSFETs (VT1-VT6), the three resistors (R a 、R b and R c ) in the lower bridge arm are sampling resistors. The three-phase currents can be reconstructed according to the currents collected on the sampling resistors.

[0040] When the MOSFET in the lower bridge arm is turned off, no current flows through the sampling resistor (although there may be a short transient current). When the MOSFET in the lower bridge arm is turned on, the current flows through the sampling resistor, and this current is equal to the phase current of the current phase.

[0041] Figure 2 An example of A-phase current sampling is shown. Only when VT4 is turned on and VT1 is turned off can the A-phase current i a be sampled. Because when VT4 is turned on and VT1 is turned off, regardless of the direction of the i a current, the current always flows through the resistor Ra. Similarly, the B and C phase currents can be sampled.

[0042] According to Kirchhoff's current law, the three-phase currents i a , i b and i c flowing through the three-phase system have the following relationship:

[0043] i a +i b +i c =0 (1)

[0044] As can be seen from Equation (1), the instantaneous sum of the three-phase current values is zero. Therefore, through the above relationship, two of the three-phase currents can be sampled to calculate the third-phase current. In this case, only two-phase currents need to be sampled within each PWM cycle. Since the on / off of the switching transistors will affect the phase current and it takes some time to stabilize, in order to ensure sufficient time for sampling the two-phase currents and the accuracy of the phase current, when sampling with three resistors, which two phases to sample is usually determined according to the current sector of SVPWM.

[0045] During the FOC control process, the SVPWM strategy is often used to control the three-phase inverter. The basic principle of SVPWM is to represent the instantaneous value of the output voltage of the three-phase inverter with a space vector U rotating at an angular velocity ω = 2πf (f is the power supply frequency), and divide the 360° rotation space of the space vector U into six sectors (Sectors I to VI). Figure 3 The space vector diagram of the three-phase inverter is shown. As shown in the figure, the six sectors divided are Sector I (composed of voltage vectors U4(100) and U6(110)), Sector II (composed of voltage vectors U6(110) and U2(010)), Sector III (composed of voltage vectors U2(010) and U3(011)), Sector IV (composed of voltage vectors U3(011) and U1(001)), Sector V (composed of voltage vectors U1(001) and U5(101)), and Sector VI (composed of voltage vectors U5(101) and U4(100)) in the two-phase αβ coordinate system. That is to say, the output voltage vector of FOC (i.e., the "voltage synthesis vector" described later) is synthesized by one voltage vector or two three-phase conduction voltage vectors. Among them, the three-phase conduction voltage vectors include U4(100), U6(110), U2(010), U3(011), U1(001), U5(101) as shown in the space vector diagram.

[0046] This space vector U rotating to any sector can be synthesized by three space vectors with specific positions located at the boundaries of the sector. Common SVPWMs include seven-segment SVPWM, five-segment SVPWM, etc. The seven-segment SVPWM has eight space vectors with specific positions U0 to U7; the five-segment 000 injection SVPWM has seven space vectors with specific positions U0 to U6; while the five-segment 111 injection SVPWM has seven vectors U1 to U7, where U0 and U7 are zero vectors.

[0047] Figure 4Shows the phase voltage diagrams of different sectors under the seven-segment SVPWM strategy. In the same sector, the phase with the longest conduction time of the lower bridge arm remains unchanged, while in different sectors, the phase with the longest conduction time of the lower bridge arm is not the same. Multiple control cycles are included within the same sector. By controlling the action time of three spatially specific space vectors participating in vector synthesis, the magnitude and direction of the space vector U can be controlled. For example, within sector I, by controlling the conduction time of VT1 to VT6, different synthesized voltages at different angles can be obtained based on different U4 and U6 proportional relationships, and the magnitude of the synthesized voltage depends on the length of the sampling window. For ease of understanding, Figure 5 Shows the voltage waveform diagram within one control cycle in sector I under the seven-segment SVPWM strategy. In the figure, T represents the duration of one control cycle, and since the waveform is symmetrically distributed within one control cycle, the voltage vector distribution within the first T / 2 cycle will be mainly discussed as follows.

[0048] As Figure 5 shown, in sector I, the conduction time of the lower bridge arm of phase C (denoted as t3) is the longest, the conduction time of the lower bridge arm of phase B (denoted as t2) is the second longest, and the conduction time of the lower bridge arm of phase A (denoted as t1) is the shortest. The zero vector U0 corresponds to the period when all three-phase lower bridge arms are conducting, that is, the conduction period of the lower bridge arm of phase A. Within the first T / 2 cycle, the duration of U0 is equal to t1 / 2. The zero vector U7 is usually located at the start and end stages of the control cycle and corresponds to the period when all three-phase lower bridge arms are not conducting. The duration of this period usually needs to be set equal to the duration of U0. Therefore, within the first T / 2 cycle, the duration of U7 is also equal to t1 / 2. The non-zero vector U4 corresponds to the period when the lower bridge arms of phases B and C are conducting and the upper bridge arm of phase A is conducting. Within the first T / 2 cycle, the duration of U4 is equal to (t2 - t1) / 2. For convenience, T x =(t2 - t1) / 2. The non-zero vector U6 corresponds to the period when the lower bridge arm of phase C is conducting and the upper bridge arms of phases A and B are conducting. Within the first T / 2 cycle, the duration of U6 is equal to (t3 - t2) / 2. For convenience, T y =(t3 - t2) / 2. That is, at this time, T x and T y correspond to the durations of U4 and U6 respectively. At the same time, t1 + t3 = T.

[0049] In each control cycle under the seven-segment SVPWM strategy, the synthesized voltage is obtained by synthesizing two zero vectors U0 and U7 and two non-zero vectors corresponding to the current sector. In Figure 5In the example of Sector I shown, the synthesized voltage in each control period is synthesized from two zero vectors U0 and U7 and two non - zero vectors U4 and U6. When the motor rotates forward (in the CCW direction), at this time, the moving direction of the sector vectors is Sector I, Sector II, Sector III, Sector IV, Sector V, Sector VI. When entering Sector I (corresponding to 0°), the synthesized voltage is synthesized from two zero vectors U0 and U7 and the non - zero vector U4. After that, as the angle increases, the ratio of the duration of U4 to the duration of U6 in the control period gradually decreases. Until leaving Sector I (corresponding to 60°), the duration of U4 is 0, and the synthesized voltage is synthesized from two zero vectors U0 and U7 and the non - zero vector U6. It should be understood that as long as the ratio of the durations of U4 and U6 remains unchanged, the direction of the synthesized voltage vector remains unchanged. However, by increasing the durations of the two non - zero vectors U4 and U6 compared to the two zero vectors U0 and U7, the synthesized voltage at the same angle can have a longer modulus (i.e., corresponding to a greater torque and accordingly a greater rotational speed or load - carrying capacity).

[0050] When using three - resistor or two - resistor sampling, when the upper three - phase switches are off and the lower switches are on, and the output voltage vector is U0(000), current acquisition is performed, that is, the sampling window corresponds to Figure 5 the position of t1. The following will take Sector I as an example to explain the specific current sampling process. Figure 6A -B shows an example of the current flow direction in Sector I.

[0051] In Sector I, the conducting voltages are U4(100) and U6(110) respectively. The voltage vector conducting before the sampling window is U4(100), that is, the upper switch VT1 of phase A is on and the lower switch VT4 is off; the upper switch VT2 of phase B is off and the lower switch VT5 is on; the upper switch VT3 of phase C is off and the lower switch VT6 is on. At this time, as Figure 6A shown, the current flow direction is: the current flows from the positive terminal of the power supply through VT1, into phase A of the motor through the neutral point N, and is divided into two paths flowing to the negative terminal of the power supply. One path flows through the winding of phase B, then through VT5 and the sampling resistor R b into the negative terminal of the power supply; the other path flows through the winding of phase C, then through VT6 and the sampling resistor R c into the negative terminal of the power supply. Taking the current flowing into the motor as positive and the current flowing out of the motor as negative. At this time, the currents on the sampling resistor R b and the sampling resistor R c are -i b and -i c respectively.

[0052] And when entering the sampling window moment, VT1 is off and VT4 is on. Due to the inductive - resistive characteristic of the motor, its current cannot change suddenly. At this time, as Figure 6BAs shown, the current flow is as follows: The current flows from the negative terminal of the power supply through VT4 into phase A of the motor, through the neutral point N, and is divided into two paths flowing back to the negative terminal of the power supply. One path flows through the B-phase winding, then through VT5 and the sampling resistor R b and into the negative terminal of the power supply; the other path flows through the C-phase winding, then through VT6 and the sampling resistor R c and into the negative terminal of the power supply.

[0053] In sector I, the two phases with longer conduction time of the lower switches are phase B and phase C. Therefore, during three-resistor sampling, the current of phase B can be sampled to obtain -i b and the current of phase C can be sampled to obtain -i c during the sampling window, and then the current of the third phase i a can be reconstructed according to Kirchhoff's law. When sampling the currents of phase B and phase C through the analog-to-digital converter (ADC), it is necessary to sample after a delay of a period of time T rise (including the driving rise time and the current stabilization time) after VT1 is turned off and VT4 is turned on. At the same time, it is also necessary to ensure the fixed sampling time T sample of the ADC. That is, if the currents of phase B and phase C can be sampled simultaneously, the minimum time of the sampling window (corresponding to the output voltage vector being U0(000), i.e., t1) is T th1 = T rise + T sample . However, in some cases, only the currents of phase B and phase C can be sampled sequentially. For example, after sampling the current of phase B, then sampling the current of phase C. At this time, in addition to the sampling window needing to be not less than T th1 , an additional secondary sampling time = T conv + T sample is also required. Here, T conv refers to the conversion time required between the two samplings. Therefore, when sampling sequentially, the time of the sampling window (i.e., t1) needs to be not less than T rise + T conv + 2T sample (which will be detailed below in combination with Figure 9 ).

[0054] In the case of two-resistor sampling with sampling resistors R a and R b , only the current of phase A can be sampled to obtain i a and the current of phase B can be sampled to obtain -i b during the sampling window, and then the current of the third phase -i c can be reconstructed according to Kirchhoff's law. At this time, when sampling sequentially, the time of the sampling window (i.e., t1) also needs to be not less than T rise + T conv + 2T sample .

[0055] Combined with the aboveFigure 5 It can be seen that during the FOC control process, when it is necessary to increase the torque in Sector I, it is necessary to increase the durations of the two non-zero vectors U4 and U6 compared to the two zero vectors U0 and U7, so that the resultant voltage at the same angle has a longer magnitude. However, in the scenario of successive sampling, it is necessary to ensure that t1 is not less than T rise +T conv +2T sample , which limits the durations of the non-zero vectors U4 and U6, limits the maximum duty cycle of the upper bridge arm, and further limits the maximum voltage acting on the motor windings, affecting the maximum output capacity of the motor.

[0056] Therefore, for the case of successively sampling the currents of two-phase windings, the present disclosure proposes a novel multi-resistance current sampling method for a permanent magnet synchronous motor. First, sample the phase with a shorter conduction time of the lower bridge arm in the two-phase bridge arm. If the sampling window of the first sampled phase is insufficient, adjust the action time of the non-zero vector by proportional scaling to reserve a sampling window. When the sampling window of the later sampled phase is insufficient, perform appropriate PWM waveform phase shift processing. This method can increase the maximum duty cycle of the upper bridge arms of the two phases to be sampled, increase the maximum voltage acting on the motor windings, and thus increase the maximum output capacity of the motor.

[0057] Figure 7 FIG. shows a schematic flow chart of a multi-resistance current sampling method for a permanent magnet synchronous motor according to an embodiment of the present invention. This method is suitable for use during the process of controlling a three-phase inverter by a permanent magnet synchronous motor based on an SVPWM strategy, and successively samples two phases to be sampled within each control period. Here, the phase with a shorter conduction time of the lower bridge arm in the two phases to be sampled can be referred to as the short phase to be sampled, and the other as the long phase to be sampled.

[0058] This method is preferably applicable to a two-resistance configuration, and can also be applicable to a three-resistance configuration. During two-resistance sampling, the phases to be sampled are the two phases where sampling resistors are arranged. The two phases to be sampled successively within each control period are the two phases where sampling resistors are arranged. The three-resistance sampling method is similar to the two-resistance sampling method, and it is also necessary to adjust the sampled current according to the sector where the reference voltage vector is located. Specifically, during three-resistance sampling, the phases to be sampled are two specific phases in each sector. At this time, the two phases to be sampled successively within each control period are the phase with the second-longest conduction time of the lower bridge arm and the phase with the longest conduction time of the lower bridge arm in the sector where the current control period is located. Specifically, during three-resistance sampling, it is possible not to sample the phase with the shortest conduction time of the lower bridge arm. Figure 8Shows the two sampling phases corresponding to each sector during three-resistance sampling. That is, in sector I, phase B is sampled first and then phase C; in sector II, phase A and phase C are sampled first; in sector III, phase C is sampled first and then phase A; in sector IV, phase B is sampled first and then phase A; in sector V, phase A is sampled first and then phase B; in sector VI, phase C is sampled first and then phase B.

[0059] In step S710, it is judged whether the sampling window time of the short sampling phase among the two phases to be sampled in the current control period is less than the first minimum sampling time T th1 . The first minimum sampling time T th1 needs to satisfy the time required for a single ADC sampling, so it can be equal to T as described above rise +T sample .

[0060] In step S720, when it is judged that the sampling window time of the short sampling phase is less than the first minimum sampling time T th1 , the conduction time of the lower bridge arm of the short phase is extended so that the conduction time of the lower bridge arm of the short phase is not less than the first minimum sampling time T th1 , and the direction of the voltage synthesis vector obtained after extension is kept consistent with the direction of the predetermined voltage synthesis vector without extension in the current control period. That is, when the duration of the pre-sampling window is insufficient, the action time of the non-zero vector is adjusted by equal-proportion scaling.

[0061] In step S730, it is judged whether the sampling window time of the long sampling phase among the two phases to be sampled in the current control period is less than the second minimum sampling time T th2 . The second minimum sampling time T th21 needs to satisfy the time required for two adjacent samplings. Therefore, considering the symmetric distribution of the PWM wave, for example, it is equal to T rise +3T sample +2T conv (which will be elaborated below in combination with Figure 11 ).

[0062] In step S740, when it is judged that the sampling window time of the long sampling phase is less than the second minimum sampling time T th2 , the conduction time of the lower bridge arm of the long phase is phase-shifted so that the end moment of the conduction time of the lower bridge arm of the long phase is separated from the end moment of the conduction time of the lower bridge arm of the short phase by not less than the third minimum sampling time T th3 . That is, when the duration of the post-sampling window is insufficient, the PWM waveform is shifted to the right, and the distance of the right shift of the PWM waveform needs to ensure that the second sampling for the long phase can be performed after the first sampling for the short phase. At this time, the third minimum sampling time T th3 needs to satisfy the time required for the second sampling, so it can be equal to T as described abovesample +T conv 。

[0063] In step S750, in the current control period, the currents of the short phase to be sampled and the long phase to be sampled can be successively collected, and the current of the third phase can be calculated according to the collected two-phase currents.

[0064] Thus, the multi-resistance current sampling method for the permanent magnet synchronous motor proposed by the present disclosure optimizes the sampling method by adjusting the current sampling points and the output PWM waveform. Since in fact as long as the lower arm of a certain phase is conducting, the current flowing through the lower arm is equal to the phase current, sampling can be performed. Because the present disclosure is not limited to the moment when the lower arms of the two phases to be sampled (for example, VT4 and VT5 when sampling phase A and phase B in sector I) are simultaneously turned on, while ensuring the current sampling accuracy, the maximum voltage acting on the motor is increased.

[0065] In one embodiment, the present disclosure is particularly applicable to the case where only one ADC module is provided in the micro control unit (MCU) for sampling, so when two-phase currents cannot be sampled simultaneously, only two-phase currents can be sampled successively. At this time, using this one ADC to successively sample two phases to be sampled in each control period, and the third minimum sampling time T th3 is not less than the ADC resampling time T resample 。T resample can be equal to T conv +T sample ,wherein, T conv corresponds to the conversion time required from the completion of the previous ADC sampling to the next sampling.

[0066] Figure 9 Shows an example of using one ADC to complete the successive sampling of phase A and phase B. When performing multi-resistance sampling, the common method is to perform it when the lower arms of the two phases to be sampled are simultaneously turned on. When the drive signal is at a high level, the corresponding switch tube conducts. The drive signals of VT1 and VT4, VT2 and VT5, VT3 and VT6 are complementary and there is a certain dead time. As shown in the figure, in the case of double-resistance sampling and the sampling resistors are R a and R b ,when sampling in sector I, only the current of phase A can be sampled to obtain i a in the sampling window, and the current of phase B can be sampled to obtain -i b ,and then the current -i c of the third phase can be reconstructed according to Kirchhoff's law.

[0067] The voltage on the sampling resistor needs to be amplified by an operational amplifier first, and then connected to the ADC pin of the MCU after filtering. When sampling the current, the time T rise from the conduction of the lower arm to the stabilization of the output voltage of the operational amplifier and the time T of ADC sampling need to be consideredsample and the time T for ADC conversion conv . Taking the double-resistance sampling of phase A and phase B currents in the figure as an example, after the lower-arm VT4 is turned on, wait for T rise time. The ADC starts sampling according to the rising edge of the sampling trigger signal. After T sample time of sampling the phase A current, wait for the conversion of the sampling result of phase A to be completed (after T conv time), and then start sampling the phase B current. Therefore, the simultaneous conduction time of the lower-arm VT4 and VT5 must be greater than or equal to T rise +2T sample +T conv for normal sampling to be possible. This limits the maximum duty cycle of the upper arms of phase A and phase B, limits the maximum voltage acting on the motor windings, and thus affects the maximum output capacity of the motor.

[0068] For this reason, the multi-resistance current sampling method for a permanent magnet synchronous motor proposed in the present disclosure can be used. Taking the double-resistance sampling of phase A and phase B currents as an example again, in sector I, since the conduction time of VT4 is shorter, the phase A current is sampled first when VT4 is turned on, and then the sampling result of the phase A current is converted and the phase B current is sampled when VT5 is turned on. Here, phase A is the short phase among the two phases to be sampled, and phase B is the long phase among the two phases to be sampled.

[0069] Specifically, if the sampling window of VT4 is insufficient, that is, t1 < T rise +T sample , the action time of the non-zero vector is adjusted by proportional scaling to reserve a sampling window, so that t′1 = T rise +T sample . Figure 10 shows the duration adjustment operation when the sampling window time of the short phase to be sampled is less than the first minimum sampling time T th1 . Figure 10 The left side shows the waveform before the duration adjustment operation, and the right side shows the waveform after the duration adjustment operation, where the dotted line is the waveform before the operation and the solid line is the waveform after the operation. Similar to Figure 5 , here a control period is set as T, and within T / 2, the action times of the two non-zero vectors are respectively T x (corresponding to U6) and T y (corresponding to U4) before the duration adjustment operation, and T′ x (also corresponding to U6) and T′ y (also corresponding to U4) after the duration adjustment operation.

[0070] In order to make the direction of the extended voltage synthesis vector consistent with the direction of the unextended predetermined voltage synthesis vector in the current control period, it is necessary to extend the conduction time of the lower arm of the long sampling phase, so that the ratio of the conduction times of the two non-zero vectors corresponding to the two extended sampling phases is equal to the ratio of the conduction times of the two non-zero vectors corresponding to the two unextended sampling phases. Specifically, in order to keep the direction of the synthesis vector unchanged, the ratio of the durations of U6 and U4 needs to remain unchanged after t1 is extended to t′1, that is, after t1 is extended to t′1, it needs to satisfy:

[0071]

[0072]

[0073] It can be seen from this that when t1 is extended to t′1, t2 needs to be extended to t′2 at the same time, and the resulting T′ x and T′ y should satisfy the above formula. When using the seven-segment modulation method as shown in the figure, after scaling At this time, it is necessary to adjust the conduction time of the lower arm of the third phase outside the two sampling phases as needed, so that the ratio of the conduction times of the two non-zero vectors corresponding to the three phases after extension is equal to the ratio of the conduction times of the two non-zero vectors corresponding to the three phases before extension. As shown in the figure, t3 needs to be proportionally shortened to t′3 so that the resulting T′ x and T′ y satisfy the above formula. When using the five-segment modulation method (at this time, there is no U7 in the PWM waveform), after scaling At this time, since t3 keeps the lower arm conducting throughout the control period T, there is no need to adjust the conduction time of the lower arm of the third phase outside the two sampling phases. It should be understood that no matter which modulation method is adopted, the extension time Δt1 of the short phase will not be greater than the extension time Δt2 of the long phase, but is a value of different magnitudes that can satisfy the above T′ x and T′ y ratio.

[0074] It should be understood that since the conduction time of the lower arm of phase A is extended from t1 to t′1 and the conduction time of the lower arm of phase A is extended from t2 to t′2, the absolute values of T′ x and T′ y are smaller than those of T x and T y , that is, the duty cycle of the PWM wave will decrease compared with that before adjustment.

[0075] It should also be understood that the right shift of the conduction time of the lower arm of the long phase is based on the T that the conduction time of the lower arm of the short phase needs to satisfyrise +T sample In other words, after judging that the sampling window time of the short phase to be sampled is not less than the first minimum sampling time T th1 In the case of , the conduction time of the lower bridge arms of the two phases to be sampled is not extended, and the original sampling window time of the phase to be sampled is less than the second minimum sampling time T th2 When judging that the sampling window time of the short phase to be sampled is less than the first minimum sampling time T th1 In the case of, extending the conduction time of the lower bridge arms of the two phases to be sampled, and performing a sampling window time less than the second minimum sampling time T based on the extended sampling window time of the phase to be sampled. th2 judgment and delay operation.

[0076] The lower bridge arm VT4 conduction time t1 ≥ T rise +T sample There is no need to scale the ratio when sampling is performed normally, or the conduction time of the lower bridge arm VT4 is extended to t′1=T rise +T sample , and accordingly extend the conduction time of the lower bridge arm VT5 to t′2 and make the resulting T′ x and T′ y Satisfies the above formula. In general, the drive waveform is symmetrical in one control cycle, so the conduction time of VT5 itself must be greater than or equal to That is, when the driving waveform needs to maintain left-right symmetry within a control cycle, the second minimum sampling time T th2 =T rise +3T sample +2T conv .

[0077] VT5 conduction time t2<T rise +3T sample +2T conv When the driving waveform of the B-phase bridge arm is properly processed, the time length of t2 (or t'2 extended when t1 is extended to t'1) is no longer adjusted. Instead, the driving waveform of the B-phase bridge arm is shifted to the right to the VT5 conduction time. After sampling VT4, T sample +T conv time to facilitate the ADC to complete the second sampling within a control cycle. Figure 11 It shows that the sampling window time of the phase to be sampled is less than the second minimum sampling time T th2The right shift operation performed at that time. In the figure, the dotted lines in the VT2 and VT5 signals are the waveforms before processing, and the solid lines are the waveforms after the right shift.

[0078] In addition to leaving a time of T sample +T conv after VT4 sampling for the end time of VT5 conduction after the right shift, the start time of VT5 conduction after the right shift can also be restricted. At this time, it is determined that the sampling window time for the to-be-sampled long phase is less than the second minimum sampling time T th2 In this case, phase-shift the conduction time of the lower arm of the long phase of the to-be-sampled long phase so that the end moment of the conduction time of the lower arm of the long phase is not less than the third minimum sampling time T th3 including: delaying the start moment of the conduction time of the lower arm of the long phase of the to-be-sampled long phase so that the start moment of the conduction time of the lower arm of the long phase is not later than the start moment of the conduction time of the lower arm of the short phase, and making the sampling moment for the to-be-sampled long phase not shorter than the time T from the start moment of the conduction time of the lower arm of the long phase to the time when the output voltage of the operational amplifier is stable after the lower arm conducts rise . That is, the right shift needs to ensure that the conduction moment of the lower arm of the long phase is not later than the conduction moment of the lower arm of the short phase, and at the same time, it also needs to ensure that the lower arm of the long phase for sampling the long phase has conducted stably. In Figure 11 In the example of, when sampling the B-phase current, it is also necessary to wait for the output of the operational amplifier to be stable. Therefore, when t2 is greater than T rise +T sample sampling can be carried out normally.

[0079] Figure 12 shows a flow example of the current sampling method of the present disclosure during double-resistance sampling. As shown in the figure, first calculate the conduction time of the three-phase bridge arms. The conduction time at this time is, for example, calculated based on FOC control and the current input of the user (for example, the rotational speed reference n ref ). Subsequently, compare the conduction times of the lower arms of the two phases to be sampled. During double-resistance sampling, the two phases to be sampled are the two phases where the sampling resistors are arranged.

[0080] Determine that during subsequent actual sampling, it is necessary to first sample the current of the phase (short phase) with the shorter conduction time of the lower arm among the two phases to be sampled, and then sample the current of the phase (long phase) with the longer conduction time of the lower arm among the two phases to be sampled. Subsequently, limit the minimum conduction time of the lower arm to T rise +T sample . That is, when the conduction time of the lower arm of the short phase is less than T rise +T sample , correspondingly adjust the conduction times of the lower arms of the short phase and the long phase so that the conduction time of the lower arm of the short phase is not less than T rise +T sampleMoreover, the direction of the synthesized voltage vector remains unchanged. Subsequently, it is determined whether the driving waveform of the long phase needs to be phase-shifted. If so, phase-shifting is performed. If not, current sampling points are set to achieve subsequent adjusted waveforms and sampling points.

[0081] Figure 13 A flowchart example of the current sampling method of the present disclosure during three-resistor sampling is shown. The operation of three-resistor sampling is similar to that during two-resistor sampling, except that it additionally includes sector determination and thus confirmation of which two phases are to be sampled (see Figure 8 ).

[0082] In addition, the present invention can also be implemented as a motor control system. Figure 14 A schematic diagram of the composition of a motor control system according to an embodiment of the present invention is shown. As shown in the figure, in addition to the motor part, the motor control system further includes a field-oriented vector control (FOC) module for controlling the motor. As Figure 14 shown, in one embodiment, the motor control system further includes a power supply, a microcontroller (MCU), a driver, an inverter, and a current sampling device, where the FOC module can be implemented by a processing unit in the MCU. The FOC module includes a current sampling control module for performing the multi-resistor current sampling method as described above in the present disclosure to obtain three-phase currents for controlling the motor.

[0083] The current sampling control module can perform a continuous SVPWM control strategy on the three-phase inverter bridge. When the load increases and / or the speed increases, the conduction time of the lower arm of the short phase may not be able to meet T rise +T sample . At this time, the current sampling control module can extend the conduction time of the lower arm of the two phases to be sampled (the extension needs to meet the requirements of unchanged vector direction and the conduction time of the lower arm of the short phase reaching the minimum sampling time). In one embodiment, the motor control system further includes an analog-to-digital converter (ADC) for successively sampling two phases to be sampled in each control cycle. In one embodiment, the ADC can also be arranged in the microcontrol unit for successively sampling two phases to be sampled in each control cycle. Thus, when the secondary sampling of the long phase cannot be achieved after the short-phase acquisition due to the unachievable conduction time of the lower arm of the long phase, the current sampling control module can shift the waveform of the conduction time of the lower arm of the long phase to the right to meet the two samplings of a single ADC.

[0084] The permanent magnet synchronous motor and its multi-resistance current sampling method of the present disclosure have been described above in conjunction with the accompanying drawings. When the present disclosure sequentially samples the current of two-phase windings in a multi-resistance sampling configuration, it compares the conduction times of the lower bridge arms of the two phases to be sampled, and first samples the current of the phase with the shorter conduction time of the lower bridge arm among the two-phase bridge arms. If the sampling window of the first-sampled phase is insufficient, the action time of the non-zero vector is adjusted by proportional scaling to reserve a sampling window. When the sampling window of the later-sampled phase is insufficient, appropriate PWM waveform phase-shifting processing is performed. Thus, compared with the traditional dual-resistance and triple-resistance current sampling methods, this method can reduce the reserved sampling time, increase the maximum duty cycle of the bridge arm, increase the maximum voltage acting on the motor winding, and further improve the maximum output capacity of the motor.

[0085] The flowcharts and block diagrams in the accompanying drawings illustrate the possible architectures, functions, and operations of systems and methods according to multiple embodiments of the present invention. In this regard, each block in the flowchart or block diagram may represent a module, a program segment, or a part of code that contains one or more executable instructions for implementing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the blocks may occur in a different order than those marked in the accompanying drawings. For example, two consecutive blocks may actually be executed substantially in parallel, and they may sometimes be executed in the reverse order, depending on the functions involved. It should also be noted that each block in the block diagram and / or flowchart, and combinations of blocks in the block diagram and / or flowchart, can be implemented by a dedicated hardware-based system that performs the specified functions or operations, or can be implemented by a combination of dedicated hardware and computer instructions.

[0086] The embodiments of the present invention have been described above. The above description is exemplary and not exhaustive, and is not limited to the disclosed embodiments. Many modifications and variations are obvious to those of ordinary skill in the art in the technical field without departing from the scope and spirit of the described embodiments. The selection of the terms used herein is intended to best explain the principles of the embodiments, the practical applications, or the improvements to the technologies in the market, or to enable other ordinary skill in the art in the technical field to understand the embodiments disclosed herein.

Claims

1. A multi-resistance current sampling method for a permanent magnet synchronous motor, wherein the permanent magnet synchronous motor controls a three-phase inverter based on an SVPWM strategy, and samples two phases to be sampled successively within each control period, where One of the two phases to be sampled with a shorter conduction time of the lower bridge arm is the short phase to be sampled, and the other is the long phase to be sampled. The method includes: Determine whether the sampling window time of the to-be-sampled short phase in the two to-be-sampled phases in the current control period is less than the first minimum sampling time T th1 ; Determine that the sampling window time of the short phase to be sampled is less than the first minimum sampling time T th1 In this case, extend the conduction time of the lower bridge arm of the short phase to be sampled so that the conduction time of the lower bridge arm of the short phase is not less than the first minimum sampling time T th1 and make the direction of the voltage synthesis vector obtained after extension consistent with the direction of the predetermined voltage synthesis vector without extension in the current control period; Determine whether the sampling window time of the to-be-sampled long phase in the two to-be-sampled phases in the current control period is less than the second minimum sampling time T th2 ; Determine that the sampling window time of the to-be-sampled long phase is less than the second minimum sampling time T th2 In this case, phase-shift the conduction time of the lower arm of the long phase of the to-be-sampled long phase so that the end time of the conduction time of the lower arm of the long phase is separated from the end time of the conduction time of the lower arm of the short phase by no less than the third minimum sampling time T th3 ; and In the current control period, successively sample the currents of the short phase to be sampled and the long phase to be sampled, and calculate the current of the third phase according to the sampled currents of the two phases.

2. The method according to claim 1, wherein Use an analog-to-digital converter (ADC) to successively sample two phases to be sampled in each control period, and the third minimum sampling time T th3 is not less than the ADC resampling time T resample .

3. The method according to claim 1, wherein, Making the direction of the voltage synthesis vector obtained after extension consistent with the direction of the predetermined voltage synthesis vector without extension in the current control period includes: Extending the conduction time of the lower bridge arm of the long phase of the long phase to be sampled, so that the ratio of the conduction times of the two non-zero vectors corresponding to the two phases to be sampled after extension is equal to the ratio of the conduction times of the two non-zero vectors corresponding to the two phases to be sampled without extension.

4. The method according to claim 1, wherein, Making the direction of the voltage synthesis vector obtained after extension consistent with the direction of the predetermined voltage synthesis vector without extension in the current control period includes: When the permanent magnet synchronous motor controls the three-phase inverter based on the seven-segment SVPWM strategy, adjust the conduction time of the lower bridge arm of the third phase other than the two phases to be sampled as needed, so that the ratio of the conduction times of the two non-zero vectors corresponding to the three phases after extension is equal to the ratio of the conduction times of the two non-zero vectors corresponding to the three phases without extension.

5. The method according to claim 1, wherein, Determine whether the sampling window time of the sampling phase length in the two phases to be sampled in the current control period is less than the second minimum sampling time T th2 including: When it is determined that the sampling window time of the short phase to be sampled is not less than the first minimum sampling time T th1 , the conduction time of the lower bridge arm of each of the two phases to be sampled is not extended, and a determination and delay operation less than the second minimum sampling time T th2 are performed based on the original sampling window time of the long phase to be sampled; and When it is determined that the sampling window time of the short phase to be sampled is less than the first minimum sampling time T th1 the conduction time of the lower bridge arm of each of the two phases to be sampled is extended, and based on the extended sampling window time of the long phase to be sampled, a determination and a delay operation less than the second minimum sampling time T th2 are performed.

6. The method according to claim 1, wherein Determine that the sampling window time of the to-be-sampled long phase is less than the second minimum sampling time T th2 In this case, phase-shift the conduction time of the lower bridge arm of the long phase of the to-be-sampled long phase so that the end moment of the conduction time of the lower bridge arm of the long phase is separated from the end moment of the conduction time of the lower bridge arm of the short phase by no less than the third minimum sampling time T th3 including: Delay the start time of the conduction time of the lower arm of the long phase to be sampled so that the start time of the conduction time of the lower arm of the long phase is not later than the start time of the conduction time of the lower arm of the short phase, and so that the sampling time for the long phase to be sampled is not shorter than the time T from the start time of the conduction time of the lower arm of the long phase until the operational amplifier output voltage stabilizes after the lower arm starts conducting rise 。 7. The method according to claim 1, wherein, The multi-resistance sampling is three-resistance sampling, and the two phases to be sampled successively in each control period are the phase with the second-longest conduction time of the lower bridge arm and the phase with the longest conduction time of the lower bridge arm in the sector where the current control period is located; Or, The multi-resistance sampling is two-resistance sampling, and the two phases to be sampled successively in each control period are the two phases arranged with sampling resistors.

8. The method according to claim 1, wherein The first minimum sampling time T th1 is equal to T rise +T sample , and / or the second minimum sampling time T th2 is equal to T rise +3T sample +2T conv , and / or the third minimum sampling time T th3 is equal to T conv +T sample , where T rise corresponds to the time from the conduction of the lower arm of the phase to be sampled to the stabilization of the operational amplifier output voltage, T sample corresponds to the sampling time required for the ADC to complete one sampling, and T conv corresponds to the conversion time required between two samplings of the ADC.

9. A motor control system, comprising: A motor; A magnetic orientation vector control module for controlling the motor, and comprising: A current sampling control module for performing the multi-resistance current sampling method according to any one of claims 1-8, and obtaining three-phase currents for controlling the motor.

10. The motor control system according to claim 9, wherein, The motor control system further includes an analog-to-digital converter for successively sampling two phases to be sampled in each control period.

Images