Wafer-level packaged surface acoustic wave filter and manufacturing method thereof

Abstract

According to the surface acoustic wave filter for wafer level packaging and the manufacturing method thereof, the cavity structure is formed through the barrier layers, the first barrier layer can serve as a cover body of the cavity structure, the second barrier layer and the sacrificial layer can serve as wall bodies of the cavity structure, and due to the fact that the number of the wall bodies supporting the cover body is large, the cavity structure is not damaged. Therefore, the supporting reliability can be improved, and collapse of the cavity structure is avoided; furthermore, the first barrier layer and the second barrier layer are connected and are made of the same material, and the connection reliability is higher, so that the stability and the reliability of the cavity structure can be further improved, the problems of collapse of the cavity structure and failure of the interdigital transducer are avoided, and the quality and the reliability of the formed wafer-level packaged surface acoustic wave filter are improved.

Description

Technical Field

[0001] The present invention relates to the field of communication technologies, and particularly to a surface acoustic wave filter with wafer-level packaging and a manufacturing method thereof. Background Art

[0002] With the development of integrated circuit technology, the device area obtained by wafer-level packaging (WLP) is almost the same as the area of the chip, which can meet the increasingly developing requirements of miniaturization and small-size design. Currently, many electronic devices with communication functions usually have multiple surface acoustic wave filters (SAWFs). The surface acoustic wave filter requires a cavity structure to protect the interdigital transducer (IDT) to prevent the subsequent processes from contaminating the functional area of the interdigital transducer, so as to ensure that the interdigital transducer can achieve the filtering function. Currently, the cavity structures formed in the industry mainly include the wafer-level packaging (WLP) form and the chip-size packaging (CSP) form.

[0003] Compared with the surface acoustic wave filter with chip-level packaging, the surface acoustic wave filter with wafer-level packaging has a higher process complexity, but relatively smaller packaging size, which can meet the current high-integration packaging requirements. The current mainstream wafer-level packaging solution is to build a wall and a roof on the interdigital transducer with a dry film to form a cavity structure for protecting the interdigital transducer. The existing surface acoustic wave filter with wafer-level packaging is prone to cavity structure collapse, resulting in the failure of the interdigital transducer. Summary of the Invention

[0004] The purpose of the present invention is to provide a surface acoustic wave filter with wafer-level packaging and a manufacturing method thereof, so as to solve the problem that the surface acoustic wave filter with wafer-level packaging in the prior art is prone to cavity structure collapse.

[0005] To solve the above technical problems, the present invention provides a surface acoustic wave filter with wafer-level packaging, and the surface acoustic wave filter with wafer-level packaging includes:

[0006] A piezoelectric substrate, on which an interdigital transducer and electrodes are formed;

[0007] A sacrificial layer, which is located on the piezoelectric substrate, covers part of the piezoelectric substrate, and exposes the interdigital transducer and at least part of the electrodes;

[0008] A barrier layer having through pores therein, the barrier layer including a connected first barrier layer and a second barrier layer, the first barrier layer being located on the sacrificial layer, the second barrier layer extending towards the piezoelectric substrate, the first barrier layer and the second barrier layer forming a cavity structure, and the interdigital transducer being located within the cavity structure; and,

[0009] A conductive column passing through the barrier layer and the sacrificial layer and connected to the electrode.

[0010] Optionally, in the surface acoustic wave filter with wafer-level packaging, the size of the pores along the surface of the piezoelectric substrate is between 2 μm and 8 μm.

[0011] Optionally, in the surface acoustic wave filter with wafer-level packaging, the pores are filled with a conductive material.

[0012] Optionally, in the surface acoustic wave filter with wafer-level packaging, the surface acoustic wave filter with wafer-level packaging further includes:

[0013] A redistribution layer located on the barrier layer and connected to the conductive column; and,

[0014] A bump located on the redistribution layer and connected to the redistribution layer.

[0015] Optionally, in the surface acoustic wave filter with wafer-level packaging, the shape of the second barrier layer along the surface of the piezoelectric substrate is annular.

[0016] Optionally, in the surface acoustic wave filter with wafer-level packaging, the second barrier layer extends to the surface of the electrode; or, the second barrier layer extends to the surface of the piezoelectric substrate between the electrode and the interdigital transducer.

[0017] The present invention also provides a manufacturing method of a surface acoustic wave filter with wafer-level packaging, and the manufacturing method of the surface acoustic wave filter with wafer-level packaging includes:

[0018] Providing a piezoelectric substrate on which an interdigital transducer and an electrode are formed;

[0019] Forming a sacrificial material layer on the piezoelectric substrate, the sacrificial material layer covering the interdigital transducer, the electrode, and the piezoelectric substrate;

[0020] Forming a first opening in the sacrificial material layer, the first opening penetrating through the sacrificial material layer;

[0021] A barrier layer is formed on the sacrificial material layer, and the barrier layer also fills the first opening. The barrier layer includes a connected first barrier layer and a second barrier layer. The first barrier layer is located on the sacrificial material layer, and the second barrier layer is located in the first opening;

[0022] A second opening is formed in the barrier layer. The second opening penetrates through the barrier layer and extends through the sacrificial material layer, and the second opening exposes the electrode;

[0023] A conductive pillar is filled in the second opening, and the conductive pillar is connected to the electrode;

[0024] Pores are formed in the barrier layer, and the pores penetrate through the barrier layer; and,

[0025] Etching liquid is injected through the pores to remove the sacrificial material layer enclosed by the first barrier layer and the second barrier layer, and the first barrier layer and the second barrier layer form a cavity structure, and the interdigital transducer is located in the cavity structure.

[0026] Optionally, in the manufacturing method of the surface acoustic wave filter with wafer-level packaging, the manufacturing method of the surface acoustic wave filter with wafer-level packaging further includes:

[0027] A redistribution layer is formed on the barrier layer. The redistribution layer is connected to the conductive pillar, and a conductive material is filled in the pores.

[0028] Optionally, in the manufacturing method of the surface acoustic wave filter with wafer-level packaging, pores are formed in the barrier layer by an etching process, and the pores penetrate through the barrier layer.

[0029] Optionally, in the manufacturing method of the surface acoustic wave filter with wafer-level packaging, a first opening is formed in the sacrificial material layer by an etching process. The first opening exposes part of the electrode, or the first opening exposes the piezoelectric substrate between the electrode and the interdigital transducer; the first opening is annular along the shape of the surface of the piezoelectric substrate.

[0030] In the surface acoustic wave filter with wafer-level packaging and its manufacturing method provided by the present invention, a cavity structure is formed through a barrier layer. Among them, the first barrier layer can serve as the cover of the cavity structure, and the second barrier layer and the sacrificial layer can serve as the walls of the cavity structure. Since there are more walls supporting the cover, the reliability of the support can be improved, and the collapse of the cavity structure can be avoided. Further, the first barrier layer and the second barrier layer are connected, and they are made of the same material, so the connection reliability is higher. Thus, the stability and reliability of the cavity structure can be further improved, the problems of cavity structure collapse and interdigital transducer failure can be avoided, and the quality and reliability of the formed surface acoustic wave filter with wafer-level packaging are improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 FIG. is a schematic flowchart of the manufacturing method of the surface acoustic wave filter with wafer-level packaging according to an embodiment of the present invention.

[0032] Figure 2 FIG. is a schematic cross-sectional view of a piezoelectric substrate device provided by an embodiment of the present invention.

[0033] Figure 3 FIG. is a schematic cross-sectional view of a device after forming a sacrificial material layer provided by an embodiment of the present invention.

[0034] Figure 4 FIG. is a schematic cross-sectional view of a device after forming a first opening provided by an embodiment of the present invention.

[0035] Figure 5 FIG. is a schematic top view of a device after forming a first opening provided by an embodiment of the present invention.

[0036] Figure 6 FIG. is a schematic cross-sectional view of a device after forming a barrier layer provided by an embodiment of the present invention.

[0037] Figure 7 FIG. is a schematic cross-sectional view of a device after forming a second opening provided by an embodiment of the present invention.

[0038] Figure 8 FIG. is a schematic cross-sectional view of a device after forming a conductive post provided by an embodiment of the present invention.

[0039] Figure 9 FIG. is a schematic cross-sectional view of a device after forming a cavity structure provided by an embodiment of the present invention.

[0040] Figure 10 FIG. is a schematic cross-sectional view of a device after forming a bump provided by an embodiment of the present invention.

[0041] Figure 11 FIG. is a schematic cross-sectional view of a device after forming a redistribution layer and a bump provided by an embodiment of the present invention.

[0042] Among them, the reference numerals are explained as follows:

[0043] 100 - Piezoelectric substrate; 110 - Interdigital transducer; 120 - Electrode; 130 - Sacrificial material layer; 132 - Sacrificial layer; 140 - First opening; 150 - Barrier layer; 152 - First barrier layer; 154 - Second barrier layer; 160 - Second opening; 170 - Conductive pillar; 180 - Porosity; 190 - Cavity structure; 200 - Redistribution layer; 210 - Bump. Detailed implementation manners

[0044] The following further describes in detail the surface acoustic wave filter for wafer - level packaging and its manufacturing method proposed by the present invention in conjunction with the accompanying drawings and specific embodiments. According to the following description, the advantages and features of the present invention will be clearer. It should be noted that the accompanying drawings are all in very simplified forms and use non - precise scales, only for the purpose of facilitating and clearly assisting in explaining the objectives of the embodiments of the present invention.

[0045] The terms used in the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. Unless otherwise defined in this application document, the technical terms or scientific terms used in the present invention should be the ordinary meanings understood by those of ordinary skill in the field to which the present invention pertains. The "first", "second" and similar terms used in the specification and claims of the present invention do not denote any order, quantity or importance, but are only used to distinguish different components. Similarly, the terms such as "a" or "an" do not denote a quantity limitation, but mean that there is at least one. "Plurality" or "several" means two or more. Unless otherwise indicated, the terms such as "upper / upper layer" and / or "lower / lower layer" are only for convenience of description and are not limited to a position or a spatial orientation. The terms such as "comprising" or "including" mean that the elements or structures appearing before "comprising" or "including" cover the elements or structures listed after "comprising" or "including" and their equivalents, and do not exclude other elements or structures. The terms such as "connected" or "coupled" are not limited to physical or mechanical connections, and may include electrical connections, whether direct or indirect. The singular forms of "a", "the" and "said" used in the specification and appended claims of the present invention are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the term "and / or" used herein refers to and includes any and all possible combinations of one or more of the associated listed items.

[0046] The core idea of the present invention is to provide a wafer-level packaged surface acoustic wave filter and a manufacturing method thereof. A cavity structure is formed through a barrier layer. Among them, the first barrier layer can serve as the cover of the cavity structure, and the second barrier layer and the sacrificial layer can serve as the walls of the cavity structure. Since there are more walls supporting the cover, the reliability of the support can be improved, and the collapse of the cavity structure can be avoided. Further, the first barrier layer and the second barrier layer are connected, and they are made of the same material, so the connection reliability is higher. Thus, the stability and reliability of the cavity structure can be further improved, the problems of cavity structure collapse and interdigital transducer failure can be avoided, and the quality and reliability of the formed wafer-level packaged surface acoustic wave filter are improved.

[0047] First, please refer to Figure 1 , which is a schematic flowchart of the manufacturing method of the wafer-level packaged surface acoustic wave filter according to an embodiment of the present invention. As Figure 1 shown, in the embodiment of the present application, the manufacturing method of the wafer-level packaged surface acoustic wave filter mainly includes the following steps:

[0048] S10: Provide a piezoelectric substrate, on which an interdigital transducer and an electrode are formed;

[0049] S12: Form a sacrificial material layer on the piezoelectric substrate, and the sacrificial material layer covers the interdigital transducer, the electrode, and the piezoelectric substrate;

[0050] S14: Form a first opening in the sacrificial material layer, and the first opening penetrates through the sacrificial material layer;

[0051] S16: Form a barrier layer on the sacrificial material layer, and the barrier layer also fills the first opening. The barrier layer includes a connected first barrier layer and a second barrier layer. The first barrier layer is located on the sacrificial material layer, and the second barrier layer is located in the first opening;

[0052] S18: Form a second opening in the barrier layer, and the second opening penetrates through the barrier layer and extends through the sacrificial material, and the second opening exposes the electrode;

[0053] S20: Fill a conductive pillar in the second opening, and the conductive pillar is connected to the electrode;

[0054] S22: Form pores in the barrier layer, and the pores penetrate through the barrier layer; and,

[0055] S24: Inject an etching solution through the pores to remove the sacrificial material layer enclosed by the first barrier layer and the second barrier layer, and make the first barrier layer and the second barrier layer form a cavity structure, and the interdigital transducer is located in the cavity structure.

[0056] Specifically, please refer to Figures 2 to 11 , which is a schematic diagram of a device formed by the manufacturing method of the surface acoustic wave filter for wafer-level packaging according to the embodiments of the present invention.

[0057] As Figure 2 shown, in the embodiments of the present application, first, a piezoelectric substrate 100 is provided, and an interdigital transducer 110 and an electrode 120 are formed on the piezoelectric substrate 100. Among them, the piezoelectric substrate 100 can be a single-layer structure or a multi-layer stacked structure. In an embodiment of the present application, the piezoelectric substrate 100 may only include a piezoelectric layer, and the material of the piezoelectric layer may be, for example, LT (lithium tantalate), LN (lithium niobate), AlN (aluminum nitride), PZT (lead zirconate titanate piezoelectric ceramic), or ZnO (zinc oxide), etc. In another embodiment of the present application, the piezoelectric substrate 100 may include a piezoelectric layer, and further may include a substrate layer, a trap layer, and / or a dielectric layer. For example, the piezoelectric substrate 100 may include a piezoelectric layer, a substrate layer, and a dielectric layer, where the dielectric layer is located on the substrate layer, and the piezoelectric layer is located on the dielectric layer; or, the piezoelectric substrate 100 may include a piezoelectric layer, a substrate layer, a trap layer, and a dielectric layer, where the trap layer is located on the substrate layer, the dielectric layer is located on the trap layer, and the piezoelectric layer is located on the dielectric layer. Further, the material of the substrate layer may be, for example, silicon; the material of the trap layer may be, for example, polysilicon; the material of the dielectric layer may be, for example, silicon dioxide, silicon nitride, etc.

[0058] Among them, the interdigital transducer 110 and the electrode 120 are made of a conductive material. In the embodiments of the present application, the interdigital transducer 110 and the electrode 120 are made of the same material, which is a metal, specifically, for example, gold, silver, aluminum, copper, tungsten, titanium, nickel, a metal alloy, etc.; in other embodiments of the present application, the interdigital transducer 110 and the electrode 120 may also be made of different materials, and both may be selected from gold, silver, aluminum, copper, tungsten, titanium, nickel, a metal alloy, etc.

[0059] Further, the interdigital transducer 110 and the electrode 120 may also be formed simultaneously in the same process step, or formed separately in different process steps. For example, the interdigital transducer 110 and the electrode 120 may be formed simultaneously by processes such as sputtering, electroplating, etc. Among them, the interdigital transducer 110 and the electrode 120 have the same thickness.

[0060] Please refer to Figure 3, in the embodiment of the present application, then, a sacrificial material layer 130 is formed on the piezoelectric substrate 100, and the sacrificial material layer 130 covers the interdigital transducer 110, the electrode 120, and the piezoelectric substrate 100. Specifically, the sacrificial material layer 130 can be formed by a deposition process. Among them, the material of the sacrificial material layer 130 can be, for example, a porous oxide, which is easy to be etched. Preferably, the sacrificial material layer 130 has a very high etching selectivity with respect to the interdigital transducer 110. For example, the etching selectivity of the sacrificial material layer 130 with respect to the interdigital transducer 110 is greater than or equal to 10:1.

[0061] Then, as Figure 4 and Figure 5 shown, a first opening 140 is formed in the sacrificial material layer 130, and the first opening 140 penetrates through the sacrificial material layer 130. Specifically, the first opening 140 can be formed by an etching process. In the embodiment of the present application, the first opening 140 exposes a part of the electrode 120. In other embodiments of the present application, the first opening 140 exposes the piezoelectric substrate 100 between the electrode 120 and the interdigital transducer 110.

[0062] Among them, the first opening 140 is annular along the shape of the surface of the piezoelectric substrate 100. As Figure 5 shown, in the embodiment of the present application, the first opening 140 is square-annular; in other embodiments of the present application, the first opening 140 can also be in other shapes, such as circular-annular, elliptical-annular, triangular-annular, or irregular-annular, etc.

[0063] Next, please refer to Figure 6 , a barrier layer 150 is formed on the sacrificial material layer 130, and the barrier layer 150 also fills the first opening 140. Here, the barrier layer 150 includes a first barrier layer 152 on the sacrificial material layer 130 and a second barrier layer 154 in the first opening 140, that is, the second barrier layer 154 penetrates into the sacrificial material layer 130, and the first barrier layer 152 and the second barrier layer 154 are connected. Here, the second barrier layer 154 extends from the first barrier layer 152 towards the piezoelectric substrate 100 to the surface of the electrode 120. In other embodiments of the present application, the second barrier layer 154 can also extend from the first barrier layer 152 towards the piezoelectric substrate 100 to the surface of the piezoelectric substrate 100 between the electrode 120 and the interdigital transducer 110.

[0064] Preferably, the sacrificial material layer 130 has a high etching selectivity with respect to the barrier layer 150. For example, the etching selectivity of the sacrificial material layer 130 with respect to the barrier layer 150 is greater than or equal to 5:1. For example, the material of the barrier layer 150 can be silicon nitride or the like.

[0065] Please refer to Figure 7 , in the embodiment of the present application, then, a second opening 160 is formed in the barrier layer 150, and the second opening 160 penetrates through the barrier layer 150 and extends through the sacrificial material layer 130, and the second opening 160 exposes the electrode 120. That is, in the embodiment of the present application, the second opening 160 penetrates through the first barrier layer 152 and the sacrificial material layer 160 to expose the electrode 120. Specifically, the second opening 160 can be formed by an etching process.

[0066] Next, as Figure 8 shown, a conductive pillar 170 is filled in the second opening 160, and the conductive pillar 170 is connected to the electrode 120. Specifically, a titanium seed layer can be sputtered in the second opening 160 first, and then a copper metal layer is electroplated on the titanium seed layer to form the conductive pillar 170.

[0067] In the embodiment of the present application, then, pores 180 are formed in the barrier layer 150, and the pores 180 penetrate through the barrier layer 150. Specifically, the pores 180 can be formed by an etching process. Among them, the pores 180 are a micro-structure. Preferably, the size of the pores 180 along the surface of the piezoelectric substrate 100 is between 2 μm and 8 μm. Thus, an etching solution can be injected through the pores 180 to form a cavity structure. However, during the encapsulation process, only a little encapsulant will enter due to capillary action and cannot completely enter to touch the interdigital transducer, that is, the interdigital transducer will not be contaminated during the encapsulation process. Among them, the pores 180 can be formed by an etching process.

[0068] Next, as Figure 9As shown, etchant is injected through the pores 180 to remove the sacrificial material layer 130 enclosed by the first barrier layer 152 and the second barrier layer 154 to form the sacrificial layer 132, and the first barrier layer 152 and the second barrier layer 154 form a cavity structure 190. Among them, the interdigital transducer 110 is located within the cavity structure 190. In the embodiment of the present application, etchant is injected through the pores 180 to remove the sacrificial material layer 130 enclosed by the first barrier layer 152, the second barrier layer 154, and the piezoelectric substrate 100, and the first barrier layer 152 is suspended above the interdigital transducer 110, thereby forming the cavity structure 190. Further, the injected etchant can be removed by a volatilization process or a pouring process.

[0069] In the embodiment of the present application, the second barrier layer 154 restricts the etchant from the side position, avoiding damage to the conductive column 170 by the etchant, and improving the quality of the formed cavity structure 190. Further, the first barrier layer 152 and the second barrier layer 154 are connected, and the two have the same material, and the connection reliability is higher, so that the stability and reliability of the formed cavity structure 190 can be further improved, avoiding problems such as the collapse of the cavity structure and the failure of the interdigital transducer, and improving the quality and reliability of the formed surface acoustic wave filter of the wafer-level package.

[0070] Please refer to Figure 10 , in the embodiment of the present application, further, bumps 210 can be formed on the conductive column 170, and the bumps 210 are connected to the conductive column 170. Among them, the material of the bumps 210 can be, for example, tin.

[0071] Please continue to refer to Figure 9, thus obtaining a surface acoustic wave filter of wafer-level packaging, which includes: a piezoelectric substrate 100, on which interdigital transducers 110 and electrodes 120 are formed; a sacrificial layer 132, which is located on the piezoelectric substrate 100 and covers part of the piezoelectric substrate 100, and exposes the interdigital transducers 110 and at least part of the electrodes 120; a barrier layer 150, in which there are through pores 180, the barrier layer 150 includes a connected first barrier layer 152 and a second barrier layer 154, the first barrier layer 152 is located on the sacrificial layer 132, the second barrier layer 154 extends towards the piezoelectric substrate 100, the first barrier layer 152 and the second barrier layer 154 form a cavity structure 190, and the interdigital transducers 110 are located in the cavity structure 190; and a conductive pillar 170, which passes through the barrier layer 150 and the sacrificial layer 132 and is connected to the electrode 120. Further, it may also include bumps 210, which are located on the conductive pillar 170 and are connected to the conductive pillar 170.

[0072] Among them, the size of the pore 180 along the surface of the piezoelectric substrate 100 is between 2μm and 8μm. In the embodiment of the present application, the shape of the second barrier layer 154 along the surface of the piezoelectric substrate 100 is annular, specifically square-annular; the second barrier layer 154 extends towards the piezoelectric substrate 100 to the surface of the electrode 120. In other embodiments of the present application, the shape of the second barrier layer 154 along the surface of the piezoelectric substrate 100 may also be other shapes, such as circular ring, etc.; the second barrier layer 154 may also extend towards the piezoelectric substrate 100 to the surface of the piezoelectric substrate 100 between the electrode 120 and the interdigital transducer 110.

[0073] Please refer to Figure 11 , in another embodiment of the present application, after forming the cavity structure 190, the manufacturing method of the surface acoustic wave filter of wafer-level packaging may further include: forming a redistribution layer 200 on the barrier layer 150, the redistribution layer 200 is connected to the conductive pillar 170, and filling a conductive material in the pore 180. Specifically, a conductive material layer (not shown in the figure) may be deposited on the barrier layer 150, wherein part of the conductive material layer penetrates into the pore 180 to fill the pore 180 with the conductive material; then, the conductive material layer is etched to form the redistribution layer 200. In the embodiment of the present application, the material of the redistribution layer 200 is metal, such as copper, gold, silver, etc.

[0074] Further, bumps 210 may be formed on the redistribution layer 200, and the bumps 210 are connected to the redistribution layer 200. Among them, the material of the bumps 210 may be, for example, tin.

[0075] Correspondingly, the surface acoustic wave filter of the wafer-level package further includes: a redistribution layer 200, the redistribution layer 200 is located on the barrier layer 150 and is connected to the conductive posts 170; and, bumps 210, the bumps 210 are located on the redistribution layer 200 and are connected to the redistribution layer 200. In the embodiment of the present application, the pores 180 are filled with a conductive material.

[0076] In the surface acoustic wave filter of the wafer-level package and the manufacturing method thereof provided in the embodiment of the present application, a cavity structure is formed through the barrier layer. Among them, the first barrier layer can be used as the cover of the cavity structure, and the second barrier layer and the sacrificial layer can be used as the walls of the cavity structure. Since there are more walls supporting the cover, the reliability of the support can be improved, and the collapse of the cavity structure can be avoided; further, the first barrier layer and the second barrier layer are connected, and the two have the same material, so the connection reliability is higher, thereby further improving the stability and reliability of the cavity structure, avoiding the problems of cavity structure collapse and interdigital transducer failure, and improving the quality and reliability of the formed surface acoustic wave filter of the wafer-level package.

[0077] In the present application, the reference to "one embodiment" or "some embodiments" means that the features, structures, or characteristics described in connection with the embodiment are included in at least one embodiment or at least some embodiments of the present application. Therefore, the appearances of the phrases "in one embodiment" or "in some embodiments" throughout the present application are not necessarily referring to the same or the same embodiments. In addition, in one or more embodiments, the features, structures, or characteristics may be combined in any suitable combination and / or sub-combination.

[0078] Although some specific embodiments of the present application have been described in detail by way of examples, those skilled in the art should understand that the above examples are only for illustration and not for limiting the scope of the present application. The embodiments of the present application can be combined arbitrarily without departing from the spirit and scope of the present application. Those skilled in the art should also understand that various modifications can be made to the embodiments without departing from the scope and spirit of the present application. The scope of the present application is defined by the appended claims.

Claims

1. A surface acoustic wave filter for wafer-level packaging, characterized in that The surface acoustic wave filter of wafer-level packaging includes: A piezoelectric substrate, on which interdigital transducers and electrodes are formed; A sacrificial layer, which is located on the piezoelectric substrate, covers part of the piezoelectric substrate, and exposes the interdigital transducers and at least part of the electrodes; A barrier layer, which has through pores. The barrier layer includes a connected first barrier layer and a second barrier layer. The first barrier layer is located on the sacrificial layer, and the second barrier layer extends towards the piezoelectric substrate. The first barrier layer and the second barrier layer form a cavity structure, and the interdigital transducers are located within the cavity structure; and, A conductive post, which passes through the barrier layer and the sacrificial layer and is connected to the electrode.

2. The surface acoustic wave filter of the wafer-level package according to claim 1, characterized in that, The size of the pores along the surface of the piezoelectric substrate is between 2μm and 8μm.

3. The surface acoustic wave filter of wafer-level packaging according to claim 1, characterized in that The pores are filled with a conductive material.

4. The surface acoustic wave filter of the wafer-level package according to claim 3, characterized in that The surface acoustic wave filter of wafer-level packaging further includes: A redistribution layer, which is located on the barrier layer and is connected to the conductive post; and, A bump, which is located on the redistribution layer and is connected to the redistribution layer.

5. The surface acoustic wave filter with wafer-level packaging according to any one of claims 1 to 4, characterized in that, The shape of the second barrier layer along the surface of the piezoelectric substrate is annular.

6. The surface acoustic wave filter of wafer-level packaging according to any one of claims 1 to 4, characterized in that, The second barrier layer extends to the surface of the electrode; or, the second barrier layer extends to the surface of the piezoelectric substrate between the electrode and the interdigital transducer.

7. A manufacturing method of a surface acoustic wave filter for wafer-level packaging, characterized in that, The manufacturing method of the surface acoustic wave filter of wafer-level packaging includes: Providing a piezoelectric substrate, on which interdigital transducers and electrodes are formed; Forming a sacrificial material layer on the piezoelectric substrate, and the sacrificial material layer covers the interdigital transducers, the electrodes and the piezoelectric substrate; Forming a first opening in the sacrificial material layer, and the first opening penetrates through the sacrificial material layer; Forming a barrier layer on the sacrificial material layer, and the barrier layer also fills the first opening. The barrier layer includes a connected first barrier layer and a second barrier layer. The first barrier layer is located on the sacrificial material layer, and the second barrier layer is located in the first opening; Forming a second opening in the barrier layer, and the second opening penetrates through the barrier layer and extends through the sacrificial material layer, and the second opening exposes the electrode; Filling a conductive post in the second opening, and the conductive post is connected to the electrode; Forming pores in the barrier layer, and the pores penetrate through the barrier layer; and, Injecting an etching solution through the pores to remove the sacrificial material layer enclosed by the first barrier layer and the second barrier layer, and enabling the first barrier layer and the second barrier layer to form a cavity structure, and the interdigital transducers are located within the cavity structure.

8. The manufacturing method of the surface acoustic wave filter with wafer-level packaging as claimed in claim 7, characterized in that, The manufacturing method of the surface acoustic wave filter of wafer-level packaging further includes: Forming a redistribution layer on the barrier layer, the redistribution layer is connected to the conductive post, and filling a conductive material in the pores.

9. The manufacturing method of the surface acoustic wave filter with wafer-level packaging according to claim 7 or 8, characterized in that Using an etching process to form pores in the barrier layer, and the pores penetrate through the barrier layer.

10. The manufacturing method of the surface acoustic wave filter with wafer-level packaging as claimed in claim 7 or 8, characterized in that A first opening is formed in the sacrificial material layer by an etching process, and the first opening exposes part of the electrode, or the first opening exposes the piezoelectric substrate between the electrode and the interdigital transducer; The first opening is annular along the shape of the surface of the piezoelectric substrate.

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