Cable for routing signals in a system without backplane

Abstract

An apparatus, system, and method for signal routing in a system lacking a backplane. An apparatus includes an interface card and a cable having: a first connector configured to couple with a storage drive via the interface card; a second connector configured to be coupled with a mother board; and a third connector configured to couple with a memory controller located outside of the motherboard. A cable routes control signals and data signals between the storage drive, the storage controller, and the motherboard.

Description

Technical Field

[0001] The subject matter disclosed herein relates to storage drives, and more particularly to a backplane-less storage bay having a passive cable connecting a motherboard, a storage drive, and a storage controller. Background Art

[0002] A "backplane" card refers to, for example, a set of electrical connectors formed on a printed circuit board ("PCB") for linking a computer expansion card such as a storage drive to the motherboard of a system unit. The backplane card is typically inserted into a slot on the motherboard. Servers typically have backplane cards for attaching storage drives (e.g., hard disk drives and / or solid state drives). Workstations may also have backplane cards for attaching hot-swappable storage drives. However, backplane cards do not support a wide variety of storage drives, but may only support several different drive types with both connectors mounted on the backplane. These "flexible" drive bays still use backplane cards, and the cost of the backplane increases as it supports more drive types. Summary of the Invention

[0003] Techniques are disclosed for routing signals via a data cable in a system lacking a backplane. The techniques may be implemented by an apparatus, a system, a method, or a computer program product.

[0004] According to one aspect, an apparatus supporting techniques for routing signals via a data cable in a system lacking a backplane includes an interface card and a passive cable. The passive cable includes: a first connector configured to be coupled to a storage drive via the interface card, a second connector configured to be coupled to a motherboard, and a third connector configured to be coupled to a remote storage controller located outside the motherboard, wherein the passive cable routes control signals and data signals between the storage drive, the storage controller, and the motherboard.

[0005] According to another aspect, a system supporting techniques for routing signals via a data cable in a system lacking a backplane includes: a motherboard, a storage controller located outside the motherboard, a storage bay lacking a backplane card, a storage drive located in the storage bay, and a cable communicatively coupled to the motherboard, the storage controller, and the storage drive. In various embodiments, the cable includes: a first connector configured to be coupled to the storage drive, a second connector configured to be coupled to the motherboard, and a third connector configured to be coupled to the storage controller, wherein the cable routes control signals and data signals between the storage drive, the storage controller, and the motherboard.

[0006] According to a third aspect, a method for routing signals via a data cable in a system lacking a backplane includes: coupling at least one storage drive located in a storage bay via a first connector of the cable; and coupling a motherboard via a second connector of the cable. The method may include coupling a storage controller located outside the motherboard via a third connector of the cable and routing control signals and data signals between the storage drive, the storage controller, and the motherboard. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] A more specific description of the embodiments briefly described above will be presented by reference to specific embodiments shown in the drawings. It should be understood that these drawings depict only some embodiments and are therefore not to be considered limiting of the scope. The embodiments will be described and illustrated with additional features and details by using the drawings, in which:

[0008] Figure 1 FIG. 1 shows an example of a system supporting techniques for routing signals via a data cable in a system lacking a backplane, in accordance with aspects of the present disclosure;

[0009] Figure 2 FIG. 2 shows an example of a high-speed cable assembly supporting techniques for routing signals via a data cable in a system lacking a backplane, in accordance with aspects of the present disclosure;

[0010] Figure 3 FIG. 3 shows an example of an arrangement of a backplane-less system supporting techniques for routing signals via a data cable in a system lacking a backplane, in accordance with aspects of the present disclosure;

[0011] Figure 4 FIG. 4 shows an example of apparatus techniques supporting techniques for routing signals via a data cable in a system lacking a backplane, in accordance with aspects of the present disclosure;

[0012] Figure 5 FIG. 5 shows an example of an adapter card supporting techniques for routing signals via a data cable in a system lacking a backplane, in accordance with aspects of the present disclosure;

[0013] Figure 6 FIG. 6 shows an example of an arrangement supporting techniques for routing signals via a data cable in a system lacking a backplane, in accordance with aspects of the present disclosure;

[0014] Figure 7 FIG. 7 shows an example of an arrangement supporting techniques for routing signals via a data cable in a system lacking a backplane, in accordance with aspects of the present disclosure; and

[0015] Figure 8Shows an example of an apparatus supporting techniques for signal routing via a data cable in a system lacking a backplane, in accordance with aspects of the present disclosure;

[0016] Figure 9 Shows an example of an arrangement supporting techniques for signal routing via a data cable in a system lacking a backplane, in accordance with aspects of the present disclosure;

[0017] Figure 10 Shows an example of a representative method for signal routing via a data cable in a system lacking a backplane, in accordance with aspects of the present disclosure; and

[0018] Figure 11 Shows an example of a representative method for routing control signals and data signals, in accordance with aspects of the present disclosure. Detailed Description

[0019] As will be understood by those skilled in the art, aspects of the embodiments may be implemented as a system, method, or program product. Accordingly, embodiments may take the form of an entirely hardware embodiment, an entirely software embodiment (including firmware, resident software, microcode, etc.), or an embodiment combining software and hardware aspects that may generally be referred to herein as a "circuit," "module," or "system." In addition, embodiments may take the form of a program product implemented in one or more computer-readable storage devices storing machine-readable code, computer-readable code, and / or program code hereinafter referred to as code. The storage device may be tangible, non-transitory, and / or non-transmissive. The storage device may not contain a signal. In some embodiments, the storage device merely takes the form of a signal for accessing the code.

[0020] Many of the functional units described in this specification are labeled as modules to more particularly emphasize the implementation independence of the functional units. For example, a module may be implemented as a hardware circuit including custom very large scale integration ("VLSI") circuits or gate arrays, off-the-shelf semiconductors such as logic chips, transistors, or other discrete components. A module may also be implemented in programmable hardware devices such as field programmable gate arrays ("FPGAs"), programmable logic arrays ("PLAs"), programmable logic devices, and the like.

[0021] The module can also be implemented in code and / or software for execution by various types of processors. The identified code modules can include, for example, one or more physical or logical blocks of executable code, which can be organized, for example, as objects, procedures, or functions. However, the executable bodies of the identified modules need not be physically placed together, but may include different instructions stored in different locations, which, when logically connected together, constitute the module and achieve the stated purpose of the module.

[0022] In fact, a code module can be a single instruction or multiple instructions, and can even be distributed over several different code segments, distributed among different programs, and distributed across several storage devices. Similarly, operational data can be identified and shown within a module herein, and the operational data can be implemented in any suitable form and can be organized within any suitable type of data structure. The operational data can be aggregated as a single data set, or can be distributed over different locations, including being distributed over different computer-readable storage devices. In cases where a module or a portion of a module is implemented in software, the software portion is stored on one or more computer-readable storage devices.

[0023] Any combination of one or more computer-readable media can be utilized. The computer-readable media can be computer-readable storage media. The computer-readable storage media can be a storage device that stores code. The storage device can be, for example but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, holographic, micro-mechanical, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing.

[0024] More specific examples (a non-exhaustive list) of storage devices will include the following: an electrical connection having one or more wires, a portable computer disk, a hard disk, a random access memory (“RAM”), a read-only memory (“ROM”), an erasable programmable read-only memory (“EPROM”), an electrically erasable programmable read-only memory (“EEPROM”), a flash memory, a static random access memory (“SRAM”), a portable compact disk read-only memory (“CD-ROM”), a digital versatile disk (“DVD”), a memory stick, a floppy disk, a mechanical encoding device such as a punched card or raised structures in grooves recorded with instructions thereon, and any suitable combination of the foregoing. As used herein, a computer-readable storage medium is not construed to be a transient signal per se, such as a radio wave or other freely propagating electromagnetic wave, an electromagnetic wave propagating through a waveguide, or other transmission media (e.g., an optical pulse passing through an optical fiber cable) or an electrical signal transmitted through a wire.

[0025] The computer-readable program instructions described herein can be downloaded to a respective computing / processing device from a computer-readable storage medium or downloaded to an external computer or external storage device via a network (e.g., the Internet, a local area network, a wide area network, and / or a wireless network). The network can include copper transmission cables, optical transmission fibers, wireless transmission, routers, firewalls, switches, gateway computers, and / or edge servers. A network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and forwards the computer-readable program instructions for storage in a computer-readable storage medium within the respective computing / processing device.

[0026] The computer-readable program instructions for carrying out operations of the present invention may be assembly instructions, instruction set architecture (“ISA”) instructions, machine instructions, machine-related instructions, microcode, firmware instructions, state-setting data, or source code or object code written in any combination of one or more programming languages—including object-oriented programming languages such as Smalltalk, C++, etc. and conventional procedural programming languages such as the “C” programming language or similar programming languages. The computer-readable program instructions may be executed entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer, or entirely on the remote computer or server. In the case of execution entirely on the remote computer or server, the remote computer may be connected to the user's computer through any type of network including a local area network (“LAN”), a wireless LAN (“WLAN”), or a wide area network (“WAN”) or by a connection to an external computer (e.g., through the Internet using an Internet service provider (“ISP”)). In some embodiments, an electronic circuit including, for example, a programmable logic circuit, an FPGA, or a PLA may execute the computer-readable program instructions by utilizing state information of the computer-readable program instructions to personalize the electronic circuit to perform aspects of the present invention.

[0027] Furthermore, the features, structures, or characteristics of the described embodiments may be combined in any suitable manner. In the following description, numerous specific details are provided, such as examples of programming, software modules, user selections, network transactions, database queries, database structures, hardware modules, hardware circuits, hardware chips, etc., to provide a thorough understanding of the embodiments. However, those skilled in the relevant art will recognize that the embodiments may be practiced without one or more of the specific details, or with other methods, components, materials, etc. In other instances, well-known structures, materials, or operations are not shown or described in detail to avoid obscuring aspects of the embodiments.

[0028] Throughout this specification, references to "one embodiment", "an embodiment", or similar language mean that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment. Thus, the appearances of the phrases "in one embodiment", "in an embodiment", and similar language throughout this specification may, but do not necessarily, all refer to the same embodiment, but rather mean "one or more but not all embodiments", unless expressly stated otherwise. The terms "comprising", "including", "having", and variations thereof mean "including but not limited to", unless expressly stated otherwise. Unless expressly stated otherwise, a list of enumerated items does not imply any or all of the items are mutually exclusive. Unless expressly stated otherwise, the terms "a", "an", and "the" also refer to "one or more".

[0029] As used herein, a list with the conjunction "and / or" includes any single item in the list or a combination of items in the list. For example, the list of A, B, and / or C includes only A, only B, only C, the combination of A and B, the combination of B and C, the combination of A and C, or the combination of A, B, and C. As used herein, a list using the term "one or more of..." includes any single item in the list or a combination of items in the list. For example, one or more of A, B, and C includes only A, only B, only C, the combination of A and B, the combination of B and C, the combination of A and C, or the combination of A, B, and C. As used herein, a list using the term "one of..." includes one and only one of any single item in the list. For example, "one of A, B, and C" includes only A, only B, or only C and does not include the combination of A, B, and C. As used herein, "a member selected from the group consisting of A, B, and C" includes one and only one of A, B, or C and does not include the combination of A, B, and C. As used herein, "a member selected from the group consisting of A, B, and C and combinations thereof" includes only A, only B, only C, the combination of A and B, the combination of B and C, the combination of A and C, or the combination of A, B, and C.

[0030] Aspects of the embodiments are described below with reference to the flowchart illustrations and / or block diagrams of methods, apparatuses, systems, and program products according to the embodiments. It will be understood that each block in the schematic flowchart and / or schematic block diagram, and combinations of blocks in the schematic flowchart and / or schematic block diagram, can be implemented by code or computer-readable program instructions.

[0031] The code (e.g., computer-readable program instructions) can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing apparatus to produce a machine such that the instructions executed via the processor of the computer or other programmable data processing apparatus create means for implementing the functions / actions specified in one or more of the blocks of the flowchart and / or block diagram.

[0032] Code (e.g., computer-readable program instructions) can also be stored in a computer-readable storage medium that can direct a computer, a programmable data processing apparatus, and / or other devices to function in a particular manner, such that the computer-readable storage medium storing the instructions comprises an article of manufacture that includes instructions for implementing aspects of the functions / actions specified in one or more boxes of the flowchart and / or block diagram.

[0033] Code (e.g., computer-readable program instructions) can also be loaded onto a computer, other programmable data processing apparatus, or other devices to cause a series of operational steps to be performed on the computer, other programmable apparatus, or other devices to generate a computer-implemented process, such that the instructions executed on the computer, other programmable apparatus, or other devices implement the functions / actions specified in one or more boxes of the flowchart and / or block diagram.

[0034] The call flowcharts, flowcharts, and / or block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of apparatus, systems, methods, and program products according to various embodiments. In this regard, each box in the flowchart and / or block diagram can represent a module, segment, or portion of code that includes one or more executable instructions for implementing the specified logical function.

[0035] It should also be noted that in some alternative implementations, the functions noted in the boxes may not occur in the order noted in the figures. For example, two boxes shown in succession may in fact be executed substantially concurrently, or the boxes may sometimes be executed in the reverse order, depending upon the functionality involved. Other steps and methods may be conceived that are equivalent in function, logic, or effect to one or more boxes or portions thereof of the figures shown.

[0036] Although various arrow types and line types may be employed in the call flow, flowchart, and / or block diagram, they are understood not to limit the scope of the corresponding embodiments. In fact, some arrows or other connection symbols may be used to indicate only the logical flow of the depicted embodiment. For example, an arrow may indicate a waiting or monitoring period of unspecified duration between the recited steps of the depicted embodiment. It will also be noted that each box of the block diagram and / or flowchart, and combinations of boxes in the block diagram and / or flowchart, can be implemented by a system based on dedicated hardware that performs the specified function or action, or by a combination of dedicated hardware and code.

[0037] The description of the elements in each figure may refer to the elements of the previous figure. In all figures of alternative embodiments that include similar elements, like reference numerals refer to like elements.

[0038] Generally, the present disclosure describes apparatuses, systems, and methods that support techniques for routing signals via a data cable in a system lacking a backplane. In some embodiments, the methods may be implemented using computer code embedded on a computer-readable medium. In some embodiments, an apparatus or system may include a computer-readable medium containing computer-readable code that, when executed by a processor, causes the apparatus or system to perform at least a portion of the solutions described below.

[0039] Current backplane card solutions have several key issues with respect to workstation designs with new front-access, hot-swap bays. First, the backplane does not support a wide variety of storage drives, but may only support a few different drive types with both connectors mounted on the backplane. These “flexible” drive bays still use backplane cards, and the cost of the backplane increases as it supports more drive types.

[0040] Second, the additional backplane PCB material increases electrical losses and reduces signal trace length. For higher speed signals such as Peripheral Component Interconnect Express (“PCIe”) Gen5 and Gen6 bus speeds, longer signal trace lengths are required. Third, the backplane is typically a large PCB card that takes up the required space in the storage bay area of the rack. Fourth, the backplane PCB card represents a large cost increase for designs with additional PCB card material and solder assemblies, as well as the test cost for individual cards.

[0041] Aspects of the present disclosure disclose techniques for reducing the cost and complexity of a hybrid workstation using a front-access hot-swap storage bay. Specifically, the backplane card can be removed and replaced with a solution that uses:

[0042] First, conventional backplane control circuits are located on the motherboard (or PCIe insert card). Examples of relocated circuits include, but are not limited to: storage slot controllers, hot-swap circuits, LED circuits, Inter-Integrated Circuit (“I2C”) sideband / service processors, etc. As an extension of this first solution, the storage controller (e.g., PCIe storage controller and / or RAID adapter card) can be located outside the motherboard (but still within the system unit enclosure).

[0043] Second, high-speed cables are used to route signals (e.g., data signals, control signals, sideband signals) to the correct locations. More specifically, a passive cable design with 3 connector ends (i.e., no electronics, just wires) can be used to route data signals, control signals, and sideband signals between the motherboard, storage device, and storage controller.

[0044] Third, a smaller daughter card (also referred to as an "interface card" or "connector card") with a connector (but without a controller) can be used to adapt multiple drive types to a cable. For example, one end of the daughter card has a first connector for connecting (e.g., physically and electrically) to a high-speed cable and one or more second connectors for connecting to a corresponding number of storage drives. In the following description, a daughter card with two Non-Volatile Memory Express ("NVME") slots is described; however, in other embodiments, more or fewer storage drive connections can be included on the daughter card. It is important to note that in order to minimize the space / volume occupied by the cables and the daughter card within the storage enclosure, the size of the daughter card should be reduced.

[0045] Fourth, the daughter card can be eliminated by forming a passive cable to utilize the same connector type as common or emerging NVME drive types to completely eliminate the daughter card for the most modern NVME solid-state drives. For example, at the time of the invention, enterprise and data center standard form factor ("EDSFF") drive types have recently emerged in the market, and the latest NVME storage devices use EDSFF-defined formats such as the E1.S format or the E3.S format. Thus, the passive cable can include socket connectors for E1.S or E3.S drives, eliminating the need for a daughter card.

[0046] E1.S is a relatively new flash form factor defined under the EDSFF specification. The E1.S form factor is becoming common for high-capacity and hot-pluggable NVME storage devices. The form factors included in the EDSFF specification are E1.S (short), E1.L (long), E3.S (short), and E3.L (long). The EDSFF specification defines the physical dimensions, mechanical connectors, and electrical interfaces that an E1.S device will have to ensure compatibility between different hardware providers. The E1.S standard is intended to replace the previous generation of solid-state storage device form factors, such as the M.2 standard. While M.2 devices are popular at the time of writing, it is expected that server manufacturers and vendors will quickly move to the new E1.S form factor. However, M.2 devices may remain in the desktop space for a longer time due to their lower cost.

[0047] Apparatus, systems, and methods are disclosed that support techniques for routing signals via a data cable in a system lacking a backplane. According to one aspect of the present disclosure, an apparatus may include an interface card and a passive cable, the passive cable including: A) a first connector configured to couple to a storage drive via the interface card; B) a second connector configured to couple to a motherboard; and C) a third connector configured to couple to a remote storage controller located outside the motherboard, wherein the passive cable routes control signals and data signals between the storage drive, the remote storage controller, and the motherboard.

[0048] In some embodiments, the passive cable routes one or more I2C sideband signals between the storage drive and a service processor located on the motherboard. In some embodiments, the first connector is configured to support two or more storage drives.

[0049] In some embodiments, the first connector includes an EDSFF socket connector configured to receive an EDSFF edge connector. In certain embodiments, the interface card is coupled to the EDSFF socket connector, wherein the interface card is further configured to adapt a non-EDSFF edge connector of the storage drive to the EDSFF socket connector. Such adaptation may include a passive aspect (i.e., wiring pins between the non-EDSFF edge connector and the EDSFF socket connector) and / or an active aspect (i.e., conversion / change of signal conditioning and / or signal output between the EDSFF signal format and the non-EDSFF signal format).

[0050] In some embodiments, the passive cable supports an eight data lane ("x8") PCIe connection between the storage drive and the remote storage controller. In one embodiment, the remote storage controller is a PCIe controller. In another embodiment, the remote storage controller is a RAID adapter card.

[0051] In some embodiments, the interface card may be configured to loop back a Universal Backplane Management ("UBM") signal to the motherboard. In certain embodiments, the passive cable supports a UBM bus between the remote storage controller and the motherboard (e.g., a hot-swap controller on the motherboard).

[0052] In some embodiments, the interface card may be configured to combine a first Peripheral Component Interconnect Express Reset ("PERST") signal received from the remote storage controller with a second PERST signal received from the motherboard. In such an embodiment, the interface card is further configured to output the combined signal to the storage drive.

[0053] According to another aspect of the present invention, the system may include: A) a motherboard; B) a storage controller positioned separately from the motherboard; C) a storage bay lacking a backplane card; D) storage drives located in the storage bay; and E) a cable communicatively coupled to the motherboard, the storage controller, and the storage drives. In various embodiments, the cable includes: i) a first connector configured to couple to the storage drive; ii) a second connector configured to couple to the motherboard; and iii) a third connector configured to couple to the storage controller, wherein the cable routes control signals and data signals between the storage drive, the storage controller, and the motherboard.

[0054] In some embodiments, the motherboard includes at least one service processor (separate from the storage controller) such that the cable routes one or more I2C sideband signals between the storage drive and the at least one service processor. In some embodiments, the motherboard includes power pins, ground pins, and a hot-swap circuit for the storage drive.

[0055] In some embodiments, the motherboard includes at least one activity indicator, and wherein the cable routes one or more activity signals between the storage drive and the motherboard. In some embodiments, the first connector is configured to support two or more storage drives.

[0056] In some embodiments, the first connector includes an EDSFF socket connector configured to receive an EDSFF edge connector. In certain embodiments, the system further includes a connector card coupled to the EDSFF socket connector and configured to adapt a non-EDSFF edge connector of the storage drive to the EDSFF socket connector.

[0057] In some embodiments, the cable supports an x8 PCIe connection between the storage drive and the storage controller. In one embodiment, the storage controller is a PCIe controller. In another embodiment, the storage controller is a RAID adapter card.

[0058] In some embodiments, the cable further includes a connector card configured to loop back UBM signals to the motherboard. In certain embodiments, the cable supports a UBM bus between the storage controller and the motherboard (e.g., a hot-swap controller on the motherboard).

[0059] In some embodiments, the cable further includes a connector card configured to combine a first PERST signal received from the storage controller and a second PERST signal received from the motherboard, and wherein the connector card is configured to output the combined signal to the storage drive.

[0060] According to a third aspect of the present invention, the method may include: coupling at least one storage drive located in a storage bay via a first connector of a cable; and coupling a motherboard via a second connector of the cable. The method may include coupling a storage controller, where the storage controller is not located on the motherboard, via a third connector of the cable, and routing control signals and data signals among the storage drive, the storage controller, and the motherboard.

[0061] In some embodiments, the method further includes providing a UBM bus between the storage controller and a storage backplane controller located on the motherboard, and loop-backing UBM signals from the controller to the motherboard.

[0062] In some embodiments, the method further includes receiving a first PERST signal from the storage controller and a second PERST signal from the motherboard. In such an embodiment, the method further includes combining the first PERST signal and the second PERST signal, and outputting the combined signal to the storage drive.

[0063] Figure 1 An exemplary system 100 for routing signals via a data cable in a system without a backplane is depicted in accordance with aspects of the present disclosure. System 100 is presented to illustrate an example of an environment in which apparatuses and methods may be implemented in accordance with embodiments of the present disclosure. As depicted, system 100 may include a computing device 101 that includes at least one processor 102, at least one memory device 104, at least one network adapter 106, at least one storage controller 108, at least one high-speed cable device 110, and at least one storage drive 112. In certain embodiments, the high-speed cable device and the expansion card are at least partially located in a housing 114 such as a storage bay of the computing device 101. In some embodiments, the computing device 101 may be an enterprise server and / or a server in a data center. In other embodiments, the computing device 101 may be a workstation (i.e., capable of performing more computationally intensive tasks compared to a personal computer or a similar consumer-level computing device).

[0064] Processor 102 can be operatively connected to a memory device 104. The memory device 104 may include one or more non-volatile storage devices such as a hard disk drive, a solid state drive, a CD-ROM drive, a DVD-ROM drive, a tape drive, etc. The memory device 104 may also include non-volatile memory such as read-only memory (e.g., ROM, EPROM, EEPROM, and / or flash ROM) or volatile memory such as random access memory (e.g., RAM or operating memory). A computer bus or multiple buses may interconnect the processor 102, the memory device 104, the network adapter 106, the storage controller 108, the high-speed cable device 110, the storage drive 112, and other devices so that data and / or instructions can be transferred between them. In some embodiments, the computer bus is at least partially located on (and supported by) a motherboard ( Figure 1 not shown).

[0065] To enable communication with external systems or devices, the computing device 101 may include one or more input / output ("I / O") controllers ( Figure 1 not shown). Such I / O controllers may be implemented as wired ports (e.g., universal serial bus ("USB") ports, serial ports, FireWire ports, small computer system interface ("SCSI") ports, parallel ports, etc.) or wireless ports (e.g., Bluetooth, IrDA, etc.). The I / O controllers may enable communication with one or more input devices (e.g., keyboard, mouse, touch screen, camera device, microphone, scanner, storage device, etc.) and output devices (e.g., display, monitor, speaker, printer, storage device, etc.). The I / O controllers may also enable communication with other computing devices 101.

[0066] In some embodiments, the computing device 101 includes a wired or wireless network adapter 106 for connecting the computing device 101 to a computer network 116 such as a LAN, WAN, or the Internet. Such a computer network 116 may enable the computing device 101 to connect to one or more servers, workstations, mobile computing devices, or other devices. Via the computer network 116, the computing device 101 may interact with one or more communication client devices such as a desktop computer 118a, a mobile phone 118b, a workstation or personal computer 118c, and / or a laptop computer 118d (collectively referred to as "client devices 118"). Although not depicted in Figure 1 the system 100 may include—or be coupled to—various telecommunications devices such as email servers, communication servers, routers, switches, gateways, and other network elements and networking devices.

[0067] System 100 represents various systems in which the embodiments described herein can be deployed. In some embodiments, computing device 101 is in a data center. In certain embodiments, computing device 101 is located in a research center, design center, or other workspace. In other embodiments, computing device 101 is user-owned. Although a single high-speed cable device 110 (and storage drive 112) is depicted, those skilled in the art will recognize that multiple high-speed cable devices 110 can be deployed on computing device 101 (i.e., each high-speed cable device 110 is coupled to at least one or more respective storage drives 112).

[0068] In some embodiments, computing device 101 can be a rack server, workstation, mainframe computer, desktop server, laptop server, etc. or any combination thereof. In such embodiments, computing device 101 includes one or more processors, memory, a data bus, access to non-volatile data storage, I / O connections, etc. Those skilled in the art will recognize other implementations of computing device 101 that include at least one high-speed cable device 110 coupled to at least one storage drive 112.

[0069] As an example, peer device 118 is depicted as a tablet computer, smartphone, desktop computer, and laptop computer, but can be implemented by a workstation, terminal, or other computing device capable of connecting to computing device 101 via computer network 116. In some embodiments, peer device 118 is used by a system administrator for installation, maintenance, control, etc. of high-speed cable device 110 coupled to at least one storage drive 112. For example, a user can use a smartphone as peer device 118 to interact with computing device 101 that includes high-speed cable device 110 coupled to at least one storage drive 112.

[0070] Computer network 116 connects peer device 118 to computing device 101 to access storage drive 112 coupled to high-speed cable device 110. Computer network 116 includes one or more networks. For example, computer network 116 can include a LAN and can include a gateway to the Internet. Computer network 116 network can include cables, optical fibers, etc. and can also include wireless connections and can include a combination of network types. Computer network 116 can include a LAN, WAN, storage area network (“SAN”), fiber optic network, etc. The various computer networks that are part of the depicted computer network 116 can be private and / or public, e.g., via an Internet service provider.

[0071] The wireless connection can be a mobile phone network. The wireless connection can also be a Wi-Fi network based on any one of the standards in the Institute of Electrical and Electronics Engineers (“IEEE”) 802.11 standards. Alternatively, the wireless connection can be a connection. Additionally, the wireless connection can employ standards including those established by the International Organization for Standardization (“ISO”), the International Electrotechnical Commission (“IEC”), the American Society for DASH7 TM Alliance and EPCGlobal TM for radio frequency identification (“RFID”) communication using RFID standards.

[0072] Alternatively, the wireless connection can be a connection based on the IEEE 802 standards. In one embodiment, the wireless connection employs a connection designed by Sigma . Alternatively, the wireless connection can employ a connection defined by PowerFlow Innovations Inc. of Cochrane, Canada ( Innovations Inc.) and / or and .

[0073] The wireless connection can be an infrared connection including a connection that at least complies with the infrared physical layer specification (“IrPHY”) defined by . Alternatively, the wireless connection can be cellular phone network communication. All standards and / or connection types include the latest versions and revisions of the standards and / or connection types as of the filing date of this application.

[0074] In various embodiments, the storage drive 112 includes a solid-state storage device. The high-speed cable device 110 provides a physical connector and an electrical interface to allow the storage drive 112 (e.g., located in a storage bay or a similar housing 114) to connect to the motherboard of the computing device 101 without using a backplane card or a similar PCB. Note that the term “high-speed” is used to indicate that the high-speed cable device supports at least the bus speeds PCIe Gen5 and Gen6. In some embodiments, the high-speed cable device 110 provides an x8 PCIe bus between the storage controller 108, the storage drive 112, and the motherboard of the computing device 101.

[0075] In some embodiments, the storage drive 112 may conform to the EDSFF specification, such as the E1.S or E3.S format. In other embodiments, the storage drive 112 does not conform to the EDSFF specification, and the high-speed cable assembly 110 may include an EDSFF connector and an interposer card for adapting the storage drive 112 to the EDSFF connector. In certain embodiments, the interposer card may provide signal adaptation (also referred to as signal mixing) to allow a non-EDSFF storage drive 112 (e.g., an M.2 module) to emulate an E1.S or E3.S drive. Although the storage drive 112 and the high-speed cable assembly 110 are primarily described with reference to the EDSFF specification, those skilled in the art will recognize other expansion card (e.g., storage drive) specifications that can be adapted and emulated using the high-speed cable assembly 110 coupled to the storage drive 112.

[0076] In various embodiments, the high-speed cable assembly 110 may include an interface card and a passive cable for coupling the storage drive 112 to the computing device 101. Here, the interface card may connect the storage drive 112 to the passive cable, and the passive cable includes additional connectors that support the connection to the motherboard and the storage controller 108. In various embodiments, the cable may be a three-way cable, where the storage controller 108 is a remote controller located away from the motherboard. The high-speed cable assembly 110 is described in more detail below with respect to Figures 2 to 9 more detail.

[0077] The high-speed cable assembly 110 replaces the backplane in the computing device 101. One benefit of using high-speed cables compared to traces on a PCB is improved signal integrity. Various studies have shown that the losses of a PCB are five times that of a twinaxial cable (i.e., a cable with a twisted pair of inner conductors). Thus, the high-speed cable assembly may use a twinaxial cable, a triaxial cable, an optical fiber cable, or a similar high-bandwidth / low-loss cable.

[0078] Advantageously, the improved signal integrity allows the removal of circuits for supporting long physical channels in the storage system, including retimers and re-drivers (e.g., located on the backplane). As used herein, a re-driver is a circuit that boosts the high-frequency portion of a signal (i.e., for counteracting frequency-dependent attenuation). As used herein, a retimer is a circuit that is capable of recovering data, extracting the embedded clock from the signal, and retransmitting an updated copy of the data using a clean clock. Both retimers and re-drivers are expensive components and increase the heat generation of the host system (i.e., the computing device 101); by removing these components (i.e., because the high-speed cable replaces the backplane card), the system cost is reduced, the thermal performance is improved, and the power consumption is reduced.

[0079] Figure 2Illustrates an exemplary apparatus 200 for signal routing via a data cable in a system without a backplane, in accordance with aspects of the present disclosure. Apparatus 200 includes one embodiment of a high-speed cable apparatus 110, which includes an interface card 202, a signal router 206, and a passive cable 208. The interface card 202 includes a socket connector 204, and the passive cable 208 includes a driver connector 210, a motherboard connector 212, and a controller connector 214, which are described below.

[0080] Apparatus 200 includes an interface card 202 configured to couple a storage drive to the passive cable. The small size of the interface card 202, as compared to a conventional backplane card, increases the available space within a system rack, improves airflow (e.g., for improved cooling), and allows for the use of a greater variety of devices (i.e., devices compliant with different NVME formats and specifications) at a lower price point as compared to conventional backplane cards.

[0081] In some embodiments, to connect to the passive cable 208, the interface card 202 includes an E1.S edge connector compliant with the EDSFF specification for the E1.S electrical and mechanical interface (e.g., compliant with SFF-TA-1006). In one embodiment, the edge connector has a 2C connector size as defined in the EDSFF specification. Here, the edge connector may include a notch that separates a first set of pin fingers from the remainder of the pin fingers. In another embodiment, the edge connector has an IC connector size as defined in the EDSFF specification.

[0082] The edge connector of the interface card 202 includes a plurality of pin fingers (also referred to as signal pins) that include a set of ground pins. To support hot plugging, the set of ground pins may have an extended finger length as compared to the remainder of the pin fingers. In certain embodiments, the pin fingers may include gold fingers, e.g., conductive pins made of or plated with gold.

[0083] The interface card 202 includes a socket connector 204 (e.g., a slot connector) configured to couple to a storage drive. The socket connector 204 may include various pins that provide an electrical interface to a computer storage drive 112. In various embodiments, the socket connector is a non-EDSFF connector, e.g., an M.2 socket compliant with the PCI-SIG specification for the M.2 mechanical and electrical interface.

[0084] In the case where the storage drive has a non-EDSFF format, the interface card 202 can also be configured to convert a first set of signals associated with a non-EDSFF format connector type into a second set of signals associated with an EDSFF connector type. For example, the interface card 202 can adapt E1.S signals to signals recognizable by an M.2 device and also adapt M.2 signals to signals recognizable by an E1.S host. In additional embodiments, the interface card 202 can be configured to pass various signals common to EDSFF connectors and non-EDSFF connectors. For example, the common signaling between an M.2 device and an E1.S host can include PCIe transmit and receive signals, clock signals, sideband signaling, etc.

[0085] In some embodiments, the interface card 202 can be configured to combine a first PERST signal received from a storage controller (e.g., storage controller 108) with a second PERST signal received from a motherboard (i.e., the motherboard of the host system). In such an embodiment, the interface card 202 is also configured to output the combined signal to the storage drive.

[0086] The apparatus 200 includes a signal router 206 configured to route control signals, data signals, and / or sideband signals between a storage drive, a storage controller, and a motherboard. For example, the signal router 206 can be configured to route one or more I2C sideband signals between the storage drive and at least one service processor located on the motherboard.

[0087] Note that the signal router 206 can be implemented entirely (or at least in part) by the arrangement (i.e., wiring and connection) of passive cables 208. Thus, in some embodiments, the apparatus 200 is a passive device that does not include electronics for signal processing, signal conditioning, etc. In other embodiments, the signal router 206 can be implemented at least in part by the interface card 202. Here, the interface card 202 can include one or more circuits configured to provide the functionality of the signal router 206.

[0088] The apparatus 200 includes passive cables 208 configured to transfer signals (e.g., data signals, control signals, sideband signals, etc.) between a storage drive, a storage controller, and a motherboard.

[0089] The passive cable 208 includes at least one drive connector 210 configured to couple to the storage drive (e.g., via the interface card). As indicated above, the drive connector 210 can include an EDSFF socket connector configured to receive an EDSFF edge connector (e.g., the EDSFF edge connector of the interface card 202 or the storage drive).

[0090] The passive cable 208 includes a motherboard connector 212 configured to couple the motherboard to the storage drive (e.g., via an interface card). The passive cable 208 includes a third connector configured to couple the storage controller to the storage drive (e.g., via an interface card). In some embodiments, the passive cable 208 supports an eight data lane ("x8") Peripheral Component Interconnect Express ("PCIe") connection between the drive connector 210 and the controller connector 214. In the case where the drive connector 210 is configured to couple to a pair of storage drives 112, the drive connector 210 can support a pair of four data lane ("x4") PCIe between the passive cable 208 and the storage drive.

[0091] In some embodiments, the passive cable 208 supports a UBM bus between the motherboard connector 212 and the controller connector 214. For example, the storage controller (at the controller connector 214) can be a UBM host, and the hot plug controller on the motherboard (at the motherboard connector 212) can be a UBM bus device. In certain embodiments, the signal router 206 can be configured to loop back UBM signals from the controller connector 214 to the motherboard connector 212, where the UBM is routed from the controller connector 214 (UBM host) to the drive connector 210 (loopback) to the motherboard connector 212 (UBM device). Here, the drive connector 210 can be a connector in the middle portion of the passive cable 208, where the motherboard connector 212 and the controller connector 214 are located at opposite ends of the passive cable 208.

[0092] Note that blocks 202 through 214 represent functional blocks of the device 200 and can include any component or group of components that perform the functions attributed to that component. This can include one or more physical processors that execute processor-readable instructions, processor-readable instructions (e.g., as a software application or other executable), circuitry, computer hardware, storage media, software, some combination of hardware and / or firmware, interfaces, adapters, or any other component.

[0093] The following description of the functions provided by different components 202, 204, 206, 208, 210, 212, and / or 214 is for illustrative purposes and is not intended to be restrictive, as any of the components 202, 204, 206, 208, and / or 210 may provide more or fewer functions than those described. For example, one or more of the components 202, 204, 206, 208, 210, 212, and / or 214 may be removed, and some or all of their functions may be provided by other components among 202, 204, 206, 208, 210, 212, and / or 214. As another example, the apparatus 200 may include additional components that may perform some or all of the functions attributed to one or more of the components 202, 204, 206, 208, 210, 212, and / or 214 above.

[0094] Figure 3 Embodiments depicting an exemplary arrangement of a backplane-less system 300 in accordance with aspects of the present disclosure are shown. The backplane-less system 300 includes a high-speed cable 302, a motherboard 306, and a discrete storage controller 308 coupled to an NVMe storage drive 304. The high-speed cable 302 provides a three-way connection among the NVMe storage drive 304, the motherboard 306, and the discrete storage controller 308.

[0095] The high-speed cable 302 includes a first connector 312 coupled to the NVMe storage drive 304. The high-speed cable 302 may be an embodiment of the high-speed cable device 110 and / or the passive cable 208. The first connector 312 may be an embodiment of the drive connector 210. In certain embodiments, the first connector 312 is a high-speed connector that supports PCIe Gen5 or Gen6. An example of a suitable high-speed connector is the Mini Cooledge IO (“MCIO”) connector manufactured by Amphenol Corporation.

[0096] In the depicted embodiment, the NVMe storage drive 304 is housed inside an NVMe storage bay 310. The NVMe storage drive 304 may be an embodiment of the storage drive 112, and the NVMe storage bay 310 may be an embodiment of the housing 114. In certain embodiments, the NVMe storage bay 310 is a front-access storage bay, where the NVMe storage drive 304 is inserted into the NVMe storage bay 310 from the front side of the rack of the backplane-less system 300, where the first connector 312 is located on the opposite side (e.g., the rear side) of the NVMe storage bay 310, such that inserting the NVMe storage drive 304 into the NVMe storage bay 310 couples the NVMe storage drive 304 to the first connector 312.

[0097] The high-speed cable 302 includes a second connector 314 coupled to the motherboard 306. The second connector 314 can be an implementation of the motherboard connector 212. In some implementations, the second connector 314 is also a high-speed connector that supports PCIe Gen5 or Gen6. An example of a suitable high-speed connector is the MCIO connector manufactured by Amphenol Corporation.

[0098] The high-speed cable 302 includes a third connector 316 coupled to the discrete storage controller 308. The discrete storage controller 308 can be an implementation of the storage controller 108. The third connector 316 can be an implementation of the controller connector 216.

[0099] In some implementations, the third connector 316 is a high-speed connector that supports an x8 PCIe bus between the NVME storage drive 304 and the discrete storage controller 308 and an additional path for transmitting sideband signaling. Note that the discrete storage controller 308 can be a hardware RAID (Redundant Array of Independent Disks) controller, such as a PCIe plug-in card. Thus, the storage controller function changes from an embedded controller based on the motherboard to a scalable, independent adapter card.

[0100] The motherboard 306 includes a plurality of connectors and electrical components 318, some of which can interact with the NVME storage drive 304 via the high-speed cable 302. For example, the motherboard 306 can include a storage backplane controller (“SBC”) chip (e.g., a UBM device), a central processing unit (“CPU”), a chipset (e.g., a platform controller hub (“PCH”)), and an embedded controller (“EC”).

[0101] In various implementations, the high-speed cable connects the NVME storage drive 304 to power (e.g., 12V) and / or ground pins on the motherboard 306 and also routes several baseboard management controller (“BMC”) and / or service processor sideband signals from the motherboard 306 to the NVME storage drive 304. For example, the EC at the motherboard 306 can transmit I2C sideband signals to the NVME storage drive 304 via the high-speed cable 302.

[0102] In some embodiments, to support sideband signaling, a high-speed cable 302 provides a two-wire Universal Backplane Management (“UBM”) bus routed from a discrete storage controller 308 (i.e., the UBM host) to the motherboard 306 (i.e., routed to a UBM device such as an SBC). In certain embodiments, the UBM bus is routed onto a connector card (e.g., part of a first connector 312 or coupled to the first connector 312) coupled to the NVMe storage drive 304 and looped back to the motherboard 306 (e.g., looped back to the SBC).

[0103] The NVMe storage drive 304 may include one or more integrated LEDs 320 for indicating the storage drive status and / or activity. LED management for indicating the status and / or activity of the NVMe storage drive 304 is routed via the UBM bus. Conventionally, such signaling and LED management would be handled by a backplane card. However, in the backplane-less system 300, LED management and related signaling are looped back to the motherboard 306 via a second connector 314. In certain embodiments, the connector card is configured to loop back the UBM signals to the motherboard 306, e.g., loop back to an SBC chip on the motherboard. In other embodiments, there may be no connector card in the system 300 (i.e., where the first connector is configured to be mounted directly to the NVMe storage drive 304).

[0104] In some embodiments, sideband signaling between the discrete storage controller 308 and the NVMe storage drive 304 includes a first reset signal such as a PERSTx signal. Additionally, sideband signaling between the motherboard 306 and the NVMe storage drive 304 includes a second reset signal, such as a PERSTx_Enable signal (e.g., from a hot-swap controller on the motherboard 306). In certain embodiments, a connector card (e.g., part of a first connector 312 or coupled to the first connector 312) is configured to combine the reset signals (i.e., combine the PERSTx signal and the PERSTx_Enable signal) and output the combined signal to the NVMe storage drive 304. For example, an AND gate (or similar logic component) may be used to combine the reset signals.

[0105] Figure 4 An exemplary apparatus 400 for signal routing via a data cable in a system lacking a backplane is shown in accordance with aspects of the present disclosure. Apparatus 400 includes a high-speed cable 402, a motherboard 404, a motherboard connector 406, and an adapter card 408 as described below.

[0106] Apparatus 400 includes a high-speed cable 402 configured to communicate between a motherboard 404 and a storage drive ( Figure 4 not shown in) and a storage controller (Figure 4 route signaling (i.e., data signals, control signals, and / or sideband signals) between components (not shown). The high-speed cable 402 may be an implementation of the high-speed cable device 110, the passive cable 208, and / or the high-speed cable 302.

[0107] The device 400 includes a motherboard 404 configured to perform specific sideband signaling with a storage drive. The motherboard 404 may be an implementation of the motherboard 306. In some embodiments, the motherboard 404 includes a hot-swap controller having power and ground pins (i.e., relocated from a now non-existent backplane). Thus, the high-speed cable 302 can support the hot-swap function of the storage drive. In some embodiments, the motherboard 404 supports multiple discrete storage controllers.

[0108] The device 400 includes a motherboard connector 406 configured to couple the high-speed cable 402 to the motherboard 404. The motherboard connector 406 may be an implementation of the motherboard connector 212 and / or the second connector 314. In one embodiment, the motherboard connector 406 may be an MCIO connector.

[0109] Although a single motherboard connector 406 is depicted, in other embodiments, the motherboard 404 may include multiple connectors 406. For example, the motherboard 404 may include two or more MCIOs, each supporting an x8 bus.

[0110] The device 400 includes an adapter card 408 configured to couple the high-speed cable 402 to one or more storage drives. The adapter card 408 may be an implementation of the interface card 202. The adapter card 408 includes a connector for converting between the storage drive and the high-speed cable 402. Here, the adapter card 408 is configured to dock with a specific form factor of the storage drive.

[0111] As described above, the adapter card 408 does not contain an integrated circuit ("IC") or logic circuit for backplane functions. However, the adapter card 408 may include circuitry for looping back sideband signaling originating from a storage controller to the motherboard 404. In one embodiment, the adapter card 408 is configured to couple to a single storage drive. In another embodiment, the adapter card 408 is configured to couple to a pair of storage drives.

[0112] Figure 5 An example of an adapter card 500 according to aspects of the present disclosure is depicted. The adapter card 500 may be an implementation of the interface card 202 and / or the adapter card 408. In various embodiments, the adapter card 500 has a physical size that enables it to be assembled within a front-access storage bay (e.g., an implementation of the housing 114).

[0113] In one embodiment, the adapter card 500 may be formed at one end of the high-speed cable 502. Here, the high-speed cable 502 may be an embodiment of the high-speed cable device 110, the passive cable 208, the high-speed cable 302, and / or the high-speed cable 402.

[0114] The adapter card 500 may include a first socket connector 504 configured to connect / couple to a first storage drive. In some embodiments, the first socket connector 504 is an EDSFF connector (e.g., a socket connector) configured to receive an E1.S module. In other embodiments, the first socket connector 504 is a non-EDSFF connector configured to receive, for example, an M.2 module.

[0115] The adapter card 500 may include a second socket connector 506 configured to connect / couple to a second storage drive. In various embodiments, the first storage drive and the second storage drive are the same type of storage drive (i.e., share the same form factor, connector type, and other drive characteristics). In some embodiments, the second socket connector 506 is an EDSFF connector (e.g., a socket connector) configured to receive an E1.S module. In other embodiments, the second socket connector 506 is a non-EDSFF connector configured to receive, for example, an M.2 module.

[0116] The adapter card 500 may further include one or more mounting elements 508 for attaching the adapter card 500 to, for example, a storage bay or a system rack. Additionally, the adapter card 500 may be positioned within the storage bay (or system rack) in a manner that allows blind mating of the first storage drive and the second storage drive.

[0117] Figure 6 An exemplary arrangement 600 of a data cable 602, a connector card 604, and a storage drive 606 in accordance with aspects of the present disclosure is depicted. In arrangement 600, it is assumed that the storage drive 606 includes an edge connector 608 configured to couple to the socket connector 610 of the connector card 604.

[0118] The data cable 602 can be an implementation of the high-speed cable device 110, the passive cable 208, the high-speed cable 302, the high-speed cable 402, and / or the high-speed cable 502. The connector card 604 can be an implementation of the interface card 202, the adapter card 408, and / or the adapter card 500. In one implementation, the connector card 604 can be formed on the end of the data cable 602. In another implementation, the connector card 604 can be attached to the data cable 602 at the first connector 612, i.e., attached to the data cable 602 in a separable manner. The first connector 612 can be an implementation of the driver connector 210 and / or the first connector 312.

[0119] The storage drive 606 can be an implementation of the storage drive 112 and / or the NVMe storage drive 304. In one implementation, the storage drive 606 is an E1.S module compliant with the EDSFF specification for the E1.S electrical and mechanical interface. For example, the edge connector 608 can be an E1.S notch connector with a 2C size, where the socket connector 610 includes an E1.S keyed socket compliant with the 2C size. Although Figure 6 the edge connector 608 with a 2C size is depicted, in other implementations, the edge connector 608 can be an edge connector with a 1C size. In other implementations, the storage drive 606 can be a non-EDSFF device, such that the edge connector 608 and the socket connector 610 comply with the non-EDSFF specification for the electrical and mechanical interface.

[0120] Figure 7 An exemplary arrangement 700 of the data cable 602, the connector card 604, and the storage drive 606 cooperating with the connector card 604 in accordance with aspects of the present disclosure is depicted. In the arrangement 700, the storage drive 606 is mounted on the mounting tray 702 and can be covered with the heat sink 704. Although not depicted in Figure 7 it, the mounting tray 702 can be inserted into the storage compartment, thereby enabling the storage drive 606 to cooperate with the connector card 604.

[0121] Figure 8 An exemplary apparatus 800 for signal routing via a data cable in a system without a backplane in accordance with aspects of the present disclosure is depicted. The apparatus 800 includes a storage compartment 802 located near or attached to the motherboard 804. The storage compartment 802 can be an implementation of the housing 114 and / or the NVMe storage compartment 310. In one implementation, the storage compartment 802 is a front-access storage compartment. The motherboard 804 can be an implementation of the motherboard 306 and / or the motherboard 404.

[0122] In various embodiments, the data cable 602 passes through a side opening in the storage bay 802. Accordingly, an adapter card (e.g., the connector card 604) can be mounted to the inner bottom side of the storage bay 802 such that the data cable 602 is attached to the adapter card mounted within the storage bay 802. Then, a storage drive can be inserted through the top opening of the storage bay 802 (e.g., corresponding to front access of the storage bay 802), wherein inserting the storage into the storage bay 802 couples the storage drive to the adapter card. In various embodiments, the device 800 supports blind mating of the storage drive.

[0123] Figure 9 An exemplary arrangement 900 is depicted where a mounting tray 702 (i.e., including a storage drive) is inserted into the storage bay 802, thereby coupling the storage drive to the data cable 602.

[0124] Figure 10 An exemplary method 1000 for sorting and selectively presenting communications in accordance with aspects of the present disclosure is depicted. In various embodiments, the method 1000 is performed by a data cable device such as the high-speed cable device 110 and / or the device 200 described above. In some embodiments, all or part of the method 1000 is performed by a processor, such as a microcontroller, a microprocessor, a CPU, a graphics processing unit (“GPU”), an auxiliary processing unit (“APU”), an FPGA, etc.

[0125] The method 1000 begins and couples 1002 a storage drive located in a storage bay via a first connector of a cable. Here, the first connector of the cable can be an embodiment of the drive connector 210, the first connector 312, and / or the first connector 612. The storage drive can be an embodiment of the NVME storage drive 304, the storage drive 112, and / or the storage drive 606. The cable can be an embodiment of the high-speed cable device 110, the passive cable 208, the high-speed cable 302, the high-speed cable 402, and / or the high-speed cable 502 and / or the data cable 602. The storage bay can be an embodiment of the housing 114, the NVME storage bay 310, and / or the storage bay 802.

[0126] The method 1000 includes coupling 1004 a motherboard via a second connector of the cable. The motherboard can be an embodiment of the motherboard 306, the motherboard 404, and / or the motherboard 804. The second connector can be an embodiment of the motherboard connector 212 and / or the second connector 314.

[0127] Method 1000 includes coupling 1006 a storage controller positioned away from a motherboard via a third connector of a cable. The storage controller can be an implementation of storage controller 108 and / or discrete storage controller 308. The third connector can be an implementation of controller connector 214 and / or third connector 316.

[0128] Method 1000 includes routing 1008 control signals, data signals, and / or sideband signals between a storage drive, a storage controller, and a motherboard. In one implementation, routing 1008 the signals can include loopback of UBM signals from the storage controller to the motherboard via an interface card coupled to the storage device. In another implementation, routing 1008 the signals can include combining reset signals received from the storage controller and the motherboard and outputting the combined reset signal to the storage drive. Method 1000 ends.

[0129] Figure 11 An exemplary method 1100 for collating and selectively presenting communications in accordance with aspects of the present disclosure is depicted. In various implementations, method 1100 is performed by a data cable device such as high-speed cable device 110 and / or device 200 described above. In some implementations, all or part of method 1100 is performed by a processor such as a microcontroller, microprocessor, CPU, GPU, auxiliary processing unit, FPGA, etc.

[0130] Method 1100 begins and loopbacks 1102 a UBM signal from a remote storage controller to the motherboard. Here, the data cable device can provide a UBM bus between a storage backplane controller on the motherboard and the remote storage controller. In certain implementations, an interface card coupled to the storage drive (i.e., providing an interface between the storage drive and the high data cable) loopbacks the UBM signal to the motherboard.

[0131] Method 1000 includes receiving 1104 a first PERST signal from a remote storage controller. The remote storage controller can be an implementation of storage controller 108 and / or discrete storage controller 308.

[0132] Method 1000 includes receiving 1106 a second PERST signal from the motherboard. The motherboard can be an implementation of motherboard 306, motherboard 404, and / or motherboard 804.

[0133] Method 1000 includes combining 1108 the first PERST signal and the second PERST signal. In certain implementations, a logic AND gate is used to combine the first PERST signal and the second PERST signal.

[0134] Method 1000 includes outputting a combined signal 1110 to a storage drive. The storage drive may be an implementation of NVME storage drive 304, storage drive 112, and / or storage drive 606. Method 1000 ends.

[0135] The embodiments may be practiced in other specific forms. The described embodiments are to be considered in all respects only illustrative and not restrictive. Thus, the scope of the invention is indicated by the appended claims rather than by the foregoing description. All changes that come within the meaning and range of equivalency of the claims are to be embraced within their scope.

Claims

1. A device comprising: Interface card; as well as A cable, comprising: a first connector configured to couple with a storage drive via the interface card; and a second connector configured to couple to a motherboard; and a third connector configured to couple with a storage controller located outside the motherboard, The cables route control signals and data signals between the storage drive, the storage controller, and the motherboard.

2. The device according to claim 1, wherein: The cable routes one or more inter-integrated circuit (I2C) sideband signals between the storage drive and at least one service processor located on the motherboard.

3. The device according to claim 1, wherein: The first connector comprises an enterprise and datacenter standard form factor EDSFF receptacle connector configured to receive an EDSFF edge connector.

4. The device according to claim 1, wherein: The cable supports an eight data lane x8 Peripheral Component Interconnect Express (PCIe) connection between the storage drive and the storage controller.

5. The device according to claim 1, wherein: The interface card is configured to loop back universal backplane management (UBM) signals to the motherboard, wherein the cable supports a UBM bus between the storage controller and a storage backplane controller located on the motherboard.

6. The device according to claim 1, wherein: The interface card is configured to combine a first PCI fast reset PERST signal received from the storage controller with a second PERST signal received from the motherboard, and wherein the interface card is further configured to output the combined signal to the storage drive.

7. A system comprising: motherboard; a storage controller located outside the motherboard; Lack of storage compartment for backplane cards; a storage drive located in the storage bay; as well as A cable, comprising: a first connector configured to couple with the storage drive; a second connector configured to couple with the motherboard; and a third connector configured to couple with the storage controller, The cables route control signals and data signals between the storage drive, the storage controller, and the motherboard.

8. The system according to claim 7, wherein: The motherboard includes at least one service processor separate from the storage controller, and wherein the cable routes one or more inter-integrated circuit (I2C) sideband signals between the storage drive and the at least one service processor.

9. The system according to claim 7, wherein: The motherboard includes power pins, ground pins, and hot-swap circuitry for the storage drives.

10. The system according to claim 7, wherein: The motherboard includes at least one activity indicator, and wherein the cable routes one or more activity signals between the storage drive and the motherboard.

11. The system according to claim 7, wherein: The first connector comprises an enterprise and datacenter standard form factor EDSFF receptacle connector configured to receive an EDSFF edge connector.

12. The system of claim 11, further comprising a connector card coupled to the EDSFF socket connector and configured to adapt a non-EDSFF edge connector of the storage drive to the EDSFF socket connector.

13. The system according to claim 7, wherein: The cable supports an eight data lane x8 Peripheral Component Interconnect Express (PCIe) connection between the storage drive and the storage controller.

14. The system according to claim 7, wherein: The cable also includes an interface card configured to loop back universal backplane management (UBM) signals to the motherboard.

15. The system of claim 14, wherein: The cable supports a UBM bus between the storage controller and a storage backplane controller located on the motherboard.

16. The system according to claim 7, wherein: The cable further includes an interface card configured to combine a first PCI Express Reset PERST signal received from the storage controller with a second PERST signal received from the motherboard, and wherein the interface card is configured to output the combined signal to the storage drive.

17. The system according to claim 7, wherein: The first connector is configured to support two storage drives.

18. A method performed at a storage compartment lacking a back plate, the method comprising: coupling a storage drive located in the storage compartment via a first connector of a cable; coupling to a motherboard via a second connector of the cable; coupling a storage controller located outside the motherboard via a third connector of the cable; as well as Control signals and data signals are routed between the storage drive, the storage controller, and the motherboard.

19. The method of claim 18, further comprising providing a universal backplane management (UBM) bus between the storage controller and a storage backplane controller located on the motherboard, and looping back UBM signals from the storage controller to the motherboard.

20. The method of claim 18, further comprising: combining a first PCI fast reset PERST signal received from the storage controller with a second PERST signal received from the motherboard; as well as The combined signal is output to the storage drive.

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