Backside illuminated image sensor and manufacturing method thereof

By reducing the use of plasma enhanced deposition process during the deep groove formation process of the back-illuminated CMOS image sensor, and using the ALD+PECVD combination process to form a buffer layer, the problems of reduced sensitivity and limited dynamic range caused by surface defects are solved, and the effect of improving device performance and yield is achieved.

CN120239350APending Publication Date: 2025-07-01GEKKO SEMICON (SHANGHAI) CO LTD
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
CN202311828160.0
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2023-12-27
Publication Date
2025-07-01

AI Technical Summary

Technical Problem

In the back-illuminated CMOS image sensor, due to surface defects generated during deep groove etching, the device's sensitivity is reduced and the dynamic range is limited, affecting the imaging effect.

Method used

During the deep trench formation process, the use of plasma enhanced deposition process is reduced, and the bombardment effect of low-frequency radio frequency on the substrate is reduced. The first buffer layer is formed by an atomic layer deposition (ALD) process, and the second buffer layer is formed by a plasma enhanced chemical vapor deposition (PECVD) process on its surface.

Benefits of technology

It effectively reduces the occurrence of surface defects, reduces the number of white spots, improves the performance and yield of the device, and has a simple process, which is convenient for industrial promotion.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN120239350A_ABST
    Figure CN120239350A_ABST
Patent Text Reader

Abstract

The invention discloses a manufacturing method of a back-illuminated image sensor. The manufacturing method comprises the following steps of S1, providing a substrate with a pixel region; s2, forming a deep groove in the back surface of the substrate, wherein the deep groove is located in the pixel region; s3, high dielectric layers are formed on the side wall and the bottom of the deep groove, and the deep groove is filled with the high dielectric layers; s4, sequentially depositing and forming a first buffer layer and a second buffer layer above the high dielectric layer; wherein the first buffer layer is formed by an atomic layer deposition process. In the deep trench forming process, the use of a plasma enhanced deposition process is reduced, the bombardment effect of low-frequency radio frequency on the substrate in the plasma enhanced deposition process is reduced, so that the generation of surface defects is reduced, the number of white points of the semiconductor device is reduced, the performance and yield of the semiconductor device are improved, the process is simple, and the cost is low. The industrial popularization and application are facilitated.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present invention relates to an etching method for semiconductor devices, and particularly to a back-illuminated image sensor and a manufacturing method thereof. Background Art

[0002] As the pixel unit size in CMOS image sensors becomes smaller and the distribution density gradually increases, the crosstalk problem between pixel units becomes a non-negligible issue. The back deep trench isolation (BDTI) technology of back-illuminated image sensors helps to solve the crosstalk problem caused by the increased pixel unit density in back-side illumination (BSI) CMOS image sensors and also helps to improve the noise performance.

[0003] The BDTI structure is to etch deep trenches for optical isolation on a silicon substrate. This process inevitably causes the formation of silicon surface defects. The defects act as recombination centers, which can capture electrons and holes in photo-generated carriers and cause them to recombine. As a result, the electrons in photo-generated carriers are captured and recombined with holes before reaching the junction region. On the one hand, the number of electrons reaching the junction region decreases, the collection efficiency of the junction region for electrons decreases, and the electron sensitivity of the device decreases, thus leading to a decrease in the sensitivity of the image sensor. On the other hand, the electrons captured by the recombination centers will generate dark current under the action of an external electric field, resulting in a decrease in the dynamic range of the CMOS image sensor, making it not have enough ability to distinguish bright and dark environments, affecting the imaging effect of the image sensor, and being unfavorable to the development of semiconductor technology.

[0004] The prior art generally uses filling insulating materials in deep trenches and covering buffer layers such as oxides or nitrides above the insulating materials to repair surface defects and reduce the number of white dots, but the effect is not satisfactory. Some researchers have also tried to solve the above problems by improving the deep trench structure. However, in practical applications, it is found that there are still problems such as a large number of white dots or a complex preparation method that is not conducive to industrial production. Summary of the Invention

[0005] The object of the present invention is to provide a back-illuminated image sensor and a manufacturing method thereof. During the formation of deep trenches, the use of plasma-enhanced deposition process is reduced, the bombardment effect on the substrate caused by low-frequency radio frequency in the plasma-enhanced deposition process is reduced, the generation of surface defects is reduced, the number of white dots in semiconductor devices is reduced, the performance and yield of semiconductor devices are improved, and the process is simple, which is conducive to the popularization and application of industrialization.

[0006] To achieve the above object, the present invention provides a manufacturing method for a back-illuminated image sensor, including the following steps:

[0007] Step S1, provide a substrate having a pixel region;

[0008] Step S2, form a deep trench on the back surface of the substrate, the deep trench being located in the pixel region;

[0009] Step S3, form a high-k dielectric layer on the sidewalls and bottom of the deep trench, the high-k dielectric layer filling the deep trench;

[0010] Step S4, sequentially deposit and form a first buffer layer and a second buffer layer above the high-k dielectric layer;

[0011] Wherein, the first buffer layer is formed by atomic layer deposition process.

[0012] Optionally, the forming method of the second buffer layer includes: at least one of plasma enhanced chemical vapor deposition and atomic layer deposition.

[0013] Optionally, the second buffer layer is formed by plasma enhanced chemical vapor deposition process.

[0014] Optionally, when the second buffer layer is formed by plasma enhanced chemical vapor deposition process, the low-frequency power is 100w - 150w, and the high-frequency power is 600W - 1000W.

[0015] Optionally, the low-frequency power is 125w and the high-frequency power is 790w.

[0016] Optionally, when the size of the deep trench satisfies that the width is 50nm - 400nm and the depth is 0.5μm - 5μm, the sum of the thicknesses of the first buffer layer and the second buffer layer is 700 Å - 3000 Å.

[0017] Optionally, the thickness of the first buffer layer is 50 Å - 2000 Å.

[0018] Optionally, the thickness of the first buffer layer is 300 Å and the thickness of the second buffer layer is 1200 Å.

[0019] Optionally, the materials of the first buffer layer and the second buffer layer include: at least one of silicon oxide and silicon nitride.

[0020] Optionally, in step S3, the material of the high-k dielectric layer includes: at least one of silicon oxide, aluminum oxide, tantalum oxide, and hafnium oxide.

[0021] Optionally, the high-k dielectric layer includes: silicon oxide, aluminum oxide, and tantalum oxide.

[0022] Optionally, step S3 specifically includes:

[0023] An oxide silicon layer and an aluminum oxide layer are sequentially deposited on the sidewalls and bottom of the deep trench;

[0024] Tantalum oxide filling the deep trench is deposited on the surface of the aluminum oxide layer.

[0025] Optionally, the method for forming the high-k dielectric layer includes at least one of a high-density plasma deposition process or a high aspect ratio process deposition process.

[0026] Optionally, the substrate is a silicon-containing substrate.

[0027] On the other hand, the present invention also provides a back-illuminated image sensor manufactured by the aforementioned manufacturing method.

[0028] Compared with the prior art, the beneficial effects of the technical solution of the present invention at least include:

[0029] The present invention provides a back-illuminated image sensor and a manufacturing method thereof. During the formation of the deep trench, after the high-k dielectric layer fills the deep trench, the present invention first forms a first buffer layer by an ALD process, and then forms a second buffer layer on the surface of the first buffer layer by a PECVD process. Compared with the prior art where the first and second buffer layers are both formed by PECVD, the present invention reduces the introduction of low-frequency radio frequency, reduces the bombardment of the substrate, avoids the promotion effect of the bombardment on the interface defects, thereby reducing the generation of dark current of the device and reducing the number of defects such as white dots; and forming the first buffer layer by ALD can also avoid the performance degradation caused by the intrusion of water vapor and improve the performance stability of the device. Description of the Drawings

[0030] Figure 1 It is a flowchart of the manufacturing method of the back-illuminated image sensor according to an embodiment of the present invention.

[0031] Figures 2A - 2E It is a schematic cross-sectional view of the substrate during the process of manufacturing an image sensor on the substrate according to an embodiment of the manufacturing method of the present invention.

[0032] Reference Signs in the Drawings

[0033] Substrate 10, front surface 10a of the substrate, back surface 10b of the substrate, deep trench 20, high-k dielectric layer 30, cavity structure 31, first buffer layer 40, second buffer layer 50. Detailed Embodiments

[0034] In order to solve the above technical problems, an embodiment of the present invention proposes a back-illuminated image sensor and a manufacturing method thereof.

[0035] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0036] It should be noted that all directional indications (such as up, down, left, right, front, back...) in the embodiments of the present invention are only used to explain the relative positional relationship and movement conditions between components in a specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indications will also change accordingly.

[0037] As described in the background art, the prior art generally selects an oxide or nitride thin film as the covering film layer on the surface of the high dielectric layer (High-k layer). This choice is mainly because the oxide or nitride has a smaller refractive index relative to the underlying High-k material. When light enters from an optically thinner medium into an optically denser medium, it has the effect of reducing reflection and increasing transmission, which is crucial for the imaging quality of the image sensor. The oxide or nitride thin film is usually deposited by plasma enhanced chemical vapor deposition (PECVD). The plasma enhanced deposition process introduces two types of radio frequency power supplies, high frequency and low frequency. The high frequency power supply is responsible for dissociating the gas in the reaction chamber into a plasma state containing active substances such as positive and negative ions, free radicals, atoms, and molecules. The low frequency power supply (i.e., the bias radio frequency power supply) is responsible for attracting the positive and negative ions in the plasma to the wafer surface. The high frequency power supply and the low frequency power supply cooperate with each other to make the characteristics such as the deposition rate and film stress of the deposited thin film meet the production requirements.

[0038] However, the inventors of the present application have found through a large number of studies and experiments that: the traction effect of the low frequency radio frequency power supply on positive and negative ions is positively correlated with the degree of substrate damage. The greater the low frequency power, the more defects are generated on the substrate, and the lower the photoelectric conversion efficiency of the device. In this regard, the present invention attempts to improve the deep trench formation process to form a semiconductor device with fewer surface defects while reducing the use of the plasma enhanced deposition process.

[0039] An embodiment of the present invention provides a manufacturing method for a back-illuminated image sensor, as Figure 1 shown in FIG. 2, including:

[0040] Step S1, providing a substrate 10 having a pixel area (Pixel area), as shown in the attached Figure 2A .

[0041] The substrate 10 is used to form a device structure or a chip circuit, and the substrate 10 has opposite front surface 10a and back surface 10b.

[0042] The pixel region can be applied to pixel devices. The substrate 10 further includes a peripheral circuit region, and the peripheral circuit region may include digital circuits, analog circuits, etc. These are conventional structures of a back-illuminated image sensor and will not be elaborated here.

[0043] In some embodiments, the material of the substrate 10 includes any one of silicon (Si), germanium (Ge), silicon germanide (GeSi), silicon carbide (SiC), gallium arsenide (GaAs), or gallium indium (GaIn), and can also be other materials suitable for image sensors. The substrate 10 can also be a composite structure such as a silicon-on-insulator substrate or a substrate with an epitaxial layer grown thereon. Those skilled in the art can select the required type of the substrate 10 according to needs. Therefore, the type of the substrate should not limit the protection scope of the present invention.

[0044] Step S2, form deep trenches 20 on the back surface 10b of the substrate. The deep trenches 20 are located in the pixel region, see attached Figure 2B .

[0045] In an embodiment of the present invention, a mask layer with a plurality of opening patterns (not shown in the figure) is formed on the back surface 10b of the substrate. The opening patterns are used to locate the position and size of the deep trenches 20; etch the substrate downward according to the opening patterns to form a plurality of deep trenches 20. The process of forming the deep trenches 20 includes a dry etching process, a wet etching process, or an etching method combining a dry etching process and a wet etching process; after etching is completed, remove the mask layer to form the deep trenches 20.

[0046] In some embodiments, the width of the deep trenches 20 is 50 nm - 400 nm, and the depth is 0.5 μm - 5 μm. The specific depth-to-width ratio of the deep trenches 20 is set according to the actual production situation.

[0047] Step S3, form a high-k dielectric layer 30 on the sidewalls and bottom of the deep trenches 20. The high-k dielectric layer 30 fills the deep trenches 20, see attached Figure 2C .

[0048] A deposition process is used to form the high-k dielectric layer 30 on the bottom, sidewalls of the deep trenches 20, and the back surface 10b of the substrate to repair the defects generated during etching when forming the deep trenches 20 in the substrate 10, reduce the generation of dark current, reduce the number of white dots in the device, and improve the device performance.

[0049] In some embodiments, the deposition process for forming the high-k dielectric layer 30 includes at least one of a high-density plasma deposition process or a high aspect ratio process deposition process. Specifically, it includes any one or more of atmospheric pressure CVD, sub-atmospheric pressure CVD, low pressure CVD, PECVD, HDPCVD, and ALD CVD.

[0050] In some embodiments, the material of the high-k dielectric layer 30 includes at least one of silicon oxide, aluminum oxide, tantalum oxide, and hafnium oxide.

[0051] In an embodiment of the present invention, the high-k dielectric layer 30 is composed of a silicon oxide layer 301, an aluminum oxide layer 302, and a tantalum oxide layer 303. Specifically, first, a silicon oxide layer 301 is deposited on the sidewalls, bottom, and the back surface 10b of the substrate of the deep trench 20 to repair the defects generated on the substrate surface during the etching to form the deep trench 20. Subsequently, the aluminum oxide layer 302 is deposited on the surface of the silicon oxide layer 301, and then a tantalum oxide layer 303 that fills the deep trench 20 is deposited on the surface of the aluminum oxide layer 302. Both the aluminum oxide layer 302 and the tantalum oxide layer 303 are high-K material layers, which can enable the free electrons on the surface of the back surface of the substrate and the bottom and sidewall surfaces of the deep trench 20 to be adsorbed in the high-K material layer and unable to move and recombine, reducing the generation of dark current and further improving the performance of the subsequent fabricated semiconductor device. In addition, in this embodiment, the tantalum oxide layer 303 is an anti-reflection layer, which weakens or eliminates the reflection phenomenon when external light enters the substrate 10 through the anti-reflection layer, enhances the light utilization rate of the substrate 100, and improves the performance of the subsequent fabricated semiconductor device.

[0052] It should be noted that in some embodiments, when the high-k dielectric layer 30 fills the deep trench 20, that is, when the top of the deep trench 20 is filled and closed, there will be a void structure 31 in the high-k dielectric layer 30; in other embodiments, the void structure 31 can be removed by some processes; in other embodiments, some processes can also be used to change the structure, size, quantity, distribution, etc. of the voids. Those skilled in the art can select the corresponding process technologies according to requirements and will not be elaborated here.

[0053] Step S4, a first buffer layer 40 and a second buffer layer 50 are sequentially deposited above the high-k dielectric layer 30, as shown in the appendix Figures 2D - 2E .

[0054] According to the foregoing description, the inventors of the present application speculate that since the plasma enhancement process introduces low-frequency radio frequency, when forming the buffer layer covering the deep trench 20 and the back surface 10b of the substrate, the low-frequency radio frequency will bombard the substrate surface, thereby promoting the generation of defects at the interface. To solve this problem, the present invention provides the following embodiments:

[0055] In one embodiment of the present invention, both the first buffer layer 40 and the second buffer layer 50 are formed by atomic layer deposition (ALD). Compared with plasma enhanced processes, the ALD process does not have a low-frequency radio frequency power supply, so the bombardment effect on the substrate surface during the deposition of the first buffer layer 40 and the second buffer layer 50 is reduced. In addition, the thin film formed by the ALD process has lower pinhole defects and can even achieve pinhole-free, avoiding performance degradation caused by water vapor intrusion and improving the stability of device performance.

[0056] However, although using ALD deposition to form the first buffer layer 40 and the second buffer layer 50 can reduce the generation of interface defects and avoid the intrusion of water vapor, the ALD process has a slow coating speed and high cost, thus reducing production capacity and being unfavorable for industrial application and promotion.

[0057] Based on the above, the present invention provides another embodiment. This embodiment adopts a combination of ALD + PECVD. Specifically, in this embodiment, the first buffer layer 40 is first formed by ALD, and then the second buffer layer 50 is formed by PECVD. Compared with the prior art in which the first and second buffer layers are both formed by PECVD, no low-frequency radio frequency is introduced when forming the first buffer layer 40 in this embodiment, reducing the contribution of radio frequency to the generation of substrate defects. In addition, using ALD to form the first buffer layer 40 can greatly avoid the occurrence of device performance degradation caused by water vapor intrusion, thereby improving the device performance stability. This is because the film formation mode of the PECVD-deposited thin film is island growth, so there are pinhole-like defects, creating an environment for water vapor diffusion.

[0058] In addition, it has been experimentally proven that compared with forming the first and second buffer layers by pure ALD, the semiconductor device prepared by the ALD + PECVD combination method in this embodiment has an equal or even lower number of white dots, improving the device yield. And this embodiment reduces the use of the ALD process, increases the production rate, reduces the production cost, and is helpful for industrial application and promotion.

[0059] In some embodiments, when using the PECVD process to form the second buffer layer 40, the low-frequency power is 100w - 150w, and the high-frequency power is 600W - 1000W. Further, the low-frequency power is 125w, and the high-frequency power is 790w.

[0060] In some embodiments, when the dimensions of the deep trench 20 satisfy a width of 50 nm - 400 nm and a depth of 0.5 μm - 5 μm, as an example, the sum of the thicknesses of the first buffer layer 40 and the second buffer layer 50 is 700 Å - 3000 Å; in some other embodiments, the thickness of the first buffer layer is 50 Å - 2000 Å; in some other embodiments, the thickness of the first buffer layer is 300 Å and the thickness of the second buffer layer is 1200 Å.

[0061] The following describes the present invention in detail with reference to the Figures 2A - 2E accompanying drawings and embodiments.

[0062] Embodiment 1

[0063] First, by designing the PECVD deposition conditions with different low - frequency frequencies, the influence of the introduction of low - frequency on the number of white dots in the device is explored. Specifically, on a substrate with deep trenches on the back, a silicon oxide layer, an aluminum oxide layer, and a tantalum oxide layer are sequentially deposited and filled, and then a silicon oxide buffer layer is deposited above the tantalum oxide layer according to the conditions of Group 1 and Group 2 in Table 1, and subsequent semiconductor device fabrication and performance testing are completed. The results are shown in Table 1. Through analysis, taking the experimental results of HF790 / LF185 1500 Å as a benchmark (Baseline), when the high - frequency is 790 w and the low - frequency is 125 w, the number of white dots can be reduced by more than 30% when the product yield is 50% (P50), and the number of white dots can be reduced by more than 25% when the product yield is 95% (P95).

[0064] Based on the above, the influence of the ALD + PECVD combined process on the number of white dots in the device is explored. Specifically, the experiment includes the following steps:

[0065] Step S1, provide a substrate 10 having a pixel region.

[0066] Step S2, form a deep trench 20 on the back surface 10b of the substrate, and the deep trench 20 is located in the pixel region.

[0067] The width of the deep trench 20 is 0.13 μm and the depth is 1.5 μm.

[0068] Step S3, form a high - dielectric layer 30 on the sidewalls and bottom of the deep trench 20, and the high - dielectric layer 30 fills the deep trench 20.

[0069] The high - dielectric layer 30 is composed of a silicon oxide layer 301, an aluminum oxide layer 302, and a tantalum oxide layer 303. The thickness of the silicon oxide layer 301 is 25 Å, the thickness of the aluminum oxide layer 302 is 88 Å, and the thickness of the tantalum oxide layer 303 is 520 Å. The deposition processes of the silicon oxide layer 301, the aluminum oxide layer 302, and the tantalum oxide layer 303 are conventional deposition processes in the art and will not be elaborated here.

[0070] Step S4, a first buffer layer 40 and a second buffer layer 50 are sequentially deposited and formed above the high-dielectric layer 30.

[0071] In this embodiment, under the conditions of Group 3-5 in Table 1, above the tantalum oxide layer 303, a first buffer layer (silicon oxide layer) is first formed by ALD process with a thickness of 100 Å, 200 Å or 300 Å; then a second buffer layer (silicon oxide layer) is formed by PECVD process (high frequency 790 w / low frequency 125 w) with a thickness of 1200 Å, 1300 Å or 1400 Å. The total thickness of the first buffer layer and the second buffer layer is 1500 Å, and subsequent semiconductor device fabrication and performance testing are completed.

[0072] The results are shown in Table 1. Through analysis, it can be seen that based on the experimental results of HF790 / LF185 1500 Å (Baseline), the group of ALD 300 Å + HF790 / LF125 1200 Å shows a lower number of white dots.

[0073] Table 1 Statistics of the number of white dots of the semiconductor devices prepared in Example 1

[0074]

[0075] Note: The results of the change rate of the number of white dots in Table 1 are based on the experimental results of HF790 / LF185 1500 Å (Baseline).

[0076] In summary, the present invention provides a back-illuminated image sensor and its manufacturing method. During the formation of deep trenches, after the high-dielectric layer fills the deep trenches, the present invention first forms a first buffer layer by ALD process, and then forms a second buffer layer on the surface of the first buffer layer by PECVD process. Compared with the prior art, the present invention reduces the use of plasma-enhanced deposition process, reduces the bombardment effect of low-frequency radio frequency on the substrate in the plasma-enhanced deposition process, reduces the generation of surface defects, reduces the number of white dots of semiconductor devices, improves the performance and yield of semiconductor devices, and has a simple process, which is conducive to the industrial promotion and application.

[0077] Although the content of the present invention has been introduced in detail through the above preferred embodiments, it should be recognized that the above description should not be regarded as a limitation of the present invention. After those skilled in the art have read the above content, various modifications and substitutions of the present invention will be obvious. Therefore, the protection scope of the present invention should be defined by the appended claims.

Claims

1. A manufacturing method of a back-illuminated image sensor, characterized in that, Including the following steps: Step S1: Provide a substrate having a pixel region; Step S2: Form a deep trench on the back surface of the substrate, and the deep trench is located in the pixel region; Step S3: Form a high-k dielectric layer on the sidewalls and bottom of the deep trench, and the high-k dielectric layer fills the deep trench; Step S4: Deposit and form a first buffer layer and a second buffer layer in sequence above the high-k dielectric layer; Wherein, the first buffer layer is formed by an atomic layer deposition process.

2. The manufacturing method of the back-illuminated image sensor according to claim 1, characterized in that, The forming method of the second buffer layer includes at least one of plasma enhanced chemical vapor deposition and atomic layer deposition.

3. The manufacturing method of the back-illuminated image sensor according to claim 2, characterized in that, The second buffer layer is formed by a plasma enhanced chemical vapor deposition process.

4. The manufacturing method of the back-illuminated image sensor according to claim 3, characterized in that, When the second buffer layer is formed by a plasma enhanced chemical vapor deposition process, the low-frequency power is 100W - 150W, and the high-frequency power is 600W - 1000W.

5. The manufacturing method of the back-illuminated image sensor according to claim 4, wherein, The low-frequency power is 125W, and the high-frequency power is 790W.

6. The manufacturing method of the back-illuminated image sensor according to claim 3, characterized in that, When the size of the deep trench satisfies that the width is 50nm - 400nm and the depth is 0.5μm - 5μm, the sum of the thicknesses of the first buffer layer and the second buffer layer is 700 Å - 3000 Å.

7. The manufacturing method of the back-illuminated image sensor according to claim 6, characterized in that, The thickness of the first buffer layer is 50 Å - 2000 Å.

8. The manufacturing method of the back-illuminated image sensor according to claim 7, characterized in that, The thickness of the first buffer layer is 300 Å, and the thickness of the second buffer layer is 1200 Å.

9. The manufacturing method of the back-illuminated image sensor according to claim 1, wherein The materials of the first buffer layer and the second buffer layer include at least one of silicon oxide and silicon nitride.

10. The manufacturing method of the back-illuminated image sensor according to claim 1, wherein, In step S3, the materials of the high-k dielectric layer include at least one of silicon oxide, aluminum oxide, tantalum oxide, and hafnium oxide.

11. The manufacturing method of the back-illuminated image sensor according to claim 10, wherein, The high-k dielectric layer includes silicon oxide, aluminum oxide, and tantalum oxide.

12. The manufacturing method of the back-illuminated image sensor according to claim 11, wherein, The specific step S3 includes: Deposit and form a silicon oxide layer and an aluminum oxide layer on the sidewalls and bottom of the deep trench in sequence; Deposit tantalum oxide on the surface of the aluminum oxide layer to fill the deep trench.

13. The manufacturing method of the back-illuminated image sensor according to claim 11, characterized in that, The forming method of the high-k dielectric layer includes at least one of a high density plasma deposition process and a high aspect ratio deposition process.

14. The manufacturing method of the back-illuminated image sensor according to claim 1, wherein The substrate is a silicon-containing substrate.

15. A back-illuminated image sensor, characterized in that, The back-illuminated image sensor is manufactured by the manufacturing method described in any one of claims 1 - 14.