Constant current source circuit and control method

Abstract

The invention relates to a constant current source circuit and a control method. The constant current source circuit comprises a threshold circuit, a comparator, an integrator, a shaping circuit, a reversing switch, a synchronous circuit, a positive shaping circuit, a negative shaping circuit and a constant current source. The integrator is used for accessing an input current I output end; the shaping circuit is used for accessing the output end of the sampling circuit CP; the shaping circuit outputs a synchronous circuit; the threshold circuit outputs a comparator; the change-over switch is connected to the constant current source, and the output of the change-over switch is connected with the integrator; the comparator comprises a positive comparator and a negative comparator; the synchronous circuit comprises a positive synchronous circuit and a negative synchronous circuit; the shaping circuit outputs a forward synchronous circuit and a forward shaping circuit respectively; the device is reasonable in design, compact in structure and convenient to use.

Description

Technical Field

[0001] The present invention relates to a constant current source circuit and a control method, belonging to the technical field of constant current sources, and particularly to a constant current source circuit with a single constant current source reset floating ground charge balance technology. Background Art

[0002] In an inertial navigation system (hereinafter referred to as "INS"), a constant current source circuit is a core component of I / F and V / F conversion circuits. It can provide a high-precision and low-temperature drift current input to the I / F and V / F conversion circuits. After receiving the current input from the constant current source circuit, the I / F and V / F conversion circuits linearly convert the current signal into a pulse frequency signal and provide it to the navigation computer. After navigation calculation, the displacement information of the vehicle can be obtained. The accuracy of the constant current source circuit and the I / F conversion circuit directly affects the navigation accuracy of the INS.

[0003] Traditional dual constant current source reset uses a dual-reference and dual-sampling structure, which can meet the symmetry requirements at room temperature. However, due to the difference in temperature stability between the dual-reference and dual-sampling, it cannot meet the symmetry requirements at high and low temperatures. Moreover, the dual constant current source reset has relatively high power consumption and large heat generation, forming a large temperature gradient, and cannot meet the non-linearity and symmetry requirements. Summary of the Invention

[0004] In order to meet the increasingly high requirements for miniaturization and integration of INS and improve the market competitiveness of products, the project team decided to carry out research on the single constant current source reset floating ground charge balance technology. The goal is to improve the existing traditional dual constant current source reset circuit to a single constant current source. The single-channel constant current source power supply is isolated from the power supply of the pre-stage signal processing. The single constant current source and the pre-stage ground form a stable dual-channel reset through logic control. The single constant current source reset floating ground charge balance technology circuit can be widely applied in aspects such as the automatic navigation of airplanes, automobiles, and ships.

[0005] Generally speaking, the technical problem to be solved by the present invention is to provide a constant current source circuit and a control method.

[0006] To solve the above problems, the technical solutions adopted by the present invention are as follows:

[0007] A constant current source circuit includes a threshold circuit, a comparator, an integrator, a shaping circuit, a commutation switch, a synchronization circuit, a positive shaping circuit, a negative shaping circuit, and a constant current source;

[0008] The integrator is used to connect to the input current I i Output terminal;

[0009] The shaping circuit is used to connect to the output terminal of the sampling circuit CP;

[0010] The shaping circuit outputs to the synchronization circuit;

[0011] Threshold circuit output comparator;

[0012] The commutation switch is connected to a constant current source, and the output of the commutation switch is connected to an integrator;

[0013] The comparator includes a positive comparator and a negative comparator;

[0014] The synchronization circuit includes a positive synchronization circuit and a negative synchronization circuit;

[0015] The shaping circuit outputs a positive synchronization circuit and a positive shaping circuit respectively;

[0016] The integrator outputs a positive comparator and a negative comparator respectively;

[0017] The threshold circuit outputs a positive comparator and a negative comparator respectively;

[0018] The positive comparator and the negative comparator are respectively connected to the positive synchronization circuit and the negative synchronization circuit;

[0019] The positive synchronization circuit outputs a commutation switch and a positive shaping circuit respectively;

[0020] The negative synchronization circuit outputs a commutation switch and a negative shaping circuit respectively.

[0021] Furthermore, the positive shaping circuit and the negative shaping circuit respectively output signals f o +, f o -.

[0022] Furthermore, the integrator has two states: positive integration and negative integration;

[0023] The integrator includes an operational amplifier U1 and a capacitor C1;

[0024] Pin 1 of the operational amplifier U1 is grounded, and pin 4 is connected to -15V; pin 3 is grounded, and pin 2 is divided into three paths. One path is grounded through the capacitor C1, the second path is connected to the current Iin through the resistor Rin, and the third path is connected to the constant current source through the FW terminal;

[0025] Pin 6 of the operational amplifier U1 outputs two paths through the resistor R1, and is respectively given to the operational amplifier U2 and the operational amplifier U3;

[0026] The output terminals of the resistor R1 are respectively electrically connected to the bases of the triodes Q1 and Q2;

[0027] The collector of the triode Q1 is connected to +15V through the resistor R2;

[0028] The collector of the triode Q2 is grounded through the resistor R3.

[0029] Further, the charge integration amount of the input current of the integrator and the reset charge integration amount of the constant current source are equal in value and opposite in direction. The integrated charge amount of the input current Iin is linearly related to the input current Iin, and the reset charge integration amount is proportional to the reset time.

[0030] The number of output pulses of the integrator is proportional to the input current; the integration voltage of the integrator and the circuit threshold are in reverse.

[0031] The integrated charge amount of the input current of the integrator is equal to the integrated charge amount of the reset current, and the charge balance is as follows.

[0032]

[0033] I 复位 is the reset current, and the number of reset current times is proportional to the magnitude of the input current Iin.

[0034] The output pulse signal of the I / F conversion circuit introduces I by controlling the reset current 复位 or the on / off control signal is output through the shaping circuit. The output pulse frequency Fo and the input current Iin are related as follows.

[0035] F O = K * I in .

[0036] K is a coefficient constant.

[0037] The comparison circuit includes a comparator circuit and a threshold circuit connected electrically.

[0038] The threshold circuit is used to generate a comparison threshold voltage.

[0039] The threshold circuit includes a proportional resistor with the ±15V power supply electrically connected to the ±15V power supply.

[0040] The positive comparator includes an operational amplifier U2 electrically connected to the +15V power supply of the threshold circuit.

[0041] The negative comparator includes an operational amplifier U3 electrically connected to the -15V power supply of the threshold circuit.

[0042] The input terminals of operational amplifier U2 and operational amplifier U3 are connected to the output terminal Vout of operational amplifier U1.

[0043] There are several resistors electrically connected between the output terminals of operational amplifier U2 and operational amplifier U3.

[0044] Operational amplifier U2 and operational amplifier U3 respectively output levels K+ and K-.

[0045] The FW terminal of the constant current source is connected to the emitters of transistors Q1 and Q2 through a series-connected capacitor C*4 and a resistor R11; the emitters of transistors Q1 and Q2 are respectively connected to pin 2 of operational amplifier U2 and pin 3 of operational amplifier U3; the emitters of transistors Q1 and Q2 are grounded through a resistor R4;

[0046] Pin 3 of operational amplifier U2 is connected to +15V through a resistor R5; pin 2 of operational amplifier U3 is grounded through a resistor R8.

[0047] The commutation switch, as a switching circuit, includes chip U3Z. Pin 8 and pin 9 are respectively connected to pin 6 of D flip-flop U2AZ, and pin 1 and pin 16 are respectively connected to pin 8 of D flip-flop U2BZ; pin 14 is electrically connected to signal FW.

[0048] The constant current source includes operational amplifiers U6 and U7.

[0049] Pin 7 of operational amplifier U2 outputs two paths. One path is connected to 5V through a resistor R9, and the other path is connected to pin 2 of chip U4A;

[0050] Pin 7 of operational amplifier U3 outputs two paths. One path is connected to 5V through a resistor R10, and the other path is connected to pin 12 of chip U4B;

[0051] Pin 5 of chip U4A outputs three paths. One path is connected to chip U5B, the second path is connected to MOSGM1, and the third path is grounded through a capacitor C6; pin 6 is electrically connected to MOSGM2; the S terminal of MOSGM1 is connected to the FW terminal, and the D terminal is connected to H+15V; the D terminal of MOSGM2 is connected to the FW terminal, and the S terminal is grounded; chip U5B outputs port F-;

[0052] Pin 9 of chip U4B outputs three paths. One path is connected to chip U5A, the second path is connected to MOSGM3, and the third path is grounded through a capacitor C*1; pin 8 is electrically connected to MOSGM4; the S terminal of MOSGM3 is connected to the COM terminal, and the D terminal is connected to the FW terminal; the S terminal of MOSGM4 is connected to the COM terminal, and the D terminal is grounded; chip U5A outputs port F+.

[0053] There is a chip U8 in front of operational amplifier U6; pins 2 and 3 of chip U8 are connected to the H+15V voltage; pins 9 and 10 of chip U8, one path is grounded through parallel capacitors C3 and C2, and the other path is connected to the input terminal pin 30 of operational amplifier U6; pin 2 of operational amplifier U6 is grounded through a resistor R12, and pin 6 is connected to pin 3 of operational amplifier U7; pin 6 is connected to pin 2 through a resistor R13;

[0054] Pin 2 of operational amplifier U7 is grounded through a sampling resistor RS, and pin 6 is electrically connected to pin 2 of MOSGQ3. Pin 1 of MOSGQ3 is grounded through a capacitor C*3 and is connected to the signal COM terminal;

[0055] Pin 1 of MOSGQ3 is electrically connected to the collector of transistor Q4, pin 3 of MOSGQ3 is connected to the base of transistor Q4, and the emitter of transistor Q4 is connected to sampling resistor RS through resistor R15.

[0056] A constant current source control method, using the above constant current source circuit; the method comprises the following steps:

[0057] For the negative current input state, when there is no current input, the integrator outputs zero voltage, and the negative comparator and the negative synchronization circuit both output low level;

[0058] When there is a negative current input, the integrator starts to integrate positively and enter the charging state, and the output voltage increases; when the output voltage reaches the threshold voltage of the comparator at the subsequent stage, the comparator flips, the negative synchronization circuit trigger flips accordingly, and the output circuit outputs a counting pulse; at the same time, the reversing switch is turned on, and the constant current source circuit is controlled to reversely charge the integrator through the reversing switch, enter the reset state, and the integrator output voltage begins to decrease;

[0059] When the integrator output voltage drops below the comparator threshold voltage, the synchronous circuit trigger flips, turns off the reversing switch, and turns off the counting output at the same time. The circuit integrator returns to the negative current charging process, thereby realizing I / F conversion.

[0060] When a negative current is input, the negative current of the input is integrated, V OUT The output of the terminal is in a positive voltage integration state, that is, positive integration;

[0061] The comparison circuit compares the integrator output signal with the threshold voltage, the comparator cycle flips, identifies the input state, provides a control signal for the subsequent synchronization circuit, controls the subsequent reversing switch and the constant current source cycle reset;

[0062] As a match for the integrator, the working process of the comparator is as follows; when the comparator input signal is zero, the integrator output Vout is zero, and the comparator A and B outputs K+ and K- are both low level; when the comparator inputs a negative current, the integrator integrates positively; when the integrator output voltage Vout is greater than the threshold voltage, comparator A flips, and K+ changes from low level to high level, controlling the action of the subsequent synchronous circuit and the reversing switch, short-circuiting the positive constant current source to the current input terminal through the switch, and setting the reset current to be greater than the input current.

[0063] During the period when the output circuit outputs a negative pulse, the integrator reverses and integrates, causing the circuit to enter a reset state; when the integrator output voltage Vout is less than the preset comparison voltage, K+ changes from a high level to a low level, cutting off the short circuit between the constant current source and the input signal, and the integrator returns to a forward integration state, realizing I / F conversion.

[0064] In view of the existing traditional dual constant current source reset circuit, especially the differences in temperature stability between the dual reference and dual sampling, which cannot meet the requirements of high and low temperature symmetry, and the relatively large power consumption and heat generation of the dual constant current source reset, resulting in a large temperature gradient and unable to meet the requirements of non-linearity and symmetry, the present invention provides a single constant current source reset floating ground charge balance technology with high precision and low temperature drift, which adopts single reference and single sampling, fabricates the constant current source with front and rear stage isolation, and uses the same constant current source as the reset reference for the I / F transformation of the positive and negative two channels.

[0065] The I / F transformation of the positive and negative two channels uses the same constant current source to achieve high-precision and low-temperature drift of the reset reference for the single constant current source reset floating ground charge balance. BRIEF DESCRIPTION OF THE DRAWINGS

[0066] Figure 1 is the principle block diagram of the present invention.

[0067] Figure 2 is the circuit working waveform diagram of the present invention.

[0068] Figure 3 is the schematic diagram of the integrator principle of the present invention.

[0069] Figure 4 is the schematic diagram of the negative current input of the integrator output waveform of the present invention.

[0070] Figure 5 is the schematic diagram of the negative current input of the integrator output waveform of the present invention.

[0071] Figure 6 is the schematic diagram of the comparator circuit of the present invention.

[0072] Figure 7 is the schematic diagram of the analog switch circuit structure of the present invention.

[0073] Figure 8 is the schematic diagram of the constant current source circuit structure of the present invention.

[0074] Figure 9 is the schematic diagram of the overall circuit structure of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0075] As Figures 1-9 shown, the present invention includes a threshold circuit, a comparator, an integrator, a shaping circuit, a commutation switch, a synchronization circuit, a positive shaping circuit, a negative shaping circuit, and a constant current source;

[0076] The input current I i The output terminal is connected to the integrator;

[0077] The output terminal of the sampling circuit CP is connected to the shaping circuit;

[0078] The shaping circuit outputs to the synchronization circuit;

[0079] Threshold circuit output comparator;

[0080] The commutation switch is connected to the constant current source, and the output of the commutation switch is connected to the integrator;

[0081] The comparator includes a positive comparator and a negative comparator;

[0082] The synchronization circuit includes a positive synchronization circuit and a negative synchronization circuit;

[0083] The shaping circuit outputs the positive synchronization circuit and the positive shaping circuit respectively;

[0084] The integrator outputs the positive comparator and the negative comparator respectively;

[0085] The threshold circuit outputs the positive comparator and the negative comparator respectively;

[0086] The positive comparator and the negative comparator are respectively connected to the positive synchronization circuit and the negative synchronization circuit;

[0087] The positive synchronization circuit outputs the commutation switch and the positive shaping circuit respectively;

[0088] The negative synchronization circuit outputs the commutation switch and the negative shaping circuit respectively;

[0089] The positive shaping circuit and the negative shaping circuit output signals f o +, f o -;

[0090] The working stability, temperature stability and dynamic load-carrying capacity of the constant current source circuit directly affect the conversion accuracy and temperature drift of I / F, and it is an important part of the I / F converter. The constant current source circuit adopts a floating ground single constant current source reset design as the reset reference current for the negative channel and the positive channel. The overall application circuit schematic diagram is as Figure 1 shown.

[0091] As the circuit principle, the specific scheme adopted by the present invention is:

[0092] Describe the working process and working principle of the circuit in the state of negative current input.

[0093] When there is no current input, Figure 1In the I / F converter, the integrator outputs zero voltage, and both the negative comparator and the negative synchronization circuit output low levels. When a negative current is input, the circuit integrator starts positive integration and enters the charging state, and the output voltage increases. When the output voltage reaches the threshold voltage of the subsequent comparator, the comparator flips, and the flip-flop of the negative synchronization circuit flips accordingly, and the output circuit outputs a counting pulse. At the same time, the commutation switch is turned on, and the constant current source circuit is controlled to charge the integrator reversely through the commutation switch, entering the reset state. The output voltage of the integrator starts to decrease. When the output voltage of the integrator drops below the threshold voltage of the comparator, the flip-flop of the synchronization circuit flips, the commutation switch is turned off, and the counting output is turned off at the same time. The circuit integrator returns to the negative current charging process, and the I / F conversion is realized through the above closed-loop cycle operation. The charge integration amount of the input current and the charge integration amount of the reset constant current source are equal in value and opposite in direction. The closed-loop operation of the circuit makes the output voltage of the integrator fluctuate near the threshold value. The integrated charge amount of the input current is linearly related to the input current, and the reset charge integration amount is proportional to the reset time. Therefore, the number of output pulses is proportional to the input current, realizing the linear transformation of input current - output frequency. The working process and principle are the same when positive and negative channel currents are input, except that the integration voltage and the circuit threshold are reversed.

[0094] The present invention mainly utilizes the "voltage following characteristic" of the operational amplifier, appended Figure 2 , according to the "virtual short" principle of the operational amplifier, that is, the voltages of the two input pins in3 and in2 of the operational amplifier are equal; when a stable power supply voltage is input to the operational amplifier pin in3, the voltage across the resistor R2 is also Vin and remains unchanged. Therefore, no matter how the external circuit changes, the current flowing through the R2 resistor remains unchanged; the current of the R3 load is equal to the current of the R2 resistor. So even if the power supply of the R3 load is a variable voltage power supply, the current of the R3 load also remains fixed and unchanged, thereby achieving the effect of constant current.

[0095] Overall circuit principle: When no current is input, in Figures 1-3 the integrator in the I / F converter outputs zero voltage, and both the negative comparator and the negative synchronization circuit output low levels.

[0096] When a negative current is input, the circuit integrator starts positive integration and enters the charging state, and the output voltage increases. When the output voltage reaches the threshold voltage of the subsequent comparator, the comparator flips, and the flip-flop of the negative synchronization circuit flips accordingly, and the output circuit outputs a counting pulse. At the same time, the commutation switch is turned on, and the constant current source circuit is controlled to charge the integrator reversely through the commutation switch, entering the reset state. The output voltage of the integrator starts to decrease. When the output voltage of the integrator drops below the threshold voltage of the comparator, the flip-flop of the synchronization circuit flips, the commutation switch is turned off, and the counting output is turned off at the same time. The circuit integrator returns to the negative current charging process, and the I / F conversion is realized through the above closed-loop cycle operation.

[0097] The integrator includes operational amplifier U1 and capacitor C1;

[0098] Pin 1 of operational amplifier U1 is grounded, and pin 4 is connected to -15V; pin 3 is grounded, and pin 2 is divided into three paths. One path is grounded through capacitor C1, the second path is connected to current Iin through resistor Rin, and the third path is connected to a constant current source through the FW terminal;

[0099] Pin 6 of operational amplifier U1 outputs two paths through resistor R1, respectively to operational amplifier U2 and operational amplifier U3;

[0100] The output terminals of resistor R1 are respectively electrically connected to the bases of transistors Q1 and Q2;

[0101] The collector of transistor Q1 is connected to +15V through resistor R2;

[0102] The collector of transistor Q2 is grounded through resistor R3;

[0103] The charge integration amount of the input current and the charge integration amount of the reset constant current source are equal in value and opposite in direction. The closed-loop operation of the circuit makes the output voltage of the integrator fluctuate near the threshold. The integral charge amount of the input current Iin is linearly related to the input current Iin, and the reset charge integration amount is proportional to the reset time. Thus, the number of output pulses is proportional to the input current, realizing the linear transformation of input current - output frequency. When the positive channel and the negative channel input current, the working process and principle are the same, except that the integral voltage and the circuit threshold are reversed.

[0104] In the above process, the integral charge amount of the input current in each working cycle is equal to the integral charge amount of the reset current. The charge balance principle can be described by the following formula.

[0105]

[0106] The input current passes through the closed-loop operation of each functional circuit. The number of times of the reset current introduced to balance the input current per unit time is proportional to the magnitude of the input current. The control signal for controlling the introduction or cut-off of the reset current is output through the shaping circuit, which is the output pulse signal of the I / F conversion circuit. The output pulse frequency Fo and the input current can be theoretically described by the following formula,

[0107] F O = K * I in . K is a coefficient constant.

[0108] The integrator has two states: forward integration and reverse integration. When a negative current is input, the negative input current is integrated, and the output at the V OUT terminal is in a positive voltage integration state, which is forward integration. The input resistance of the operational amplifier is very high, and the input current passes through R in, flows into the integrating capacitor C. Since the inverting input terminal and the non-inverting input terminal of the operational amplifier are virtually shorted, the inverting input terminal is virtually grounded. The output voltage of the integrator increases. When it reaches a predetermined threshold value, the external constant current source (opposite to the input current) charges the integrating capacitor in the reverse direction (discharging process), causing the output voltage of the integrator to return below the threshold value. This process is the integration-reset process. The above process works periodically to achieve high-precision I / F conversion. The output waveform of the integrator working state is as Figure 4 、 Figure 5 shown. The reverse integration working state of the integrator is the same as the forward integration working state, except that the integration direction is opposite.

[0109] As Figure 6 , the comparison circuit includes a comparator circuit and a threshold circuit connected electrically. The threshold circuit is used to generate a comparison threshold voltage, which is composed of a power supply and a proportional resistor. The comparison circuit compares the output signal of the integrator with the threshold voltage. The comparator flips periodically to identify the input state, provides a control signal for the subsequent synchronization circuit, controls the periodic reset of the subsequent commutation switch and the constant current source, and enables the integrator to operate in the integration-reset cycle. The circuit continuously repeats this process when working in a closed loop to achieve I / F conversion.

[0110] Regarding the comparator circuit;

[0111] The threshold circuit includes a proportional resistor with the ±15V power supply electrically connected to the ±15V power supply;

[0112] The positive comparator includes an operational amplifier U2 electrically connected to the +15V power supply of the threshold circuit,

[0113] The negative comparator includes an operational amplifier U3 electrically connected to the -15V power supply of the threshold circuit,

[0114] The access terminals of the operational amplifier U2 and the operational amplifier U3 are connected to the output terminal Vout of the operational amplifier U1;

[0115] There are several resistors electrically connected between the output terminals of the operational amplifier U2 and the operational amplifier U3;

[0116] The operational amplifier U2 and the operational amplifier U3 respectively output levels K+ and K-;

[0117] The FW terminal of the constant current source is connected to the emitters of the triodes Q1 and Q2 through the series-connected capacitor C*4 and resistor R11; the emitters of the triodes Q1 and Q2 are respectively connected to pin 2 of the operational amplifier U2 and pin 3 of the operational amplifier U3; the emitters of the triodes Q1 and Q2 are grounded through the resistor R4;

[0118] Pin 3 of the operational amplifier U2 is connected to +15V through the resistor R5; pin 2 of the operational amplifier U3 is grounded through the resistor R8;

[0119] The working process of the comparator is as follows. When the input signal is zero, the output Vout of the integrator is zero, and the outputs K+ and K- of comparators A and B are both at low level. When a negative input current is applied, the integrator integrates in the positive direction. When the output voltage Vout of the integrator is greater than the threshold voltage, comparator A flips, and K+ changes from low level to high level, controlling the actions of the subsequent synchronous circuit and the commutation switch, shorting the positive constant current source to the current input terminal through the switch. In the design, the reset current is always greater than the input current. Therefore, during the output of a negative pulse by the output circuit, the integrator integrates in the reverse direction, causing the circuit to enter the reset state. When the output voltage Vout of the integrator is less than the preset comparison voltage, K+ changes from high level to low level, cutting off the short circuit between the constant current source and the input signal, and the integrator resumes the positive integration state. Through such periodic actions, I / F conversion is achieved.

[0120] As Figure 7 , the synchronous circuit includes a positive synchronous circuit and a negative synchronous circuit;

[0121] The positive synchronous circuit includes D flip-flop U2AZ;

[0122] The negative synchronous circuit includes D flip-flop U2BZ;

[0123] Pin 1 of D flip-flop U2AZ is connected to 5V, pin 2 inputs the signal, and pin 3 inputs the clock signal; pin 3 is connected to chip U4BZ of the shaping circuit, and the output signal is F-;

[0124] Pin 10 of D flip-flop U2BZ is connected to 5V, pin 12 inputs the signal, and pin 11 inputs the clock signal; pin 9 is connected to chip U4AZ of the shaping circuit, and the output signal is F+;

[0125] The synchronous circuit is implemented using a mature variable-width triggering method. The synchronous circuit is implemented using a dual-channel dual D flip-flop. The periodic flip of the comparator serves as the input to the synchronous circuit. One channel of the synchronous circuit outputs to control the conduction and cutoff of the subsequent commutation switch, achieving charge balance between the constant current source and the input current. The other channel serves as the output signal of the I / F conversion. By counting the CLK clock signal and performing logical operations, the D flip-flop forms a trigger reset.

[0126] The commutation switch, as a switching circuit, includes chip U3Z. Pin 8 and pin 9 are respectively connected to pin 6 of D flip-flop U2AZ, and pin 1 and pin 16 are respectively connected to pin 8 of D flip-flop U2BZ; pin 14 is electrically connected to signal FW;

[0127] The working principle of the present invention:

[0128] When a negative current is input,

[0129] D flip-flop U2BZ, that is, flip-flop B: When it is in the integration state, the first switch of the analog switch is turned on, S1 and D1 are connected, and the com terminal (constant current source output) is grounded;

[0130] Meanwhile, for flip-flop A: QA = 0,... At this time, the fourth switch of the analog switch is turned on, S4 and D4 are connected, and H15V is grounded;

[0131] For flip-flop B: QB = 1,... When it is in the reset state, the second switch of the analog switch is turned on, S2 and D2 are connected, and the com terminal (constant current source output) is connected to the FW terminal of the integrator;

[0132] Meanwhile, for D flip-flop U2AZ, that is, flip-flop A: QA = 1, At this time, the third switch of the analog switch is turned on, S3 and D3 are connected, the FW terminal is connected to H15V, and a reset current in the direction from com to H15V is formed at this time, reverse charging the integrator to complete the reset function; The principle of the forward input current is similar to the above principle, except that the direction of the reset current becomes from H15V to the com terminal.

[0133] The constant current source includes a chip U7Z and an operational amplifier U8Z connected electrically;

[0134] The chip U7Z serves as a voltage reference;

[0135] The output terminal of the operational amplifier U8Z is connected to pin 2 of the chip U3Z through MOSGQ5Z and transistor Q6Z;

[0136] As Figure 7 an improvement of Figure 8 , the constant current source includes operational amplifiers U6 and U7 connected electrically;

[0137] There is a chip U8 in front of the operational amplifier U6; Pins 2 and 3 of the chip U8 are connected to the H + 15V voltage; Pins 9 and 10 of the chip U8, one path is grounded through parallel capacitors C3 and C2, and the other path is connected to the input terminal pin 30 of the operational amplifier U6; Pin 2 of the operational amplifier U6 is grounded through a resistor R12, and pin 6 is connected to pin 3 of the operational amplifier U7; Pin 6 is connected to pin 2 through a resistor R13;

[0138] Pin 2 of the operational amplifier U7 is grounded through a sampling resistor RS, pin 6 is electrically connected to pin 2 of MOSGQ3, and pin 1 of MOSGQ3 is grounded through a capacitor C*3 and connected to the signal COM terminal;

[0139] Pin 1 of MOSGQ3 is electrically connected to the collector of the transistor Q4, pin 3 of MOSGQ3 is connected to the base of the transistor Q4, and the emitter of the transistor Q4 is connected to the sampling resistor RS through a resistor R15;

[0140] The circuit of the traditional dual constant current source has two actual positive and negative constant current source outputs in the circuit, but it requires a large circuit area and cannot meet the miniaturization requirements; it requires more chips and wiring, increasing the cost and the risk of circuit problems; moreover, the front stage and the rear stage are not isolated, and the front and rear stage circuits will affect each other, affecting the circuit performance.

[0141] The single constant current source circuit achieves isolation between the front and rear stages and has the advantages of high precision, low temperature drift and miniaturization. It can completely replace the previous traditional dual constant current source circuit and has innovative value.

[0142] The chip U7Z provides a precision voltage reference, the operational amplifier U8Z provides a voltage follower, the MOSGQ5Z serves as a current booster tube, the triode Q6Z serves as an output tube, and the sampling resistor RS is used for precision sampling.

[0143] The precision voltage reference provides a highly stable reference voltage and sends it to the voltage follower. According to the virtual short principle, the in-phase input and the anti-phase input of the operational amplifier are at the same potential, and the voltage across the sampling resistor RS is equal to the reference voltage. The output current IO = VREF / RS. It can be seen from the above formula that the reference voltage and the sampling resistor determine the output current magnitude.

[0144] Such as Figures 1-9 , example: I / F converter, a constant current source circuit of a single constant current source reset floating ground charge balance technology, specifically applied to an I / F converter. The magnitude of the output reset constant current source determines the scale factor of the I / F converter. According to the project requirements, cooperate with the clock input and the circuit peripheral applications to adapt precision resistors, integrate a scale factor debugging precision resistor inside the circuit, and perform precision adjustment on the scale factor to meet the range requirements and ensure the scale factor at the same time. This kind of constant current source circuit has the advantages of high precision, low temperature drift and miniaturization, and can completely replace the previous traditional dual constant current source circuit, with innovative value.

[0145] The high-precision and low-temperature-drift single constant current source reset floating ground charge balance technology that uses the same constant current source as the reset reference for the positive and negative two-channel I / F conversion.

[0146] The synchronization circuit includes a positive synchronization circuit and a negative synchronization circuit;

[0147] The constant current source includes operational amplifiers U6 and U7,

[0148] Pin 7 of the operational amplifier U2 outputs two paths. One path is connected to 5V through the resistor R9, and the other path is connected to pin 2 of the chip U4A;

[0149] Pin 7 of the operational amplifier U3 outputs two paths. One path is connected to 5V through the resistor R10, and the other path is connected to pin 12 of the chip U4B;

[0150] Pin 5 of chip U4A outputs three paths. One path is connected to chip U5B, the second path is connected to MOSGM1, and the third path is grounded through capacitor C6; Pin 6 is electrically connected to MOSGM2; The S terminal of MOSGM1 is connected to the FW terminal, and the D terminal is connected to H + 15V; The D terminal of MOSGM2 is connected to the FW terminal, and the S terminal is grounded; The output port of chip U5B is F-.

[0151] Pin 9 of chip U4B outputs three paths. One path is connected to chip U5A, the second path is connected to MOSGM3, and the third path is grounded through capacitor C*1; Pin 8 is electrically connected to MOSGM4; The S terminal of MOSGM3 is connected to the COM terminal, and the D terminal is connected to the FW terminal; The S terminal of MOSGM4 is connected to the COM terminal, and the D terminal is grounded; The output port of chip U5A is F+.

[0152] The present invention is fully described for a clearer disclosure, and the prior art will not be listed one by one.

[0153] Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present invention, rather than limiting it; Although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements on some of the technical features; As those skilled in the art, it is obvious to combine multiple technical solutions of the present invention. And these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present invention. The technical content not described in detail in the present invention is well-known technology.

Claims

1. A constant current source circuit, characterized in that: It includes a threshold circuit, a comparator, an integrator, a shaping circuit, a commutation switch, a synchronization circuit, a positive shaping circuit, a negative shaping circuit, and a constant current source; The integrator is used to access the input current I i Output terminal; The shaping circuit is used to access the output terminal of the sampling circuit CP; The shaping circuit outputs to the synchronization circuit; The threshold circuit outputs to the comparator; The commutation switch accesses the constant current source, and the output of the commutation switch is connected to the integrator; The comparator includes a positive comparator and a negative comparator; The synchronization circuit includes a positive synchronization circuit and a negative synchronization circuit; The shaping circuit outputs to the positive synchronization circuit and the positive shaping circuit respectively; The integrator outputs to the positive comparator and the negative comparator respectively; The threshold circuit outputs to the positive comparator and the negative comparator respectively; The positive comparator and the negative comparator are respectively connected to the positive synchronization circuit and the negative synchronization circuit; The positive synchronization circuit outputs to the commutation switch and the positive shaping circuit respectively; The negative synchronization circuit outputs to the commutation switch and the negative shaping circuit respectively.

2. The constant current source circuit according to claim 1, characterized in that: The positive shaping circuit and the negative shaping circuit respectively output signals f o +, f o -.

3. The constant current source circuit according to claim 1, wherein: The integrator has two states: positive integration and negative integration; The integrator includes an operational amplifier U1 and a capacitor C1; Pin 1 of the operational amplifier U1 is grounded, and pin 4 is connected to -15V; Pin 3 is grounded, and pin 2 is divided into three paths. One path is grounded through the capacitor C1, the second path is connected to the input current Iin through the resistor Rin, and the third path is connected to the constant current source through the FW terminal; Pin 6 of the operational amplifier U1 outputs two paths through the resistor R1, respectively to the operational amplifier U2 and the operational amplifier U3; The output terminals of the resistor R1 are respectively electrically connected to the bases of the triodes Q1 and Q2; The collector of the triode Q1 is connected to +15V through the resistor R2; The collector of the triode Q2 is grounded through the resistor R3.

4. The constant current source circuit according to claim 1, wherein: The charge integration amount of the input current of the integrator and the reset charge integration amount of the constant current source are equal in value and opposite in direction. The integration charge amount of the input current Iin is linearly related to the input current Iin, and the reset charge integration amount is proportional to the reset time; The output pulse number of the integrator is proportional to the input current; the integration voltage of the integrator and the circuit threshold are in reverse; The integration charge amount of the input current of the integrator is equal to the integration charge amount of the reset current, and the charge balance is as follows; I 复位 is the reset current, and the number of reset current times is proportional to the magnitude of the input current Iin; The output pulse signal of the I / F conversion circuit is introduced into I by controlling the reset current 复位 The control signal for turning on or off is output through the shaping circuit. The relationship between the output pulse frequency Fo and the input current Iin is as follows F O = K * I in K is a constant coefficient.

5. The constant current source circuit according to claim 1, wherein: The comparison circuit includes a comparator circuit and a threshold circuit connected electrically; The threshold circuit is used to generate a comparison threshold voltage; The threshold circuit includes a ±15V power supply and a proportional resistor electrically connected to the ±15V power supply; The positive comparator includes an operational amplifier U2 electrically connected to the +15V power supply of the threshold circuit, The negative comparator includes an operational amplifier U3 electrically connected to the -15V power supply of the threshold circuit, The access terminals of the operational amplifier U2 and the operational amplifier U3 are the output terminal Vout of the operational amplifier U1; There are several resistors electrically connected between the output terminals of the operational amplifier U2 and the operational amplifier U3; The operational amplifier U2 and the operational amplifier U3 respectively output levels K+ and K-; The FW terminal of the constant current source is connected to the emitters of the triodes Q1 and Q2 through the series-connected capacitor C*4 and resistor R11; the emitters of the triodes Q1 and Q2 are respectively connected to pin 2 of the operational amplifier U2 and pin 3 of the operational amplifier U3; the emitters of the triodes Q1 and Q2 are grounded through the resistor R4; Pin 3 of the operational amplifier U2 is connected to +15V through the resistor R5; pin 2 of the operational amplifier U3 is grounded through the resistor R8.

6. The constant current source circuit according to claim 5, characterized in that: The reversing switch serves as a switching circuit, including a chip U3Z, wherein pins 8 and 9 are respectively connected to pin 6 of the D flip-flop U2AZ, and pins 1 and 16 are respectively connected to pin 8 of the D flip-flop U2BZ; and pin 14 is electrically connected to a signal FW.

7. The constant current source circuit according to claim 1, characterized in that: The constant current source includes op amps U6 and U7. Pin 7 of op amp U2 outputs two paths, one is connected to 5V through resistor R9, and the other is connected to pin 2 of chip U4A; Pin 7 of op amp U3 outputs two paths, one is connected to 5V through resistor R10, and the other is connected to pin 12 of chip U4B; Pin 5 of chip U4A outputs three paths, one of which is connected to chip U5B, the second to MOSGM1, and the third to ground through capacitor C6; pin 6 is electrically connected to MOSGM2; The S terminal of MOSGM1 is connected to the FW terminal, and the D terminal is connected to H+15V; The D terminal of MOSGM2 is connected to the FW terminal, and the S terminal is grounded; the chip U5B output port F-; Pin 9 of chip U4B outputs three paths, one of which is connected to chip U5A, the second to MOSGM3, and the third to ground through capacitor C*1; pin 8 is electrically connected to MOSGM4; The S terminal of MOSGM3 is connected to the COM terminal, and the D terminal is connected to the FW terminal; the S terminal of MOSGM4 is connected to the COM terminal, and the D terminal is grounded; the chip U5A output port F+.

8. The constant current source circuit according to claim 1, wherein: The operational amplifier U6 is preceded by a chip U8; pins 2 and 3 of the chip U8 are connected to the H+15V voltage; pins 9 and 10 of the chip U8 are connected to the ground through parallel capacitors C3 and C2, and the other is connected to the input pin 30 of the operational amplifier U6; pin 2 of the operational amplifier U6 is grounded through a resistor R12, and pin 6 is connected to pin 3 of the operational amplifier U7; Pin 6 is connected to pin 2 through resistor R13; Pin 2 of the operational amplifier U7 is grounded through the sampling resistor RS, and pin 6 is electrically connected to pin 2 of MOSGQ3, and pin 1 of MOSGQ3 is grounded through the capacitor C*3 and connected to the signal COM terminal; Pin 1 of MOSGQ3 is electrically connected to the collector of transistor Q4, pin 3 of MOSGQ3 is connected to the base of transistor Q4, and the emitter of transistor Q4 is connected to sampling resistor RS through resistor R15.

9. A constant current source control method, characterized in that: The method comprises the constant current source circuit as claimed in claim 1; the method comprises the following steps; For the negative current input state, when there is no current input, the integrator outputs zero voltage, and the negative comparator and the negative synchronization circuit both output low level; When there is a negative current input, the integrator starts to integrate positively and enter the charging state, and the output voltage increases; when the output voltage reaches the threshold voltage of the comparator at the subsequent stage, the comparator flips, the negative synchronization circuit trigger flips accordingly, and the output circuit outputs a counting pulse; at the same time, the reversing switch is turned on, and the constant current source circuit is controlled to reversely charge the integrator through the reversing switch, enter the reset state, and the integrator output voltage begins to decrease; When the integrator output voltage drops below the comparator threshold voltage, the synchronous circuit trigger flips, turns off the reversing switch, and turns off the counting output at the same time. The circuit integrator returns to the negative current charging process, thereby realizing I / F conversion.

10. The constant current source control method according to claim 9, wherein: The constant current source circuit comprising claim 1; When a negative current is input, the input negative current is integrated, and the output at the V OUT terminal is in a positive voltage integration state, which is a forward integration; The comparison circuit compares the integrator output signal with the threshold voltage. The comparator flips periodically to identify the input state and provides a control signal for the subsequent synchronization circuit to control the periodic reset of the subsequent commutation switch and constant current source. As a supporting operation for the integrator, the operation process of the comparator is as follows: when the input signal of the comparator is zero, the output Vout of the integrator is zero, and the outputs K+ and K- of comparators A and B are both at low level; when the comparator inputs a negative current, the integrator integrates positively; when the output voltage Vout of the integrator is greater than the threshold voltage, comparator A flips, K+ changes from low level to high level, controls the actions of the subsequent synchronization circuit and commutation switch, shorts the positive constant current source to the current input terminal through the switch, and sets the reset current to be greater than the input current. During the output of a negative pulse by the output circuit, the integrator integrates negatively to put the circuit into a reset state; when the output voltage Vout of the integrator is less than the preset comparison voltage, K+ changes from high level to low level, cuts off the short circuit between the constant current source and the input signal, and the integrator resumes the positive integration state to achieve I / F conversion.

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