Test substrate, manufacturing method and test method

By setting a ruler structure on the test substrate, the problem of difficult to determine the position accuracy after the huge amount of transfer of the light-emitting chip is solved, and high-precision transfer and high yield process effects are achieved.

CN120261332APending Publication Date: 2025-07-04BOE TECHNOLOGY GROUP CO LTD +1
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Patent Information

Application Number
CN202410010360.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-01-02
Publication Date
2025-07-04

AI Technical Summary

Technical Problem

The prior art cannot determine the position accuracy of the light-emitting chip after a huge amount of transfer, which affects the process yield.

Method used

A test substrate is designed, including a substrate substrate and a ruler structure, and the position accuracy of the transferred light-emitting chip is tested through the ruler structure to ensure high-precision transfer.

Benefits of technology

The position deviation of the light-emitting chip is measured through the ruler structure, which improves the accuracy of the light-emitting chip transfer and ensures the process yield.

✦ Generated by Eureka AI based on patent content.

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Abstract

The embodiment of the invention discloses a test substrate, a manufacturing method and a test method, the test substrate is configured to place a light-emitting chip transferred from a light-emitting display chip, and the test substrate comprises a substrate and at least one scale structure arranged on the substrate; the scale structure is arranged on at least one side of the transferred at least one light-emitting chip and is configured to test the position precision of the transferred at least one light-emitting chip.
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Description

Technical Field

[0001] The present disclosure relates to, but is not limited to, the field of display technologies, and particularly to a test substrate, a manufacturing method, and a test method. Background Art

[0002] The technology of Light Emitting Diode (LED) has developed for nearly thirty years. From the initial solid-state lighting power supply to the backlight source in the display field and then to the LED display screen, it provides a solid foundation for its wider application. With the development of chip manufacturing and packaging technologies, sub-millimeter Light Emitting Diode (Mini LED) displays with a size of about 50 to 60 micrometers and Micro Light Emitting Diode (Micro LED) displays with a size of less than 15 micrometers have gradually become a hot spot in display panels. Among them, Micro LED displays have significant advantages such as low power consumption, high color gamut, high stability, high resolution, ultra-thin, and easy implementation of flexible displays, and are expected to become a better display technology to replace Organic Light Emitting Diode (OLED) displays. Summary of the Invention

[0003] The following is an overview of the subject matter described in detail in the present disclosure. This overview is not intended to limit the scope of protection of the claims.

[0004] Embodiments of the present disclosure provide a test substrate configured to place light-emitting chips transferred from a light-emitting display chip. The test substrate includes: a substrate and at least one scale structure disposed on the substrate.

[0005] The scale structure is disposed on at least one side of at least one of the transferred light-emitting chips and is configured to test the position accuracy of at least one transferred light-emitting chip.

[0006] In some possible implementation manners, at least one scale structure includes: a first scale and at least one second scale. The at least one second scale is connected to the first scale and is located on the same side of the first scale. The first scale extends in a first direction, and the second scale extends in a second direction, and the first direction intersects with the second direction.

[0007] In some possible implementation manners, the test substrate further includes: a marking structure configured to mark the position of at least one light-emitting chip on the test substrate.

[0008] In some possible implementation manners, the number of the second scales in at least one scale structure is greater than or equal to two, and the interval between two adjacent second scales is greater than the length of one light-emitting chip in the first direction and less than the length of two light-emitting chips in the first direction; the length of the first scale in the first direction is greater than or equal to the length of at least one light-emitting chip in the first direction and the distance between adjacent light-emitting chips.

[0009] In some possible implementation manners, the number of the second scales in at least one scale structure is one, and one end of the second scale is connected to the middle part of the first scale.

[0010] In some possible implementation manners, the number of the second scales in at least one scale structure is two, and the number of the first scales is two. Two ends of one second scale are respectively connected to the first ends of the two first scales, and two ends of the other second scale are respectively connected to the second ends of the two first scales, wherein one end of the second scale is connected to the first end or the second end of one first scale.

[0011] In some possible implementation manners, the number of the second scales in at least one scale structure is one, and one end of the second scale is connected to the first end of the first scale, or one end of the second scale is connected to the second end of the first scale.

[0012] In some possible implementation manners, the test substrate is a driving backplane, and the driving backplane further includes: a driving structure layer and a protective layer sequentially stacked on a substrate, and the scale structure is disposed on the protective layer;

[0013] The material of the protective layer is silicon oxide or silicon nitride.

[0014] In some possible implementation manners, the marking structure is disposed on the protective layer.

[0015] In some possible implementation manners, the manufacturing material of at least one of the scale structure and the marking structure includes: metal.

[0016] In some possible implementation manners, the test substrate is a transfer substrate.

[0017] The embodiments of the present disclosure further provide a test method, which is configured to be applicable to the test substrate described in any one of the embodiments. The method includes:

[0018] Obtaining a set distance, where the set distance includes: the distance between at least one scale structure and the boundary of the light-emitting chip located at the target position;

[0019] Obtaining an actual distance between at least one scale structure and the boundary of the transferred light-emitting chip through the scale structure;

[0020] Obtain a distance difference based on the set distance and the actual distance;

[0021] Determine the position deviation of at least one transferred light-emitting chip based on the distance difference.

[0022] In some possible implementation manners, the obtaining the set distance includes:

[0023] Obtain a first set distance and a second set distance, where the first set distance is the distance between a first scale of at least one scale structure and a first boundary of a light-emitting chip located at a target position, the second set distance is the distance between a second scale of at least one scale structure and a second boundary of the light-emitting chip located at the target position, the first boundary extends along a first direction and is close to the first scale, and the second boundary extends along a second direction and is close to the second scale.

[0024] In some possible implementation manners, the obtaining the actual distance between at least one scale structure and the boundary of the transferred light-emitting chip through the scale structure includes:

[0025] Test and obtain a first actual distance and a second actual distance through the scale structure, where the first actual distance is the actual distance between a first scale of at least one scale structure and a first boundary of the transferred light-emitting chip, and the second actual distance is the actual distance between a second scale of at least one scale structure and a second boundary of the transferred light-emitting chip.

[0026] In some possible implementation manners, the obtaining the distance difference according to the set distance and the actual distance includes:

[0027] Determine the difference between the first actual distance and the first set distance as a first distance difference; and determine the difference between the second actual distance and the second set distance as a second distance difference.

[0028] In some possible implementation manners, determining the position deviation of at least one transferred light-emitting chip according to the distance difference includes:

[0029] Compare the first distance difference and the second distance difference with a set threshold;

[0030] When at least one of the first distance difference and the second distance difference is greater than or equal to the set threshold, determine that the position deviation of at least one transferred light-emitting chip exceeds the set threshold.

[0031] An embodiment of the present disclosure further provides a method for manufacturing a test substrate, configured to manufacture the test substrate according to any one of the embodiments, and the method includes:

[0032] Provide a substrate.

[0033] Form a scale structure on the substrate.

[0034] In some possible implementation manners, forming the scale structure on the substrate includes:[[]]

[0035] Form a driving structure layer on the substrate.

[0036] Form a protective layer on the driving structure layer.

[0037] Form the scale structure on the protective layer.

[0038] In some possible implementation manners, the method further includes:[[]]

[0039] Form a marking structure on the substrate.

[0040] In some possible implementation manners, forming the marking structure on the substrate includes:[[]]

[0041] Form a driving structure layer on the substrate.

[0042] Form a protective layer on the driving structure layer.

[0043] Form the marking structure on the protective layer.

[0044] After reading and understanding the drawings and the detailed description, other aspects can be understood. Description of the Drawings

[0045] The drawings are used to provide an understanding of the technical solutions of the present disclosure, and constitute a part of the specification. Together with the embodiments of the present disclosure, they are used to explain the technical solutions of the present disclosure, and do not constitute a limitation to the technical solutions of the present disclosure.

[0046] Figure 1 Schematic structural diagram of a test substrate provided by an exemplary embodiment of the present disclosure;

[0047] Figure 2 Schematic structural diagram of a test substrate provided by an exemplary embodiment of the present disclosure;

[0048] Figure 3A Schematic structural diagram of a driving backplane provided by an exemplary embodiment of the present disclosure;

[0049] Figure 3B Schematic structural diagram of a driving backplane provided by an exemplary embodiment of the present disclosure;

[0050] Figure 4 Schematic structural diagram of a test substrate provided by an exemplary embodiment of the present disclosure;

[0051] Figure 5 The flowchart of the test method provided by an exemplary embodiment of the present disclosure. Specific implementation manners

[0052] To make the purpose, technical solutions and advantages of the present disclosure clearer and more understandable, the embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings. Note that the implementation manners can be implemented in multiple different forms. It is easy for those of ordinary skill in the art to understand the fact that the manners and contents can be transformed into various forms without departing from the gist and scope of the present disclosure. Therefore, the present disclosure should not be construed as being limited only to the contents described in the following implementation manners. Without conflict, the embodiments in the present disclosure and the features in the embodiments can be combined arbitrarily with each other. To keep the following description of the embodiments of the present disclosure clear and concise, the detailed descriptions of some known functions and known components are omitted. The accompanying drawings of the embodiments of the present disclosure only relate to the structures involved in the embodiments of the present disclosure, and other structures can refer to the general design.

[0053] In the drawings, sometimes for clarity, the sizes of the respective components, the thicknesses of the layers or the regions are exaggerated. Therefore, one manner of the present disclosure is not necessarily limited to such dimensions, and the shapes and sizes of the components in the drawings do not reflect the true proportions. In addition, the drawings schematically show ideal examples, and one manner of the present disclosure is not limited to the shapes or values shown in the drawings.

[0054] The ordinal numbers such as "first", "second", "third", etc. in this specification are set to avoid confusion of the components, rather than to limit in terms of quantity.

[0055] In this specification, for convenience, terms indicating orientation or positional relationship such as "middle part", "upper", "lower", "front", "rear", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. are used to describe the positional relationship of the components with reference to the accompanying drawings, which are only for facilitating the description of this specification and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operate in a specific orientation, and thus cannot be construed as a limitation to the present disclosure. The positional relationship of the components changes appropriately according to the directions describing the respective components. Therefore, it is not limited to the terms described in the specification, and can be replaced appropriately according to the situation.

[0056] In this specification, unless otherwise clearly specified and defined, the terms "mounted", "connected", and "coupled" shall be understood in a broad sense. For example, it may be a fixed connection, a detachable connection, or an integral connection; it may be a mechanical connection or an electrical connection; it may be a direct connection, an indirect connection through an intermediate member, or a communication inside two elements. For those of ordinary skill in the art, the specific meanings of the above terms in this disclosure can be understood according to specific circumstances.

[0057] In this specification, a transistor refers to an element including at least three terminals: a gate electrode, a drain electrode, and a source electrode. The transistor has a channel region between the drain electrode (drain electrode terminal, drain region, or drain electrode) and the source electrode (source electrode terminal, source region, or source electrode), and current can flow through the drain electrode, the channel region, and the source electrode. Note that in this specification, the channel region refers to the region where current mainly flows.

[0058] In this specification, the first pole can be the drain electrode and the second pole can be the source electrode, or the first pole can be the source electrode and the second pole can be the drain electrode. In cases where transistors with opposite polarities are used or the current direction changes during circuit operation, etc., the functions of the "source electrode" and "drain electrode" sometimes swap with each other. Therefore, in this specification, the "source electrode" and "drain electrode" can swap with each other.

[0059] In this specification, "electrically connected" includes cases where components are connected together through an element having some electrical effect. There is no particular limitation on the "element having some electrical effect" as long as it can transfer electrical signals between the components to be connected. Examples of the "element having some electrical effect" include not only electrodes and wirings, but also switching elements such as transistors, resistors, inductors, capacitors, and other elements having various functions.

[0060] In this specification, "parallel" means a state where the angle formed by two straight lines is -10° or more and 10° or less, and thus also includes a state where the angle is -5° or more and 5° or less. In addition, "perpendicular" means a state where the angle formed by two straight lines is 80° or more and 100° or less, and thus also includes a state where the angle is 85° or more and 95° or less.

[0061] In this specification, "film" and "layer" can be swapped with each other. For example, sometimes the "conductive layer" can be changed to the "conductive film". Similarly, sometimes the "insulating film" can be changed to the "insulating layer".

[0062] In this specification, the "same-layer setting" adopted refers to a structure formed by patterning two (or more) structures through the same patterning process, and their materials can be the same or different. For example, the materials of the precursors for forming multiple structures with the same-layer setting are the same, and the finally formed materials can be the same or different.

[0063] In this specification, triangles, rectangles, trapezoids, pentagons, hexagons, etc. are not strictly defined and can be approximate triangles, rectangles, trapezoids, pentagons, hexagons, etc. There can be some small deformations caused by tolerances, and there can be chamfers, arc edges, and deformations, etc.

[0064] The "about" in this disclosure means not strictly defining the boundary and allowing values within the process and measurement error ranges.

[0065] The massive transfer technology refers to a technology that quickly and accurately transfers a light-emitting array grown on an epitaxial substrate to a driving circuit substrate and forms good electrical connection and mechanical fixation with the driving circuit. Currently, when performing massive transfer, the light-emitting chips can be directly transferred onto the driving backplane; or with the aid of a transfer backplane, the light-emitting array on the epitaxial substrate is transferred to the driving backplane through the transfer backplane.

[0066] Whether directly transferring the light-emitting chips onto the driving backplane or transferring the light-emitting array onto the driving backplane with the aid of a transfer backplane, currently, it is impossible to determine the position accuracy of the light-emitting chips after massive transfer, which affects the transfer accuracy of the light-emitting chips and further affects the overall process yield.

[0067] Figure 1 As shown in the structural schematic diagram of the test substrate provided for an exemplary embodiment of this disclosure, Figure 1 the test substrate is configured to place the light-emitting chips 10 transferred from the light-emitting display chips. The test substrate may include: a substrate substrate 20 and at least one scale structure 30 provided on the substrate substrate.

[0068] The scale structure is provided on at least one side of at least one of the transferred light-emitting chips and is configured to test the position accuracy of at least one of the transferred light-emitting chips.

[0069] After the light-emitting chips are transferred to the test substrate, the position accuracy of the transferred light-emitting chips on the test substrate can be tested through the scale structure on the test substrate. The scale structure is provided on at least one side of the light-emitting chips, and the transfer position accuracy of the light-emitting chips can be determined, ensuring that the light-emitting chips are transferred to the test substrate with high precision and guaranteeing the overall process yield.

[0070] In an exemplary embodiment of this disclosure, as Figure 1As shown, at least one scale structure may include: a first scale 301 and at least one second scale 302. The at least one second scale is connected to the first scale and is located on the same side of the first scale. The first scale extends along a first direction, and the second scale extends along a second direction, and the first direction and the second direction intersect.

[0071] The scale structure may include structures in two directions: a first scale extending along a first direction and a second scale extending along a second direction, for testing the position deviation of the light-emitting chip. Among them, the first scale is used to test the position deviation of the light-emitting chip in the first direction, and the second scale is used to test the position deviation of the light-emitting chip in the second direction. The first direction may be the X direction, and the second direction may be the Y direction.

[0072] In an exemplary embodiment of the present disclosure, the number of second scales in at least one scale structure is greater than or equal to two, and the interval between two adjacent second scales is greater than the length of one light-emitting chip in the first direction and less than the length of two light-emitting chips in the first direction, ensuring that at least one second scale is provided on at least one side of the light-emitting chip in the second direction, for testing the position deviation of the light-emitting chip in the second direction.

[0073] The length of the first scale in the first direction is greater than or equal to the length of at least one light-emitting chip in the first direction and the distance between adjacent light-emitting chips.

[0074] The length of the first scale in the first direction is the length of one light-emitting chip in the first direction, or the sum of the lengths of multiple light-emitting chips in the first direction and the distances between multiple light-emitting chips.

[0075] The scale structure may be provided around each light-emitting chip. At this time, the length of the first scale in the first direction is the length of one light-emitting chip in the first direction. Or the scale structure may be provided around multiple light-emitting chips. For example, a scale structure is provided around every 2, every 4, or every 9 light-emitting chips. At this time, the length of the first scale in the first direction is the sum of the lengths of multiple light-emitting chips in the first direction and the distances between multiple light-emitting chips.

[0076] In an exemplary embodiment of the present disclosure, the lengths of the first scale and the second scale in the first direction and the second direction may be determined according to the arrangement of the light-emitting chips on the test substrate, and the present disclosure does not limit and elaborate herein.

[0077] In an exemplary embodiment of the present disclosure, the number of second scales in at least one scale structure is one, and one end of the second scale is connected to the middle of the first scale. As Figure 1As shown, the shape of the scale structure can be T-shaped, and a scale structure can be arranged around at least one light-emitting chip. The scale structure can include: a first scale and a second scale, and one end of the second scale is connected to the middle of the first scale.

[0078] In an exemplary embodiment, as Figure 1 shown, a scale structure can be arranged around every two light-emitting chips, and the length of the first scale in the first direction is the sum of the lengths of two light-emitting chips in the first direction and the distance between the two light-emitting chips.

[0079] In an exemplary embodiment of the present disclosure, the number of second scales in at least one scale structure is two, and the number of first scales is two. One end of one second scale is respectively connected to the first ends of the two first scales, and one end of the other second scale is respectively connected to the second ends of the two first scales, wherein one end of the second scale is connected to the first end or the second end of one first scale. Figure 2 The structural schematic diagram of the test substrate provided by an exemplary embodiment of the present disclosure, as Figure 2 shown, the shape of the scale structure can be a square, and a scale structure can be arranged around at least one light-emitting chip. The scale structure can include: two first scales and two second scales. The interval between the two first scales is greater than the length of one light-emitting chip in the second direction and less than the length of two light-emitting chips in the second direction. The interval between the two second scales is greater than the length of one light-emitting chip in the first direction and less than the length of two light-emitting chips in the first direction. The two first scales surround two frames of at least one light-emitting chip in the first direction, and the two second scales surround two frames of at least one light-emitting chip in the second direction.

[0080] In an exemplary embodiment, as Figure 2 shown, a scale structure can be arranged around each light-emitting chip, and the length of the first scale in the first direction is the length of one light-emitting chip in the first direction.

[0081] In an exemplary embodiment of the present disclosure, the number of second scales in at least one scale structure is one. One end of the second scale is connected to the first end of the first scale, or one end of the second scale is connected to the second end of the first scale. The shape of the scale structure can be L-shaped, and a scale structure can be arranged around at least one light-emitting chip. The scale structure can include: a first scale and a second scale, and one end of the second scale is connected to one of the ends of the first scale.

[0082] In an exemplary embodiment of the present disclosure, as Figure 1 and Figure 2As shown, the test substrate may further include: a marking structure 40 configured to mark the position of at least one light-emitting chip on the test substrate. Through the marking structure on the test substrate, the position of the transferred light-emitting chip in the test substrate can be marked.

[0083] In an exemplary embodiment of the present disclosure, the test substrate may be a transfer substrate configured to transfer the light-emitting chips on the light-emitting display chip. The light-emitting chips on the light-emitting display chip can be transferred through the transfer substrate. First, the light-emitting chips are transferred onto the transfer substrate, and then transferred to the driving backplane through the transfer substrate.

[0084] In an exemplary embodiment of the present disclosure, the test substrate may be a driving backplane, and the light-emitting chips are directly transferred onto the driving backplane. Figure 3A Schematic diagram of the structure of the driving backplane provided by an exemplary embodiment of the present disclosure Figure 3B Schematic diagram of the structure of the driving backplane provided by an exemplary embodiment of the present disclosure, as Figure 3A and 3B As shown, the driving backplane may further include: a driving structure layer 50 and a protective layer 60 stacked in sequence on the substrate 20, and the scale structure 30 may be disposed on the protective layer 60. The material of the protective layer is silicon oxide or silicon nitride.

[0085] The scale structure is disposed on the protective layer 60, which is the last layer in the manufacturing of the driving backplane, to ensure that the scale structure can still be observed after the light-emitting chips are transferred.

[0086] In an exemplary embodiment of the present disclosure, the marking structure 40 is disposed on the protective layer. The marking structure is disposed on the protective layer 60, which is the last layer in the manufacturing of the driving backplane, to ensure that the marking structure can still be observed after the light-emitting chips are transferred.

[0087] In an exemplary embodiment of the present disclosure, the manufacturing material of at least one of the scale structure and the marking structure may include: metal.

[0088] In an exemplary embodiment of the present disclosure, the scale structure and the marking structure may be fabricated on the entire test substrate, or may be fabricated at specified positions on the test substrate according to actual needs. Figure 4 Schematic diagram of the structure of the test substrate provided by an exemplary embodiment of the present disclosure, as Figure 4 As shown, the scale structure and the marking structure can be fabricated in the entire driving backplane.

[0089] The embodiment of the present disclosure also provides a manufacturing method of a light-emitting display substrate, configured to manufacture a test substrate. The manufacturing method of the test substrate may include:

[0090] Step 100: Provide a substrate.

[0091] Step 200: Form a scale structure on the substrate.

[0092] The test substrate is the test substrate provided by any of the foregoing embodiments. The implementation principle and implementation effect are similar and will not be elaborated here.

[0093] In an exemplary embodiment of the present disclosure, the manufacturing method of the test substrate may further include:

[0094] Form a marking structure on the substrate.

[0095] In an exemplary embodiment of the present disclosure, the test substrate may be a driving backplane. Forming a scale structure on the substrate may include:

[0096] Form a driving structure layer on the substrate;

[0097] Form a protective layer on the driving structure layer;

[0098] Form a scale structure on the protective layer.

[0099] In an exemplary embodiment of the present disclosure, the test substrate may be a driving backplane. Forming a marking structure on the substrate may include:

[0100] Form a driving structure layer on the substrate;

[0101] Form a protective layer on the driving structure layer;

[0102] Form a marking structure on the protective layer.

[0103] The embodiments of the present disclosure further provide a test method, which is configured to be applicable to a test substrate for testing the position deviation of the transferred light-emitting chip on the test substrate. Figure 5 It is a flowchart of the test method provided by an exemplary embodiment of the present disclosure. As Figure 5 shown, the test method may include:

[0104] S501: Obtain a set distance, where the set distance may include: the distance between at least one scale structure and the boundary of the light-emitting chip located at the target position.

[0105] The distance between the scale structure and the boundary of the light-emitting chip can be preset according to the size of the light-emitting chip and the size of the test substrate. Therefore, the distance between at least one scale structure and the boundary of the light-emitting chip located at the target position can be referred to as the set distance.

[0106] In one example, obtaining the set distance may include:

[0107] Obtain a first set distance and a second set distance, where the first set distance is the distance between the first scale of at least one scale structure and the first boundary of the light-emitting chip located at the target position, and the second set distance is the distance between the second scale of at least one scale structure and the second boundary of the light-emitting chip located at the target position. The first boundary extends along a first direction and is close to the first scale, and the second boundary extends along a second direction and is close to the second scale.

[0108] The scale structure includes a first scale extending along the first direction and a second scale extending along the second direction. The set distance between the scale structure and the boundary of the light-emitting chip may include: the distance between the first scale and the first boundary of the light-emitting chip (which can be referred to as the first set distance), and the distance between the second scale and the second boundary of the light-emitting chip (which can be referred to as the second set distance).

[0109] According to the size of the light-emitting chip and the size of the test substrate, the first set distance A and the second set distance B can be designed, such as A = 10μm and B = 5μm.

[0110] S502: Obtain the actual distance between at least one scale structure and the boundary of the transferred light-emitting chip through the scale structure.

[0111] The actual distance between the boundary of the transferred light-emitting chip and the scale structure can be measured through the scale structure, so as to obtain the position accuracy of the transferred light-emitting chip on the test substrate.

[0112] In one example, obtaining the actual distance between at least one scale structure and the boundary of the transferred light-emitting chip through the scale structure may include:

[0113] Test through the scale structure to obtain a first actual distance and a second actual distance, where the first actual distance is the actual distance between the first scale of at least one scale structure and the first boundary of the transferred light-emitting chip, and the second actual distance is the actual distance between the second scale of at least one scale structure and the second boundary of the transferred light-emitting chip.

[0114] The actual distance between the scale structure and the boundary of the transferred light-emitting chip may include: the distance between the first scale and the first boundary of the light-emitting chip (which can be referred to as the first actual distance), and the distance between the second scale and the second boundary of the light-emitting chip (which can be referred to as the second actual distance). The first actual distance a between the first boundary of the transferred light-emitting chip and the first scale can be measured through the scale structure, and the first actual distance b between the second boundary of the transferred light-emitting chip and the second scale can be measured through the scale structure, such as a = 4μm and b = 10μm.

[0115] S503: Obtain a distance difference according to the set distance and the actual distance.

[0116] The position accuracy of the transferred light-emitting chip on the test substrate can be obtained from the difference between the actual distance between the boundary of the light-emitting chip and the scale structure and the set distance.

[0117] In one example, obtaining the distance difference according to the set distance and the actual distance may include: determining the difference between the first actual distance and the first set distance as the first distance difference; and determining the difference between the second actual distance and the second set distance as the second distance difference.

[0118] The position deviation of the transferred light-emitting chip on the test substrate can be calculated by comparing the differences between the first actual distance a and the second actual distance b and the first set distance A and the second set distance B respectively: a - A = -6 μm; b - B = 5 μm.

[0119] S504: Determine the position deviation of at least one transferred light-emitting chip according to the distance difference.

[0120] By comparing the differences between the first actual distance a and the second actual distance b and the first set distance A and the second set distance B respectively, the position deviation of the transferred light-emitting chip on the test substrate can be obtained. For example, if the differences between the first actual distance a and the second actual distance b and the first set distance A and the second set distance B are calculated as: a - A = -6 μm; b - B = 5 μm, the position deviation of the transferred light-emitting chip on the test substrate can be determined to be -6 μm and 5 μm.

[0121] In one example, determining the position deviation of at least one transferred light-emitting chip according to the distance difference may include: comparing the first distance difference and the second distance difference with a set threshold; when at least one of the first distance difference and the second distance difference is greater than or equal to the set threshold, determining that the position deviation of at least one transferred light-emitting chip exceeds the set threshold.

[0122] By comparing the first distance difference between the first actual distance a and the first set distance A with the set threshold, and comparing the second distance difference between the second actual distance b and the second set distance B with the set threshold, it can be determined whether the position deviation of the transferred light-emitting chip exceeds the set threshold. According to whether the position deviation of the transferred light-emitting chip exceeds the set threshold, it can provide a reference for optimizing the subsequent transfer process. For example, if it is determined that the position deviation of the transferred light-emitting chip exceeds the set threshold, the product is characterized as a defective product and no subsequent process is performed; if it is determined that the position deviation of the transferred light-emitting chip does not exceed the set threshold, the product is characterized as a good product and the product can continue to be processed in the subsequent process until the product is completed.

[0123] In one example, when at least one of the first distance difference and the second distance difference is greater than or equal to a set threshold value, the first distance difference and / or the second distance difference greater than or equal to the set threshold value can be marked by a marking structure.

[0124] The test substrate is the test substrate provided in any of the foregoing embodiments, and the implementation principle and implementation effect are similar, so details are not described herein again.

[0125] Provided by the embodiments of the present disclosure, the distance between the boundary of the light-emitting chip and the scale structure can be measured through the scale structure, so as to obtain the position accuracy of the transferred light-emitting chip on the test substrate, ensure the high-precision transfer of the light-emitting chip to the test substrate, and ensure the overall process yield.

[0126] The drawings in the present disclosure only relate to the structures involved in the embodiments of the present disclosure, and other structures can refer to the general design.

[0127] For clarity, in the drawings used to describe the embodiments of the present disclosure, the thickness and size of the layer or microstructure are enlarged. It can be understood that when an element such as a layer, film, region or substrate is referred to as being "on" or "under" another element, the element can be "directly" on or under the other element, or there can be intermediate elements.

[0128] Although the disclosed embodiments are as above, the described content is only an embodiment adopted for facilitating the understanding of the present disclosure, and is not used to limit the present disclosure. Any person skilled in the art within the scope of the present disclosure can make any modifications and changes in the form and details of the implementation without departing from the spirit and scope disclosed by the present disclosure. However, the scope of patent protection of the present disclosure shall still be subject to the scope defined by the appended claims.

Claims

1. A test substrate, characterized in that, Configured to place the light-emitting chips transferred from the light-emitting display chips, the test substrate includes: a substrate substrate and at least one scale structure disposed on the substrate substrate; The scale structure is disposed on at least one side of the at least one transferred light-emitting chip, and is configured to test the position accuracy of the at least one transferred light-emitting chip.

2. The test substrate according to claim 1, wherein The at least one scale structure includes: a first scale and at least one second scale, the at least one second scale is connected to the first scale and is located on the same side of the first scale, the first scale extends along a first direction, the second scale extends along a second direction, and the first direction and the second direction intersect.

3. The test substrate according to claim 1, wherein The test substrate further includes: a marking structure configured to mark the position of the at least one light-emitting chip on the test substrate.

4. The test substrate according to claim 2, characterized in that, The number of the second scales in the at least one scale structure is greater than or equal to two, and the interval between two adjacent second scales is greater than the length of one light-emitting chip along the first direction and less than the length of two light-emitting chips along the first direction; the length of the first scale along the first direction is greater than or equal to the length of the at least one light-emitting chip along the first direction and the distance between adjacent light-emitting chips.

5. The test substrate according to claim 4, wherein, The number of the second scales in the at least one scale structure is one, and one end of the second scale is connected to the middle of the first scale.

6. The test substrate according to claim 4, wherein, The number of the second scales in the at least one scale structure is two, and the number of the first scales is two. One end of one second scale is respectively connected to the first ends of the two first scales, and one end of the other second scale is respectively connected to the second ends of the two first scales, wherein one end of the second scale is connected to the first end or the second end of one first scale.

7. The test substrate according to claim 4, characterized in that, The number of the second scales in the at least one scale structure is one, and one end of the second scale is connected to the first end of the first scale, or one end of the second scale is connected to the second end of the first scale.

8. The test substrate according to claim 3, wherein, The test substrate is a driving backplane, and the driving backplane further includes: a driving structure layer and a protective layer sequentially stacked on the substrate substrate, and the scale structure is disposed on the protective layer; The material of the protective layer is silicon oxide or silicon nitride.

9. The test substrate according to claim 8, characterized in that, The marking structure is disposed on the protective layer.

10. The test substrate according to claim 3, wherein, The manufacturing material of at least one of the scale structure and the marking structure includes: metal.

11. The test substrate according to claim 1, characterized in that, The test substrate is a transfer substrate.

12. A testing method, characterized in that, Configured to be applicable to the test substrate according to any one of claims 1 to 11, the method includes: Obtaining a set distance, the set distance including: the distance between at least one scale structure and the boundary of the light-emitting chip located at the target position; Obtaining the actual distance between at least one scale structure and the boundary of the transferred light-emitting chip through the scale structure; Obtaining a distance difference according to the set distance and the actual distance; Determining the position deviation of the at least one transferred light-emitting chip according to the distance difference.

13. The method according to claim 12, characterized in that, The obtaining the set distance includes: Obtain a first set distance and a second set distance, where the first set distance is the distance between the first scale of at least one scale structure and the first boundary of the light-emitting chip located at the target position, and the second set distance is the distance between the second scale of at least one scale structure and the second boundary of the light-emitting chip located at the target position. The first boundary extends in a first direction and is close to the first scale, and the second boundary extends in a second direction and is close to the second scale.

14. The method according to claim 13, wherein The obtaining of the actual distance between at least one scale structure and the boundary of the transferred light-emitting chip through the scale structure includes: Testing through the scale structure to obtain a first actual distance and a second actual distance, where the first actual distance is the actual distance between the first scale of at least one scale structure and the first boundary of the transferred light-emitting chip, and the second actual distance is the actual distance between the second scale of at least one scale structure and the second boundary of the transferred light-emitting chip.

15. The method according to claim 14, wherein The obtaining of the distance difference according to the set distance and the actual distance includes: Determine the difference between the first actual distance and the first set distance as the first distance difference; and determine the difference between the second actual distance and the second set distance as the second distance difference.

16. The method according to claim 15, characterized in that, Determine the position deviation of at least one transferred light-emitting chip according to the distance difference, including: Compare the first distance difference and the second distance difference with a set threshold; When at least one of the first distance difference and the second distance difference is greater than or equal to the set threshold, determine that the position deviation of at least one transferred light-emitting chip exceeds the set threshold.

17. A method for manufacturing a test substrate, configured to manufacture the test substrate according to any one of claims 1 to 11, characterized in that, The method includes: Provide a substrate. Form a scale structure on the substrate.

18. The method according to claim 17, wherein The forming of the scale structure on the substrate includes: Form a driving structure layer on the substrate. Form a protective layer on the driving structure layer. Form the scale structure on the protective layer.

19. The method according to claim 17, wherein The method further includes: Form a marking structure on the substrate.

20. The method according to claim 19, wherein The forming of the marking structure on the substrate includes: Form a driving structure layer on the substrate. Form a protective layer on the driving structure layer. Form the marking structure on the protective layer.