Two-dimensional active sum-difference network device and preparation method thereof

Abstract

The invention belongs to the technical field of radar and communication, and relates to a two-dimensional active sum-difference network device and a preparation method thereof. Comprising four antenna sub-arrays, at least three four-channel amplitude-phase multifunctional chips and four one-to-three equal power division Wilkinson power dividers, the four antenna sub-arrays are distributed on an antenna array plane, and one antenna sub-array corresponds to one quadrant of the antenna array plane; the four-channel amplitude-phase multifunctional chip is provided with four branch input ports and one junction; the common end of one antenna sub-array is connected with the common end of the one-to-three equal power division Wilkinson power divider; and one path after power division of each one-to-three equal power division Wilkinson power divider is respectively connected with four branch input ports of the four-channel amplitude-phase multifunctional chip. Through modular design and dynamic parameter configuration, high-integration-level and low-loss two-dimensional beam forming is achieved, and meanwhile flexible expansion of the antenna subarrays is supported.

Description

Technical Field

[0001] The present invention belongs to the technical field of radar and communication, and particularly relates to a two-dimensional active sum-difference network device and a preparation method thereof. Background Art

[0002] Traditional two-dimensional sum-difference networks usually adopt discrete component designs, such as 3dB bridges, power dividers, phase shifters, attenuators, etc., resulting in a large system volume, low integration, and high cost. For example, in traditional solutions, each antenna subarray needs to be independently configured with a phase shifter and an attenuator, and a microstrip sum-difference device, a waveguide sum-difference device, etc. are used to realize signal synthesis, which not only increases the system complexity but also may introduce signal loss and phase error. In addition, traditional solutions are difficult to simultaneously achieve low sidelobe control of sum and difference beams and cannot meet the requirements of high-precision angle measurement and anti-interference in modern radar systems.

[0003] In recent years, with the development of microwave monolithic integrated circuit (MMIC) technology, integrated amplitude-phase control chips have gradually been applied to radar systems. However, existing integrated solutions mostly target one-dimensional beamforming and are difficult to directly extend to two-dimensional scenarios. For example, some solutions achieve two-dimensional control by cascading multiple one-dimensional amplitude-phase chips, but this method will result in a too long signal path, increased delay, and poor system scalability. Summary of the Invention

[0004] The purpose of the present invention is to provide a two-dimensional active sum-difference network device and a preparation method thereof, which can achieve high-integration and low-loss two-dimensional sum-difference beamforming through modular design and dynamic parameter configuration, and support flexible expansion of antenna subarrays and simultaneous low sidelobe shaping of sum, azimuth difference, and elevation difference beams.

[0005] The present invention is realized through the following technical solutions: In the first aspect, a two-dimensional active sum-difference network device is provided, including: 4 antenna subarrays, at least 3 four-channel amplitude-phase multifunctional chips, and 4 one-to-three equal-power Wilkinson power dividers; the 4 antenna subarrays are distributed on the antenna array surface, and 1 antenna subarray corresponds to 1 quadrant of the antenna array surface; the four-channel amplitude-phase multifunctional chip has 4 branch input ports and 1 combining port; the common end of 1 antenna subarray is connected to the common end of 1 one-to-three equal-power Wilkinson power divider; one of the paths after power division of each one-to-three equal-power Wilkinson power divider is respectively connected to the 4 branch input ports of the four-channel amplitude-phase multifunctional chip.

[0006] Furthermore, the two-dimensional active sum-difference network device further includes a wave control module for dynamically configuring parameters for digital phase shifters and numerically controlled attenuators; the wave control module is connected to the four-channel amplitude-phase multifunctional chip through the SPI communication protocol.

[0007] Furthermore, a 6-bit digital phase shifter, a 6-bit digitally controlled attenuator, and an amplifier are integrated on the 4-channel amplitude-phase multi-functional chip.

[0008] Furthermore, the combiners include: a sum port, an azimuth difference port, and an elevation difference port.

[0009] Furthermore, the number of antenna sub-arrays can be expanded to ≥16.

[0010] In a second aspect, a method for manufacturing a two-dimensional active sum-difference network is provided, including the following steps: distributing 4 antenna sub-arrays on the antenna array surface such that 1 antenna sub-array corresponds to 1 quadrant of the antenna array surface; correspondingly connecting the common ends of each antenna sub-array to the common end of a 1-way-to-3-way equal-power Wilkinson power divider; connecting one of the paths after power division of each 1-way-to-3-way equal-power Wilkinson power divider to the 4 branch input ports of the 4-channel amplitude-phase multi-functional chip respectively.

[0011] Furthermore, the method for manufacturing a two-dimensional active sum-difference network further includes the following steps: connecting each 4-channel amplitude-phase multi-functional chip to the wave control module through the SPI communication protocol. Integrating a 6-bit digital phase shifter, a 6-bit digitally controlled attenuator, and an amplifier on the 4-channel amplitude-phase multi-functional chip. Expanding the number of antenna sub-arrays to ≥16.

[0012] Compared with the prior art, the present invention has the following advantages and beneficial effects: 1. High integration: By integrating the 4-channel amplitude-phase multi-functional chip and the Wilkinson power divider, the system volume is significantly reduced.

[0013] 2. High-precision control: The 6-bit digital phase shifter and the 6-bit digitally controlled attenuator achieve precise control of amplitude and phase.

[0014] 3. Fast dynamic adjustment: The SPI protocol supports microsecond-level parameter updates, meeting the requirements of anti-interference and tracking in radar systems.

[0015] 4. Flexible scalability: By adding antenna sub-arrays and cascading chips, it can be expanded to more than 16 sub-arrays, suitable for large phased array radar systems.

[0016] 5. Freedom of output interface: By configuring the parameters of each 4-channel amplitude-phase multi-functional chip in the device through SPI, the sum, azimuth difference, and elevation difference output ports can be arbitrarily swapped, without being fixed by physical positions.

[0017] 6. Freedom of beamforming: By configuring the parameters of the 4-channel amplitude-phase multi-functional chip in the device through SPI, 3 sum beams can be achieved. If cascaded expansion is adopted, a multi-beam phased array antenna (more than 3 beams) can also be formed. Description of the Drawings

[0018] The accompanying drawings described herein are used to provide a further understanding of the embodiments of the present invention, form a part of this application, and do not limit the embodiments of the present invention. In the drawings: Figure 1 It is a schematic structural diagram of a two-dimensional active sum-difference network device provided by an embodiment of the present invention.

[0019] Figure 2 It is a top view of the antenna array surface provided by an embodiment of the present invention.

[0020] Reference numerals in the drawings and corresponding component names: 1 - Antenna sub-array, 2 - 4-channel amplitude-phase multifunctional chip, 3 - 1-to-3 equal-power Wilkinson power divider, 4 - Wave control module. Specific embodiments

[0021] To make the objectives, technical solutions, and advantages of the present invention clearer and more understandable, the present invention will be further described in detail below in conjunction with the embodiments. The illustrative embodiments and descriptions of the present invention are only used to explain the present invention and do not limit the present invention. The following described embodiments are some, but not all, of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts fall within the scope of protection of the present invention.

[0022] In the following description, a large number of specific details are set forth in order to provide a thorough understanding of the present invention. However, it is obvious to those of ordinary skill in the art that the present invention does not have to be implemented with these specific details. In other embodiments, well-known structures, materials, or methods are not specifically described to avoid obscuring the present invention. The materials, instruments, and reagents used in the following embodiments can be obtained from commercial sources unless otherwise specified. The technical means used in the embodiments are conventional means well-known to those of ordinary skill in the art unless otherwise specified.

[0023] In addition, the terms "first" and "second" are only used for descriptive purposes and cannot be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include one or more of such features. In the description of this application, "a plurality" means two or more unless otherwise specifically defined.

[0024] Embodiment 1: A two-dimensional active sum-difference network device is provided in the first aspect, such as Figure 1 and Figure 2As shown in the figure, it includes: 4 antenna sub-arrays 1, at least 3 four-channel amplitude-phase multifunctional chips 2, and 4 one-to-three equal-power Wilkinson power dividers 3. The 4 antenna sub-arrays 1 are distributed on the antenna array surface, and 1 antenna sub-array 1 corresponds to 1 quadrant of the antenna array surface; the four-channel amplitude-phase multifunctional chip 2 has 4 branch input ports and 1 combinational port; the common end of 1 antenna sub-array 1 is connected to the common end of 1 one-to-three equal-power Wilkinson power divider 3; one of the three paths after power division by each one-to-three equal-power Wilkinson power divider 3 is respectively connected to the 4 branch input ports of the four-channel amplitude-phase multifunctional chip 2. Among them, a 6-bit digital phase shifter, a 6-bit digitally controlled attenuator, and an amplifier are integrated on the four-channel amplitude-phase multifunctional chip 2. The combinational port includes: a sum port, an azimuth difference port, and an elevation difference port. It should be noted that in addition to the 6-bit digital phase shifter and the 6-bit digitally controlled attenuator, there can also be digital phase shifters and digitally controlled attenuators with higher bit numbers.

[0025] The signal flow of the two-dimensional active sum-difference network device is as follows: The RF signal is input from the antenna sub-array 1, divided into three paths by the one-to-three equal-power Wilkinson power divider 3, and one of the paths enters the branch input port of the four-channel amplitude-phase multifunctional chip 2. The four-channel amplitude-phase multifunctional chip 2 adjusts the amplitude and phase of the 4 signals. Specifically: the 6-bit digital phase shifter (resolution 5.625°) realizes phase control, the 6-bit digitally controlled attenuator (resolution 0.5 dB) realizes amplitude control, and the amplifier compensates for signal loss. The adjusted signals are synthesized inside the four-channel amplitude-phase multifunctional chip 2 and output through the common port, forming a sum port or an azimuth difference port or an elevation difference port signal output according to the known port definition.

[0026] The excitation signal is input from the sum port, the azimuth difference port, and the elevation difference port, amplified by the amplifier, and then enters the phase shifter and the attenuator.

[0027] In addition to the antenna sub-array 1, the four-channel amplitude-phase multifunctional chip 2, and the one-to-three equal-power Wilkinson power divider 3, the two-dimensional active sum-difference network device also includes a wave control module 4 for dynamically configuring parameters for the digital phase shifter and the digitally controlled attenuator; the wave control module 4 is connected to the four-channel amplitude-phase multifunctional chip 2 through the SPI communication protocol. SPI communication protocol method: The wave control module 4 acts as the master device and sends a 16-bit control word to the four-channel amplitude-phase multifunctional chip 2 through the SPI interface, where the high 6 bits control the phase shifter and the low 6 bits control the attenuator. The communication rate can reach 10 MHz, and fast parameter update is supported. In terms of dynamic parameter configuration: Define the sum, azimuth difference, elevation difference information, and the common operating frequency information according to the actual situation, calculate the required phase offset and amplitude attenuation. Write the parameters into the four-channel amplitude-phase multifunctional chip 2 through the SPI protocol to achieve microsecond-level adjustment of the beam pointing.

[0028] In addition, the number of antenna sub-arrays 1 can be extended to ≥16, including the extension of antenna sub-arrays 1 and chip cascading. Among them, the extension of antenna sub-arrays 1 is to increase the number of antenna sub-arrays 1 to 16, which are evenly distributed in 4 quadrants of the antenna array plane; each antenna sub-array 1 is connected to an independent 4-channel amplitude-phase multifunctional chip 2 through a 1-to-3 power divider and is uniformly controlled by a wave control module 4. Chip cascading is to expand the number of channels by cascading multiple 4-channel amplitude-phase multifunctional chips 2. For example, cascading 4 chips realizes 16-channel control; the parameters are synchronized between the cascaded chips through the SPI bus to ensure signal consistency.

[0029] In summary, a two-dimensional active sum-difference network device proposed in the first aspect of this embodiment realizes the miniaturization, high precision, and high flexibility of the two-dimensional active sum-difference network through integrated design and dynamic parameter configuration, and is applicable to the beamforming requirements of modern radar and communication systems.

[0030] A method for preparing a two-dimensional active sum-difference network proposed in the second aspect of this embodiment includes the following steps: Step 1: Distribute 4 antenna sub-arrays on the antenna array plane so that 1 antenna sub-array corresponds to 1 quadrant of the antenna array plane.

[0031] Step 2: Connect the common ends of each antenna sub-array to the common end of a 1-to-3 equal-power Wilkinson power divider correspondingly.

[0032] Step 3: Connect one of the divided paths of each 1-to-3 equal-power Wilkinson power divider to the 4 branch input ports of the 4-channel amplitude-phase multifunctional chip respectively.

[0033] Furthermore, the method for preparing a two-dimensional active sum-difference network further includes the following steps: Connect each 4-channel amplitude-phase multifunctional chip to the wave control module through the SPI communication protocol; integrate a 6-bit digital phase shifter, a 6-bit digitally controlled attenuator, and an amplifier on the 4-channel amplitude-phase multifunctional chip; and extend the number of antenna sub-arrays to ≥16. It should be noted that in addition to the 6-bit digital phase shifter and the 6-bit digitally controlled attenuator, there can also be digital phase shifters and digitally controlled attenuators with higher bit numbers.

[0034] It should be understood that the "system", "device", "unit", and / or "module" used in this specification is a method for distinguishing different components, elements, parts, portions, or assemblies at different levels. However, if other words can achieve the same purpose, the said words can be replaced by other expressions.

[0035] As shown in this specification and the claims, unless the context clearly indicates otherwise, words such as "a", "an", "one", and / or "the" are not specifically singular and may also include the plural. Generally speaking, the terms "comprising" and "including" only indicate the inclusion of the steps and elements that have been clearly identified, and these steps and elements do not constitute an exclusive list. The method or device may also include other steps or elements.

[0036] The specific embodiments described above further elaborate on the purpose, technical solution, and beneficial effects of the present invention. It should be understood that the above description is only for the specific embodiments of the present invention and is not used to limit the protection scope of the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention should be included within the protection scope of the present invention.

[0037] It should be noted that the structures, ratios, sizes, etc. shown in the drawings of this specification are only used to cooperate with the content disclosed in the specification for those skilled in the art to understand and read, and are not used to limit the implementation conditions of the present invention. Therefore, they do not have technical substantial significance. Any modification of the structure, change in the proportional relationship, or adjustment of the size, without affecting the efficacy and purpose that the present invention can achieve, should still fall within the scope that the technical content disclosed in the present invention can cover. At the same time, the terms such as "upper", "lower", "left", "right", "middle", etc. cited in this specification are only for the convenience of description and are not used to limit the implementation scope of the present invention. The change or adjustment of their relative relationship, without substantial change in the technical content, should also be regarded as the scope in which the present invention can be implemented.

Claims

1. A two-dimensional active sum-difference network device, characterized in that Including: 4 antenna sub-arrays (1), at least 3 four-channel amplitude-phase multifunctional chips (2), and 4 one-to-three equal-power Wilkinson power dividers (3); the 4 antenna sub-arrays (1) are distributed on the antenna array surface, and 1 antenna sub-array (1) corresponds to 1 quadrant of the antenna array surface; the four-channel amplitude-phase multifunctional chip (2) has 4 branch input ports and 1 combinational port; the common end of 1 antenna sub-array (1) is connected to the common end of 1 one-to-three equal-power Wilkinson power divider (3); one of the paths after power division of each one-to-three equal-power Wilkinson power divider (3) is respectively connected to the 4 branch input ports of the four-channel amplitude-phase multifunctional chip (2).

2. The two-dimensional active sum-difference network device according to claim 1, wherein It further includes a wave control module (4) for dynamically configuring parameters for the digital phase shifter and digital control attenuator; the wave control module (4) is connected to the four-channel amplitude-phase multifunctional chip (2) through the SPI communication protocol.

3. The two-dimensional active sum-difference network device according to claim 1 or 2, characterized in that On the four-channel amplitude-phase multifunctional chip (2), a 6-bit digital phase shifter, a 6-bit digital control attenuator, and an amplifier are integrated.

4. A two-dimensional active sum-difference network device according to claim 1 or 2, characterized in that The combinational port includes: a sum port, an azimuth difference port, and an elevation difference port.

5. A two-dimensional active sum-difference network device according to claim 1 or 2, characterized in that The number of antenna sub-arrays (1) can be extended to ≥16.

6. A method for preparing a two-dimensional active sum-difference network, characterized in that, Including the following steps: Distribute 4 antenna sub-arrays on the antenna array surface so that 1 antenna sub-array corresponds to 1 quadrant of the antenna array surface; Connect the common end of each antenna sub-array correspondingly to the common end of 1 one-to-three equal-power Wilkinson power divider; Connect one of the paths after power division of each one-to-three equal-power Wilkinson power divider respectively to the 4 branch input ports of the four-channel amplitude-phase multifunctional chip.

7. A method for preparing a two-dimensional active sum-difference network according to claim 6, characterized in that, It further includes the following steps: Connect each four-channel amplitude-phase multifunctional chip to the wave control module through the SPI communication protocol.

8. A method for preparing a two-dimensional active sum-difference network according to claim 6 or 7, characterized in that, It further includes the following steps: Integrate a 6-bit digital phase shifter, a 6-bit digital control attenuator, and an amplifier on the four-channel amplitude-phase multifunctional chip.

9. A method for preparing a two-dimensional active sum-difference network according to claim 6 or 7, characterized in that, It further includes the following steps: Extend the number of antenna sub-arrays to ≥16.

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