Double-trapezoid semiconductor bridge transduction element chip and preparation method thereof

Abstract

The invention discloses a double-trapezoid semiconductor bridge transduction element chip and a preparation method thereof, and belongs to the technical field of electric initiating explosive devices, and the double-trapezoid semiconductor bridge transduction element chip comprises a substrate layer, an insulating layer, an N-type heavily-doped polycrystalline silicon layer and an electrode layer which are sequentially arranged from bottom to top; the upper surface of the substrate layer is oxidized to generate a layer of SiO2 as an insulating layer, a layer of N-type heavily-doped polycrystalline silicon layer is deposited and grown on the upper surface of the insulating layer, photoetching and etching are carried out on the middle part of the polycrystalline silicon layer to form a polycrystalline silicon bridge region with a double-trapezoid structure, and electrode layers are arranged above the two sides of the polycrystalline silicon bridge region. Compared with a traditional sharp-corner-shaped bridge region, the double-trapezoid polycrystalline silicon bridge region structure can disperse current gathering, slow down heat generation efficiency, prevent accidental damage to a semiconductor bridge caused by electrostatic discharge, meet the requirements for reducing ignition energy and improving ignition efficiency, and improve the ignition efficiency. The device has the advantages of high safety, high reliability, low ignition energy and the like.

Description

Technical Field

[0001] The present invention relates to the technical field of electro-explosive devices, and in particular to a double-trapezoidal semiconductor bridge transducer chip and a preparation method thereof. Background Art

[0002] As a kind of micro electro-explosive device, the semiconductor bridge is widely used in ignition, initiation and detonation systems. Its working principle is that the semiconductor material is heated by current, so that its temperature rises rapidly, undergoes a phase change and generates a high-temperature plasma, thereby igniting the surrounding energetic materials. The semiconductor bridge has the advantages of fast response speed, low energy requirement, small volume, etc., so it has been widely used in military, aerospace, civilian blasting and other fields. However, with the progress of technology, the extensive use of various high-power radio devices and electromagnetic weapons has made the electromagnetic environment increasingly harsh. At the same time, electro-explosive devices are gradually developing towards miniaturization and high integration, with smaller distances inside the device and lower withstand voltage capabilities. In actual use, semiconductor bridge electro-explosive devices are easily threatened by electrostatic discharge. Electrostatic discharge is a rapid high-energy release process, which may cause instantaneous high-current impact and local overheating to the semiconductor bridge, resulting in electrical breakdown, material damage or performance degradation, and even misfiring or failure of the electro-explosive device, which poses a great hidden danger to the operation of the equipment and the safety of operators.

[0003] However, in order to enable the semiconductor bridge transducer to quickly generate Joule heat and plasma, the common shape of the bridge area is double-V type. This bridge shape will cause the current to concentrate at the sharp corners at the upper and lower ends, but it is also most likely to be damaged at these sharp corners when suffering from electrostatic shock. In order to reduce the impact of electrostatic discharge on the semiconductor bridge, it is often necessary to adopt the means of parallel protection devices, but introducing additional protection devices will increase the complexity of circuit design and manufacturing cost, and inappropriate device selection will affect the firing performance of the semiconductor bridge. Summary of the Invention

[0004] The technical problem to be solved by the present invention is to provide a double-trapezoidal semiconductor bridge transducer chip and a preparation method thereof. By optimizing the structure of the polysilicon bridge area, the current distribution is dispersed, the problem that the current common semiconductor bridge is relatively sensitive to electrostatic discharge is solved, and the reliability and safety of the semiconductor bridge are improved without affecting its good firing performance.

[0005] To solve the above technical problems, the technical solution adopted by the present invention is: A double-trapezoidal semiconductor bridge transducer chip includes a base layer, an insulating layer, an N-type heavily doped polysilicon layer and an electrode layer; the insulating layer is arranged on the upper surface of the base layer, the N-type heavily doped polysilicon layer is arranged on the upper surface of the insulating layer, photolithography and etching are performed on the middle area of the N-type heavily doped polysilicon layer to form a polysilicon bridge, and the electrode layer is arranged on the upper surfaces on both sides of the polysilicon bridge.

[0006] A further improvement of the technical solution of the present invention lies in that: the material of the base layer is single-crystalline silicon, and the thickness is 300 - 500 μm.

[0007] A further improvement of the technical solution of the present invention lies in that: the material of the insulating layer is SiO2, and the thickness is 2 μm.

[0008] A further improvement of the technical solution of the present invention lies in that: the doping element of the N-type heavily doped polysilicon layer is P, and the doping concentration is around 10 19 ~10 20 atoms / cm 3 or so, and its thickness is 2 μm.

[0009] A further improvement of the technical solution of the present invention lies in that: the notch shape formed after etching the N-type heavily doped polysilicon layer is an isosceles trapezoid, symmetrically distributed on the upper and lower sides of the polysilicon bridge area; the length of the long side of the trapezoid is 80 μm, the length of the short side is 20 μm, and the angle between the long side and the hypotenuse of the trapezoid is 45°.

[0010] A further improvement of the technical solution of the present invention lies in that: the length of the polysilicon bridge area is 80 μm, the width is 380 μm, the thickness is 2 μm, and the resistance is 1 Ω.

[0011] A further improvement of the technical solution of the present invention lies in that: the electrode layer is composed of three metals, Ti, W, and Au, and the thickness is 1 μm.

[0012] A preparation method of a double-trapezoid semiconductor bridge transducer chip includes the following steps: S1. Generate a layer of SiO2 insulating layer on the upper surface of the cleaned and polished silicon-based base layer by thermal oxidation method, and then deposit a layer of polysilicon on the upper surface of the SiO2 insulating layer by chemical vapor deposition method; S2. Perform phosphorus ion implantation on the polysilicon layer, with a doping concentration of around 10 20 atoms / cm 3 or so, to form an N-type heavily doped polysilicon layer. Coat a positive photoresist on the surface of the N-type heavily doped polysilicon layer, use a lithography machine to expose the pattern of the double-trapezoid structure, use dry etching to etch the polysilicon layer into a double-trapezoid structure after development, and finally remove the photoresist and clean the surface; S3. Prepare an electrode layer including three materials, Ti, W, and Au, by magnetron sputtering technology; S4. Dice the prepared wafer, and perform an electrostatic discharge test on the packaged chip to test its electrostatic resistance ability.

[0013] The further improvement of the technical solution of the present invention lies in: in S4, an electrostatic discharge test simulating human body is carried out on the encapsulated chip, and the test conditions are a charging voltage of 25 kV, a capacitance of 500 pF, and a series discharge resistance of 5000 Ω.

[0014] Due to the adoption of the above technical solution, the technical progress achieved by the present invention is: 1. The present invention adopts a double-trapezoidal polysilicon bridge area structure, integrates the electrostatic protection function inside the chip, reduces the dependence on external components, simplifies the circuit design, and is more suitable for miniaturized and integrated applications.

[0015] 2. The manufacturing process of the double-trapezoidal semiconductor bridge transducer element of the present invention is similar to that of traditional semiconductor bridge chips. Only the mask design needs to be adjusted in the photolithography and etching processes to optimize the shape of the bridge area, without the need to add additional manufacturing processes, reducing the production cost.

[0016] 3. The present invention adopts a double-trapezoidal polysilicon bridge area structure to disperse the electric field, avoid the accumulation of electrostatic energy, fundamentally reduce the risk of electrostatic damage, and the protection effect is more direct and reliable; compared with using protection devices such as TVS diodes or Schottky diodes to achieve electrostatic protection by absorbing or discharging electrostatic energy, the response speed is improved. Description of the Drawings

[0017] Figure 1 is a cross-sectional view of the double-trapezoidal semiconductor bridge transducer element in the present invention; Figure 2 is a top view of the double-trapezoidal semiconductor bridge transducer element in the present invention; Figure 3 is a schematic diagram of the bridge area structure of the double-trapezoidal semiconductor bridge transducer element in the present invention; Among them, 1. Electrode layer; 2. N-type heavily doped polysilicon layer; 3. Insulating layer; 4. Substrate layer. Detailed Embodiment

[0018] The following further describes the present invention in detail with reference to the drawings and embodiments: The double-trapezoidal semiconductor bridge transducer element chip sequentially includes from bottom to top: a substrate layer 4, an insulating layer 3, an N-type heavily doped polysilicon layer 2, and an electrode layer 1; an insulating layer 3 is provided on the upper surface of the substrate layer 4, an N-type heavily doped polysilicon layer 2 is provided on the upper surface of the insulating layer 3, the middle area of the N-type heavily doped polysilicon is etched to form a polysilicon bridge, and electrode layers 1 are provided above the left and right sides of the polysilicon bridge; The material of the substrate layer 4 is selected as single crystal silicon, and the thickness is 300 - 500 μm; The material of the insulating layer 3 is selected as SiO2, and the thickness is 2 μm; The thickness of the N-type heavily doped polysilicon layer 2 is 2 μm, the doping element is P, and the doping concentration is 10 19 ~10 20 atoms / cm 3 ; After etching the middle region of the N-type heavily doped polysilicon layer 2, a double trapezoidal polysilicon bridge is formed. The long side of the trapezoid is the bridge length of 80 μm, the short side is 20 μm, the width is 380 μm, the included angle between the lower bottom edge and the hypotenuse is 45°, and the resistance is 1 Ω; The electrode layer 1 is composed of three metal elements, Ti, W, and Au, and the thickness is 1 μm; A preparation method of a double trapezoidal semiconductor bridge transducer element chip for preparing a double trapezoidal semiconductor bridge transducer element chip, comprising the following steps: S1. On the upper surface of the cleaned and polished silicon-based substrate 4, a SiO2 insulating layer 3 is formed by thermal oxidation, and then a polysilicon layer is deposited on the upper surface of the SiO2 insulating layer 3 by chemical vapor deposition; S2. Phosphorus ion implantation is carried out on the polysilicon layer, and the doping concentration is about 10 20 atoms / cm 3 to form an N-type heavily doped polysilicon layer 2. A positive photoresist is coated on the surface of the N-type heavily doped polysilicon layer 2, and a pattern of a double trapezoidal structure is exposed using a photolithography machine. After development, the polysilicon layer is etched into a double trapezoidal structure by dry etching, and finally the photoresist is removed and the surface is cleaned; S3. Use magnetron sputtering technology to prepare an electrode layer 1 including three materials, Ti, W, and Au; S4. The prepared wafer is diced, and an electrostatic discharge test is carried out on the packaged chip to test its antistatic ability.

[0019] In S4, an electrostatic discharge test simulating human body is carried out on the packaged chip.

[0020] Example 1 The present invention provides a double trapezoidal semiconductor bridge transducer element, the structure of which is as shown in Figure 1 、 2 . It includes a substrate layer 4 with a thickness of 300-500 μm and a material of single crystal silicon. An insulating layer 3 is arranged above the substrate layer 4, the thickness of the insulating layer 3 is about 2 μm, and the material is SiO2. An N-type heavily doped polysilicon layer 2 is arranged above the insulating layer 3. The middle region of the N-type heavily doped polysilicon layer 2 is etched to form a double trapezoidal polysilicon bridge area. Finally, electrode layers 1 are arranged above the left and right sides of the N-type heavily doped polysilicon layer 2. The electrode layer 1 is composed of three metal elements, Ti, W, and Au, and the thickness is about 1 μm.

[0021] As shown in Figure 3The bridge area structure of the double-trapezoidal semiconductor bridge shown, where the length of the double-trapezoidal semiconductor bridge area is the long side of the trapezoid L is 80 μm, and the short side l is 20 μm. The width of the bridge area W is 380 μm, the thickness is 2 μm, and the angle between the long side and the hypotenuse θ is 45°, and the resistance value is 1 Ω.

[0022] Since the Joule heat generated by the semiconductor bridge is proportional to the resistance value of the bridge area, in order to obtain better ignition performance, a semiconductor bridge area with a resistance value of 1 Ω is selected for preparation. Under the condition of determined dimensions, the doping concentration can be controlled to prepare a semiconductor bridge area with a resistance value of 1 Ω.

[0023] Example Two Example Two is the preparation method of Example One, which specifically includes the following steps S1. On the upper surface of the cleaned and polished silicon-based substrate 4, a SiO2 insulating layer 3 is formed by thermal oxidation method, and then a polysilicon layer is deposited on the upper surface of the SiO2 insulating layer 3 by chemical vapor deposition method; S2. Phosphorus ion implantation is carried out on the polysilicon layer, and the doping concentration is about 10 20 atoms / cm 3 to form an N-type heavily doped polysilicon layer 2. A positive photoresist is coated on the surface of the N-type heavily doped polysilicon layer 2. The pattern of the double-trapezoidal structure is exposed using a lithography machine. After development, the polysilicon layer is etched into a double-trapezoidal structure by dry etching. Finally, the photoresist is removed and the surface is cleaned; S3. Use magnetron sputtering technology to prepare an electrode layer 1 including three materials: Ti, W, and Au; S4. The prepared wafer is diced, and the packaged chip is subjected to an electrostatic discharge test to test its antistatic ability.

[0024] In the above embodiments, the present invention provides a double-trapezoidal semiconductor bridge transducer chip and its preparation method. In this embodiment, the bridge area structure adopts a double trapezoid, which disperses the current distribution, reduces the risk of electrostatic breakdown, and improves the safety and reliability of the semiconductor bridge transducer. Using the method of parallel protection devices to improve the antistatic ability of the semiconductor bridge transducer will increase additional packaging or welding steps, and at the same time, the response speed and energy absorption ability of the electrostatic protection devices are limited. By optimizing the bridge area structure to improve the antistatic ability of the semiconductor bridge, the risk of electrostatic damage is fundamentally reduced, the protection effect is more reliable, and at the same time, the difficulty of circuit design and preparation is reduced, which is more in line with the development trend of product miniaturization and integration.

[0025] The embodiments described above are only descriptions of the preferred embodiments of the present invention, and do not limit the scope of the present invention. Without departing from the design spirit of the present invention, various deformations and improvements made by those of ordinary skill in the art to the technical solutions of the present invention shall fall within the protection scope determined by the claims of the present invention.

Claims

1. A double-trapezoidal semiconductor bridge transducer chip, characterized in that: It includes a base layer (4), an insulating layer (3), an N-type heavily doped polysilicon layer (2) and an electrode layer (1); the insulating layer (3) is disposed on the upper surface of the base layer (4), the N-type heavily doped polysilicon layer (2) is disposed on the upper surface of the insulating layer (3), lithography and etching are performed on the middle region of the N-type heavily doped polysilicon layer (2) to form a polysilicon bridge, and the electrode layer (1) is disposed on the upper surfaces on both sides of the polysilicon bridge.

2. The double-trapezoid semiconductor bridge transducer chip according to claim 1, characterized in that: The material of the base layer (4) is single crystal silicon, and the thickness is 300 - 500 μm.

3. The double-trapezoid semiconductor bridge transducer chip according to claim 1, characterized in that: The material of the insulating layer (3) is SiO2, and the thickness is 2 μm.

4. The double-trapezoid semiconductor bridge transducer chip according to claim 1, wherein: The doping element of the N-type heavily doped polysilicon layer (2) is P, and the doping concentration is between 10 19 ~10 20 atoms / cm 3 or so, and its thickness is 2 μm.

5. The double-trapezoid semiconductor bridge transducer chip according to claim 4, characterized in that: The shape of the notch formed after etching the N-type heavily doped polysilicon layer (2) is an isosceles trapezoid, symmetrically distributed on the upper and lower sides of the polysilicon bridge region; the length of the long side of the trapezoid is 80 μm, the length of the short side is 20 μm, and the angle between the long side and the hypotenuse of the trapezoid is 45°.

6. The double trapezoidal semiconductor bridge transducer chip according to claim 5, characterized in that: The length of the polysilicon bridge region is 80 μm, the width is 380 μm, the thickness is 2 μm, and the resistance is 1 Ω.

7. The double-trapezoid semiconductor bridge transducer chip according to claim 1, characterized in that: The electrode layer (1) is composed of three metals, Ti, W and Au, and the thickness is 1 μm.

8. A preparation method of a double-trapezoid semiconductor bridge transducer element chip, characterized in that: A method for preparing a double trapezoidal semiconductor bridge transducer chip according to any one of claims 1 to 7, comprising the following steps: S1. Generate a layer of SiO2 insulating layer (3) on the upper surface of the cleaned and polished silicon base layer (4) by thermal oxidation, and then deposit a layer of polysilicon on the upper surface of the SiO2 insulating layer (3) by chemical vapor deposition; S2. Perform phosphorus ion implantation on the polysilicon layer with a doping concentration of about 10 20 atoms / cm 3 to form an N-type heavily doped polysilicon layer (2). Coat a positive photoresist on the surface of the N-type heavily doped polysilicon layer (2), use a lithography machine to expose the pattern of the double trapezoidal structure, after development, use dry etching to etch the polysilicon layer into a double trapezoidal structure, and finally remove the photoresist and clean the surface; S3. Prepare an electrode layer (4) including three materials, Ti, W and Au, by magnetron sputtering technology; S4. Dice the prepared wafer, and perform an electrostatic discharge test on the packaged chip to test its antistatic ability.

9. The double trapezoidal semiconductor bridge transducer chip according to claim 8, characterized in that: In S4, perform a simulated human body electrostatic discharge test on the packaged chip, and the test conditions are a charging voltage of 25 kV, a capacitance of 500 pF, and a series discharge resistance of 5000 Ω.

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