Voltage dynamic output stepless modulation circuit for vehicle and vehicle

Abstract

The invention provides a voltage dynamic output stepless modulation circuit for a vehicle, and the circuit comprises a control module U1, a system basic chip U2, a first low dropout linear regulator U3, a VDD adjustment module U4, a control logic power module U5, an adjustable low dropout linear regulator U6, a discharge circuit module U7, a bridging module, and a logic switch level conversion module. The U5 is connected with the output end of the power supply and is used for supplying power to the logic switch level conversion module; the logic switch level conversion module is used for converting a logic level signal sent by the U1 into a first logic level signal and providing a power supply for the bridge module. According to the technical scheme, direct-current multi-channel output, alternating-current output, multi-gear fixed voltage output and stepless output can be achieved, 1023 voltage modulation gears are provided, the output voltage can cover 0-6 V, and the voltage requirement of electric equipment on a vehicle is basically met; by detecting the current and voltage of the circuit, the working safety of the circuit is ensured.

Description

Technical Field

[0001] The present invention relates to the field of electronics, and in particular to a voltage dynamic output stepless adjustment circuit for a vehicle and a vehicle. Background Art

[0002] In recent years, the automotive industry has developed rapidly. The application of automotive electronic technology in vehicles has become more and more extensive, and the number and types of in-vehicle electrical equipment have also increased continuously.

[0003] On the one hand, the operating voltages of different in-vehicle electrical equipment are not the same, and it is necessary to adjust the voltages output to different electrical equipment separately. If it is implemented in the way of fixed voltage output, a lot of different voltage output lines need to be built in the design, which requires a large design investment.

[0004] On the other hand, the operating state of the electrical equipment can be adjusted by changing the operating voltage of the electrical equipment. Therefore, the importance of the design of the in-vehicle voltage regulation circuit is highlighted.

[0005] However, there are still many defects in the current technology in the design of the vehicle voltage regulation circuit. First of all, the output accuracy and accuracy of the general vehicle voltage regulation circuit still need to be improved, and there are phenomena that the regulated voltage is too high or too low, making the in-vehicle electrical appliances unable to work properly; secondly, for the existing modulation line architecture, the maximum output voltage after modulation cannot meet the actual needs of some electrical equipment; finally, there is a lack of short-circuit protection design for the voltage output after regulation, which poses a certain safety hazard.

[0006] In summary, there is an urgent need for a new vehicle voltage regulation circuit in this field to solve the above problems. Summary of the Invention

[0007] In order to overcome the above technical defects, the purpose of the present invention is to provide a voltage dynamic output stepless adjustment circuit for a vehicle. A power supply inputs power to the voltage dynamic output stepless adjustment circuit for a vehicle, including

[0008] a control module U1, a system basic chip U2, a first low-dropout linear regulator U3, a VDD adjustment module U4, a control logic power supply module U5, an adjustable low-dropout linear regulator U6, a discharge circuit module U7, a bridging module, and a logic switch level conversion module;

[0009] The input end of the power supply is connected to the system base chip U2 for supplying power to the system base chip U2. The system base chip U2 is connected to the control module U1 for supplying power to the control module U1. The system base chip U2 is communicatively connected to the first low-dropout linear regulator U3, the VDD adjustment module U4, and the control logic power supply module U5 for controlling the switching on and off of the first low-dropout linear regulator U3, the VDD adjustment module U4, and the control logic power supply module U5.

[0010] The first low-dropout linear regulator U3 is connected to the output end of the power supply for stabilizing the output voltage of the power supply.

[0011] The VDD adjustment module U4 is connected to the output end of the first low-dropout linear regulator U3 and receives the PWM output by the control module U1 for outputting a corresponding VDD-adjust output voltage.

[0012] The adjustable low-dropout linear regulator U6 is connected to the output end of the VDD adjustment module U4 for boosting the VDD-adjust output voltage to a VDD-OUT output voltage and outputting the VDD-OUT output voltage to the discharge circuit module U7.

[0013] The control logic power supply module U5 is connected to the output end of the power supply for supplying power to the logic switch level conversion module.

[0014] The logic switch level conversion module is used for converting the logic level signal sent by the control module U1 into a first logic level signal and supplying power to the bridging module.

[0015] Preferably, a sampling module is further included for sampling and converting the VDD-OUT output voltage output by the adjustable low-dropout linear regulator U6 and the output voltage of the bridging module, and sending the converted feedback voltage to the control module U1.

[0016] The control module U1 adjusts the PWM output to the VDD adjustment module U4 according to the feedback voltage until the feedback voltage is within a first threshold range.

[0017] Preferably, the first low-dropout linear regulator U3 includes a first filter capacitor C1, a second filter capacitor C2, and a series resistor R1.

[0018] The first filter capacitor C1 and the second filter capacitor C2 are connected in parallel. The first ends of the first filter capacitor C1 and the second filter capacitor C2 are both grounded. The second ends of the first filter capacitor C1 and the second filter capacitor C2 are sequentially connected to the output end of the first low-dropout linear regulator U3.

[0019] The first end of the series resistor R1 is connected to the EN pin of the first low dropout linear regulator U3, and the second end of the series resistor R1 is connected to the power supply VDDS enabling the first low dropout linear regulator U3.

[0020] Preferably, the VDD adjustment module U4 includes a first operational amplifier;

[0021] The first end of the VDD adjustment module U4 receives the PWM output by the control module U1, and is successively connected to the non-inverting input terminal of the first operational amplifier via the series-connected second resistor R2 and third resistor R3. The first end of the third capacitor C3 is grounded, and the second end is connected between the first end of the VDD adjustment module U4 and the second resistor R2. The first end of the fourth capacitor C4 is grounded, and the second end is connected between the second resistor R2 and the third resistor R3. The first end of the fourth resistor R4 is grounded, and the second end is connected between the third resistor R3 and the non-inverting input terminal of the first operational amplifier;

[0022] The first end and the second end of the fifth resistor R5 are respectively connected to the inverting input terminal and the output terminal of the first operational amplifier;

[0023] The second end of the VDD adjustment module U4 receives the output voltage VDDS of the system base chip U2, and is successively connected to the inverting input terminal of the first operational amplifier via the series-connected seventh resistor R7 and sixth resistor R6. The second end of the fifth resistor R5 is connected between the sixth resistor R6 and the inverting input terminal of the first operational amplifier;

[0024] The first end of the eighth resistor R8 is connected between the seventh resistor R7 and the sixth resistor R6, and the second end is grounded; the first end of the fifth capacitor C5 is grounded, and the second end is connected between the first end of the eighth resistor R8 and the sixth resistor R6;

[0025] The first end of the sixth capacitor C6 is grounded, and the second end is connected to the first end of the fifth resistor R5;

[0026] The seventh capacitor C7 is connected in parallel with the fifth resistor R5. The first end of the seventh capacitor C7 is connected between the sixth resistor R6 and the second end of the fifth resistor R5, and the second end of the seventh capacitor C7 is connected between the first end of the fifth resistor R5 and the second end of the sixth resistor R6;

[0027] The output terminal of the first operational amplifier outputs a corresponding VDD-adjust output voltage.

[0028] Preferably, the input terminal of the adjustable low dropout linear regulator U6 is connected to the output terminal of the first low dropout linear regulator U3. The first terminal of the ninth capacitor is grounded, and the second terminal is connected between the input terminal of the adjustable low dropout linear regulator U6 and the output terminal of the first low dropout linear regulator U3;

[0029] The adjustment pin of the adjustable low dropout linear regulator U6 is connected to the output terminal of the first operational amplifier. The first terminal of the tenth capacitor is grounded, and the second terminal is connected between the adjustment pin of the adjustable low dropout linear regulator U6 and the output terminal of the first operational amplifier;

[0030] The first terminal of the tenth resistor R10 is connected between the second terminal of the tenth capacitor and the adjustment pin, and the second terminal is connected to the output terminal of the adjustable low dropout linear regulator U6 and is sequentially connected to the second terminals of the parallel-connected eleventh capacitor C11, twelfth capacitor C12, and thirteenth capacitor C13. The first terminals of the eleventh capacitor C11, twelfth capacitor C12, and thirteenth capacitor C13 are all grounded;

[0031] The second terminal of the eleventh capacitor C11 is connected to the output terminal of the adjustable low dropout linear regulator U6 to output the VDD-OUT output voltage.

[0032] Preferably, the sampling module includes a first sampling circuit for sampling the VDD-OUT output voltage output by the adjustable low dropout linear regulator U6;

[0033] The first terminal of the first sampling circuit inputs the VDD-OUT output voltage, which is sequentially grounded via the series-connected eleventh resistor R11 and twelfth resistor R12. The first terminal of the thirteenth resistor is connected between the eleventh resistor R11 and the twelfth resistor R12, and the second terminal is connected to the output terminal of the first sampling circuit for outputting the first feedback voltage of the VDD-OUT output voltage;

[0034] The first terminal of the fourteenth capacitor C14 is grounded, and the second terminal is connected between the second terminal of the thirteenth resistor and the output terminal of the first sampling circuit;

[0035] The sampling module includes a current detection circuit for sampling the current output by the adjustable low dropout linear regulator U6.

[0036] Preferably, the bridging module includes four series-connected MOS transistors, which are the first MOS transistor D7, the second MOS transistor D8, the fourth MOS transistor D10, and the third MOS transistor D9 in clockwise order, and the corresponding four switches, the first switch EN1, the second switch EN2, the fourth switch EN4, and the third switch EN3;

[0037] The first MOS transistor D7 and the third MOS transistor D9 are located on one side of the bridging module. The source electrode of the first MOS transistor D7 is connected to the drain electrode of the third MOS transistor D9. The first end of the twentieth capacitor C20 is grounded, and the second end of the twentieth capacitor C20 is connected between the source electrode of the first MOS transistor D7 and the drain electrode of the third MOS transistor D9. The second end of the twentieth capacitor C20 outputs a first voltage VOUTA;

[0038] The second MOS transistor D8 and the fourth MOS transistor D10 are located on the other side of the bridging module. The source electrode of the second MOS transistor D8 is connected to the drain electrode of the fourth MOS transistor D10. The first end of the twenty-first capacitor C21 is grounded, and the second end of the twenty-first capacitor C21 is connected between the source electrode of the second MOS transistor D8 and the drain electrode of the fourth MOS transistor D10. The second end of the twenty-first capacitor C21 outputs a second voltage VOUTB;

[0039] The source electrodes of the third MOS transistor D9 and the fourth MOS transistor D10 are connected and then grounded;

[0040] The drain electrode of the first MOS transistor D7 is connected to the drain electrode of the second MOS transistor D8. The input end of the bridging module is connected between the drain electrode of the first MOS transistor D7 and the drain electrode of the second MOS transistor D8, and is connected to the VDD-OUT voltage output by the adjustable low-dropout linear regulator U6;

[0041] The first switch EN1, the second switch EN2, the fourth switch EN4, and the third switch EN3 are respectively connected to the logic switch level conversion module.

[0042] Preferably, the discharge circuit module U7 includes an NMOS transistor D6. The source electrode of the NMOS transistor D6 is grounded, the drain electrode is connected to the first end of the twenty-fifth resistor R25, and the gate is used to receive the discharge enabling signal en_dis;

[0043] The second end of the twenty-fifth resistor R25 is connected to the second end of the twenty-fifth capacitor R25, and the first end of the twenty-fifth capacitor R25 is grounded;

[0044] The output end of the discharge circuit module U7 is connected between the second end of the twenty-fifth resistor R25 and the second end of the twenty-fifth capacitor R25, and is used to discharge to the VOUT3;

[0045] The control module U1 includes an ADC interface for detecting the voltage of the VOUT3.

[0046] Preferably, the control logic power supply module U5 includes a second low-dropout linear regulator. The input pin of the second low-dropout linear regulator is connected to the power supply, and the output pin outputs a second level;

[0047] The logic switch level conversion module includes four conversion modules, namely a first conversion module, a second conversion module, a third conversion module, and a fourth conversion module, which are respectively connected to the first switch EN1, the second switch EN2, the third switch EN3, and the fourth switch EN4;

[0048] Among them, the conversion module includes a first triode T13 and a second triode T13 connected in series in sequence. The first triode T1 is a PNP type triode, and the second triode T1 is an NPN type triode;

[0049] The emitter of the first triode T1 receives the second level. The collector of the first triode T1 is connected to the switch EN of the bridge module. The base of the first triode T1 is connected to the collector of the second triode T1. The emitter of the second triode T1 is grounded, and the base of the second triode T1 is used to receive the logic control signal sent by the control module U1.

[0050] Preferably, the vehicle sends a wake-up signal to the system base chip U2 through the LIN bus; inputs the power supply VDDS to the first low-dropout linear regulator U3, the VDD adjustment module U4, and the control logic power supply module U5.

[0051] The present invention also discloses a vehicle, including the voltage dynamic output stepless adjustment circuit for a vehicle as described in any one of the above.

[0052] The present invention designs a dynamic voltage dynamic output stepless adjustment circuit, which can output in multiple DC channels, or can output in AC. It can output fixed voltages in multiple gears, or can output steplessly, and has a very wide application environment adaptability; has a very high modulation accuracy, has 1023 voltage modulation gears, and performs secondary correction of the output voltage by performing ADC detection on the output voltage; the output voltage can cover 0 - 6V, basically meeting the voltage requirements of on-vehicle electrical equipment; ensures the safety of the line operation by detecting the circuit current and voltage. Description of the Drawings

[0053] Figure 1 It is a schematic diagram of the voltage dynamic output stepless adjustment circuit for a vehicle in an embodiment of the present invention;

[0054] Figure 2 is Figure 1 a schematic diagram of the first low-dropout linear regulator U3 in the shown embodiment;

[0055] Figure 3 is Figure 1 a schematic diagram of the VDD adjustment module U4 in the shown embodiment;

[0056] Figure 4 For Figure 1 the schematic diagram of the adjustable low dropout linear regulator U6 in the illustrated embodiment;

[0057] Figures 5(1)-(2) are Figure 1 the schematic diagram of the sampling module in the illustrated embodiment;

[0058] Figure 6 For Figure 1 the schematic diagram of the bridging module in the illustrated embodiment;

[0059] Figure 7 For Figure 1 the schematic diagram of the discharge circuit module U7 in the illustrated embodiment;

[0060] Figures 8(1)-(2) are Figure 1 the schematic diagram of the control logic power supply module U5 and the logic switch level conversion module in the illustrated embodiment;

[0061] Figure 9 For Figure 1 the schematic diagram of the system basis chip U2 in the illustrated embodiment. Detailed implementation manners

[0062] The advantages of the present invention will be further elaborated below in conjunction with the accompanying drawings and specific embodiments.

[0063] Here, the exemplary embodiments will be described in detail, and the examples are shown in the drawings. When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present disclosure. On the contrary, they are merely examples of devices and methods consistent with some aspects of the present disclosure as detailed in the appended claims.

[0064] It should be understood that although the terms first, second, third, etc. may be used in the present disclosure to describe various information, these information should not be limited to these terms. These terms are only used to distinguish the same type of information from each other. For example, without departing from the scope of the present disclosure, the first information may also be referred to as the second information, and similarly, the second information may also be referred to as the first information. Depending on the context, the word "if" as used herein may be interpreted as "when" or "while" or "in response to determining".

[0065] In the description of the present invention, unless otherwise specified and defined, it should be noted that the terms "installation", "connection", and "connection" should be understood in a broad sense. For example, it may be a mechanical connection or an electrical connection, or it may be the internal communication of two components. It may be directly connected or indirectly connected through an intermediate medium. For those of ordinary skill in the art, the specific meanings of the above terms can be understood according to specific circumstances.

[0066] In the following description, suffixes such as "module", "component", or "unit" used to denote elements are only for facilitating the description of the present invention and have no specific meaning in themselves. Therefore, "module" and "component" can be used interchangeably.

[0067] Figure 1 It is an overall framework diagram of a voltage dynamic output stepless adjustment circuit for a vehicle in an embodiment of the present invention. In the voltage dynamic output stepless adjustment circuit for a vehicle in this embodiment, a power supply inputs power to the voltage dynamic output stepless adjustment circuit for a vehicle, including a control module U1, a system basic chip U2, a first low-dropout linear regulator U3, a VDD adjustment module U4, a control logic power supply module U5, an adjustable low-dropout linear regulator U6, a discharge circuit module U7, a bridging module, and a logic switch level conversion module.

[0068] As Figure 1 shown, the input end of the power supply is connected to the system basic chip U2 for supplying power to the system basic chip U2. The system basic chip U2 is connected to the control module U1 for supplying power to the control module U1. The system basic chip U2 is communicatively connected to the first low-dropout linear regulator U3, the VDD adjustment module U4, and the control logic power supply module U5 for controlling the switching and closing of the first low-dropout linear regulator U3, the VDD adjustment module U4, and the control logic power supply module U5.

[0069] The first low-dropout linear regulator U3 is connected to the output end of the power supply for stabilizing the output voltage of the power supply. The VDD adjustment module U4 is connected to the output end of the first low-dropout linear regulator U3 and receives the PWM output by the control module U1 for outputting a corresponding VDD-adjust output voltage.

[0070] The adjustable low-dropout linear regulator U6 is connected to the output end of the VDD adjustment module U4 for boosting the VDD-adjust output voltage to a VDD-OUT output voltage and outputting the VDD-OUT output voltage to the discharge circuit module U7. The control logic power supply module U5 is connected to the output end of the power supply for supplying power to the logic switch level conversion module. The logic switch level conversion module is used for converting the logic level signal sent by the control module U1 into a first logic level signal and supplying power to the bridging module.

[0071] In this embodiment, the output voltage of the power supply is converted into a stable and fixed input voltage through U3. The PWM given by U1 obtains the corresponding output voltage of VDD-adjust through U4. This output voltage obtains the VDD-OUT with stronger driving ability to meet the requirements in U6. The control logic of U1 controls the bridge module to achieve DC output switching control or AC output level conversion based on VDD-OUT after boosting through the logic level conversion circuit powered by U5. The LDO inside U2 supplies power to U1 and performs switching control on U3, U4, and U5.

[0072] In addition, the voltage dynamic output stepless adjustment circuit for vehicles in this embodiment further includes a sampling module, which is used to sample and convert the VDD-OUT output voltage output by the adjustable low-dropout linear regulator U6 and the output voltage of the bridge module, and send the converted feedback voltage to the control module U1. The control module U1 adjusts the PWM output to the VDD adjustment module U4 according to the feedback voltage until the feedback voltage is within the first threshold range.

[0073] In the prior art, the switch is directly controlled by a single machine without going through Figure 1 the logic switch level conversion of U5 as the power supply. The highest control logic is 3.3 / 5V. Since the network threshold voltage VGSth of the MOS switch is generally above 2V, that is, the control logic level - voltage output is greater than 2V. The 3.3 / 5V control logic can only ensure an output voltage of less than 1V / 3V, which cannot meet the voltage requirements of the device (such as devices commonly using 3.3V and 5V). And at low switching voltages, it is impossible to ensure that the channel width of the switch effectively drives a large current. In this embodiment, after the logic switch level conversion of U5 as the power supply, the control logic level rises to 9V, which can at least ensure a voltage output of more than 6V.

[0074] Moreover, in the prior art, the number of voltage adjustment gears is small, so the adjustment step accuracy is insufficient, and there is a lack of effective feedback and insufficient accuracy. In this embodiment, the PWM of the control module U1 can have 1023 adjustment gears. After the PWM is converted, compared, and current-amplified (U4, U6), there are 1023 different voltage outputs, meeting the high step accuracy requirements. The present invention will sample the output VDDOUT of U6 and the voltages of the product outputs VOUTA / B. The sampled voltages are converted and then fed back to the ADC port of the single-chip microcomputer. The control module U1 will then correct the PWM output according to the feedback voltage, thereby forming a closed loop to ensure the accuracy of the output voltage.

[0075] Specifically, Figure 2 For Figure 1Schematic diagram of the first low dropout linear regulator U3 in the illustrated embodiment. The first low dropout linear regulator U3 includes a first filter capacitor C1, a second filter capacitor C2, and a series resistor R1; the first filter capacitor C1 and the second filter capacitor C2 are in parallel, the first ends of the first filter capacitor C1 and the second filter capacitor C2 are both grounded, and the second ends of the first filter capacitor C1 and the second filter capacitor C2 are sequentially connected to the output end of the first low dropout linear regulator U3; the first end of the series resistor R1 is connected to the EN pin of the first low dropout linear regulator U3, and the second end of the series resistor R1 is connected to the power supply VDDS enabling the first low dropout linear regulator U3.

[0076] Even though the power supply on the vehicle is usually 12V, during actual operation, inputs from 9 - 16V are possible. Therefore, it is first necessary to process the power supply to obtain a stable power supply for use by the subsequent circuits. In the case of a 9 - 16V input, the maximum value of this VDD - LDO can be 9V. However, since vehicle devices are generally 5V, 3.3V, 1.8V, etc., setting the VDD - LDO to 5V can meet the requirements.

[0077] Figure 3 Schematic diagram of the VDD adjustment module U4 in this embodiment. As Figure 3 shown, the VDD adjustment module U4 in this embodiment includes a first operational amplifier; the first end of the VDD adjustment module U4 receives the PWM output by the control module U1, and is sequentially connected to the non - inverting input terminal of the first operational amplifier via a series connection of a second resistor R2 and a third resistor R3. The first end of a third capacitor C3 is grounded, and the second end is connected between the first end of the VDD adjustment module U4 and the second resistor R2. The first end of a fourth capacitor C4 is grounded, and the second end is connected between the second resistor R2 and the third resistor R3. The first end of a fourth resistor R4 is grounded, and the second end is connected between the third resistor R3 and the non - inverting input terminal of the first operational amplifier.

[0078] The first end and the second end of the fifth resistor R5 are respectively connected to the inverting input terminal and the output terminal of the first operational amplifier. The second end of the VDD adjustment module U4 receives the output voltage VDDS of the system base chip U2, and is sequentially connected to the inverting input terminal of the first operational amplifier via the serially connected seventh resistor R7 and sixth resistor R6. The second end of the fifth resistor R5 is connected between the sixth resistor R6 and the inverting input terminal of the first operational amplifier. The first end of the eighth resistor R8 is connected between the seventh resistor R7 and the sixth resistor R6, and the second end is grounded; the first end of the fifth capacitor C5 is grounded, and the second end is connected between the first end of the eighth resistor R8 and the sixth resistor R6; the first end of the sixth capacitor C6 is grounded, and the second end is connected to the first end of the fifth resistor R5; the seventh capacitor C7 is connected in parallel with the fifth resistor R5. The first end of the seventh capacitor C7 is connected between the second ends of the sixth resistor R6 and the fifth resistor R5, and the second end of the seventh capacitor C7 is connected between the first end of the fifth resistor R5 and the second end of the sixth resistor R6. The output terminal of the first operational amplifier outputs a corresponding VDD-adjust output voltage.

[0079] Based on Figure 3 It can be known that the current flowing through the fifth resistor R5 = (the voltage of U4 pin2 - the voltage of U4 pin1) divided by the resistance value of the fifth resistor R5; the current flowing through the sixth resistor R6 = the voltage difference between R6 pin1 and 2 divided by the resistance value of the sixth resistor R6; the current flowing through the eighth resistor R8 is equal to the voltage of the eighth resistor R8 pin1 divided by the resistance value of R8; the current flowing through the seventh resistor R7 = (VDDS - the voltage of R7Pin1) divided by the resistance value of the seventh resistor R7, and this current is the sum of the currents flowing through the eighth resistor R8 and the sixth resistor R6; the voltages of U4 pin2 and 3 are equal = VDDS * PWM duty cycle * (R2 + R3 + R4 / R4). In this embodiment, the seventh resistor R7 = 4.75K, R5 = R6 = R8 = 10K; so the following formula one is obtained. U4 includes a first operational amplifier, and VDDS is the supply voltage of the control module U1, generally 3.3V or 5V; PWM can output 1023 gears under the control of the control module U1.

[0080]

[0081] In order to obtain stronger driving ability, in this embodiment, an adjustable low-dropout linear regulator U6 is further used to amplify the driving ability of VDD-Adjust, as Figure 4As shown. The input end of the adjustable low dropout linear regulator U6 is connected to the output end of the first low dropout linear regulator U3. The first end of the ninth capacitor C9 is grounded, and the second end is connected between the input end of the adjustable low dropout linear regulator U6 and the output end of the first low dropout linear regulator U3. The adjustment pin of the adjustable low dropout linear regulator U6 is connected to the output end of the first operational amplifier. The first end of the tenth capacitor is grounded, and the second end is connected between the adjustment pin of the adjustable low dropout linear regulator U6 and the output end of the first operational amplifier. In this embodiment, the two pin feet at the output end of the adjustable low dropout linear regulator U6 are both output pins to output a larger output current.

[0082] The first end of the tenth resistor R10 is connected between the second end of the tenth capacitor and the adjustment pin. The second end is connected to the output end of the adjustable low dropout linear regulator U6 and is successively connected to the second ends of the parallel-connected eleventh capacitor C11, twelfth capacitor C12, and thirteenth capacitor C13. The first ends of the eleventh capacitor C11, twelfth capacitor C12, and thirteenth capacitor C13 are all grounded. The second end of the eleventh capacitor C11 is connected to the output end of the adjustable low dropout linear regulator U6 to output the VDD-OUT output voltage, which is VDDA1.

[0083] The actual selection of the adjustable low dropout linear regulator U6 depends on the actual requirements of the load. The VOUT of U6 = VDD-adjust + 1.25V. Combining Formula 1, Formula 2 can be obtained. VDDA1 can take any voltage range within the 0-VDDLDO range, and there are 1023 gears of dynamically adjustable voltage output.

[0084]

[0085] Further, in order to ensure the accuracy of the output voltage, the output voltage is collected through a feedback line and fed back to the MCU. The MCU fine-tunes the output of the PWM according to the collected voltage to ensure the accuracy of the output voltage. Figure 5(1) is a schematic diagram of the first sampling circuit in the sampling module. The first sampling circuit is used to collect the VDD-OUT output voltage output by the adjustable low dropout linear regulator U6. Specifically, the first end of the first sampling circuit inputs the VDD-OUT output voltage, which is successively grounded through the series-connected eleventh resistor R11 and twelfth resistor R12. The first end of the thirteenth resistor is connected between the eleventh resistor R11 and the twelfth resistor R12, and the second end is connected to the output end of the first sampling circuit to output the first feedback voltage of the VDD-OUT output voltage. The first end of the fourteenth capacitor C14 is grounded, and the second end is connected between the second end of the thirteenth resistor and the output end of the first sampling circuit.

[0086] Figure 5(2) shows the current detection circuit included in the sampling module, which is used to collect the current output by the adjustable low-dropout linear regulator U6. In this embodiment, V is obtained according to Equation (3). mai_cur :

[0087] V mai_cur = Iout * R18 * R15 / R19 Equation (3).

[0088] Among them, Iout is the current passing through resistor R18.

[0089] After the voltage conversion is completed, it is necessary to control the voltage for output. Figure 6 This is the schematic diagram of the bridge module in this embodiment. The bridge module includes four series-connected MOS transistors, which are the first MOS transistor D7, the second MOS transistor D8, the fourth MOS transistor D10, and the third MOS transistor D9 in clockwise order, as well as the corresponding four switches, the first switch EN1, the second switch EN2, the fourth switch EN4, and the third switch EN3. The first MOS transistor D7 and the third MOS transistor D9 are located on one side of the bridge module. The source of the first MOS transistor D7 is connected to the drain of the third MOS transistor D9. The first end of the twentieth capacitor C20 is grounded, and the second end of the twentieth capacitor C20 is connected between the source of the first MOS transistor D7 and the drain of the third MOS transistor D9. The second end of the twentieth capacitor C20 outputs the first voltage VOUTA. The second MOS transistor D8 and the fourth MOS transistor D10 are located on the other side of the bridge module. The source of the second MOS transistor D8 is connected to the drain of the fourth MOS transistor D10. The first end of the twenty-first capacitor C21 is grounded, and the second end of the twenty-first capacitor C21 is connected between the source of the second MOS transistor D8 and the drain of the fourth MOS transistor D10. The second end of the twenty-first capacitor C21 outputs the second voltage VOUTB. The source of the third MOS transistor D9 is connected to the source of the fourth MOS transistor D10 and then grounded. The drain of the first MOS transistor D7 is connected to the drain of the second MOS transistor D8. The input end of the bridge module is connected between the drain of the first MOS transistor D7 and the drain of the second MOS transistor D8, and is connected to the VDD-OUT voltage output by the adjustable low-dropout linear regulator U6. The first switch EN1, the second switch EN2, the fourth switch EN4, and the third switch EN3 are respectively connected to the logic switch level conversion module.

[0090] Therefore, in this embodiment, VOUTA and VOUTB are two outputs, D7 - D10 are bridge MOSs, EN1 - 4 are respectively used as switches for MOS D7 - 10, and C20 and 21 are filter capacitors. When single - ended output is required, EN1 / EN2 are pulled high, D7 / D8 are turned on, and VOUTA = VOUTB = VOUT3. When AC output is required, EN1 and EN4 are turned on, EN2 and 3 are turned off, VOUTA = VOUT3, VOUTB = 0V, and VOUTA - VOUTB = VOUT3; then EN1 and 4 are turned off, EN2 and 3 are turned on, VOUTA = 0V, VOUTB = VOUT3, and VOUTA - VOUTB = - VOUT3; the two sets of logics appear alternately to obtain an AC output from - VOUT3 to VOUT3. The level of VOUT3 is adjusted by PWM, and changing the PWM can achieve dynamic stepless output regulation.

[0091] In actual use, for capacitive loads without self - discharging ability, such as electrochromic glass, etc., when switching the voltage steplessly from high voltage to low voltage, it is first necessary to discharge the high - potential state. Figure 7 For the discharge circuit module U7 in this embodiment, it includes an NMOS transistor D6. The source of the NMOS transistor D6 is grounded, the drain is connected to the first end of the twenty - fifth resistor R25, and the gate is used to receive the discharge - enabling signal en_dis;

[0092] The second end of the twenty - fifth resistor R25 is connected to the second end of the twenty - fifth capacitor C25. The first end of the twenty - fifth capacitor C25 is grounded; the output end of the discharge circuit module U7 is connected between the second end of the twenty - fifth resistor R25 and the second end of the twenty - fifth capacitor C25, and is used to discharge to VOUT3; the control module U1 includes an ADC interface for detecting the voltage of VOUT3.

[0093] When discharging is required, EN_DIS is pulled high, D6 is turned on to discharge VOUT3 in the bridge module. The ADC port of the control module U1 monitors the voltage of VOUT3. Discharging of VOUT3 only requires the state, and the discharging ends.

[0094] In the voltage - regulating circuit of the prior art, the IO port of the single - chip microcomputer is used to drive the switch. When the MOS is turned on, Vg is approximately equal to Vs. The VGSth of the MOS is usually 2 - 3V. Therefore, it is necessary to ensure that Vg > Vs+VGSth for the MOS to be turned on. The output of the single - chip microcomputer IO is 3.3V or 5V. So, when the single - chip microcomputer is used to turn it on, the maximum output voltage can only be 0.3 - 2V. Moreover, in this case, because the Vgs voltage is low, the MOS cannot be fully turned on. Therefore, the impedance of the MOS is large, and it will damage the MOS or reduce the service life of the MOS after long - term operation.

[0095] In this embodiment, a method of boosting Vg is adopted. As shown in Fig. 8(1), it is a schematic diagram of the control logic power supply module U5 in this embodiment, and Fig. 8(2) is a schematic diagram of the logic switch level conversion module.

[0096] Specifically, the control logic power supply module U5 includes a second low-dropout linear regulator. The input pin of the second low-dropout linear regulator is connected to the power supply, and the output pin outputs a second level.

[0097] The logic switch level conversion module includes four conversion modules, namely the first conversion module, the second conversion module, the third conversion module, and the fourth conversion module, which are respectively connected to the first switch EN1, the second switch EN2, the third switch EN3, and the fourth switch EN4. Among them, the conversion module includes a first triode T13 and a second triode T13 connected in series in sequence. The first triode T1 is a PNP-type triode, and the second triode T1 is an NPN-type triode. The emitter of the first triode T1 receives the second level, the collector of the first triode T1 is connected to the switch EN of the bridge module, the base of the first triode T1 is connected to the collector of the second triode T1, the emitter of the second triode T1 is grounded, and the base of the second triode T1 is used to receive the logic control signal sent by the control module U1.

[0098] Thus, the control logic power supply module U5 is an LDO, R20 - R23 are voltage-dividing resistors, and C22 is a filtering capacitor. First, a 9V power supply is obtained through the LDO U5. Then, the triode T1 in the logic switch level conversion module uses the 9V power supply to convert the 3.3V / 5V logic control signal sent by the control module U1 into a logic control signal with an amplitude of 9V, thereby ensuring the full turn-on of the MOS.

[0099] Figure 9 It is a schematic diagram of the system base chip U2 in this embodiment. The vehicle sends a wake-up signal to the system base chip U2 through the LIN bus, inputs the power supply VDDS to the first low-dropout linear regulator U3, the VDD adjustment module U4, and the control logic power supply module U5, and obtains VDDS through the built-in LDO to be used as the power supply for the control module U1.

[0100] When the voltage dynamic output stepless adjustment circuit has no working requirement for a long time, the system base chip U2 will turn off VDDS. At this time, the control module U1 is in the off state, and the power supplies of the above power supplies U3 and U5 will be turned off because the enable is low for VDDS, so as to achieve the energy-saving purpose in the static state. The main control can trigger the wake-up of the system base chip U2 through the LIN bus or by pulling up the ACC, thereby waking up the entire voltage dynamic output stepless adjustment circuit.

[0101] It can be understood that the control module U1 described in this embodiment can be components such as a single-chip microcomputer or an MCU, and the present invention does not make specific limitations here.

[0102] Based on the above, it can be seen that the voltage dynamic output stepless adjustment circuit in this embodiment can output in multiple DC channels or in AC, can output fixed voltages in multiple gears, or can output in a stepless adjustment manner, and has a wide adaptability to the application environment; it has a very high modulation accuracy, with 1023 voltage modulation gears, and the output voltage is secondarily corrected by performing ADC detection on the output voltage; the output voltage can cover 0 - 6V, basically meeting the voltage requirements of in-vehicle electrical equipment. At the same time, in this embodiment, the output VDDOUT of U6 and the voltages of the product outputs VOUTA / B will be sampled, and the sampled voltages are fed back to the ADC port of the single-chip microcomputer after conversion. The single-chip microcomputer or MCU will correct the output of the PWM according to the feedback voltage, thereby forming a closed loop to ensure the accuracy of the output voltage. At the same time, voltage monitoring is performed on VDD - OUT, VOUTA / B, and the input power supply DC; current monitoring is performed on VDDOUT and VOUTA / B. Once abnormal voltage and current are detected, the device will be immediately turned off to protect the device.

[0103] In another embodiment of the present invention, a vehicle is provided, including the above-mentioned voltage dynamic output stepless adjustment circuit for a vehicle, and its technical features will not be elaborated here.

[0104] It should be noted that the embodiments of the present invention have good implementability and do not impose any form of limitation on the present invention. Any person skilled in the art may use the disclosed technical content to change or modify it into an equivalent effective embodiment. However, as long as it does not depart from the technical solution of the present invention, any modification, equivalent change, or modification made to the above embodiments based on the technical essence of the present invention still falls within the scope of the technical solution of the present invention.

Claims

1. A voltage dynamic output stepless adjustment circuit for a vehicle, where a power supply inputs power to the voltage dynamic output stepless adjustment circuit for the vehicle, characterized in that, including a control module U1, a system base chip U2, a first low-dropout linear regulator U3, a VDD adjustment module U4, a control logic power supply module U5, an adjustable low-dropout linear regulator U6, a discharge circuit module U7, a bridging module, and a logic switch level conversion module; The input end of the power supply is connected to the system base chip U2 for supplying power to the system base chip U2. The system base chip U2 is connected to the control module U1 for supplying power to the control module U1. The system base chip U2 is communicatively connected to the first low-dropout linear regulator U3, the VDD adjustment module U4, and the control logic power supply module U5 for controlling the switching on and off of the first low-dropout linear regulator U3, the VDD adjustment module U4, and the control logic power supply module U5; The first low-dropout linear regulator U3 is connected to the output end of the power supply for stabilizing the output voltage of the power supply; The VDD adjustment module U4 is connected to the output end of the first low-dropout linear regulator U3 and receives the PWM output by the control module U1 for outputting a corresponding VDD-adjust output voltage; The adjustable low-dropout linear regulator U6 is connected to the output end of the VDD adjustment module U4 for boosting the VDD-adjust output voltage to a VDD-OUT output voltage and outputting the VDD-OUT output voltage to the discharge circuit module U7; The control logic power supply module U5 is connected to the output end of the power supply for supplying power to the logic switch level conversion module; The logic switch level conversion module is used for converting the logic level signal sent by the control module U1 into a first logic level signal and supplying power to the bridging module.

2. The voltage dynamic output stepless adjustment circuit for a vehicle according to claim 1, characterized in that it further includes a sampling module for sampling and converting the VDD-OUT output voltage output by the adjustable low-dropout linear regulator U6 and the output voltage of the bridging module, and sending the converted feedback voltage to the control module U1; The control module U1 adjusts the PWM output to the VDD adjustment module U4 according to the feedback voltage until the feedback voltage is within a first threshold range.

3. The voltage dynamic output stepless adjustment circuit for a vehicle according to claim 2, characterized in that the first low-dropout linear regulator U3 includes a first filter capacitor C1, a second filter capacitor C2, and a series resistor R1; The first filter capacitor C1 and the second filter capacitor C2 are connected in parallel. The first ends of the first filter capacitor C1 and the second filter capacitor C2 are both grounded. The second ends of the first filter capacitor C1 and the second filter capacitor C2 are sequentially connected to the output end of the first low-dropout linear regulator U3; The first end of the series resistor R1 is connected to the EN pin of the first low-dropout linear regulator U3, and the second end of the series resistor R1 is connected to the power supply VDDS that can enable the first low-dropout linear regulator U3.

4. The stepless voltage dynamic output circuit for a vehicle as claimed in claim 3, wherein the VDD adjustment module U4 includes a first operational amplifier; the first end of the VDD adjustment module U4 receives the PWM output by the control module U1, and is successively connected to the non-inverting input terminal of the first operational amplifier via the serially connected second resistor R2 and third resistor R3. The first end of the third capacitor C3 is grounded, and the second end is connected between the first end of the VDD adjustment module U4 and the second resistor R2. The first end of the fourth capacitor C4 is grounded, and the second end is connected between the second resistor R2 and the third resistor R3. The first end of the fourth resistor R4 is grounded, and the second end is connected between the third resistor R3 and the non-inverting input terminal of the first operational amplifier; the first end and the second end of the fifth resistor R5 are respectively connected to the inverting input terminal and the output terminal of the first operational amplifier; the second end of the VDD adjustment module U4 receives the output voltage VDDS of the system base chip U2, and is successively connected to the inverting input terminal of the first operational amplifier via the serially connected seventh resistor R7 and sixth resistor R6. The second end of the fifth resistor R5 is connected between the sixth resistor R6 and the inverting input terminal of the first operational amplifier; the first end of the eighth resistor R8 is connected between the seventh resistor R7 and the sixth resistor R6, and the second end is grounded; the first end of the fifth capacitor C5 is grounded, and the second end is connected between the first end of the eighth resistor R8 and the sixth resistor R6; the first end of the sixth capacitor C6 is grounded, and the second end is connected to the first end of the fifth resistor R5; the seventh capacitor C7 is connected in parallel with the fifth resistor R5. The first end of the seventh capacitor C7 is connected between the sixth resistor R6 and the second end of the fifth resistor R5, and the second end of the seventh capacitor C7 is connected between the first end of the fifth resistor R5 and the second end of the sixth resistor R6; the output terminal of the first operational amplifier outputs a corresponding VDD-adjust output voltage.

5. The stepless voltage dynamic output circuit for a vehicle as claimed in claim 4, wherein the input terminal of the adjustable low dropout linear regulator U6 is connected to the output terminal of the first low dropout linear regulator U3. The first end of the ninth capacitor C9 is grounded, and the second end is connected between the input terminal of the adjustable low dropout linear regulator U6 and the output terminal of the first low dropout linear regulator U3; the adjustment pin of the adjustable low dropout linear regulator U6 is connected to the output terminal of the first operational amplifier. The first end of the tenth capacitor is grounded, and the second end is connected between the adjustment pin of the adjustable low dropout linear regulator U6 and the output terminal of the first operational amplifier; The first end of the tenth resistor R10 is connected between the second end of the tenth capacitor and the adjustment pin, and the second end is connected to the second ends of the eleventh capacitor C11, the twelfth capacitor C12, and the thirteenth capacitor C13 connected in parallel in sequence with the output end of the adjustable low-dropout linear regulator U6. The first ends of the eleventh capacitor C11, the twelfth capacitor C12, and the thirteenth capacitor C13 are all grounded; The second end of the eleventh capacitor C11 is connected to the output end of the adjustable low-dropout linear regulator U6 to output the VDD-OUT output voltage.

6. The voltage dynamic output stepless adjustment circuit for a vehicle according to claim 5, wherein The sampling module includes a first sampling circuit for sampling the VDD-OUT output voltage output by the adjustable low-dropout linear regulator U6; The first end of the first sampling circuit inputs the VDD-OUT output voltage, which is grounded through the eleventh resistor R11 and the twelfth resistor R12 connected in series in sequence. The first end of the thirteenth resistor is connected between the eleventh resistor R11 and the twelfth resistor R12, and the second end is connected to the output end of the first sampling circuit for outputting the first feedback voltage of the VDD-OUT output voltage; The first end of the fourteenth capacitor C14 is grounded, and the second end is connected between the second end of the thirteenth resistor and the output end of the first sampling circuit; The sampling module includes a current detection circuit for sampling the current output by the adjustable low-dropout linear regulator U6.

7. The voltage dynamic output stepless adjustment circuit for a vehicle according to claim 6, wherein The bridging module includes four MOS transistors connected in series, which are the first MOS transistor D7, the second MOS transistor D8, the fourth MOS transistor D10, and the third MOS transistor D9 in clockwise order, and the corresponding four switches, the first switch EN1, the second switch EN2, the fourth switch EN4, and the third switch EN3; The first MOS transistor D7 and the third MOS transistor D9 are located on one side of the bridging module. The source electrode of the first MOS transistor D7 is connected to the drain electrode of the third MOS transistor D9. The first end of the twentieth capacitor C20 is grounded, and the second end of the twentieth capacitor C20 is connected between the source electrode of the first MOS transistor D7 and the drain electrode of the third MOS transistor D9. The second end of the twentieth capacitor C20 outputs the first voltage VOUTA; The second MOS transistor D8 and the fourth MOS transistor D10 are located on the other side of the bridging module. The source electrode of the second MOS transistor D8 is connected to the drain electrode of the fourth MOS transistor D10. The first end of the twenty-first capacitor C21 is grounded, and the second end of the twenty-first capacitor C21 is connected between the source electrode of the second MOS transistor D8 and the drain electrode of the fourth MOS transistor D10. The second end of the twenty-first capacitor C21 outputs the second voltage VOUTB; The source electrode of the third MOS transistor D9 is connected to the source electrode of the fourth MOS transistor D10 and then grounded; The drain of the first MOS transistor D7 is connected to the drain of the second MOS transistor D8, and the input terminal of the bridging module is connected between the drain of the first MOS transistor D7 and the drain of the second MOS transistor D8 and is connected to the VDD-OUT voltage output by the adjustable low-dropout linear regulator U6; The first switch EN1, the second switch EN2, the fourth switch EN4, and the third switch EN3 are respectively connected to the logic switch level conversion module.

8. The voltage dynamic output stepless adjustment circuit for a vehicle according to claim 7, wherein The discharge circuit module U7 includes an NMOS transistor D6. The source of the NMOS transistor D6 is grounded, the drain is connected to the first end of the twenty-fifth resistor R25, and the gate is used to receive the discharge enabling signal en_dis; The second end of the twenty-fifth resistor R25 is connected to the second end of the twenty-fifth capacitor C25, and the first end of the twenty-fifth capacitor C25 is grounded; The output terminal of the discharge circuit module U7 is connected between the second end of the twenty-fifth resistor R25 and the second end of the twenty-fifth capacitor C25 and is used to discharge to the VOUT3; The control module U1 includes an ADC interface for detecting the voltage of the VOUT3.

9. The voltage dynamic output stepless adjustment circuit for a vehicle according to claim 8, wherein The control logic power supply module U5 includes a second low-dropout linear regulator. The input pin of the second low-dropout linear regulator is connected to the power supply, and the output pin outputs a second level; The logic switch level conversion module includes four conversion modules, namely a first conversion module, a second conversion module, a third conversion module, and a fourth conversion module, which are respectively connected to the first switch EN1, the second switch EN2, the third switch EN3, and the fourth switch EN4; Among them, the conversion module includes a first triode T13 and a second triode T13 connected in series in sequence. The first triode T1 is a PNP type triode, and the second triode T1 is an NPN type triode; The emitter of the first triode T1 receives the second level, the collector of the first triode T1 is connected to the switch EN of the bridging module, the base of the first triode T1 is connected to the collector of the second triode T1, the emitter of the second triode T1 is grounded, and the base of the second triode T1 is used to receive the logic control signal sent by the control module U1.

10. The voltage dynamic output stepless adjustment circuit for a vehicle according to claim 9, wherein The vehicle sends a wake-up signal to the system basis chip U2 through the LIN bus; and inputs the enabling power supply VDDS to the first low-dropout linear regulator U3, the VDD adjustment module U4, and the control logic power supply module U5.

11. A vehicle, characterized in that, It includes the voltage dynamic output stepless adjustment circuit for a vehicle according to any one of claims 1-10.

Images