Method and device for processing task based on virtual processor, medium and equipment

Abstract

The embodiment of the invention discloses a task processing method and device based on a virtual processor, a medium and equipment, and the method comprises the steps: generating an interrupt request signal by a virtual timer under the condition that a physical processor corresponding to a virtual machine is in a first mode; the physical processor obtains the interrupt request signal and injects virtual interrupt information corresponding to the interrupt request signal into a virtual processor corresponding to the virtual machine; the virtual processor responds to the virtual interrupt information and executes a processing task corresponding to the virtual interrupt information, and the virtual processor represents processor resources distributed for the virtual machine in the physical processor. According to the embodiment of the invention, the performance overhead generated by storing and recovering the context information of the system timer can be avoided or reduced.

Description

Technical Field

[0001] The present disclosure relates to virtualization technology, and in particular, to a method, apparatus, medium, and device for processing tasks based on a virtual processor. Background Art

[0002] In the field of virtualization technology, multiple virtual machines (VMs for short) are usually run on the same physical processor, and corresponding virtual processors (Virtual Central Processing Units, VCPUs for short, or virtual CPUs) are allocated to the multiple virtual machines respectively. When the physical processor is in the virtual processor control mode (which can be called the second mode) corresponding to any virtual machine, if the virtual processor attempts to execute a restricted instruction or an instruction that requires the assistance of the operating system, an exception event will be triggered, causing the physical processor to switch from the virtual processor control mode to the hypervisor control mode (which can be called the first mode). When switching from the virtual processor control mode to the first mode, or switching back from the first mode to the virtual processor control mode, it is necessary to save and restore the context information of the system timer to simulate the corresponding virtual timer (vtimer) for the virtual processor. However, saving and restoring the context information of the system timer incurs a large performance overhead. Summary of the Invention

[0003] Embodiments of the present disclosure provide a method, apparatus, medium, and device for processing tasks based on a virtual processor to avoid or reduce the performance overhead caused by saving and restoring the context information of the system timer.

[0004] In a first aspect of the embodiments of the present disclosure, a method for processing tasks based on a virtual processor is provided, including: when the physical processor corresponding to the virtual machine is in the first mode, generating an interrupt request signal through a virtual timer; the physical processor obtaining the interrupt request signal and injecting virtual interrupt information corresponding to the interrupt request signal into the virtual processor corresponding to the virtual machine; the virtual processor responding to the virtual interrupt information and executing a processing task corresponding to the virtual interrupt information, where the virtual processor represents the processor resources allocated to the virtual machine in the physical processor.

[0005] In a second aspect of the embodiments of the present disclosure, there is provided an apparatus for processing tasks based on a virtual processor, including: a virtual timer for generating an interrupt request signal when the physical processor corresponding to the virtual machine is in a first mode; the physical processor for obtaining the interrupt request signal and injecting virtual interrupt information corresponding to the interrupt request signal into the virtual processor corresponding to the virtual machine; the virtual processor for executing a processing task corresponding to the virtual interrupt information in response to the virtual interrupt information, where the virtual processor represents the processor resources allocated for the virtual machine in the physical processor.

[0006] In a third aspect of the embodiments of the present disclosure, there is provided a computer-readable storage medium storing a computer program for executing the method for processing tasks based on a virtual processor according to any one of the above embodiments of the present disclosure.

[0007] In a fourth aspect of the embodiments of the present disclosure, there is provided an electronic device including: a processor; a memory for storing executable instructions of the processor; the processor for reading the executable instructions from the memory and executing the instructions to implement the method for processing tasks based on a virtual processor according to any one of the above embodiments of the present disclosure.

[0008] In a fifth aspect of the embodiments of the present disclosure, there is provided a computer program product which, when the instructions in the computer program product are executed by a processor, executes the method for processing tasks based on a virtual processor provided in any one of the above embodiments of the present disclosure.

[0009] Based on the method, apparatus, medium, and device for processing tasks based on a virtual processor provided in the above embodiments of the present disclosure, when the physical processor corresponding to the virtual machine is in the first mode, if the virtual timer generates an interrupt request signal, the physical processor can obtain the interrupt request signal of the virtual timer and inject the virtual interrupt information corresponding to the interrupt request signal into the virtual processor corresponding to the virtual machine. That is, the virtual timer is exclusive to the virtual machine, and the clock of the virtual timer is the same as or approximately the same as the clock of the real world (system clock). The virtual processor corresponding to the virtual machine can execute a processing task corresponding to the virtual interrupt information in response to the virtual interrupt information, which can avoid simulating a corresponding virtual timer for the virtual machine by saving and restoring the context information of the system timer, thereby effectively avoiding or reducing the performance overhead caused by saving and restoring the context information of the system timer and improving the processing performance. Description of the Drawings

[0010] Figure 1 is an exemplary application scenario of the method for processing tasks based on a virtual processor provided by the present disclosure;

[0011] Figure 2 It is a schematic flowchart of a method for processing tasks based on a virtual processor provided by an exemplary embodiment of the present disclosure;

[0012] Figure 3 It is a schematic flowchart of a method for processing tasks based on a virtual processor provided by another exemplary embodiment of the present disclosure;

[0013] Figure 4 It is a schematic flowchart of a method for processing tasks based on a virtual processor provided by still another exemplary embodiment of the present disclosure;

[0014] Figure 5 It is a schematic flowchart of a method for processing tasks based on a virtual processor provided by yet another exemplary embodiment of the present disclosure;

[0015] Figure 6 It is a schematic flowchart of a method for processing tasks based on a virtual processor provided by still another exemplary embodiment of the present disclosure;

[0016] Figure 7 It is a schematic diagram of a principle of trap in related technologies;

[0017] Figure 8 It is a schematic diagram of a trap principle provided by an exemplary embodiment of the present disclosure;

[0018] Figure 9 It is a flowchart block diagram of a trap provided by an exemplary embodiment of the present disclosure;

[0019] Figure 10 It is a flowchart block diagram of a trap provided by another exemplary embodiment of the present disclosure;

[0020] Figure 11 It is a flowchart block diagram of a trap provided by still another exemplary embodiment of the present disclosure;

[0021] Figure 12 It is a schematic structural diagram of a device for processing tasks based on a virtual processor provided by an exemplary embodiment of the present disclosure;

[0022] Figure 13 It is a structural diagram of an electronic device provided by an embodiment of the present disclosure. Detailed Embodiments

[0023] To explain the present disclosure, exemplary embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present disclosure, rather than all the embodiments. It should be understood that the present disclosure is not limited by the exemplary embodiments.

[0024] It should be noted that: Unless otherwise specifically stated, the relative arrangements of components and steps, numerical expressions and values set forth in these embodiments do not limit the scope of the present disclosure.

[0025] Overview of the present disclosure

[0026] In the process of implementing the present disclosure, the inventors found that in the field of virtualization technology, multiple virtual machines (VMs for short) are usually run on the same physical processor, and each virtual machine corresponds to at least one virtual central processing unit (VCPU, or virtual CPU for short). When the physical processor is in the virtual processor control mode (which can be called the second mode) corresponding to any virtual machine, if the virtual processor attempts to execute a restricted or operating system-assisted instruction, an exception event will be triggered, causing the physical processor to switch from the virtual processor control mode to the hypervisor control mode (called the first mode). When switching from the virtual processor control mode to the first mode or back from the first mode to the virtual processor control mode, it is necessary to simulate the corresponding virtual timer for the virtual processor by saving and restoring the context information of the system timer. However, saving and restoring the context information of the system timer will incur a large performance overhead.

[0027] Exemplary overview

[0028] Figure 1 is an exemplary application scenario of the method for processing tasks based on a virtual processor provided by the present disclosure. As Figure 1As shown, on a physical processor 11, only one virtual machine 12 can run, that is, a virtual processor is simulated on a physical processor 11. The virtual timer is exclusive to this virtual processor, that is, the virtual timer only serves this one virtual machine. The interrupt request signals generated by the virtual timer are all injected into the virtual processor after virtualization, and the virtual processor responds to the interrupt request and executes the corresponding tasks. During its operation, the physical processor 11 can include a mode controlled by the virtual machine management system 13 (i.e., hypervisor) (referred to as the first mode) and a mode controlled by the virtual processor (which can be referred to as the second mode). The virtual processor represents the processor resources allocated to the virtual machine in the physical processor. When the physical processor 11 is in the first mode, an interrupt request signal is generated through the virtual timer, and the physical processor 11 can obtain the interrupt request signal and inject the virtual interrupt information corresponding to the interrupt request signal into the virtual machine 12, specifically into the virtual processor corresponding to the virtual machine 12. Specifically, the physical processor 11 realizes the virtualization function of the virtual machine management system 13 by executing the program corresponding to the virtual machine management system 13, that is, obtains the interrupt request signal and injects the virtual interrupt information corresponding to the interrupt request signal into the virtual processor corresponding to the virtual machine. The virtual processor responds to the virtual interrupt information and executes the processing task corresponding to the virtual interrupt information. Since the virtual timer is exclusive to the virtual machine, as long as the virtual timer generates an interrupt request signal, the physical processor can inject the virtual interrupt information corresponding to the interrupt request signal into the virtual processor corresponding to the virtual machine, enabling the virtual processor to promptly respond to the interrupt request and execute the corresponding tasks, without the need to simulate the corresponding virtual timer for the virtual machine by saving and restoring the context information of the system timer, thereby effectively avoiding or reducing the performance overhead caused by saving and restoring the context information of the system timer and improving the processing performance.

[0029] Among them, the virtual machine management system 13 is an intermediate software layer embedded between the operating system and the physical hardware, used to virtualize the hardware resources and allocate virtual hardware resources to the virtual machine. The hardware resources include CPU (Central Processing Unit, central processor), memory, I / O (input / output) devices, etc., ensuring that the virtual machine has an independent virtual hardware environment and operating system. In the ARM architecture, EL0, EL1, and EL2 represent different exception levels, and different levels have different functions and access permissions. The access permission refers to the access permission to the hardware resources. The virtual machine 12 usually includes user-mode software (APP, that is, the user-mode application program under the operating system) and kernel-mode software (OS, that is, the operating system). The exception level of the user-mode software is EL0, the exception level of the kernel-mode software is EL1, and the exception level of the virtual machine management system 13 is the highest, that is, EL2.

[0030] Exemplary method

[0031] Figure 2 This is a schematic flowchart of a method for processing tasks based on a virtual processor provided by an exemplary embodiment of the present disclosure. This embodiment can be applied to an electronic device, such as an in-vehicle computing platform, or for example, on a system-on-chip, such as Figure 2 As shown, the method of the embodiment of the present disclosure may include the following steps:

[0032] Step 210, when the physical processor corresponding to the virtual machine is in the first mode, generate an interrupt request signal through a virtual timer.

[0033] Among them, a virtual machine is a computer system simulated by software, which can run on a physical computer (abbreviated as a physical machine) and is isolated from the physical machine. In a computer system, virtualization technology can be used to abstract the physical resources of the physical machine into logical resources to provide an independent computing environment for the virtual machine. Physical resources can include, for example, resources such as CPU, memory, storage, and network. An operating system can be installed and run on the virtual machine, and user application programs can also be installed and run on the operating system. The physical processor is the CPU in the physical resources. The first mode is the control mode of the virtual machine management system 13 (i.e., hypervisor), that is, the virtual machine management system 13 obtains the control right of the physical processor, that is, the physical processor switches the control right to the virtual machine management system 13, and the physical processor executes the functions of the virtual machine management system 13. The virtual timer is a timer that provides a timing function for triggering tasks of the virtual machine, that is, the virtual timer can generate an interrupt request signal according to a specified period or time. The interrupt request signal indicates that the virtual machine needs to execute corresponding processing tasks. Specifically, it requires the virtual processor corresponding to the virtual machine to execute corresponding processing tasks. The virtual processor corresponding to the virtual machine represents the CPU resources allocated to the virtual machine, which are used to execute related tasks of the operating system or application programs of the virtual machine.

[0034] In some alternative embodiments, the physical processor executes related tasks of the virtual machine in the virtual machine mode (referred to as the second mode). During the execution of the tasks, if some or a certain instruction of the task requires the virtual machine management system 13 to provide services (the virtual machine does not have permission to access this service), when executing this instruction, it will fall into the virtual machine management system 13, that is, trigger the switching of the physical processor mode. The physical processor switches the control right to the virtual machine management system 13. The virtual machine management system 13 obtains the control right of the physical processor and enters the first mode. The virtual machine management system 13 accesses related services and feeds back the instruction execution result to the virtual machine, and the virtual machine can obtain the execution result of this instruction. The virtual machine mode refers to the control mode of the virtual processor corresponding to the virtual machine, that is, the virtual processor obtains the control right of the physical processor and executes related tasks of the virtual machine through the processor resources allocated to the virtual machine in the physical processor.

[0035] In some alternative embodiments, when the physical processor is in the first mode, the virtual timer remains on. When the specified time is reached, the virtual timer triggers an event to generate an interrupt request signal. The specific representation of the interrupt request signal can be set according to actual requirements. For example, the interrupt request signal can be represented as a number (or interrupt number) or other representation methods. Different tasks can correspond to different interrupt request signals, so that the virtual machine can execute different timing tasks.

[0036] Step 220: The physical processor obtains the interrupt request signal and injects the virtual interrupt information corresponding to the interrupt request signal into the virtual processor corresponding to the virtual machine.

[0037] Among them, when the virtual timer generates an interrupt request signal, the physical processor can obtain the interrupt request signal. Specifically, the virtual machine management system 13 running on the physical processor obtains the interrupt request signal and injects the virtual interrupt information corresponding to the interrupt request signal into the virtual processor corresponding to the virtual machine. That is to say, the virtual timer serves the virtual machine. For a physical processor, the virtual machine management system 13 only simulates the virtual processor corresponding to one virtual machine. The interrupt requests generated by the virtual timer are all interrupt requests that the virtual machine needs to respond to, and the virtual machine monopolizes the virtual timer. The virtual interrupt information corresponding to the interrupt request signal is the virtual interrupt information after the virtual machine management system 13 virtualizes the interrupt request. Different interrupt request signals can correspond to different virtual interrupt information, so that the virtual machine can determine the corresponding task to be executed according to the virtual interrupt information. The specific content of the virtual interrupt information is set according to the virtualization requirements, and the embodiments of the present disclosure do not make any limitations.

[0038] In some alternative embodiments, when determining the virtual processor, the specific operation for the virtual machine management system 13 to inject the virtual interrupt information into the virtual processor can adopt the operations in related technologies. For example, the virtual machine management system 13 writes the virtual interrupt information into the Generic Interrupt Controller (GIC for short), and the interrupt controller routes the virtual interrupt information to the virtual machine, and the virtual processor corresponding to the virtual machine can obtain the virtual interrupt information. The specific injection method is not limited in the embodiments of the present disclosure.

[0039] Step 230: The virtual processor responds to the virtual interrupt information and executes the processing task corresponding to the virtual interrupt information. The virtual processor represents the processor resources allocated to the virtual machine in the physical processor.

[0040] In some alternative embodiments, after the physical processor injects virtual interrupt information into the virtual processor, the control right of the physical processor is switched back to the virtual processor, that is, the physical processor switches from the first mode to the second mode, which is also referred to as trapping from the virtual machine management system 13. The virtual processor promptly responds to the virtual interrupt information and executes the processing task corresponding to the virtual interrupt information. The content of the specific processing task is set according to the actual application scenario, and the embodiments of the present disclosure do not make limitations.

[0041] In some alternative embodiments, the virtual processor may extract an interrupt number (or interrupt identifier) from the virtual interrupt information, determine the processing task corresponding to the virtual interrupt information according to the pre-configured mapping relationship between the interrupt number and the processing task, and execute the processing task. The interrupt number is a unique identifier pre-assigned to the interrupt source. When the virtual processor responds to an interrupt request, the corresponding processing task can be determined based on the interrupt number.

[0042] In the method for processing tasks based on a virtual processor provided by the embodiments of the present disclosure, when the physical processor corresponding to the virtual machine is in the first mode, if the virtual timer generates an interrupt request signal, the physical processor can obtain the interrupt request signal of the virtual timer and inject the virtual interrupt information corresponding to the interrupt request signal into the virtual processor corresponding to the virtual machine. That is, the virtual timer is exclusive to the virtual machine, and the clock of the virtual timer is the same as or approximately the same as the clock of the real world (system clock). The virtual processor corresponding to the virtual machine can respond to the virtual interrupt information and execute the processing task corresponding to the virtual interrupt information, which can avoid simulating the corresponding virtual timer for the virtual machine by saving and restoring the context information of the system timer, thereby effectively avoiding or reducing the performance overhead caused by saving and restoring the context information of the system timer and improving the processing performance.

[0043] Figure 3 It is a schematic flowchart of a method for processing tasks based on a virtual processor provided by another exemplary embodiment of the present disclosure.

[0044] In some alternative embodiments, on the basis of the above Figure 2 illustrated embodiment, as Figure 3 shown, the physical processor obtaining the interrupt request signal in step 220 and injecting the virtual interrupt information corresponding to the interrupt request signal into the virtual processor corresponding to the virtual machine may include:

[0045] Step 2210, the physical processor obtains the interrupt request signal.

[0046] Among them, the physical processor is in the first mode, the virtual machine management system 13 obtains the control right of the physical processor, and the virtual machine management system 13 obtains the interrupt request signal generated by the virtual timer.

[0047] Step 2220, the physical processor terminates the first service task of the first type that is being executed in response to the existence of the first service task of the first type, and injects the virtual interrupt information corresponding to the interrupt request signal into the virtual processor.

[0048] Wherein, the first type refers to the synchronous type, and the first service task of the first type refers to the synchronous service task. The synchronous service task refers to the service task that is executed sequentially in a strict order, and the next task can be executed only after the current task is completed.

[0049] In some optional embodiments, the first service task of the first type that is being executed may be the synchronous service task of the virtual processor or the VMM (Virtual Machine Manager). The VMM is a software program that manages virtual machines and is responsible for the life cycle management of virtual machines.

[0050] In some optional embodiments, after the physical processor obtains the interrupt request signal, if it is determined that there is a first service task of the first type that is being executed, in order to ensure that the interrupt request is responded to in a timely manner, the first service task that is being executed is terminated, and the virtual interrupt information corresponding to the interrupt request signal is injected into the virtual processor. Then, the virtual processor can respond to the virtual interrupt information in a timely manner and execute the processing task corresponding to the virtual interrupt information.

[0051] In some optional embodiments, if there is no first service task of the first type that is being executed, the virtual interrupt information corresponding to the interrupt request signal can be directly injected into the virtual processor.

[0052] In some optional embodiments, after injecting the virtual interrupt information corresponding to the interrupt request signal into the virtual processor, the physical processor switches from the first mode to the second mode, so that the virtual processor obtains the virtual interrupt information and executes the processing task corresponding to the virtual interrupt information.

[0053] In the embodiments of the present disclosure, after obtaining the interrupt request signal of the virtual timer, the synchronous service task that is being executed is terminated, and the virtual interrupt information corresponding to the interrupt request signal is injected into the virtual processor in a timely manner, so that the virtual processor can respond to the virtual interrupt information in a timely manner and execute the processing task corresponding to the virtual interrupt information, ensuring the real-time performance of the timing task execution.

[0054] In some optional embodiments, on the basis of any of the above embodiments, as Figure 3 shown, the physical processor in step 220 obtains the interrupt request signal and injects the virtual interrupt information corresponding to the interrupt request signal into the virtual processor corresponding to the virtual machine, which may include:

[0055] Step 2210, the physical processor obtains the interrupt request signal.

[0056] Among them, for the specific operations of step 2210, reference may be made to the foregoing embodiments, which will not be elaborated herein.

[0057] Step 22a0, the physical processor determines the real-time level of the virtual machine in response to the non-existence of a first service task of the first type being executed.

[0058] Among them, the real-time level may include multiple levels. The real-time level of the virtual machine can be set according to the real-time requirements of the virtual machine in the actual application scenario. For example, the real-time level may include a high real-time level and a low real-time level. Then, for a virtual machine, the real-time level of the virtual machine can be a high real-time level or a low real-time level.

[0059] Step 22b0, the physical processor injects the virtual interrupt information corresponding to the interrupt request signal into the virtual processor in response to the real-time level of the virtual machine being a preset level.

[0060] Among them, the preset level may include a high real-time level, or one or more higher real-time levels among multiple real-time levels. If the real-time level of the virtual machine is a preset level, it means that the real-time requirement of the virtual machine is relatively high and it is necessary to respond to the interrupt request of the virtual timer in a timely manner. Therefore, the virtual interrupt information corresponding to the interrupt request signal is injected into the virtual processor.

[0061] In some alternative embodiments, the physical processor may also determine whether the virtual processor (or virtual machine) has entered the idle (IDLE) state or the low-power state. If it has entered the idle state or the low-power state, the virtual interrupt information corresponding to the interrupt request signal is injected into the virtual processor, and the virtual processor is woken up, that is, the virtual processor is switched from the idle state or the low-power state to the working state, so that the virtual processor can receive the virtual interrupt information. If the virtual processor is in the working state (that is, it has not entered the IDLE state and the low-power state), that is, the virtual processor is executing a task, the current task of the virtual processor is preempted, and the virtual interrupt information corresponding to the interrupt request signal is injected into the virtual processor, so that the virtual processor preferentially responds to the virtual interrupt information.

[0062] In the embodiments of the present disclosure, for the interrupt request of a virtual machine with high real-time performance, task preemption can be performed in a timely manner, that is, the scheduling synchronization service task is paused, and the virtual interrupt information corresponding to the interrupt request signal is preferentially injected into the virtual processor, effectively ensuring the real-time performance of the virtual machine.

[0063] In some alternative embodiments, as Figure 3 shown, the method of the embodiments of the present disclosure may further include:

[0064] Step 310: The physical processor determines the next service task to be executed based on pre-configured scheduling rules in response to the real-time level of the virtual machine not being the preset level.

[0065] Among them, the next service task is a synchronization service task. If the real-time level of the virtual machine is not the preset level, it means that the real-time requirement of the virtual machine is not high. The physical processor can continue to schedule the next service task based on the pre-configured scheduling rules. After the service tasks in the task queue are executed, or when it reaches the preset conditions, the virtual interrupt information corresponding to the interrupt request signal is injected into the virtual processor to ensure the smooth execution of the synchronization service task.

[0066] Figure 4 It is a schematic flowchart of a method for processing tasks based on a virtual processor provided by another exemplary embodiment of the present disclosure.

[0067] In some alternative embodiments, based on any of the above embodiments, as Figure 4 shown, the physical processor obtaining the interrupt request signal and injecting the virtual interrupt information corresponding to the interrupt request signal into the virtual processor of the virtual machine in step 220 may include:

[0068] Step 2201: The physical processor obtains the interrupt request signal.

[0069] Step 2202: The physical processor determines the current state of the virtual processor.

[0070] Among them, the state of the virtual processor may include the working state, the IDLE state, and the low-power state. The state of the virtual processor refers to the state of the physically mapped CPU, that is, the state of the physical CPU allocated to the virtual machine. At any moment, the current state of the virtual processor is one of the above states. The working state means that the virtual processor is currently in the running (also known as working) state, and the IDLE state means that the virtual processor is not executing any tasks. The low-power state is an energy-saving mode when the virtual processor is idle. For example, the power consumption can be reduced by reducing the clock frequency and voltage.

[0071] Step 2203: The physical processor injects the virtual interrupt information into the virtual processor in response to the current state being the first state.

[0072] Among them, the first state may include any one of the IDLE state and the low-power state. If the current state of the virtual processor is the first state, the virtual interrupt information is injected into the virtual processor, and the virtual processor is woken up to enter the working state to respond to the virtual interrupt information in a timely manner.

[0073] Step 2204: In response to the current state being the second state, the physical processor sets the task priority corresponding to the interrupt request signal to be higher than the priority of the task currently being executed by the virtual processor, and then injects the virtual interrupt information corresponding to the interrupt request signal into the virtual processor.

[0074] Herein, the second state is the aforementioned working state. That is, when the current state of the virtual processor is the second state, it indicates that the virtual processor is still in the working state. Since the physical processor is in the first mode, the task currently being executed by the virtual processor may be a task of the virtual machine management system 13 or other tasks. Then, the task priority corresponding to the interrupt request signal is set to be higher than the priority of the task currently being executed by the virtual processor to preempt the currently executed task, and the virtual interrupt information corresponding to the interrupt request signal is injected into the virtual processor, enabling the virtual processor to be used for virtual machine tasks and giving priority to executing the task corresponding to the virtual interrupt information.

[0075] In an embodiment of the present disclosure, when the virtual processor is in the working state, the task priority corresponding to the interrupt request signal can be set to be higher than the priority of the task currently being executed by the virtual processor, achieving task preemption, enabling the virtual processor to promptly respond to the interrupt request of the virtual timer, and ensuring the real-time nature of request response.

[0076] Figure 5 It is a schematic flowchart of a method for processing tasks based on a virtual processor provided by another exemplary embodiment of the present disclosure.

[0077] In some optional embodiments, the method of the embodiments of the present disclosure further includes:

[0078] Step 410: The virtual processor executes a first instruction of a preset type to generate a service call request; the service call request includes the first instruction.

[0079] Herein, the first instruction of the preset type refers to an access instruction for a service that the virtual machine does not have permission to access. Such instructions need to access the corresponding service functions through the virtual machine management system 13. When the virtual processor executes the first instruction of the preset type, it will enter the virtual machine management system 13, that is, generate a service call request and request the virtual machine management system 13 to call the service.

[0080] Step 420: In response to the service call request, the physical processor enters the first mode.

[0081] Herein, when the physical processor detects the service call request, it can load the corresponding environment of the virtual machine management system 13 and enter the first mode. The first mode refers to the mode in which the physical processor is controlled by the virtual machine management system 13, that is, the physical processor allows the virtual machine management system 13 to directly control the hardware resources to implement functions such as management and monitoring of virtual machines by the virtual machine management system 13.

[0082] In step 430, after the physical processor enters the first mode, according to the first instruction and the first timeout duration corresponding to the virtual timer, determine the matching status between the current moment and the first preset time condition.

[0083] Wherein, the first timeout duration refers to the duration from the current moment for the virtual timer to trigger the next interrupt request. The first preset time condition is a condition for determining whether to wake up the virtual processor. For example, the first preset time condition may include the condition that the size relationship between the execution duration of the service task corresponding to the first instruction and the first timeout duration needs to be satisfied. The first instruction corresponds to a certain service task, and the execution of this service task requires time. Combining the first timeout duration and the execution time related information of the service task corresponding to the first instruction, determine the matching status between the current moment and the first preset time condition. The matching status between the current moment and the first preset time condition indicates whether the current moment meets the first preset time condition. If the current moment meets the first preset time condition, it means that the matching status between the current moment and the first preset time condition is a match. If the current moment does not meet the first preset time condition, it means that the matching status between the current moment and the first preset time condition is a mismatch. For example, the worst case response time (WCRT) of the service task corresponding to the first instruction can characterize the longest execution duration of the service task. Determine the matching status between the current moment and the first preset time condition according to the size relationship between the longest execution duration and the first timeout duration. The first preset time condition can be, for example, that the longest execution duration is greater than the first timeout duration, or other related conditions.

[0084] In step 440, the physical processor wakes up the virtual processor in response to the matching status being a match.

[0085] Wherein, waking up the virtual processor means switching the control right of the physical processor to the virtual machine to execute the tasks of the virtual machine, which can also be called the virtual machine management system 13 trap. The matching status between the current moment and the first preset time is a match, indicating that the current moment meets the wake-up condition and the virtual processor can be woken up.

[0086] In the embodiments of the present disclosure, when the virtual processor executes the specified first instruction and falls into the virtual machine management system 13, it is possible to comprehensively determine whether to wake up the virtual processor by combining the first instruction and the timeout duration of the virtual timer, effectively ensuring that the virtual processor is woken up in a timely manner, enabling the virtual processor to respond to the interrupt request of the virtual timer in a timely manner, and ensuring response real-time performance.

[0087] In some optional embodiments, the first timeout duration is the duration from the current moment to generate the interrupt request signal.

[0088] The duration from the current moment to the generation of the interrupt request signal refers to the duration from the current moment to the nearest future generation of the interrupt request signal.

[0089] The physical processor in step 430 determines the matching status between the current moment and the first preset time condition according to the first instruction and the first timeout duration corresponding to the virtual timer, which may include:

[0090] The physical processor determines the execution duration of the second service task corresponding to the first instruction according to the first instruction; the physical processor determines the matching status between the current moment and the first preset time condition according to the magnitude relationship between the execution duration and the first timeout duration, and the first preset time condition.

[0091] Among them, the second service task corresponding to the first instruction is the virtualized service task to be implemented by the first instruction. For example, the virtual machine needs to perform operations such as page table update and physical resource access. These operations can be requested by initiating a hypercall to request the virtual machine management system 13 to assist in completing these operations. The implementation mechanism of hypercall is similar to that of system calls. In a virtualized environment, hypercall allows the virtual machine to interact with the virtual machine management system 13 to implement the core virtualization functions, which will not be elaborated here. The execution duration of the second service task can be the estimated worst-case response time, and the worst-case response time can be obtained in any implementable manner, which is not limited in the embodiments of the present disclosure.

[0092] In some alternative embodiments, if the execution duration of the second service task is less than the first timeout duration, it is determined that the matching status between the current moment and the first preset time condition does not match (or is mismatched), and the virtual machine management system 13 is allowed to execute the second service task. If the execution duration of the second service task is greater than the first timeout duration, it is determined that the matching status between the current moment and the first preset time condition matches, and then the virtual processor is awakened to ensure the timely response of the interrupt request of the virtual timer.

[0093] In the embodiments of the present disclosure, whether to wake up the virtual processor at the current moment is determined according to the magnitude relationship between the execution duration of the second service task corresponding to the first instruction and the current timeout duration of the virtual timer. When the execution duration of the second service task is relatively short, the virtual machine management system 13 is allowed to execute the second service task, so as to avoid the long execution duration of the second service task from affecting the timely response of the interrupt task of the virtual timer, and effectively ensure the real-time performance of the virtual machine.

[0094] In some alternative embodiments, the first instruction corresponds to a second service task.

[0095] The physical processor in step 440 wakes up the virtual processor in response to the matching status being a match, which may include:

[0096] Upon the matching status being a match, the physical processor delays the second service task for a first timeout duration and obtains the cumulative delay time corresponding to the second service task; the physical processor wakes up the virtual processor according to the cumulative delay time and the delay duration threshold corresponding to the second service task.

[0097] In some alternative embodiments, upon the matching status being a mismatch, the physical processor determines not to wake up the virtual processor and continues to execute the second service task.

[0098] Among them, when the matching status between the current moment and the first preset time condition is a match (i.e., the execution duration exceeds the first timeout duration), the second service task can be further delayed for a first timeout duration, and the cumulative delay time corresponding to the second service task is obtained based on the delayed first timeout duration. The cumulative delay time refers to the total delay time from the first delay of the second service task to the current delay, that is, before this delay, the second service task may have been delayed 0 times, once, or multiple times. If it has been delayed 0 times, the cumulative delay time after delaying for the first timeout duration this time is the first timeout duration. If it has been delayed once, the cumulative delay time after delaying for the first timeout duration this time is the sum of the duration of the previous delay and the first timeout duration of this delay, and so on, the cumulative delay time can be obtained. Then, based on the cumulative delay time and the delay duration threshold corresponding to the second service task, it is determined whether to wake up the virtual processor. The delay duration threshold corresponding to the second service task is the maximum tolerable delay duration (or time window) preset for the second service task, that is, the maximum delay duration threshold that the second service task can be delayed. The delay duration threshold can be set according to the real-time requirements of the service task. If the cumulative delay time corresponding to the second service task exceeds the extended duration threshold, it means that the second service task needs to be executed in a timely manner and cannot be delayed any further, so it is determined not to wake up the virtual processor temporarily and continue to execute the second service task. Optionally, the virtual processor can be woken up after the second service task is executed to respond to the interrupt request generated by the virtual timer. If the cumulative delay time corresponding to the second service task does not exceed (i.e., is less than or equal to) the delay duration threshold, it means that the second service task is still within the real-time requirement range after this delay and can be delayed, so the virtual processor is woken up in a timely manner to execute the processing task corresponding to the virtual interrupt information.

[0099] If the matching status between the current moment and the first preset time condition is a mismatch, it means that the execution duration of the second service task is less than the first timeout duration, that is, the execution of the second service task will not affect the timely response of the interrupt request generated by the virtual timer. Therefore, the virtual processor can be temporarily not woken up and the second service task continues to be executed.

[0100] In an embodiment of the present disclosure, when the execution duration of the second service task exceeds the first delay duration of the virtual timer, it is further determined whether to wake up the virtual processor by combining the cumulative delay time of the second service task and the delay duration threshold of the tolerable delay. On the basis of ensuring the real-time performance of the second service task, the virtual processor is woken up in a timely manner to further respond to the interrupt request generated by the virtual timer in a timely manner.

[0101] In some optional embodiments, the physical processor wakes up the virtual processor according to the cumulative delay duration and the delay duration threshold corresponding to the second service task, which may include:

[0102] The physical processor wakes up the virtual processor in response to the cumulative delay duration being less than or equal to the delay duration threshold.

[0103] In some optional embodiments, the physical processor determines not to wake up the virtual processor in response to the cumulative delay duration being greater than the delay duration threshold, and continues to execute the second service task.

[0104] Among them, the cumulative delay duration being less than or equal to the delay duration threshold means that the second service task is still within the specified real-time requirement range after this delay, and can be delayed. The virtual processor is woken up in a timely manner to ensure that the virtual processor can respond to the virtual interrupt information corresponding to the virtual timer in a timely manner. If the cumulative delay duration is greater than the delay duration threshold, it means that the second service task will exceed the tolerable delay duration after this delay and cannot meet the real-time requirement of the second service task. Therefore, it is determined not to wake up the virtual processor temporarily and continue to execute the second service task. The virtual processor can be woken up after the second service task is executed.

[0105] In an embodiment of the present disclosure, it is determined whether to wake up the virtual processor by combining the cumulative delay duration of the second service task and the tolerable delay duration threshold to ensure the real-time performance of the second service task.

[0106] In some optional embodiments, it further includes: the physical processor outputs a prompt message indicating that the delay time threshold of the second service task is abnormal in response to the delay duration threshold not meeting the preset real-time time condition of the virtual machine.

[0107] Among them, since the second service task is a service task that the virtual machine needs to call, the virtual machine has certain real-time requirements for the execution of the service task. The preset real-time time condition refers to the time of the real-time requirement of the virtual machine for the second service task. If the delay duration threshold does not meet the preset real-time time condition of the virtual machine, that is, the delay duration threshold is greater than the preset real-time time condition, it means that the setting of the delay duration threshold is abnormal, and a prompt message indicating that the delay time threshold (i.e., the delay duration threshold) of the second service task is abnormal is output to prompt the user that the delay duration threshold is abnormal and needs to be adjusted.

[0108] In some alternative embodiments, the virtual machine management system 13 may match the latency duration threshold with a preset real-time time condition, and determine whether the latency duration threshold meets the preset real-time time condition of the virtual machine according to the matching result. For example, the preset real-time time condition of the virtual machine is less than or equal to 1 millisecond (ms). If the latency duration threshold is greater than 1 millisecond, it means that the latency duration threshold does not meet the preset real-time time condition.

[0109] In an embodiment of the present disclosure, when it is determined that the latency duration threshold of the second service task does not meet the real-time time condition of the virtual machine, a prompt message indicating an abnormality in the latency time threshold of the second service task can be output in a timely manner, so that the user can be prompted in a timely manner to adjust the threshold or take other countermeasures to ensure that the real-time requirements of the virtual machine are met.

[0110] In some alternative embodiments, the physical processor wakes up the virtual processor according to the cumulative latency duration and the latency duration threshold corresponding to the second service task, which may include:

[0111] The physical processor, in response to the cumulative latency duration being less than or equal to the latency duration threshold, points the program pointer corresponding to the virtual machine to the first instruction, so that the virtual processor can execute the first instruction again; the physical processor wakes up the virtual processor in response to the first timeout duration meeting the second preset time condition.

[0112] Among them, when the cumulative latency duration is less than or equal to the latency duration threshold, the execution of the second service task can be delayed, that is, the second service task corresponding to the first instruction is not executed currently, and the program pointer corresponding to the virtual machine is pointed to the first instruction, so that the virtual processor can execute the first instruction again when it reaches the execution time of the first instruction next time. The second preset time condition is a time-related condition for the switching process (or task switching process) in which the physical processor switches from executing the second service task to executing other tasks. Other tasks are, for example, processing tasks corresponding to virtual interrupt information. For example, the second preset time condition is that the first timeout duration is less than n * 2 nanoseconds, where n is a hardware performance index value obtained in advance and can be determined according to the hardware performance. For example, n is 10 or other values. If the first timeout duration meets the second preset time condition, it means that the first timeout duration is relatively small, that is, the virtual timer is about to generate an interrupt request signal, and the virtual processor can be woken up in a timely manner to ensure that the virtual processor can respond to the virtual interrupt information corresponding to the virtual timer in a timely manner.

[0113] In some alternative embodiments, the physical processor determines not to wake up the virtual processor in response to the first timeout duration not meeting the second preset time condition.

[0114] If the first timeout duration does not meet the second preset time condition, for example, the first timeout duration is greater than or equal to n*2, it means that the virtual timer will take a relatively long time to trigger an interrupt event. The virtual processor can be temporarily not woken up, so that the physical processor can handle other tasks, such as the physical processor can perform relatively critical tasks such as local health monitoring and asynchronous tasks. When the real-time timeout duration of the virtual timer meets the second preset time condition, the virtual processor is woken up to timely trap out of the virtual machine management system 13, enter the virtual machine mode, and execute the processing task corresponding to the virtual interrupt information of the virtual timer.

[0115] In the embodiments of the present disclosure, determining whether to wake up the virtual processor by combining the first timeout duration and the second preset time condition can accurately control the wake-up timing of the virtual processor, and improve the utilization rate of the physical processor on the basis of ensuring the real-time response of the virtual interrupt information.

[0116] In some alternative embodiments, the first instruction corresponds to a second service task.

[0117] The physical processor in step 220 injecting the virtual interrupt information corresponding to the interrupt request signal into the virtual processor may include:

[0118] When the first timeout duration does not meet the second preset time condition, the physical processor sets the task priority corresponding to the interrupt request signal to be higher than the priority of the second service task, and terminates the execution of the second service task; the physical processor injects the virtual interrupt information corresponding to the interrupt request signal into the virtual processor, and wakes up the virtual processor.

[0119] Among them, when the first timeout duration does not meet the second preset time condition, in order to ensure that the interrupt request of the virtual timer can be timely responded, the task priority corresponding to the interrupt request signal is set to be higher than the priority of the second service task corresponding to the first instruction, so that when the virtual timer generates an interrupt request signal, the execution of the second service task can be timely terminated, the virtual interrupt information corresponding to the interrupt request signal can be timely injected into the virtual processor, the virtual processor can be timely woken up, and the currently executing task can be preempted, so that the virtual processor can timely respond to the virtual interrupt information and execute the processing task corresponding to the virtual interrupt information.

[0120] In the embodiments of the present disclosure, when the physical processor is in the first mode, if the timeout duration of the virtual timer does not meet the second preset time condition, the task priority corresponding to the interrupt request of the virtual timer can be first set to be higher than the priority of the second service task. When the virtual timer generates an interrupt request signal, the execution of the second service task can be timely terminated, the virtual interrupt information corresponding to the interrupt request signal can be injected into the virtual processor, and the virtual processor can be woken up to ensure the real-time response of the virtual interrupt information.

[0121] Figure 6 It is a schematic flowchart of a method for processing tasks based on a virtual processor provided by another exemplary embodiment of the present disclosure.

[0122] In some optional embodiments, based on any of the above embodiments, the method of the embodiments of the present disclosure further includes:

[0123] Step 510, the virtual processor executes a first instruction of a preset type to generate a service call request; the service call request includes the first instruction.

[0124] Step 520, the physical processor enters a first mode in response to the service call request.

[0125] Specific operations of step 510 and step 520 can refer to step 410 and step 420.

[0126] Step 530, when the execution duration of a second service task corresponding to the first instruction by the physical processor is greater than a preset duration threshold, the second service task is converted into an asynchronous service task so that the asynchronous service task can be executed asynchronously with the tasks of the virtual processor.

[0127] The preset duration threshold can be set according to actual requirements. For example, the preset duration threshold can be set to a value at the nanosecond (ns) level, such as 100 nanoseconds, 120 nanoseconds, 150 nanoseconds, etc., and specific values are not limited. The second service task was originally a synchronous service task. For example, there are multiple synchronous tasks A, B, C, etc. in the virtual machine synchronous task queue, and they need to be executed in a strict order, for example, task A is executed first, then task B, and then task C. For example, the first instruction is the instruction corresponding to task A. According to the synchronous service task, the virtual machine needs to wait for the virtual machine management system 13 to execute the second service task corresponding to the first instruction, return the execution result to the virtual machine, and then the virtual machine executes task B. In this way, if the execution duration of the second service task is relatively long, tasks B and C need to wait for a long time. By setting the preset duration threshold, when the physical processor determines that the execution duration of the second service task is greater than the preset duration threshold, the second service task is converted into an asynchronous task so that the second service task can be executed asynchronously with the tasks of the virtual processor, enabling the virtual processor to continue executing the tasks after the task corresponding to the first instruction, such as tasks B and C.

[0128] Step 540, the virtual processor is woken up by the physical processor so that the virtual processor can execute the subsequent tasks of the task to which the first instruction belongs.

[0129] After converting the second service task into an asynchronous service task, the physical processor wakes up the virtual processor, switches the control back to the virtual processor, and the virtual processor can execute tasks after the first instruction, such as task B, task C, etc. At the same time, it waits for the asynchronous execution result of the second service task corresponding to the first instruction to implement the asynchronous execution of the second service task. For example, the asynchronous service task can be executed by an asynchronous thread of the physical processor.

[0130] In some alternative embodiments, each task of the virtual machine may include one or more instructions (referred to as an instruction sequence), and the first instruction may be an instruction in a task, and this task is called the parent task to which the first instruction belongs. During the asynchronous execution of the service task corresponding to the first instruction, the virtual processor may execute the subsequent tasks of the parent task to which the first instruction belongs.

[0131] In the embodiments of the present disclosure, by converting a synchronous service task with a relatively long execution duration into an asynchronous service task and asynchronizing the synchronous service routine, the deviation between the time in the virtual environment and the time in the real physical world can be effectively reduced, ensuring the consistency between the time in the virtual environment and the actual time.

[0132] In some alternative embodiments, the method of the embodiments of the present disclosure further includes:

[0133] Step 550, the virtual processor updates the state of the current parent task to which the first instruction belongs to the sleep state, and executes the subsequent tasks of the current parent task.

[0134] Among them, the first instruction is an instruction in the instruction sequence corresponding to the current parent task. The current parent task to which the first instruction belongs is a task executed by the virtual machine, such as the above-mentioned Task A, Task B, and Task C. Each task may include one or more instructions (referred to as the instruction sequence corresponding to the task). The first instruction may be an instruction in the instruction sequence corresponding to any task. For example, an instruction in Task A, and Task A is called the parent task to which the first instruction belongs. Since the first instruction is asynchronously executed by the physical processor, if the current parent task to which the first instruction belongs is temporarily unable to continue executing the instructions after the first instruction or is temporarily unable to complete the current parent task, the state of the current parent task is updated to the sleep state. For example, relevant information of the current parent task can be recorded, and then the current parent task is temporarily removed from the task scheduling table (or task queue), so that the virtual processor can schedule the next task (i.e., the subsequent task of the current parent task) from the task scheduling table. For example, if the current parent task is Task A, the virtual processor temporarily removes Task A from the task scheduling table, and the next task in the task scheduling table is Task B. The virtual processor then schedules the subsequent tasks of the current parent task in the order of the remaining tasks in the task scheduling table, while waiting for the notification of the end of the asynchronous service task execution. The notification of the end of the asynchronous service task execution can be implemented by means of an interrupt request. That is, after the physical processor asynchronously executes the service task corresponding to the first instruction, it returns an interrupt notification signal to the virtual processor, and notifies the virtual processor that the service task corresponding to the first instruction has been executed.

[0135] Step 560, the virtual processor wakes up the current parent task in response to obtaining the interrupt notification signal of the end of the asynchronous service task execution, and continues to execute the subsequent instruction of the first instruction in the instruction sequence corresponding to the current parent task.

[0136] Among them, the subsequent instruction of the first instruction refers to the instruction that is arranged after the first instruction in the instruction sequence according to the execution order. During the execution of the subsequent task of the current parent task to which the first instruction belongs, the virtual processor can monitor the interrupt notification signal of the end of the asynchronous service task execution in real time or at regular intervals. In response to obtaining the interrupt notification signal and determining that the service task corresponding to the first instruction has been executed, the virtual processor can wake up the current parent task and continue to execute the subsequent instruction of the first instruction in the instruction sequence corresponding to the current parent task. For example, if the current parent task includes 10 instructions, the first instruction may be the 9th instruction. After completing the first instruction, the 10th instruction is executed.

[0137] In some optional embodiments, if the first instruction is the last instruction in the instruction sequence of the current parent task, after waking up the current parent task, the current parent task can be ended and the subsequent task can be continued to be executed.

[0138] It should be noted that for subsequent tasks whose input data depends on the execution result of the current parent task, they need to wait until the current parent task finishes execution. During the period when the service task corresponding to the first instruction is executed asynchronously, the subsequent tasks executed by the virtual processor are tasks that do not depend on the current parent task.

[0139] In an embodiment of the present disclosure, after converting the second service task corresponding to the first instruction into an asynchronous service task, the state of the current parent task to which the first instruction belongs is updated to the sleep state, so that the virtual processor can continue to execute subsequent tasks, avoiding excessive waiting time and effectively shortening the deviation between the time in the virtual environment and the actual time.

[0140] In some alternative embodiments, the virtual machine management system 13 may be implemented based on a microkernel, and the virtual machine management system 13 may perform system management of the VMM virtualization backend.

[0141] In some alternative embodiments, the virtual machine management system 13 may manage virtual machines through the VMM.

[0142] In some alternative embodiments, the virtual machine management system 13 may include the VMM function and the system management function of the virtualization backend.

[0143] In the related art, when running multiple virtual machines on a physical processor, it is necessary to simulate virtual processors corresponding to the multiple virtual machines on the physical processor. At the same time, the physical timer (or system timer) can only serve one virtual machine. Therefore, it is necessary to simulate multiple virtual timers for each virtual machine by saving and restoring the context of the system timer. That is, every time a virtual processor has an exception (such as executing an instruction without permission) and enters the hypervisor, it is necessary to back up the context information of the virtual timer used by the virtual processor. When switching back to any virtual machine, it is necessary to restore the context information of the virtual timer used by the virtual machine. The specific context information can be maintained by a set of registers. The registers can include, for example, a count register (such as CNTVCT_EL0), a control register (such as CNTV_CTL_EL0), a relative time register (such as CNTV_CVAL_EL0), an absolute time register (such as CNTV_TVAL_EL0), etc. The running time of the virtual processors of different virtual machines corresponds to partial time periods of the actual time in the real world. For a virtual processor, the time of the virtual timer has a large offset relative to the actual time in the real world. This offset is called steal-time. When switching back to the virtual processor, it is necessary to calculate the steal-time. Based on the steal-time and the context information of the virtual timer saved when entering the hypervisor, the virtual timer time of the virtual machine is restored to ensure the accuracy of virtual processor task scheduling.

[0144] Exemplarily, Figure 7 is a schematic diagram of the principle of entry and exit in the related art. As Figure 7As shown in the figure, during the execution of tasks by virtual machine VM0, when it executes an instruction of a preset type (i.e., the first instruction) and exits (exit), it falls into the hypervisor. The hypervisor needs to execute operations such as saving the virtual timer context information (which may include virtual timer register information and offset register information), closing the virtual timer of VM0, and switching from the virtual timer to the physical timer at EL2 level. The hypervisor executes the service task corresponding to the first instruction of VM0. During the execution process, it may also fall out to other virtual machines (VMs) or other programs (or other components) in the user space. For example, the service task corresponding to the first instruction needs to be implemented by other VMs or other components. After other VMs or other components in the user space are completed, they return to the hypervisor. The hypervisor, according to the task scheduling order, switches back to VM0 after obtaining the execution result of the service task corresponding to the first instruction. When switching back to VM0, recovery operations need to be performed, including calculating the steal-time, restoring the current virtual timer context information of VM0 based on the steal-time and the context information saved when VM0 exits, starting the virtual timer of VM0, and entering the VM0 mode. It can be seen that between the exit of VM0 and the switch back again, a large steal-time will be generated, causing the virtual machine to lose the real-world time and unable to perform accurate task scheduling according to the real-world time. The hypervisor also needs to adjust the wall time on which VM0 is based. The wall time is used to represent the current actual time. This switching process will bring certain performance overhead. And although the clock in the virtual world is adjusted, the virtual machine loses the real-world clock and needs to indirectly obtain the wall time through other means such as shared memory. In some solutions, providing the wall time to the virtual machine can be avoided, but the virtual machine needs to actively initiate the acquisition of the time deviation in the virtual world for adjusting the running time of the scheduled tasks.

[0145] In view of the above problems in the related art, the method for processing tasks based on a virtual processor provided by the embodiments of the present disclosure has the same physical processor corresponding to only one virtual machine, and allocating a virtual processor to the virtual machine, so that the virtual timer can be exclusive to the virtual machine, and the system timer can also be exclusively used by the virtual machine, ensuring the accuracy and real-time performance of virtual machine task scheduling. And it can avoid the operations of calculating and transferring the steal time or avoid the operations of clock synchronization of the virtual machine, and avoid the operations of saving and restoring the virtual timer context information when switching between the virtual machine and the hypervisor under the microkernel architecture, effectively improving the running efficiency of the virtual machine.

[0146] In some optional embodiments, Figure 8 is a schematic diagram of the trap and exit principle provided by an exemplary embodiment of the present disclosure. As Figure 8As shown, when the first instruction of a preset type exits in VM0, the virtual timer (the virtual world clock of VM0) remains on, so that the virtual world clock is consistent with the physical world clock. And when VM0 exits, there is no need to save the context information of the virtual timer (i.e., No actions for vtimer). The hypervisor (i.e., the virtual machine management system 13) executes or accesses the service task corresponding to the first instruction. For example, the service task corresponding to the first instruction can be executed by the VMM. After completion, the execution result can be directly returned to the hypervisor, and the hypervisor returns it to VM0 without performing the virtual timer recovery operation, effectively avoiding or reducing the performance overhead caused by saving and restoring the virtual timer context. And after entering the hypervisor, through the mechanisms of the above various embodiments (such as asynchronous processing of synchronous service tasks, priority adjustment, etc.), VM0 can be switched back in time. For example, when an interrupt event occurs in the virtual timer (i.e., vtimer happened, the virtual timer generates an interrupt request signal), VM0 can be switched back in advance, greatly shortening the steal time, so that the time in the virtual world is consistent with or has only a very small difference from the time in the physical world. It can be considered that the time in the virtual world is approximately equal to the time in the physical world.

[0147] In some alternative embodiments, Figure 9 is a flow chart of trap and exit provided by an exemplary embodiment of the present disclosure, as Figure 9As shown, taking the implementation of the hypervisor with a microkernel architecture as an example, after the virtual processor (vCPU) exits from a synchronization exception (i.e., executes a first instruction of a preset type), the virtual timer (vtimer) remains on. The VMM or other user-mode components execute the service task (S2) corresponding to the first instruction. If, during the execution, the vtimer generates an interrupt request signal (S3), then it is determined whether there is a synchronous service task being executed on the physical processor (S4). If there is a synchronous service task being executed (i.e., the first service task), then the first service task is terminated, and the virtual interrupt information corresponding to the interrupt request signal is injected into the virtual machine and the vCPU corresponding to the virtual machine is woken up (S8). The vCPU can receive the virtual interrupt information (S9) and execute the processing task corresponding to the virtual interrupt information (S10). If there is no synchronous service task being executed on the physical processor, step S5 is further executed to determine whether the vCPU is of high real-time performance (i.e., whether the virtual machine is of high real-time performance). If it is not of high real-time performance, the scheduler service decides the next task (S6-1). If the vCPU is of high real-time performance, it is further determined whether the vCPU has entered the IDLE or low-power state (S6-2). If the vCPU has not entered the IDLE and low-power states, it means the vCPU is in the working state and the current task needs to be preempted (S7). For example, the task priority corresponding to the interrupt request signal is set to be higher than the priority of the task currently being executed by the vCPU, the currently executing task is terminated, and then the virtual interrupt information corresponding to the interrupt request signal is injected into the virtual machine and the vCPU corresponding to the virtual machine is woken up (S8). If the vCPU has entered the IDLE or low-power state, the virtual interrupt information corresponding to the interrupt request signal can be directly injected into the virtual machine and the vCPU corresponding to the virtual machine is woken up (S8). S1-S10 represent the step sequence of the entire process from the vCPU exiting (i.e., entering the hypervisor or microkernel) to switching back (i.e., exiting from the hypervisor or microkernel). In the method of the embodiment of the present disclosure, after entering the hypervisor, the vtimer remains on. If the vtimer generates an interrupt request signal, it can promptly exit to the vCPU to timely respond to the virtual interrupt information and execute the timed processing task to ensure the real-time performance of the task.

[0148] In some alternative embodiments, Figure 10 is the flowchart of the enter-exit process provided by another exemplary embodiment of the present disclosure. As Figure 10As shown, the vCPU's current task A executes the first instruction, which requires the virtualization system (i.e., the hypervisor) to provide services, resulting in the vCPU exiting abnormally (i.e., entering the microkernel or hypervisor). The microkernel obtains the virtualization service (i.e., the second service task) number corresponding to the first instruction, the worst-case response time (WCRT, i.e., the execution duration of the second service task) of its processing process, and the window time for tolerable delay processing (i.e., the delay duration threshold). It obtains the timeout time of the virtual timer set for this vCPU (i.e., the first timeout duration of the virtual timer), and determines whether the worst-case response time of the virtualization service corresponding to the first instruction will exceed the timeout time, that is, whether the execution duration of the second service task exceeds the first timeout duration. If the worst-case response time does not exceed the first timeout duration, the hypervisor is run to process the second service task. If the worst-case response time exceeds the first timeout duration, the delay time of the service is accumulated, that is, the second service task is delayed by the first timeout duration to obtain the accumulated delay time. It is determined whether the accumulated delay time is within the window time range (i.e., whether the accumulated delay time is less than the delay duration threshold). If the accumulated delay time is not within the window time range, the hypervisor is run to process the second service task. If the accumulated delay time is within the window time, the current exception is returned to the virtual machine, and the PC pointer (i.e., the program pointer corresponding to the virtual machine) still points to the previous instruction that caused this exception (i.e., the first instruction), preparing to return and possibly execute the first instruction again in the future. Further, it is determined whether the timeout time is less than the time of the task switching process (i.e., the process of switching from the currently running task to other tasks), that is, whether the first timeout duration meets the second preset time condition. If the second preset time condition is met, the vCPU is directly returned (i.e., switched back to the vCPU) so that the vCPU can timely respond to the virtual interrupt information corresponding to the vtimer. If the second preset time condition is not met, the vCPU is not woken up temporarily, and the CPU is relinquished, and the current task is put to sleep, that is, the second service task is removed from the task scheduling table and the second service task is not executed temporarily, so that the CPU can process other critical tasks, such as local health monitoring, asynchronous tasks, and other more critical tasks. When the vtimer generates an interrupt request signal, the current task is preempted and the vCPU is returned so that the vCPU can timely respond to the virtual interrupt information corresponding to the vtimer. In this embodiment, only when the worst-case response time of the virtualization service routine (i.e., the virtualization service task) is less than the current timeout time of the vtimer and the delay duration threshold is within the real-time time condition range of the virtual machine, or the accumulated delay time of the virtualization service routine exceeds the delay duration threshold, is the hypervisor allowed to execute this virtualization service task. Otherwise, this service opportunity is relinquished, and the vCPU is directly returned, or it is handed over to the scheduler and the interrupt of the vtimer, so that the high-real-time virtual machine or more critical tasks can be timely responded to.

[0149] In some alternative embodiments, Figure 11 is a flowchart of the trap-in and trap-out provided by another exemplary embodiment of the present disclosure. As Figure 11 shown, the vCPU current task A executes the first instruction and needs the virtualization system to provide services, resulting in the vCPU abnormally exiting and trapping into the microkernel. The microkernel converts the synchronization service (i.e., the second service task) corresponding to the first instruction into an asynchronous service task, and then immediately returns to the vCPU. The vCPU waits for an event (i.e., the interrupt notification signal for waiting for the end of the execution of the asynchronous service task). The current task A enters the sleep state (i.e., updates the state of the current parent task to which the first instruction belongs to the sleep state). The vCPU temporarily stops executing the current task A and timely processes the real-time tasks B, C, D, ... after the current task A, while waiting for the interrupt notification signal for the end of the processing of the asynchronous service task. After the microkernel asynchronously completes the asynchronous service task corresponding to the first instruction, it injects a virtual soft interrupt number into the virtual machine, and the virtual machine can obtain the interrupt notification signal, and then switches to execute the operation of task A, that is, receives the event of the completion of the asynchronous service task, wakes up task A to continue running, that is, continues to execute the subsequent instructions of the first instruction in task A. By asynchronizing the synchronization service task, the deviation between the virtual world time and the physical world time is further reduced, making the deviation less than the deviation threshold, so that it can be ignored, ensuring that the virtual machine under virtualization can have almost the same precision real-time performance as non-virtualization.

[0150] Each of the above embodiments of the present disclosure can be implemented alone or in any combination without conflict, and can be specifically set according to actual needs. The present disclosure does not make any limitations.

[0151] Any method for processing tasks based on a virtual processor provided by the embodiments of the present disclosure can be executed by any suitable electronic device with data processing capabilities, including but not limited to: electronic devices such as terminal devices and servers. Alternatively, any method for processing tasks based on a virtual processor provided by the embodiments of the present disclosure can be executed by a processor. For example, the processor executes any method for processing tasks based on a virtual processor mentioned in the embodiments of the present disclosure by calling the corresponding instructions stored in the memory. This will not be elaborated below.

[0152] Exemplary device

[0153] Figure 12 is a schematic structural diagram of a device for processing tasks based on a virtual processor provided by an exemplary embodiment of the present disclosure. The device of this embodiment can be used to implement the corresponding method embodiments of the present disclosure. As Figure 12 shown, the device may include: a virtual timer 61, a physical processor 62, and a virtual processor 63.

[0154] A virtual timer 61, which is used to generate an interrupt request signal when the physical processor corresponding to the virtual machine is in the first mode.

[0155] A physical processor 62, which is used to obtain the interrupt request signal and inject the virtual interrupt information corresponding to the interrupt request signal into the virtual processor corresponding to the virtual machine;

[0156] A virtual processor, which is used to execute a processing task corresponding to the virtual interrupt information in response to the virtual interrupt information. The virtual processor represents the processor resources allocated for the virtual machine in the physical processor.

[0157] In some alternative embodiments, the physical processor is specifically configured to: obtain the interrupt request signal; in response to the existence of a first service task of the first type being executed, terminate the first service task and inject the virtual interrupt information corresponding to the interrupt request signal into the virtual processor.

[0158] In some alternative embodiments, based on any of the above embodiments, the physical processor is specifically configured to: obtain the interrupt request signal; in response to the non-existence of a first service task of the first type being executed, determine the real-time level of the virtual machine; in response to the real-time level of the virtual machine being a preset level, inject the virtual interrupt information corresponding to the interrupt request signal into the virtual processor; or, in response to the real-time level of the virtual machine not being the preset level, determine the next service task to be executed based on a pre-configured scheduling rule.

[0159] In some alternative embodiments, based on any of the above embodiments, the physical processor is specifically configured to: obtain the interrupt request signal; determine the current state of the virtual processor; in response to the current state being the first state, inject the virtual interrupt information into the virtual processor; or, in response to the current state being the second state, set the task priority corresponding to the interrupt request signal to be higher than the priority of the currently executing task and inject the virtual interrupt information corresponding to the interrupt request signal into the virtual processor.

[0160] In some alternative embodiments, the virtual processor is further configured to execute a first instruction of a preset type to generate a service call request; the service call request includes the first instruction.

[0161] The physical processor is further configured to: in response to the service call request, enter the first mode; after entering the first mode, determine the matching state between the current moment and the first preset time condition according to the first instruction and the first timeout duration corresponding to the virtual timer; in response to the matching state being a match, wake up the virtual processor.

[0162] In some alternative embodiments, the first timeout duration is the duration from the current moment to the generation of the interrupt request signal.

[0163] The physical processor is specifically configured to: determine the execution duration of the second service task corresponding to the first instruction according to the first instruction; determine the matching status between the current moment and the first preset time condition based on the magnitude relationship between the execution duration and the first timeout duration and the first preset time condition.

[0164] In some alternative embodiments, the first instruction corresponds to a second service task.

[0165] The physical processor is specifically configured to: in response to the matching status being a match, delay the second service task by the first timeout duration to obtain the cumulative delay time corresponding to the second service task; wake up the virtual processor according to the cumulative delay time and the delay duration threshold corresponding to the second service task; or, in response to the matching status being a mismatch, determine not to wake up the virtual processor and continue to execute the second service task.

[0166] In some alternative embodiments, the physical processor is specifically configured to: wake up the virtual processor in response to the cumulative delay duration being less than or equal to the delay duration threshold.

[0167] In some alternative embodiments, the physical processor is specifically configured to: determine not to wake up the virtual processor and continue to execute the second service task in response to the cumulative delay duration being greater than the delay duration threshold.

[0168] In some alternative embodiments, the physical processor is further configured to output a prompt message indicating an abnormality in the delay time threshold of the second service task in response to the delay duration threshold not meeting the preset real-time time condition of the virtual machine.

[0169] In some alternative embodiments, the physical processor may specifically be configured to:

[0170] In response to the cumulative delay duration being less than or equal to the delay duration threshold, point the program pointer corresponding to the virtual machine to the first instruction so that the virtual processor can execute the first instruction again; wake up the virtual processor in response to the first timeout duration meeting the second preset time condition.

[0171] In some alternative embodiments, the physical processor is further configured to determine not to wake up the virtual processor in response to the first timeout duration not meeting the second preset time condition.

[0172] In some alternative embodiments, the first instruction corresponds to a second service task.

[0173] The physical processor is specifically configured to:

[0174] In the case where the first timeout duration does not meet the second preset time condition, set the task priority corresponding to the interrupt request signal to be higher than the priority of the second service task, terminate the execution of the second service task; inject the virtual interrupt information corresponding to the interrupt request signal into the virtual processor, and wake up the virtual processor.

[0175] In some optional embodiments, based on any of the above embodiments, the virtual processor is further configured to execute a first instruction of a preset type to generate a service call request; the service call request includes the first instruction.

[0176] The physical processor is further configured to: enter a first mode in response to the service call request; convert a second service task corresponding to the first instruction into an asynchronous service task in response to the execution duration of the second service task being greater than a preset duration threshold, so that the asynchronous service task can be executed asynchronously with the tasks of the virtual processor; and wake up the virtual processor so that the virtual processor can execute subsequent tasks of the task to which the first instruction belongs.

[0177] In some optional embodiments, the virtual processor is further configured to: update the state of the current parent task to which the first instruction belongs to the sleep state, and execute subsequent tasks of the current parent task; the first instruction is an instruction in the instruction sequence corresponding to the current parent task; and in response to obtaining an interrupt notification signal indicating that the execution of the asynchronous service task has ended, wake up the current parent task and continue to execute subsequent instructions of the first instruction in the instruction sequence corresponding to the current parent task.

[0178] Each of the above embodiments of the present disclosure can be implemented alone or in any combination without conflict, and can be specifically set according to actual needs, which is not limited in the present disclosure.

[0179] For the beneficial technical effects corresponding to the exemplary embodiments of the present device, reference can be made to the corresponding beneficial technical effects in the above exemplary method section, which will not be elaborated herein.

[0180] Exemplary electronic device

[0181] Figure 13 It is a structural diagram of an electronic device provided by an embodiment of the present disclosure, including at least one processor 91 and a memory 92.

[0182] The processor 91 may be a central processing unit (CPU) or other forms of processing units with data processing capabilities and / or instruction execution capabilities, and may control other components in the electronic device 90 to perform desired functions.

[0183] The memory 92 may include one or more computer program products, and the computer program products may include various forms of computer-readable storage media, such as volatile memory and / or non-volatile memory. Volatile memory may include, for example, random access memory (RAM) and / or cache memory, etc. Non-volatile memory may include, for example, read-only memory (ROM), hard disk, flash memory, etc. One or more computer program instructions may be stored on the computer-readable storage media, and the processor 91 may run one or more computer program instructions to implement the methods of the various embodiments of the present disclosure above and / or other desired functions.

[0184] In one example, the electronic device 90 may further include: an input device 93 and an output device 94, and these components are interconnected through a bus system and / or other forms of connection mechanisms (not shown).

[0185] The input device 93 may further include, for example, a touch screen, a microphone, various sensors, etc. The sensors may include, for example, an image sensor (such as a camera, a webcam, etc.), lidar, millimeter-wave radar, ultrasonic radar, a positioning sensor, a pressure sensor, an air quality sensor, a temperature sensor, etc. The image sensor, lidar, millimeter-wave radar, ultrasonic radar, etc. may be used for the perception of the surrounding environment, that is, to detect the static and dynamic objects in the surrounding environment. The static and dynamic objects may include, for example, static objects such as lane lines, curbs, arrows, road signs, trees, buildings, etc., and dynamic objects such as surrounding vehicles, pedestrians, cyclists, etc. The positioning sensor is used to implement the positioning of the movable device (such as a vehicle, a robot, etc.) where the electronic device is located. The positioning sensor may include, for example, an inertial measurement unit (abbreviation: IMU), a global positioning system (abbreviation: GPS), etc. The pressure sensor may be used to detect the seat pressure. The temperature sensor may be used to detect the temperature inside the vehicle cockpit. The air quality sensor may be used to detect the air quality inside the vehicle cockpit.

[0186] The output device 94 may output various information to the outside, and it may include, for example, a display, a speaker, and a communication network and the remote output devices connected thereto, etc.

[0187] Of course, for simplicity, Figure 13 only some of the components related to the present disclosure in the electronic device 90 are shown, and components such as a bus, an input / output interface, etc. are omitted. In addition, according to the specific application situation, the electronic device 90 may further include any other appropriate components.

[0188] An embodiment of the present disclosure also provides a chip, including the apparatus for processing tasks based on a virtual processor provided in any of the above embodiments.

[0189] Exemplary computer program product and computer-readable storage medium

[0190] In addition to the above methods and devices, an embodiment of the present disclosure may also provide a computer program product, including computer program instructions, which, when run by a processor, cause the processor to execute the steps in the methods of various embodiments of the present disclosure described in the "Exemplary Method" section above.

[0191] The computer program product may be written in any combination of one or more programming languages for programming code to perform the operations of the embodiments of the present disclosure. The programming languages include object-oriented programming languages, such as Java, C++, etc., and also include conventional procedural programming languages, such as the "C" language or similar programming languages. The program code may be executed entirely on the user's computing device, partially on the user's device, executed as an independent software package, partially on the user's computing device and partially on a remote computing device, or entirely on a remote computing device or server.

[0192] In addition, an embodiment of the present disclosure may also be a computer-readable storage medium, on which computer program instructions are stored, which, when run by a processor, cause the processor to execute the steps in the methods of various embodiments of the present disclosure described in the "Exemplary Method" section above.

[0193] The computer-readable storage medium may be any combination of one or more readable media. The readable media may be a readable signal medium or a readable storage medium. The readable storage medium, for example but not limited to, includes a system, device, or component of electricity, magnetism, light, electromagnetic, infrared, or semiconductor, or any combination of the above. More specific examples (a non-exhaustive list) of the readable storage medium include: an electrical connection having one or more wires, a portable disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above.

[0194] The basic principles of the present disclosure have been described above in conjunction with specific embodiments. However, the advantages, benefits, effects, etc. mentioned in the present disclosure are only examples and not limitations, and it cannot be considered that they are essential for each embodiment of the present disclosure. In addition, the above-disclosed specific details are only for the purpose of illustration and easy understanding, rather than limitations. The above details do not limit the present disclosure to necessarily implement using the above specific details.

[0195] Those skilled in the art can make various changes and modifications to the present disclosure without departing from the spirit and scope of the present application. Thus, if these modifications and variations of the present application fall within the scope of the claims of the present disclosure and their equivalent technologies, the present disclosure also intends to include these changes and modifications.

Claims

1. A method for processing tasks based on a virtual processor, comprising: When the physical processor corresponding to the virtual machine is in the first mode, generating an interrupt request signal through a virtual timer; The physical processor obtains the interrupt request signal and injects the virtual interrupt information corresponding to the interrupt request signal into the virtual processor corresponding to the virtual machine; The virtual processor responds to the virtual interrupt information and executes a processing task corresponding to the virtual interrupt information, where the virtual processor represents the processor resources allocated for the virtual machine in the physical processor.

2. The method according to claim 1, wherein, The physical processor injecting the virtual interrupt information corresponding to the interrupt request signal into the virtual processor corresponding to the virtual machine includes: The physical processor terminates the first service task of the first type that is being executed in response to the existence of the first service task of the first type being executed, and injects the virtual interrupt information corresponding to the interrupt request signal into the virtual processor.

3. The method according to claim 1, wherein, The physical processor injecting the virtual interrupt information corresponding to the interrupt request signal into the virtual processor corresponding to the virtual machine includes: The physical processor determines the real-time level of the virtual machine in response to the non-existence of the first service task of the first type being executed; The physical processor injects the virtual interrupt information corresponding to the interrupt request signal into the virtual processor in response to the real-time level of the virtual machine being a preset level; or, The method further includes: The physical processor determines the next service task to be executed based on a pre-configured scheduling rule in response to the real-time level of the virtual machine not being the preset level.

4. The method according to claim 1, wherein, The physical processor injecting the virtual interrupt information corresponding to the interrupt request signal into the virtual processor corresponding to the virtual machine includes: The physical processor determines the current state of the virtual processor; The physical processor injects the virtual interrupt information into the virtual processor in response to the current state being the first state; or, The physical processor sets the task priority corresponding to the interrupt request signal to be higher than the priority of the task currently being executed by the virtual processor and injects the virtual interrupt information corresponding to the interrupt request signal into the virtual processor in response to the current state being the second state.

5. The method according to claim 1, further comprising: The virtual processor executes a first instruction of a preset type to generate a service call request; The service call request includes the first instruction; The physical processor enters the first mode in response to the service call request; After the physical processor enters the first mode, it determines the matching state between the current moment and the first preset time condition according to the first instruction and the first timeout duration corresponding to the virtual timer; The physical processor wakes up the virtual processor in response to the matching state being a match.

6. The method according to claim 5, wherein, The first timeout duration is the duration from the current moment to the generation of the interrupt request signal; The physical processor determining the matching state between the current moment and the first preset time condition according to the first instruction and the first timeout duration corresponding to the virtual timer includes: The physical processor determines the execution duration of a second service task corresponding to the first instruction according to the first instruction; The physical processor determines the matching status between the current moment and the first preset time condition according to the magnitude relationship between the execution duration and the first timeout duration, and the first preset time condition.

7. The method according to claim 5, wherein The first instruction corresponds to a second service task; When the matching status is a match, the physical processor wakes up the virtual processor, including: When the matching status is a match, the physical processor delays the second service task by the first timeout duration to obtain the cumulative delay time corresponding to the second service task; The physical processor wakes up the virtual processor according to the cumulative delay time and the delay duration threshold corresponding to the second service task; or, The method further includes: When the matching status is a mismatch, the physical processor determines not to wake up the virtual processor and continues to execute the second service task.

8. The method according to claim 7, wherein, The physical processor wakes up the virtual processor according to the cumulative delay duration and the delay duration threshold corresponding to the second service task, including: When the cumulative delay duration is less than or equal to the delay duration threshold, the physical processor wakes up the virtual processor; or, The method further includes: When the cumulative delay duration is greater than the delay duration threshold, the physical processor determines not to wake up the virtual processor and continues to execute the second service task.

9. The method according to claim 7, further includes: When the delay duration threshold does not meet the preset real-time time condition of the virtual machine, the physical processor outputs a prompt message indicating that the delay time threshold of the second service task is abnormal.

10. The method according to claim 7, wherein The physical processor wakes up the virtual processor according to the cumulative delay duration and the delay duration threshold corresponding to the second service task, including: When the cumulative delay duration is less than or equal to the delay duration threshold, the physical processor sets the program pointer corresponding to the virtual machine to point to the first instruction, so that the virtual processor can execute the first instruction again; When the first timeout duration meets the second preset time condition, the physical processor wakes up the virtual processor; or, The method further includes: When the first timeout duration does not meet the second preset time condition, the physical processor determines not to wake up the virtual processor.

11. The method according to claim 5, wherein, The first instruction corresponds to a second service task; The physical processor injects the virtual interrupt information corresponding to the interrupt request signal into the virtual processor, including: When the first timeout duration does not meet the second preset time condition, the physical processor sets the task priority corresponding to the interrupt request signal to be higher than the priority of the second service task and terminates the execution of the second service task; The physical processor injects the virtual interrupt information corresponding to the interrupt request signal into the virtual processor and wakes up the virtual processor.

12. The method according to any one of claims 1-11, further includes: The virtual processor executes a first instruction of a preset type to generate a service call request; The service call request includes the first instruction; The physical processor enters the first mode in response to the service call request; When the execution duration of a second service task corresponding to the first instruction is greater than a preset duration threshold, the physical processor converts the second service task into an asynchronous service task, so that the asynchronous service task can be executed asynchronously with the tasks of the virtual processor; The physical processor wakes up the virtual processor, so that the virtual processor can execute subsequent tasks of the task to which the first instruction belongs.

13. The method according to claim 12, wherein, It further includes: The virtual processor updates the state of the current parent task to which the first instruction belongs to the sleep state and executes subsequent tasks of the current parent task; The first instruction is an instruction in the instruction sequence corresponding to the current parent task; In response to obtaining an interrupt notification signal indicating the end of the execution of the asynchronous service task, the virtual processor wakes up the current parent task and continues to execute subsequent instructions of the first instruction in the instruction sequence corresponding to the current parent task.

14. A device for processing tasks based on a virtual processor, comprising: A virtual timer for generating an interrupt request signal when the physical processor corresponding to the virtual machine is in the first mode; The physical processor is configured to obtain the interrupt request signal and inject virtual interrupt information corresponding to the interrupt request signal into the virtual processor corresponding to the virtual machine; The virtual processor is configured to execute a processing task corresponding to the virtual interrupt information in response to the virtual interrupt information, and the virtual processor represents the processor resources allocated to the virtual machine in the physical processor.

15. A computer-readable storage medium storing a computer program for executing the method according to any one of claims 1-13 above.

16. An electronic device, the electronic device comprising: A processor; A memory for storing executable instructions of the processor; The processor is configured to read the executable instructions from the memory and execute the instructions to implement the method according to any one of claims 1-13 above.

17. A chip, comprising: The device according to claim 14 above.

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