Real-time control multi-core efficient synchronization method

By setting the role division of scheduling cores and computing cores in a multi-core system, combining machine learning and dynamic load balancing, the resource conflicts and load imbalance problems of multi-core processors in real-time control are solved, and efficient synchronization and stable operation are achieved.

CN120276879AInactive Publication Date: 2025-07-08BEIJING ASTRONAUTICS JUHENG SYST INTEGRATION TECH CO LTD

Patent Information

Application Number
CN202510756657.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-06-09
Publication Date
2025-07-08
Estimated Expiration
Not applicable · inactive patent

AI Technical Summary

Technical Problem

Traditional multi-core processors lack clear functional division of labor in the real-time control field, resulting in resource conflicts and load imbalance, which cannot meet the needs of efficient synchronization.

Method used

Adopting an 8-core architecture, 0 cores are set as scheduling cores and 1-7 cores are operational cores, external interface management and load balancing are performed through the scheduling cores, task allocation is dynamically adjusted using machine learning algorithms, and switch to low-power mode at low load, so as to accelerate complex tasks through cross-core collaboration.

Benefits of technology

It improves the utilization rate of multi-core resources, ensures system stability and computing efficiency, reduces energy consumption, and enhances fault handling capabilities.

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Patent Text Reader

Abstract

The invention discloses a real-time control multi-core efficient synchronization method. Firstly, an 8-core architecture is set, a 0 core is a scheduling core, and 1-7 cores are operation cores. During normal operation, the scheduling core manages data receiving and transmitting of the external interface, the operation core carries out servo-level shaft servo control operation, the scheduling core and the operation core transmit data to each other through a data interaction mechanism, and the scheduling core monitors the state of the operation core and adjusts parameters. And in the self-adaptive load balancing stage, the scheduling core analyzes the load of the operation core by using a machine learning algorithm and redistributes tasks. In the intelligent energy-saving mode, the low-load or idle operation core can be switched to the low-power-consumption mode. During fault processing, the scheduling core monitors the fault, distributes the fault through an internal mechanism, and periodically encrypts and backs up own data to the operation core. And during cross-core cooperative acceleration, the scheduling core decomposes tasks and distributes the tasks to the operation cores. The resource is reasonably allocated, the utilization rate and the stability are improved, the energy consumption is reduced, and the operation speed is improved.
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Description

Technical Field

[0001] The present invention relates to the field of multi-core processing applications, and particularly to a method for efficient synchronization of real-time control multi-cores. Background Art

[0002] With the continuous development of computer technology, multi-core processors have been widely used in various fields, from high-performance computing to embedded systems, etc. The multi-core architecture brings powerful computing capabilities, but at the same time faces many challenges. In the field of real-time control, there is an urgent need for efficient synchronization of multi-core systems. For example, in the servo control system in industrial automation, it is necessary to simultaneously process control tasks of multiple axes, with extremely high requirements for the real-time and accuracy of computing. The traditional single-core computing mode can no longer meet the needs of such complex and time-sensitive tasks, and multi-core parallel computing has become an inevitable choice.

[0003] Common multi-core processors generally call the access mutex functions of the system and cooperate with CACHE refreshing for multi-core synchronization. However, this method lacks clear functional division of labor, resulting in chaotic task allocation among each core. For example, there is no dedicated scheduling core to manage the external interface data transceiver and the internal multi-core operation status. Multiple cores may compete to process external interface data or internal management tasks simultaneously, causing resource conflicts and waste. Moreover, the previous multi-core systems lack an effective load balancing mechanism and cannot dynamically reallocate tasks according to the load conditions of the computing cores. This easily leads to the phenomenon that some computing cores are overloaded while other computing cores are idle, thus reducing the overall utilization rate of multi-core resources and not meeting the working requirements of multi-core processing applications. Therefore, a method for efficient synchronization of real-time control multi-cores is proposed. Summary of the Invention

[0004] The present invention provides the following technical solutions: A method for efficient synchronization of real-time control multi-cores, including the following steps: S1 Multi-core architecture setting: Start an 8-core parallel computing system, set core 0 among the 8 cores as the scheduling core, and set cores 1-7 among the 8 cores as computing cores; S2 Normal operation stage: First, the scheduling core starts to manage the transceiver of external data of the computer external interface. After the computing core receives the external data, it performs operations on servo-level axis servo control; S3 Adaptive load balancing process: During the operation stage, the scheduling core uses machine learning algorithms to dynamically analyze the load conditions of the computing cores and performs allocation scheduling according to the analysis results; S4 Intelligent energy-saving mode: When it is detected that a certain computing core is in a low-load or idle state for a period of time, switch this computing core to the low-power mode; S5 Fault Handling Phase: First, the scheduling core continuously monitors the status of faults occurring in itself and the computing cores, and allocates them through the dynamic kernel function switching mechanism inside the scheduling core. At the same time, during normal operation, the scheduling core regularly backs up its key configuration information and operating status data to the computing cores. S6 Cross-Core Collaboration Acceleration: When encountering complex servo computing tasks, the scheduling core decomposes the tasks into multiple subtasks, and based on the real-time performance metrics of the computing cores, allocates the relevant subtasks to different computing cores for simultaneous calculation.

[0005] Preferably, in step S1, first, the scheduling core initiates the initialization of the platform-level function management, including the initialization of hardware peripheral management, communication initialization with PPC, communication initialization with optical ports, fault handling initialization, platform-level function management initialization, and trajectory file storage initialization. At the same time, the computing core performs the initialization of servo-level axis servo control.

[0006] Preferably, in step S2, during the operation of the computing core, the computing data and the data related to servo control are transmitted to the scheduling core in real time through the data interaction mechanism. At the same time, the scheduling core transmits the multi-core operating status information, external interface data, and the information that needs to be fed back to the computing core to the computing core through the data interaction mechanism.

[0007] Preferably, during the operation of step S2, the scheduling core monitors the operating status of the computing core in real time, including servo calculation, servo operation, output decomposition, and axis status management. And according to the monitoring results, the scheduling core adjusts the operating parameters of the computing core.

[0008] Preferably, in step S3, when it is found that a certain computing core has a high load, by learning the historical task data and real-time operating data, the load capacity of each computing core in the next period of time is predicted, and then some tasks are reallocated from the computing core with a high load to the computing core with a low load.

[0009] Preferably, in step S4, when the computing core is switched to the low-power mode, the time when the computing core enters the low-power mode and the relevant task status information are recorded at the same time. And before switching the computing core to the low-power mode, the overall performance requirements of the system are checked first.

[0010] Preferably, in step S5, when the scheduling core backs up its key configuration information and operating status data to the computing cores, it is backed up in an encrypted manner. And when the scheduling core detects a fault, it synchronously sends a fault prompt message to the external monitoring system, including the fault type and the affected scope. And after the fault is repaired, the scheduling core checks the integrity of the data during the fault period.

[0011] Preferably, in step S6, when the scheduling core decomposes a task into multiple subtasks, it decomposes them according to the computational complexity and data dependency relationships of the subtasks. After the computing core completes the calculation of a subtask, it sends a subtask completion signal to the scheduling core, and the scheduling core counts the completion progress of the overall task based on the received signals.

[0012] Preferably, a system log module is provided in the 8-core parallel computing system, and during the operation phase, the system log module synchronously records the detailed information of data interaction, task allocation, and fault handling data among multiple cores.

[0013] Preferably, when the scheduling core performs task allocation, it synchronously retrieves the computing core with the longest time interval since the last task allocation to balance the usage frequency of each computing core. After the computing core completes the servo operation, it sends the operation result to the computer external interface through the scheduling core.

[0014] In summary, compared with the prior art, the present invention provides a real-time control multi-core high-efficiency synchronization method, which has the following beneficial effects: 1. Through the multi-core architecture setting of the present invention, the functions of the 8 cores are clearly defined. The 0 core serves as the scheduling core to manage the data reception and transmission of the external interface and the operation states of the internal multi-cores, while the 1-7 cores are dedicated to operations. This helps to reasonably allocate system resources, improve the overall operation efficiency, and can dynamically analyze the load of the computing cores and reallocate tasks through the machine learning algorithm inside the scheduling core, thereby effectively avoiding the situation where some computing cores are overloaded while other computing cores are idle, and further improving the utilization rate of multi-core resources; 2. By the scheduling core monitoring various operation states of the computing cores in real time and adjusting the operation parameters, it helps to maintain the stable operation of the computing cores, reduce the probability of operation errors, thus ensuring the stable operation of the entire multi-core system. Through the dynamic kernel function switching mechanism inside the scheduling core for allocation, it improves the system's response ability in the face of faults, reduces the impact of faults on the system operation, and ensures the stability of the system; 3. Through the intelligent energy-saving mode set in the present invention, when the computing cores are under low load or idle, they can be switched to the low-power mode, and the relevant state information is recorded, reducing energy consumption and saving energy without affecting the overall performance of the system. When accelerating through cross-core collaboration, complex tasks can be decomposed and subtasks can be allocated according to the real-time performance indicators of the computing cores. At the same time, direct data channels are allowed to be established between the computing cores for fast data interaction, bypassing the scheduling core for transfer, which can accelerate the overall operation speed and improve the task processing efficiency. Specific embodiments

[0015] Next, in combination with the embodiments of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0016] The present invention provides a technical solution, a real-time control multi-core high-efficiency synchronization method, including the following steps: S1 multi-core architecture setting: Start an 8-core parallel computing system, set the 0th core of the 8 cores as the scheduling core, and set the 1st - 7th cores of the 8 cores as the computing cores. First, the scheduling core starts the initialization of the platform-level function management, including the initialization of hardware peripheral management, communication initialization with PPC, communication initialization with the optical port, fault handling initialization, platform-level function management initialization, and trajectory file storage initialization. At the same time, the computing cores perform the initialization of the servo-level axis servo control. S2 normal operation stage: First, the scheduling core starts to manage the reception and transmission of external data of the computer external interface. After the computing cores receive the external data, they perform the operations of the servo-level axis servo control. During the operation process of the computing cores, the operation data and the data related to the servo control are transmitted to the scheduling core in real time through the data interaction mechanism. At the same time, the scheduling core transmits the multi-core operation status information, external interface data, and the information that needs to be fed back to the computing cores to the computing cores through the data interaction mechanism. The scheduling core monitors the operation status of the computing cores in real time, including servo solution calculation, servo operation, output decomposition, and axis status management, and adjusts the operation parameters of the computing cores according to the monitoring results. And the specific process of the above data interaction mechanism is as follows: Data transfer process from the computing core to the scheduling core; First, after the S1 multi-core architecture setting is completed, it enters the S2 normal operation stage. After the computing cores receive the external data, they start to perform the operations of the servo-level axis servo control. During the process of the computing cores performing the servo-level axis servo control operations, operation data and data related to the servo control will be generated. These data are the key information during the operation process of the computing cores and need to be transmitted to the scheduling core so that the scheduling core can comprehensively grasp the operation situation of the system. Subsequently, through the data interaction mechanism, the computing cores transmit the operation data and the data related to the servo control to the scheduling core in real time. This real-time transmission ensures that the scheduling core can obtain the latest operation information in a timely manner for subsequent processing, such as monitoring the operation status of the computing cores and performing load balancing operations; Data transfer process from the scheduling core to the computing core; While managing the reception and transmission of external data of the computer's external interface, the scheduling core integrates the multi-core operation status information, external interface data, and information that needs to be fed back to the arithmetic core. The multi-core operation status information includes the monitoring results of aspects such as servo solution calculation, servo operation, output decomposition, and axis status management for the arithmetic core, and this information reflects the operation status of the entire multi-core system. The external interface data is obtained from the outside and may be related to the operations of the arithmetic core or used to adjust the operation parameters of the arithmetic core, etc. The information that needs to be fed back to the arithmetic core is generated based on the management and monitoring of the entire system by the scheduling core. The scheduling core uses a data interaction mechanism to transmit the above-integrated multi-core operation status information, external interface data, and information that needs to be fed back to the arithmetic core to the arithmetic core in real time. This helps the arithmetic core adjust its own operation process according to the external situation and the overall system status, such as adjusting its own operation parameters according to the operation parameters fed back by the scheduling core, etc.; In the above steps, the arithmetic core transmits arithmetic data and servo control data to the scheduling core, and the scheduling core can monitor the operation status of the arithmetic core in real time. For example, the scheduling core can determine whether the arithmetic core is operating normally based on the received arithmetic data, and determine whether the servo control meets the requirements based on the servo control data, etc. Then, the scheduling core adjusts the operation parameters of the arithmetic core according to the monitoring results, and this adjustment information is fed back to the arithmetic core through the data interaction mechanism, realizing the effective monitoring and adjustment of the operation of the arithmetic core, ensuring the stable operation of the arithmetic core, and reducing the probability of arithmetic errors S3 Adaptive Load Balancing Process: During the operation stage, the scheduling core uses machine learning algorithms to dynamically analyze the load conditions of the arithmetic cores. When it is found that a certain arithmetic core has a high load, by learning the historical task data and real-time operation data, it predicts the load capacity of each arithmetic core in the next period of time, and then redistributes some tasks from the arithmetic core with a high load to the arithmetic core with a lower load; The specific process above is as follows; First, during the normal operation stage of S2, the scheduling core obtains the operation data of the arithmetic core through the data interaction mechanism. When the arithmetic core performs servo-level axis servo control operations, it transmits the arithmetic data and data related to servo control to the scheduling core in real time. At the same time, the scheduling core itself is also managing the reception and transmission of external interface data and integrating multi-core operation status information, etc. These data provide a basis for subsequent load analysis; Secondly, during the process of monitoring the operating status of the computing cores, the scheduling core obtains the real-time operating data of the computing cores, including but not limited to information such as the type of tasks currently executed by the computing cores, the number of tasks, and the task execution progress. These information reflect the current load situation of the computing cores. The scheduling core also collects historical task data, which are stored in a certain storage area of the system (possibly the system log module or a dedicated historical data storage area). The historical task data contains the task execution situations of each computing core in the past, such as the types of tasks executed, the task volumes, and the task completion times at different time periods, etc.; Dynamic load analysis. During the S3 adaptive load balancing process, the scheduling core uses machine learning algorithms to dynamically analyze the load situation of the computing cores. The scheduling core takes the real-time operating data and historical task data of the computing cores collected as the input of the machine learning algorithm. The machine learning algorithm establishes a computing core load model based on these data. This model can analyze the current load level of each computing core. For example, by analyzing indicators such as the CPU usage rate, memory occupancy rate, and task queue length of the computing core to determine whether the load of the computing core is high, medium, or low. When it is found that the load indicator of a certain computing core exceeds a pre-set threshold (such as the CPU usage rate exceeds 80%), it is determined that the computing core has a high load. For the computing cores determined to have a high load, the scheduling core continues to use the machine learning algorithm, combining historical task data and real-time operating data for prediction. The algorithm predicts the load capacity of each computing core within a certain period of time in the future (such as the next 10 minutes or 20 minutes, and this time can be set according to system requirements) by analyzing factors such as the load change trends of each computing core in historical similar task situations and the task growth trend in the current real-time data. The prediction result is the amount of tasks that each computing core can withstand within a certain period of time in the future, and this result is represented in a certain quantitative form, such as the number of tasks that can be processed or the upper limit of the CPU usage rate that can be tolerated, etc.; During the task reallocation phase, based on the results of load prediction, the scheduling core determines the computing cores with lower loads as the target computing cores for task reallocation. These computing cores with lower loads refer to those that have sufficient load capacity to undertake more tasks within a certain period in the future. When selecting the target computing cores, the scheduling core may also consider other factors, such as the performance differences of the computing cores (e.g., the computing speed, cache size, etc. of different computing cores), the current task types of the computing cores (to avoid allocating tasks to the computing cores that are executing critical tasks), etc. The scheduling core reallocates some tasks from the computing cores with high loads to the computing cores with lower loads. When reallocating tasks, it is necessary to consider the characteristics of the tasks, such as the correlation between tasks and the requirements of tasks for computing resources. The scheduling core may transfer some subtasks in the computing cores with high loads or some tasks in the task queue to the target computing cores according to certain rules (such as according to the priority of tasks, the computational complexity of tasks, etc.), so as to achieve load balancing and improve the utilization rate of multi-core resources; S4 intelligent energy-saving mode: When it is detected that a certain computing core is in a low-load or idle state for a period of time, switch this computing core to the low-power mode. When switching the computing core to the low-power mode, record the time when the computing core enters the low-power mode and the relevant task status information at the same time. And before switching the computing core to the low-power mode, first check the overall performance requirements of the system; The specific steps of the above process are as follows; First, during the normal operation phase of S2, the scheduling core obtains the running status information of the computing cores in real time through the data interaction mechanism. This information includes the computing data of the computing cores, the data related to servo control, etc. The scheduling core is also managing the data transceiver work of the external interface and integrating the multi-core running status information. The scheduling core continuously monitors each computing core (cores 1 - 7), focusing on the load conditions of the computing cores, such as indicators like the length of the task queue of the computing core, the number of tasks being processed, the CPU usage rate, etc., to determine whether the computing core is in a low-load or idle state; In the low-load / idle determination phase, first, the system pre-sets the determination criteria for low-load and idle states. For example, low-load can be defined as the CPU usage rate of the computing core being lower than a certain threshold (such as 10%), and the idle state can be defined as the computing core not processing any tasks within a certain period (such as 5 minutes). The scheduling core makes a judgment according to the obtained running status information of the computing cores and the pre-set determination criteria. When the load indicator of a certain computing core meets the criteria for low-load or idle state, it is determined that this computing core is in a low-load or idle state; During the system performance check phase, before switching the computing cores determined to be under low load or idle to the low-power mode, the scheduling core needs to first check the overall performance requirements of the system. This may involve a comprehensive assessment of factors such as the total amount of tasks currently being processed by the system, the priority distribution of the tasks, and the load conditions of other computing cores. For example, the scheduling core needs to determine whether there are upcoming high-priority tasks that may require the processing power of this computing core, or whether other computing cores are already running close to full load and it is necessary to reserve the processing power of this computing core to handle emergencies, etc.; Switching preparation phase: If the overall system performance requirements allow the computing core to be switched to the low-power mode, the scheduling core begins to prepare for the switching operation. First, the scheduling core records the time when the computing core enters the low-power mode and the relevant task status information. The relevant task status information may include the tasks currently being processed by this computing core (if any), the progress of the tasks, and other resource occupancy situations related to the tasks, etc.; Switching execution phase: After completing the above preparations, the scheduling core switches the computing core to the low-power mode. This process may involve controlling the power management module of the computing core and adjusting parameters such as the clock frequency and voltage of the computing core to reduce the power consumption of the computing core; S5 fault handling phase: First, the scheduling core continuously monitors the fault status of itself and the computing cores, and makes allocations through the dynamic kernel function switching mechanism inside the scheduling core. At the same time, during normal operation, the scheduling core regularly backs up its own key configuration information and operating status data to the computing cores. When the scheduling core backs up its own key configuration information and operating status data to the computing cores, it uses an encryption method for backup. When the scheduling core detects a fault, it synchronously sends a fault prompt message to the external monitoring system, including the fault type and the affected scope. And after the fault is repaired, the scheduling core checks the integrity of the data during the fault period; The specific process of the scheduling core continuously monitoring the fault status of itself and the computing cores and making allocations through the dynamic kernel function switching mechanism inside the scheduling core is as follows; During the fault monitoring phase, at the S1 multi-core architecture setting stage, the scheduling core initiates fault handling initialization. This step lays the foundation for subsequent fault monitoring and handling, including setting relevant monitoring parameters, initializing the monitoring module, etc. During the S2 normal operation phase, while the scheduling core manages the data reception and transmission of the external interface and monitors the operating status of the arithmetic cores (such as servo calculation, servo operation, output decomposition, and axis status management), it begins to continuously monitor the operating status of itself and the arithmetic cores. For its own monitoring, the scheduling core checks whether its key functional modules, such as the stage-level function management module, the communication module with external devices (PPC, optical port, etc.), are operating normally. For example, it monitors whether there is data loss or communication interruption in the communication with the PPC, and whether there are abnormal state transitions in the stage-level function management. For the monitoring of the arithmetic cores, the scheduling core obtains the arithmetic data of the arithmetic cores, the data related to servo control, and the status information fed back by the arithmetic cores through the data interaction mechanism. Then, based on this information, it determines whether the arithmetic cores have faults. For example, if the arithmetic cores do not feed back data for a long time or the fed-back data has obvious errors (such as the data format does not meet the requirements, the data value exceeds the reasonable range, etc.), it may be determined that the arithmetic cores have faults; During the fault determination phase, the system has pre-set the fault determination criteria for the scheduling core itself and the arithmetic cores. For the scheduling core itself, it may include the number of occurrences of error codes in specific functional modules, the duration of communication anomalies, etc. For the arithmetic cores, it may include the error rate of the arithmetic results, the abnormal fluctuations of the operating status parameters, etc. The scheduling core determines whether a fault has occurred in itself or the arithmetic cores according to the monitored information and the set fault determination criteria. If the operating status of the scheduling core itself or a certain arithmetic core meets the fault determination criteria, it is determined that a fault has occurred; During the dynamic kernel function switching and allocation phase, when a failure is detected, the scheduling core invokes its internal dynamic kernel function switching mechanism. This mechanism is pre-configured within the scheduling core and has the ability to reallocate tasks and resources based on the failure situation. The scheduling core first analyzes the scope of the failure impact. For example, if a certain arithmetic core fails, it is necessary to determine the type of tasks being processed by this arithmetic core, the priority of the tasks, and the relevance with the tasks of other arithmetic cores. If a partial function of the scheduling core itself fails, it is necessary to clarify the affected function scopes such as external interface management and arithmetic core monitoring. According to the failure impact analysis results, the dynamic kernel function switching mechanism reallocates tasks and resources. If an arithmetic core fails, the scheduling core may reallocate the tasks being processed by the failed arithmetic core to other normal arithmetic cores. During the allocation process, factors such as the current load of other arithmetic cores (which can be obtained from the load analysis results during the S3 adaptive load balancing process), the performance differences of arithmetic cores (such as the arithmetic speed and cache size of different arithmetic cores), and the priority of tasks are considered. If the scheduling core itself fails, for example, a certain management function fails, the scheduling core may adjust the internal resource allocation, transfer the tasks originally processed by the failed function module to other normal function modules (if there are alternative function modules), or adjust the interaction method with the arithmetic cores to ensure that the normal operation of the arithmetic cores is not affected too much: S6 Cross-core collaboration acceleration: When encountering complex servo arithmetic tasks, the scheduling core decomposes the tasks into multiple subtasks and allocates the relevant subtasks to different arithmetic cores for simultaneous calculation according to the real-time performance metrics of the arithmetic cores. When the scheduling core decomposes the tasks into multiple subtasks, it decomposes them according to the computational complexity and data dependency relationships of the subtasks. When the arithmetic cores complete the subtask calculations, they send subtask completion signals to the scheduling core, and the scheduling core calculates the overall task completion progress based on the received signals. When the scheduling core allocates tasks, it synchronously selects the arithmetic core with the longest time interval since the last task allocation to balance the usage frequency of each arithmetic core. After the arithmetic cores complete the servo arithmetic, they send the arithmetic results to the computer external interface through the scheduling core; And a system log module is set up in the multi-core parallel computing system, which synchronously records the detailed information of data interaction, task allocation, and failure handling data among multiple cores during the operation phase.

[0017] Through the multi-core architecture setting of this solution, the functions of the 8 cores are clearly divided. The 0th core serves as the scheduling core to manage the data reception and transmission of external interfaces and the operation status of the internal multi-core. Cores 1-7 are dedicated to computing, which helps to reasonably allocate system resources, improve the overall computing efficiency, and through the machine learning algorithm inside the scheduling core, the load of computing cores can be dynamically analyzed and tasks can be redistributed, thus effectively avoiding the situation where some computing cores are overloaded while other computing cores are idle, and further improving the utilization rate of multi-core resources.

[0018] This solution helps to maintain the stable operation of the computing cores, reduce the probability of computing errors, and thus ensure the stable operation of the entire multi-core system by the scheduling core's real-time monitoring of various operating states of the computing cores and adjustment of operating parameters. Through the dynamic kernel function switching mechanism inside the scheduling core for distribution, the system's ability to respond to faults is improved, the impact of faults on the system operation is reduced, and the stability of the system is ensured.

[0019] Through the intelligent energy-saving mode set in this solution, the computing cores can be switched to the low-power mode when they are under low load or idle, and the relevant status information is recorded, reducing energy consumption and saving energy without affecting the overall performance of the system. When accelerating through cross-core collaboration, complex tasks can be decomposed and subtasks can be allocated according to the real-time performance indicators of the computing cores. At the same time, a direct data channel is allowed to be established between the computing cores for fast data interaction, bypassing the scheduling core for transit, which can accelerate the overall computing speed and improve the task processing efficiency.

[0020] It should be noted that in this article, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or device comprising a series of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article or device.

[0021] Although the embodiments of the present invention have been shown and described, for those of ordinary skill in the art, it can be understood that various changes, modifications, substitutions and variations can be made to these embodiments without departing from the principles and spirit of the present invention. The scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. A real-time control multi-core highly efficient synchronization method, characterized in that, Including the following steps: S1 Multi-core architecture setting: Start an 8-core parallel computing system, set core 0 in the 8 cores as the scheduling core, and set cores 1-7 in the 8 cores as operation cores; S2 Normal operation stage: First, the scheduling core starts to manage the receiving and sending of external data of the computer external interface. After the operation core receives the external data, it performs operations for servo-level axis servo control; S3 Adaptive load balancing process: During the operation stage, the scheduling core uses machine learning algorithms to dynamically analyze the load conditions of the operation cores and performs allocation scheduling according to the analysis results; S4 Intelligent energy-saving mode: When it is detected that a certain operation core is in a low-load or idle state for a period of time, switch the operation core to the low-power mode; S5 Fault handling stage: First, the scheduling core continuously monitors the fault states of itself and the operation cores, and performs allocation through the dynamic kernel function switching mechanism inside the scheduling core. At the same time, during normal operation, the scheduling core regularly backs up its key configuration information and operation status data to the operation cores; S6 Cross-core collaboration acceleration: When encountering complex servo operation tasks, the scheduling core decomposes the tasks into multiple subtasks, and according to the real-time performance indicators of the operation cores, distributes the relevant subtasks to different operation cores for simultaneous calculation.

2. The real-time control multi-core high-efficiency synchronization method according to claim 1, characterized in that: In step S1, first, the scheduling core starts the initialization of the platform-level function management, including the initialization of hardware peripheral management, communication initialization with PPC, communication initialization with optical ports, fault handling initialization, platform-level function management initialization, and trajectory file storage initialization. At the same time, the operation core performs the initialization of servo-level axis servo control.

3. The real-time control multi-core high-efficiency synchronization method according to claim 1, wherein: In step S2, during the operation of the operation core, the operation data and the data related to servo control are transmitted to the scheduling core in real time through the data interaction mechanism. At the same time, the scheduling core transmits the multi-core operation status information, external interface data, and information that needs to be fed back to the operation core to the operation core through the data interaction mechanism.

4. The real-time control multi-core efficient synchronization method according to claim 1, characterized in that: During the operation process of step S2, the scheduling core monitors the operation status of the operation core in real time, including servo solution, servo operation, output decomposition, and axis status management. According to the monitoring results, the scheduling core adjusts the operation parameters of the operation core.

5. The real-time control multi-core high-efficiency synchronization method according to claim 1, characterized in that: In step S3, when it is found that a certain operation core has a high load, by learning the historical task data and real-time operation data, predict the load capacity of each operation core in the next period of time, and then reallocate some tasks from the operation core with high load to the operation core with low load.

6. The real-time control multi-core high-efficiency synchronization method according to claim 1, wherein: In step S4, when switching the operation core to the low-power mode, record the time when the operation core enters the low-power mode and the relevant task status information at the same time. And before switching the operation core to the low-power mode, first check the overall performance requirements of the system.

7. The real-time control multi-core efficient synchronization method according to claim 1, characterized in that: In step S5, when the scheduling core backs up its key configuration information and operation status data to the operation cores, it is backed up in an encrypted manner. When the scheduling core detects a fault, it synchronously sends a fault prompt message to the external monitoring system, including the fault type and the affected scope. And after the fault is repaired, the scheduling core checks the integrity of the data during the fault period.

8. The real-time control multi-core high-efficiency synchronization method according to claim 1, characterized in that: In step S6, when the scheduling core decomposes a task into multiple subtasks, the decomposition is performed according to the computational complexity and data dependency relationship of the subtasks. When the arithmetic core completes the calculation of a subtask, it sends a subtask completion signal to the scheduling core, and the scheduling core calculates the completion progress of the overall task based on the received signal.

9. The real-time control multi-core highly efficient synchronization method according to claim 1, characterized in that: A system log module is provided in the 8-core parallel computing system, and during the operation phase, detailed information on data interaction, task allocation, and fault handling data among multiple cores is synchronously recorded through the system log module.

10. The real-time control multi-core efficient synchronization method according to claim 1, characterized in that: When the scheduling core performs task allocation, it synchronously retrieves the arithmetic core with the longest time interval since the last task allocation to balance the usage frequency of each arithmetic core. After the arithmetic core completes the servo operation, it sends the operation result to the computer external interface through the scheduling core.

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