Computing device and chip packaging structure

Abstract

The embodiment of the invention discloses computing equipment and a chip packaging structure, the computing equipment comprises a circuit board, the chip packaging structure and a crimping device, the chip packaging structure comprises a substrate, a chip, a thermal interface material layer and a monitoring component, the substrate is arranged on the circuit board, the chip is arranged on the substrate, the crimping device comprises a crimping part, and the crimping part is arranged on the substrate. The crimping part is located on the side, away from the substrate, of the chip, the thermal interface material layer is arranged between the chip and the crimping part, the monitoring component comprises a signal acquisition end, and the signal acquisition end at least makes contact with an easily-deformed area of the thermal interface material layer so as to be used for monitoring state parameters of the easily-deformed area. According to the chip packaging structure in the computing equipment, the state parameters of the easy-to-deform area in the thermal interface material layer can be monitored, and the problem occurrence position can be accurately and quickly positioned.

Description

Technical Field

[0001] The embodiments of the present application relate to the technical field of communication equipment, and in particular, to a computing device and a chip packaging structure. Background Art

[0002] In the field of computing devices such as servers, the power consumption density of chips continues to increase, and the chip packaging size is also getting larger and larger. Correspondingly, the stress on the thermal interface material (TIM) layer on the chip surface is also increasing, causing local areas of the thermal interface material layer to be easily delaminated and the contact thermal resistance to increase, which in turn affects the heat dissipation effect of the chip, easily causing the chip to work at super-junction temperature, resulting in a decrease in the working performance of the chip. Summary of the invention

[0003] The embodiments of the present application provide a computing device and a chip packaging structure, wherein the chip packaging structure can monitor the state parameters of the easily deformed area in the thermal interface material layer, and can accurately and quickly locate the location where the problem occurs, so as to facilitate the rapid inspection and maintenance of the chip packaging structure. It can largely avoid the failure to timely discover that the thermal interface material layer has undergone stratification and other forms of deformation, as well as the resulting poor chip heat dissipation effect and chip super-junction temperature operation, which is beneficial to ensuring the working performance of the chip.

[0004] In a first aspect, an embodiment of the present application provides a computing device, including a circuit board, a chip packaging structure and a crimping device, the chip packaging structure including a substrate, a chip, a thermal interface material layer and a monitoring component, the substrate is arranged on the circuit board, the chip is arranged on the substrate, the crimping device includes a crimping portion, the crimping portion is located on the side of the chip away from the substrate, the thermal interface material layer is arranged between the chip and the crimping portion, and the monitoring component includes a signal acquisition end, the signal acquisition end is in contact with at least an easily deformed area of ​​the thermal interface material layer, so as to monitor the state parameters of the easily deformed area.

[0005] It is understandable that when the easily deformed area has not undergone deformation in the form of stratification, the state parameter measured by the monitoring component should be within the set range. Correspondingly, when the state parameter measured by the monitoring component exceeds the set range, it means that the easily deformed area may have deformation in the form of stratification. In this way, the location of the problem can be accurately located to facilitate the rapid inspection and maintenance of the chip packaging structure, thereby avoiding to a large extent the failure to timely discover that the thermal interface material layer has undergone deformation in the form of stratification, as well as the resulting poor heat dissipation effect of the chip, super-junction temperature operation of the chip, etc., which is conducive to ensuring the normal operation and performance of the chip.

[0006] That is to say, the solution provided by the embodiments of the present application can be used to monitor the state parameters of the thermal interface material layer, so as to guide the market operation and maintenance. In addition, the solution provided by the embodiments of the present application can also be applied to the product assembly process in the mass production and processing stage. By monitoring the state parameters of the deformable area of the thermal interface material layer in real time, it is possible to determine whether problems such as delamination occur in the thermal interface material layer during the product assembly process, and to quickly locate the position where the problem occurs, quickly identify the single boards with abnormalities, so as to improve the processing efficiency and yield of the product. Alternatively, the solution provided by the embodiments of the present application can also be applied to the single board design and R & D stage. By monitoring the real-time state parameters of the components, it can also guide the staff to optimize the installation parameters such as the circuit board, radiator, bracket, and screw torque, so as to improve the performance of the product.

[0007] In other words, through the solution provided by the embodiments of the present application, a large amount of R & D investment resources and problem location resources can be saved, the development time for the product to enter the market can be significantly saved, and the market operation reliability of the product can be improved.

[0008] The above computing device can specifically be a server, switch, router, acceleration card, etc. In the embodiments of the present application, the chip packaging structure of the above computing device includes a monitoring component. The monitoring component can be, for example, a force-sensitive resistor, a strain gauge, a microelectromechanical system sensor, a displacement sensor, a resistance sensor, etc. The monitoring component has a signal acquisition end. The signal acquisition end is at least in contact with the deformable area of the thermal interface material layer to monitor state parameters such as stress, strain, and spacing between the deformable area and the crimping part.

[0009] In some optional implementation manners, a first installation groove is provided on the side of the crimping part facing the chip, and the monitoring component is located in the first installation groove; the surface of the signal acquisition end facing the chip is flush with the surface of the crimping part facing the chip. In the above solution, the monitoring component can specifically be located in the first installation groove so as to make reasonable use of the internal space of the crimping device, thereby improving the compactness and integration degree of the structure. The surface of the signal acquisition end facing the chip can be flush with the surface of the crimping part facing the chip, which can achieve good contact between the signal acquisition end and the thermal interface material layer.

[0010] In some optional implementation manners, the monitoring component is integrally assembled on the chip. For example, it can be integrated on the chip by the through-silicon via packaging process. In this way, the space on the chip can be fully utilized to install the monitoring component, and the integration degree can be improved to a greater extent.

[0011] In some optional implementation manners, the crimping device is a lid. The chip packaging structure includes the crimping device, and the crimping device further includes a cylindrical portion. The cylindrical portion is located on the side of the crimping portion facing the substrate, and the cylindrical portion is connected to the substrate. The crimping device and the substrate enclose a receiving cavity, and the chip is located in the receiving cavity. The chip packaging structure further includes a first signal transmission portion. The substrate is provided with a signal output portion. One end of the first signal transmission portion is connected to the monitoring component, and the other end of the first signal transmission portion is connected to the signal output portion. The first signal transmission portion and the signal output portion cooperate to be able to construct a complete signal transmission path. Moreover, this signal transmission path is integrally arranged inside the crimping device and is not easily affected by the outside. The reliability and stability of signal transmission can be relatively better. At the same time, it can also make the external structure design of the chip packaging structure in the computing device provided by the embodiments of the present application more concise.

[0012] In some optional implementation manners, a receiving groove is provided at the end of the cylindrical portion facing the substrate. The signal output portion includes a connecting elastic piece, and the connecting elastic piece is located in the receiving groove. The first signal transmission portion is connected to the connecting elastic piece. The receiving groove can accommodate the connecting elastic piece, that is, it can accommodate the connection portion between the first signal transmission portion and the signal output portion, and can reduce the possibility of interference with the above connection portion during the installation process of the cylindrical portion, which is more beneficial to ensuring the connection reliability between the first signal transmission portion and the signal output portion.

[0013] In addition to the implementation manner of using the above-mentioned connecting elastic piece for connection, the first signal transmission portion and the signal output portion can also be connected by welding, connector connection, etc. At this time, the above-mentioned receiving groove can still accommodate the connection portion between the first signal transmission portion and the signal output portion.

[0014] In some optional implementation manners, the circuit board is provided with a controller, and the signal output portion is communicatively connected to the controller. The controller and the chip are independently arranged. By obtaining the state parameters measured by the monitoring component through the controller and analyzing the state parameters, it can largely avoid being interfered by the chip itself, which is more beneficial to ensuring the accuracy of signal monitoring and processing of the state parameters.

[0015] In some optional implementations, the crimping device is a heat sink; the chip packaging structure also includes a second signal transmission part, the crimping device is connected to the circuit board, the second signal transmission part includes a first section and a second section, the first section is installed on the heat sink, and the second section is located on the outside of the heat sink. The circuit board is provided with a controller, and the second section is communicatively connected to the controller. In this implementation, the heat sink is directly used as a crimping device, so that the heat transfer path between the heat sink and the chip is shorter, which is more conducive to improving the heat dissipation effect of the chip. The controller and the chip are set independently of each other. The state parameters measured by the monitoring component are obtained by the controller, and the state parameters are analyzed, which can largely avoid interference from the chip itself, and is more conducive to ensuring the accuracy of signal monitoring and processing of the state parameters.

[0016] In some optional implementations, the chip includes multiple first corners, the easily deformed area includes multiple sub-areas in the thermal interface material layer corresponding to each first corner, the number of monitoring components is consistent with the sub-areas, and each monitoring component monitors the sub-areas one by one. It can be seen that the sub-areas in the thermal interface material layer corresponding to each first corner of the chip are relatively easy to deform. In this way, by setting a plurality of monitoring components and setting them one by one corresponding to these sub-areas, the relatively easy to deform area can be monitored in a targeted manner, and the monitoring accuracy can be higher.

[0017] In some optional implementations, the monitoring component and the chip are connected in communication. Since the distance between the monitoring component and the chip is closer, the signal transmission path between the two is relatively short. Directly connecting the monitoring component and the chip can also simplify the signal transmission structure between the two. At the same time, it can also reduce external interference and help ensure the stability and reliability of signal transmission. The monitoring component and the chip can be specifically connected by welding, cable connection, etc. Alternatively, the monitoring component and the chip can also be connected by wireless connection methods such as Bluetooth and WiFi. In short, as long as the communication connection between the monitoring component and the chip can be guaranteed.

[0018] In the second aspect, an embodiment of the present application also provides a chip packaging structure, including a substrate, a chip, a thermal interface material layer, a crimping device and a monitoring component, the chip is arranged on the substrate, the crimping device includes a crimping part, the crimping part is located on the side of the chip away from the substrate, the thermal interface material layer is arranged between the chip and the crimping part, and the monitoring component includes a signal acquisition end, the signal acquisition end is in contact with at least the easily deformed area of ​​the thermal interface material layer, so as to monitor the state parameters of the easily deformed area.

[0019] It can be known that when no deformation such as delamination occurs in the deformable region, the state parameters measured by the monitoring component should be within the set range. Correspondingly, when the state parameters measured by the monitoring component exceed the set range, it indicates that there may be deformation such as delamination in the deformable region. In this way, the location where the problem occurs can be accurately located, facilitating the rapid inspection and maintenance of the chip packaging structure, thereby largely avoiding the inability to timely detect that the thermal interface material layer has undergone deformation such as delamination, and the resulting poor heat dissipation effect of the chip, the chip operating at a super junction temperature, etc., which is beneficial to ensuring the normal operation and working performance of the chip. That is to say, the solution provided in the embodiments of the present application can be used to monitor the state parameters of the thermal interface material layer, thereby guiding market operation and maintenance. In addition, the above chip packaging structure can also be applied to the product assembly process and the product design and R & D stage during mass production and processing.

[0020] The above chip packaging structure can specifically be applied to the computing device involved in any one of the first aspect and each implementation manner of the first aspect. The above chip packaging structure includes a monitoring component, and the monitoring component can be, for example, a force-sensitive resistor, a strain gauge, a microelectromechanical system sensor, a displacement sensor, a resistance sensor, etc. The monitoring component has a signal acquisition end. The signal acquisition end is at least in contact with the deformable region of the thermal interface material layer to monitor state parameters such as stress, strain, and spacing between the deformable region and the crimping part. Description of the Drawings

[0021] Figure 1 It is a schematic structural diagram of a specific implementation manner of the computing device provided by the embodiments of the present application;

[0022] Figure 2 is Figure 1 the internal structure diagram;

[0023] Figure 3 It is a connection structure diagram of a substrate, a chip, and a crimping device in an implementation manner of the chip packaging structure provided by the embodiments of the present application;

[0024] Figure 4 is a split structure diagram of the crimping component and the monitoring component;

[0025] Figure 5 is Figure 4 the bottom view of the crimping component in

[0026] Figure 6 is a relative position diagram of the monitoring component and the thermal interface material layer;

[0027] Figure 7 It is a connection structure diagram of the chip packaging structure and a circuit board in an implementation manner of the computing device provided by the embodiments of the present application;

[0028] Figure 8 The connection structure diagram of the monitoring component, the first signal transmission part and the signal output part when the monitoring component is integrated into the chip;

[0029] Figure 9 The connection structure diagram of the chip package structure, the crimping device and the circuit board in another implementation manner of the computing device provided by the embodiment of the present application.

[0030] Reference numerals:

[0031] 100 - Computing device;

[0032] 1000 - Housing;

[0033] 2000 - Chip package structure; 2100 - Substrate; 2110 - Signal output part; 2200 - Chip; 2210 - Bonding part; 2220 - Second mounting groove; 2230 - Through hole; 2300 - Thermal interface material layer; 2400 - Crimping device; 2400A - Accommodating cavity; 2410 - Crimping part; 2411 - First mounting groove; 2420 - Cylindrical part; 2421 - Accommodating groove; 2500 - Monitoring component; 2600 - First signal transmission part; 2700 - Circuit board; 2710 - Controller; 2720 - Third signal transmission part; 2800 - Second signal transmission part; 2810 - First section; 2820 - Second section; 2900 - Radiator; 2910 - Connecting column. Detailed implementation manners

[0034] In order to enable those skilled in the art to better understand the technical solutions of the present application, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0035] In the description of the embodiments of the present application, the terms "first", "second", and "third" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first", "second", and "third" may explicitly or implicitly include one or more of such features.

[0036] In the description of the embodiments of the present application, it should be noted that unless otherwise clearly specified and limited, the terms "mounted", "connected", and "connected" should be understood in a broad sense. For example, "connected" may be a detachable connection or a non - detachable connection; it may be a direct connection or an indirect connection through an intermediate medium.

[0037] The orientation terms mentioned in the embodiments of the present application, such as "inside", "outside", etc., are only with reference to the directions in the attached drawings. Therefore, the orientation terms used are for better and clearer illustration and understanding of the embodiments of the present application, rather than indicating or implying that the device or component referred to must have a specific orientation, be constructed and operate in a specific orientation. Thus, it should not be construed as a limitation to the embodiments of the present application.

[0038] In the description of the embodiments of the present application, the term "comprise", "include" or any other variant thereof is intended to cover non-exclusive inclusion, such that a process, method, article or device comprising a series of elements not only includes those elements but also includes other elements not expressly listed, or further includes elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "comprising a..." does not exclude the presence of additional identical elements in the process, method, article or device comprising such element.

[0039] Please refer to Figure 1 and Figure 2 , Figure 1 is a schematic structural diagram of a specific implementation manner of the computing device provided by the embodiments of the present application; Figure 2 is Figure 1 the internal structure diagram of.

[0040] As Figure 1 shown, the embodiments of the present application provide a computing device 100, which may specifically be a server, a switch, a router, an acceleration card, etc., and includes a housing 1000 and a chip package structure 2000.

[0041] The housing 1000 is the external frame of the computing device 100 and is mainly used to determine the overall shape of the computing device 100. In Figure 1 and Figure 2 's implementation manner, the housing 1000 generally presents in the shape of a cuboid. In addition, in some other implementation manners of the embodiments of the present application, the housing 1000 may also present in other structural styles, such as a cylinder, etc., which is not limited herein as long as it can meet the usage requirements.

[0042] In addition, other components, such as the chip packaging structure 2000, etc., can be directly or indirectly mounted on the housing 1000, so as to perform integrated assembly through the housing 1000, thereby enabling the computing device 100 to be packaged as a whole for convenient handling, transportation, and installation. The above chip packaging structure 2000 can specifically adopt Ball Grid Array Package (BGA) packaging technology, Flip Chip Ball Grid Array (FC-BGA) packaging technology, Ceramic Ball Grid Array (CBGA) packaging technology, Plastic Ball Grid Array (PBGA) packaging technology, etc.

[0043] An embodiment of the present application provides a chip packaging structure 2000. For details, please refer to Figures 3 - 8 , Figure 3 which is a connection structure diagram of a substrate, a chip, and a crimping device in an implementation manner of the chip packaging structure provided by the embodiment of the present application; Figure 4 which is a split structure diagram of a crimping component and a monitoring component; Figure 5 which is Figure 4 a bottom view of the crimping component in Figure 6 which is a relative position diagram of the monitoring component and the thermal interface material layer; Figure 7 which is a connection structure diagram of a chip packaging structure and a circuit board in an implementation manner of the computing device provided by the embodiment of the present application; Figure 8 which is a connection structure diagram of the monitoring component, the first signal transmission part, and the signal output part when the monitoring component is integrated into the chip.

[0044] As Figure 3 shown, an embodiment of the present application provides a chip packaging structure 2000, including a substrate 2100, a chip 2200, a thermal interface material layer 2300, a crimping device 2400, and a monitoring component 2500.

[0045] The substrate 2100 is the basis of the chip packaging structure 2000, which is used to support the chip 2200 and to connect with other components. The substrate 2100 can be any one of a rigid packaging substrate, a flexible packaging substrate, and a ceramic packaging substrate. Taking the rigid packaging substrate as an example, the substrate 2100 can specifically adopt Bismaleimide Triazine (BT) sheet material, Aromatic Benzocyclobutene Film (ABF) sheet material, Metal-Insulator-Semiconductor (MIS) sheet material, etc.

[0046] The core of the chip 2200 can be, for example, a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), a Data Processing Unit (DPU), etc., or other Application Specific Integrated Circuits (ASICs), other general-purpose processors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc.

[0047] The chip 2200 is docked with the substrate 2100. In the embodiments of the present application, the direction in which the chip 2200 and the substrate 2100 are docked can be defined as the set direction P. Specifically, as Figure 3 shown, along the set direction P, a bonding portion 2210 can be provided on the surface of the chip 2200 facing the substrate 2100. The chip 2200 can be bonded and fixed to the substrate 2100 through this bonding portion 2210. In this way, the docking and assembly of the chip 2200 and the substrate 2100 can be relatively easy. The above-mentioned bonding portion 2210 can specifically be an underfill glue.

[0048] The crimping device 2400 includes a crimping portion 2410. Along the set direction P, the crimping portion 2410 is located on the side of the chip 2200 facing away from the substrate 2100.

[0049] The thermal interface material layer 2300 is provided between the chip 2200 and the crimping portion 2410, and is used to eliminate the air gap between the chip 2200 and the crimping portion 2410, so as to reduce the contact thermal resistance therebetween. The thermal interface material used for the thermal interface material layer 2300 can specifically be silicone grease, silica gel, heat dissipation pads, phase change materials, phase change metal sheets, thermal conductive adhesives, etc.

[0050] The monitoring component 2500 may specifically be a thin-film sensor, such as a force-sensitive resistor, a strain gauge, a Micro-Electro-Mechanical Systems (MEMS) sensor, a displacement sensor, a resistance sensor, etc. The monitoring component 2500 has a signal acquisition end. The signal acquisition end is at least in contact with the deformable region of the thermal interface material layer 2300 to monitor state parameters such as stress, strain, and spacing between the deformable region and the crimping portion 2410.

[0051] When no deformation such as delamination occurs in the deformable region, the state parameters measured by the monitoring component 2500 should be within a set range. Correspondingly, when the state parameters measured by the monitoring component 2500 exceed the set range, it indicates that there may be deformation such as delamination in the deformable region. In this way, the location where the problem occurs can be accurately positioned, facilitating the rapid repair and maintenance of the chip packaging structure 2000.

[0052] That is to say, the chip packaging structure 2000 provided by the embodiments of the present application can be used to monitor the state parameters of the thermal interface material layer 2300, thereby guiding market operation and maintenance. In the market operation and maintenance stage, by obtaining in real time the state parameters of the thermal interface material layer 2300 measured by the monitoring component 2500 in the chip packaging structure 2000 under the working state of each single board, abnormal single boards can be quickly identified, and then quickly repaired and maintained.

[0053] In addition, the chip packaging structure 2000 provided by the embodiments of the present application can also be applied to the product assembly process in the mass production and processing stage. By monitoring in real time the state parameters of the deformable region of the thermal interface material layer 2300, it is possible to determine whether there are problems such as delamination in the thermal interface material layer 2300 during the product assembly process, and the location where the problem occurs can be quickly located, and abnormal single boards can be quickly identified, so as to improve the processing efficiency and yield of the product. Or, the chip packaging structure 2000 provided by the embodiments of the present application can also be applied to the single board design and R & D stage. Through the real-time monitoring of the state parameters by the monitoring component 2500, it can also guide the staff to optimize installation parameters such as circuit boards, radiators, brackets, and screw torques, so as to improve the performance of the product. In other words, through the chip packaging structure 2000 provided by the embodiments of the present application, a large amount of R & D investment resources and problem location resources can be saved, the development time for the product to enter the market can be significantly saved, and the market operation reliability of the product can be improved.

[0054] In some alternative implementation manners, such as Figure 4As shown, a first mounting groove 2411 may be provided on one side of the crimping portion 2410 facing the chip 2200. The monitoring component 2500 may specifically be located in the first mounting groove 2411 to make rational use of the internal space of the crimping device 2400, thereby improving the compactness and integration of the structure. Along the set direction P, the surface of the signal acquisition end facing the chip 2200 and the surface of the crimping portion 2410 facing the chip 2200 may be flush to achieve good contact between the signal acquisition end and the thermal interface material layer 2300.

[0055] Taking the monitoring component 2500 as a thin film sensor as an example, the signal acquisition end may specifically be the end face of the thin film sensor facing the thermal interface material layer 2300. The dimension of the first mounting groove 2411 along the set direction P and the dimension of the monitoring component 2500 along the set direction P may be basically the same. For example, both may be 0.5 mm. In this way, after the monitoring component 2500 is assembled into the first mounting groove 2411, its signal acquisition end can be basically flush with the surface of the crimping portion 2410 facing the chip 2200.

[0056] In some alternative implementation manners, the crimping device 2400 may be a lid. The lid may specifically be a metal lid. In this way, the lid may have good thermal conductivity and mechanical properties, and at the same time, it can also be conveniently connected to the substrate 2110. The lid may include a base material and a surface coating. Among them, the base material may specifically be made of copper material, etc., and the surface coating may specifically be made of nickel material, etc., to improve the corrosion resistance and wear resistance of the lid, etc.

[0057] Combined Figure 3 and Figure 4 , the crimping device 2400 may further include a cylindrical portion 2420. The cylindrical portion 2420 may be located on the side of the crimping portion 2410 along the set direction P facing the substrate 2100. The cylindrical portion 2420 and the crimping portion 2410 may be an integrally formed one-piece structure. In this way, the crimping device 2400 can be relatively easily obtained. Or, the cylindrical portion 2420 and the crimping portion 2410 may also be a split structure, and the two may be prepared separately and then assembled. The specific assembly process may be, for example, welding, screw connection, snap connection, riveting, bonding, etc., which is not limited herein as long as the requirements for installation reliability and sealing can be met.

[0058] The cylindrical portion 2420 may be connected to the substrate 2100. The specific connection method may be, for example, welding or bonding, etc. After the connection is completed, the crimping device 2400 and the substrate 2100 may enclose to form a receiving cavity 2400A, and the chip 2200 may specifically be located in the receiving cavity 2400A.

[0059] In an embodiment of the present application, the chip packaging structure 2000 may further include a first signal transmission part 2600. The substrate 2100 may be provided with a signal output part 2110. One end of the first signal transmission part 2600 may be connected to the monitoring component 2500, and the other end of the first signal transmission part 2600 may be connected to the signal output part 2110. In this way, a complete signal transmission path can be constructed. Moreover, this signal transmission path is integrally arranged inside the crimping device 2400, not easily affected by the outside world, and the reliability and stability of signal transmission can be relatively better. At the same time, it can also make the external structure design of the chip packaging structure 2000 provided by the embodiment of the present application more concise.

[0060] The above-mentioned first signal transmission part 2600 may be a flying wire, which is independent of the crimping device 2400. That is, the above-mentioned first signal transmission part 2600 may not be connected to the crimping device 2400, and the first signal transmission part 2600 may be directly arranged in the accommodation cavity 2400A. In this way, the self-structure and installation structure of the first signal transmission part 2600 can be relatively simple.

[0061] In addition, the above-mentioned first signal transmission part 2600 may also be integrated into the crimping device 2400. In this way, the first signal transmission part 2600 is not easily shaken. Correspondingly, the connection parts of the first signal transmission part 2600 with the monitoring component 2500 and the signal output part 2110 are not easily pulled, and the reliability and stability of signal transmission can be relatively high. In one solution, the first signal transmission part 2600 may adopt a flexible printed circuit (FPC) or a signal transmission cable, etc., and it can be fixed to the inner wall surface of the crimping device 2400 by processes such as dispensing; in addition to the dispensing process, it may also be to provide a clamping component in the form of a hook on the inner wall surface of the crimping device 2400 to clamp and assemble the first signal transmission part 2600 inside the crimping device 2400 through this clamping component. In another solution, the first signal transmission part 2600 may also be a conductive material such as conductive metal, and it can be laid on the inner wall surface of the crimping device 2400 by processes such as electroplating.

[0062] The above-mentioned signal output unit 2110 may be a connection pin, which can be connected to the first signal transmission unit 2600 through processes such as soldering. Alternatively, the signal output unit 2110 may include a first connector (not shown in the figure), the first signal transmission unit 2600 may include a second connector, and the first connector may be plugged into the second connector to connect the signal output unit 2110 and the first signal transmission unit 2600. Alternatively, the signal output unit 2110 may further include a connecting spring piece. After the crimping device 2400 and the substrate 2100 are connected, the first signal transmission unit 2600 can make reliable elastic contact with the connecting spring piece, so as to realize the communication connection between the signal output unit 2110 and the first signal transmission unit 2600. In fact, no matter what structural form the signal output unit 2110 adopts, as long as it can realize the communication connection with the first signal transmission unit 2600.

[0063] Please continue to refer to Figure 4 and Figure 5 , a receiving groove 2421 may be provided at the end of the cylindrical portion 2420 facing the substrate 2100. After the cylindrical portion 2420 and the substrate 2100 are connected, the connection portion between the first signal transmission unit 2600 and the signal output unit 2110 can be received in the receiving groove 2421, which can reduce the possibility of interference between the cylindrical portion 2420 and the connection portion during the installation process, and is more conducive to ensuring the connection reliability between the first signal transmission unit 2600 and the signal output unit 2110. Taking the soldering connection between the first signal transmission unit 2600 and the signal output unit 2110 as an example, the solder joint between the first signal transmission unit 2600 and the signal output unit 2110 may be located in the receiving groove 2421. Taking the first signal transmission unit 2600 including a second connector and the signal output unit 2110 including a first connector as an example, both the first connector and the second connector may be located in the receiving groove 2421. Taking the signal output unit 2110 including a connecting spring piece as an example, the connecting spring piece may also be provided in the receiving groove 2421.

[0064] As Figure 7 shown, the computing device 100 provided by the embodiment of the present application may further include a circuit board 2700. The circuit board 2700 may specifically be a printed circuit board (PCB). The substrate 2100 may be assembled on the circuit board 2700 along a set direction P. The specific assembly method may be, for example, soldering, bonding, screw connection, etc., which is not limited herein as long as the reliability requirements of the connection can be ensured.

[0065] The circuit board 2700 may be provided with a controller 2710. The core of the controller 2710 may be, for example, a Microcontroller Unit (MCU), a Complex Programmable Logic Device (CPLD), etc. The aforementioned signal output unit 2110 may specifically be communicatively connected to the controller 2710. That is, the status parameters measured by the monitoring component 2500 may specifically be transmitted to the controller 2710 and monitored by the controller 2710. The controller 2710 may be independent of the chip 2200 to avoid interference from the chip 2200 itself, which is more conducive to ensuring the accuracy of signal monitoring.

[0066] A third signal transmission unit 2720 may be provided on the circuit board 2700. The controller 2710 may specifically communicate with the signal output unit 2110 through the third signal transmission unit 2720.

[0067] The specific structural form of the third signal transmission unit 2720 may be the same as that of the aforementioned first signal transmission unit 2600. In some implementation manners, the third signal transmission unit 2720 may also be a flying wire, which may be independent of the circuit board 2700 to simplify the structure. In other implementation manners, the third signal transmission unit 2720 may also be integrated into the circuit board 2700. In this way, the third signal transmission unit 2720 is not likely to shake, and the reliability and stability of signal transmission can be relatively high. For example, the third signal transmission unit 2720 may adopt an FPC or a signal transmission cable, which may be fixed to the inner wall surface of the circuit board 2700 through a dotting process, a clamping process, etc. Another example is that the third signal transmission unit 2720 may also be made of a conductive material such as a conductive metal, which may be laid on the surface of the circuit board 2700 through a plating process.

[0068] The connection manner between the third signal transmission unit 2720 and the signal output unit 2110 may be the same as the connection manner between the aforementioned first signal transmission unit 2600 and the signal output unit 2110, and no repetitive description will be made here.

[0069] In some optional implementation manners, the projection of the chip 2200 along the set direction P is a polygon, and the chip 2200 may include a plurality of first corner portions (not shown in the figure). The deformable region of the thermal interface material layer 2300 may include a plurality of sub-regions corresponding to the respective first corner portions in the thermal interface material layer 2300.

[0070] The thermal interface material layer 2300 may cover the chip 2200 along the set direction P. Therefore, the projection of the thermal interface material layer 2300 along the set direction P is basically the same as that of the chip 2200. Figure 5For example, the projection of the chip 2200 along the set direction P is a rectangle, the chip 2200 may include four first corners, the projection of the thermal interface material layer 2300 along the set direction P is also a rectangle, the thermal interface material layer 2300 includes four second corners, and each second corner is a sub-region corresponding to each first corner. Therefore, each second corner is an easily deformed region of the thermal interface material layer 2300, and each second corner may be configured with a monitoring component 2500. That is, the number of monitoring components 2500 may be consistent with the number of the above-mentioned sub-regions, and each monitoring component 2500 may monitor each sub-region one by one.

[0071] In addition, the easily deformable region of the thermal interface material layer 2300 may also include other regions, such as a region corresponding to an edge of the chip 2200 .

[0072] In fact, in some other implementations of the embodiments of the present application, the signal acquisition end of the monitoring component 2500 may not only be in contact with the easily deformable area, but may also be in contact with other areas of the thermal interface material layer 2300, or even with all areas of the thermal interface material layer 2300, so as to perform more complete monitoring of the thermal interface material layer 2300, which is of more positive significance for accurately locating the location where the problem occurs.

[0073] In some optional implementations, the computing device 100 provided in the embodiment of the present application may further include a heat sink 2900, which may be located on a side of the crimping device 2400 that is away from the substrate 2100 along a set direction P. The heat sink 2900 may be a metal heat sink, etc., which is used to indirectly provide heat dissipation for the chip 2200, so as to ensure the working performance of the chip 2200.

[0074] like Figure 7 As shown, the heat sink 2900 can be connected to the circuit board 2700 via a connecting column 2910. At least a portion of the connecting column 2910 can be provided with a thread, and the heat sink 2900 can be installed and fixed by means of the thread. In this way, the installation torque of the heat sink 2900 can be easily adjusted, and then the degree of compression of the heat sink 2900 on the crimping device 2400 can be adjusted.

[0075] Here, the embodiments of the present application do not limit the specific connection structure between the heat sink 2900 and the circuit board 2700. In actual applications, those skilled in the art can make selections according to specific needs as long as the requirements for use can be met. For example, the above-mentioned connection posts 2910 can be integrated on the circuit board 2700. The heat sink 2900 can be provided with through holes. The heat sink 2900 can be inserted through the through holes into the connection posts 2910. Then, threaded components such as nuts and bolts can be used to connect to the connection posts 2910, and the threaded components can be made to abut against the heat sink 2900. In this way, the installation and fixation of the heat sink 2900 can be achieved.

[0076] In the above implementation manners, the embodiments of the present application are described by taking the monitoring component 2500 being installed on the crimping portion 2410 as an example. In fact, in some other implementation manners of the embodiments of the present application, the monitoring component 2500 can also be arranged at other positions as long as its signal acquisition end can be in contact with the thermal interface material layer 2300 along the set direction P so as to accurately complete the signal acquisition of the state parameters.

[0077] For example, refer to Figure 8 , the monitoring component 2500 can also be integrally assembled on the chip 2200. The monitoring component 2500 can be integrated on the chip 2200 through a Through Silicon Via (TSV) packaging process. Specifically, the chip 2200 can be provided with a second installation groove 2220 and a through hole 2230. The through hole 2230 can communicate with the second installation groove 2220. The monitoring component 2500 can be arranged in the second installation groove 2220. A conductive film layer (not shown in the figure) can be provided on the inner wall surface of the through hole 2230. The monitoring component 2500 can be connected to the aforementioned first signal transmission portion 2600 through the conductive film layer. At this time, the first signal transmission portion 2600 can be integrally installed on the substrate 2100, and then, the first signal transmission portion 2600 is connected to the signal output portion 2110. Since both the first signal output portion 2600 and the signal output portion 2110 are arranged on the substrate 2100, both of them can be formed by laying or embedding conductive metals in the substrate 2100 to simplify their forming and connecting manners. In fact, in this implementation manner, the first signal transmission portion 2600 can also be not included, and then the conductive film layer is directly electrically connected to the signal output portion 2110, which is also feasible.

[0078] Please refer to Figure 9 , Figure 9 is a connection structure diagram of a chip packaging structure, a crimping device, and a circuit board in another implementation manner of the computing device provided by the embodiments of the present application.

[0079] As Figure 9As shown in the figure, another implementation of the computing device is also provided in the embodiments of the present application. In this implementation, the crimping device 2400 is the aforementioned heat sink 2900. In this way, the heat transfer path between the heat sink 2900 and the chip 2200 is shorter, which is more conducive to improving the heat dissipation effect of the chip 2200.

[0080] In this implementation, the chip packaging structure 2000 may further include a second signal transmission part 2800 and a circuit board 2700. The crimping device 2400 (i.e., the heat sink 2900) can be connected to the circuit board 2700, and the specific connection method is as described above. The second signal transmission part 2800 may include a first segment 2810 and a second segment 2820. Among them, the first segment 2810 may be integrated into the heat sink 2900, and the second segment 2820 may be separated from the heat sink 2900, that is, the second segment 2820 may be independent of the heat sink 2900. The second segment 2820 may be located outside the heat sink 2900 and may not be connected to the heat sink 2900. The substrate 2100 may be assembled on the circuit board 2700 along the set direction P. The circuit board 2700 may be provided with a controller 2710, and the second segment 2820 may be communicatively connected to the controller 2710.

[0081] The integration method of the first segment 2810 and the heat sink 2900 may refer to the relevant description of the integration of the first signal transmission part 2600 into the crimping device 2400 as described above, and no repetitive description will be made here. The pins of the monitoring component 2500 may be integrated inside the heat sink 2900. Of course, they may also be located outside the heat sink 2900, which is not limited here, as long as it is ensured that the first segment 2810 can be connected to the monitoring component 2500.

[0082] The second segment 2820 may be directly connected to the controller 2710. Or, as Figure 9 shown, the second segment 2820 may also be connected to the controller 2710 through the aforementioned third signal transmission part 2720. The connection method between the second segment 2820 and the third signal transmission part 2720 includes but is not limited to welding, connector connection, etc., as long as the connection reliability between the second segment 2820 and the third signal transmission part 2720 can be ensured.

[0083] In the above based on Figures 3 - 9In each of the described implementations, the monitoring component 2500 is communicatively connected to the controller 2710 provided on the circuit board 2700, so that the controller 2710 can receive and judge the status parameters. In addition, in some other implementations of the embodiments of the present application, the monitoring component 2500 can also be communicatively connected to the chip 2200. Since the distance between the monitoring component 2500 and the chip 2200 is closer, the signal transmission path between the two is relatively short. Directly connecting the monitoring component 2500 and the chip 2200 can also simplify the signal transmission structure between the two. At the same time, it can also reduce external interference and is beneficial to ensuring the stability and reliability of signal transmission. In this implementation, since the distance between the monitoring component 2500 and the chip 2200 is relatively close, the pins of the monitoring component 2500 can be directly soldered to the chip 2200. Of course, the monitoring component 2500 and the chip 2200 can also be connected by means of cables, etc., as long as the stability of signal transmission between the two can be ensured.

[0084] The above are only the preferred implementation manners of the present application. It should be noted that for those of ordinary skill in the art in the technical field of the present application, without departing from the principle of the present application, several improvements and refinements can be made, and these improvements and refinements should also be regarded as the protection scope of the present application.

Claims

1. A computing device, characterized in that, It includes a circuit board, a chip packaging structure and a crimping device, wherein the chip packaging structure is arranged on the circuit board, the chip packaging structure includes a substrate, a chip, a thermal interface material layer and a monitoring component, the chip is arranged on the substrate, the crimping device includes a crimping part, the crimping part is located on the side of the chip away from the substrate, the thermal interface material layer is arranged between the chip and the crimping part, and the monitoring component includes a signal acquisition end, the signal acquisition end is in contact with at least an easily deformed area of ​​the thermal interface material layer, so as to monitor the state parameters of the easily deformed area.

2. The computing device according to claim 1, wherein A first mounting groove is provided on the side of the crimping portion facing the chip, and the monitoring component is located in the first mounting groove; a side of the signal acquisition end facing the chip is flush with a side of the crimping portion facing the chip.

3. The computing device according to claim 1, wherein The monitoring component is integrated with the chip.

4. The computing device according to any one of claims 1-3, characterized in that, The pressing device is a cover, the chip packaging structure includes the pressing device, the pressing device also includes a cylindrical portion, the cylindrical portion is located on a side of the pressing portion facing the substrate, the cylindrical portion is connected to the substrate, the pressing device and the substrate enclose a receiving cavity, and the chip is located in the receiving cavity; The chip packaging structure further includes a first signal transmission part, the substrate is provided with a signal output part, one end of the first signal transmission part is connected to the monitoring component, and the other end of the first signal transmission part is connected to the signal output part.

5. The computing device according to claim 4, wherein The end of the cylindrical portion facing the substrate is provided with a receiving groove, the signal output portion comprises a connecting spring, the connecting spring is located in the receiving groove, and the first signal transmission portion is connected to the connecting spring.

6. The computing device according to claim 4, wherein The circuit board is provided with a controller, and the signal output unit is communicatively connected with the controller.

7. The computing device according to any one of claims 1-3, characterized in that The crimping device is a heat sink; The chip packaging structure also includes a second signal transmission part, the crimping device is connected to the circuit board, the second signal transmission part includes a first section and a second section, the first section is installed on the heat sink, and the second section is located on the outside of the heat sink. The circuit board is provided with a controller, and the second section is communicatively connected to the controller.

8. The computing device according to any one of claims 1-3, characterized in that, The chip includes multiple first corners, the easily deformable area includes multiple sub-areas in the thermal interface material layer corresponding to each of the first corners, the number of the monitoring components is consistent with the sub-areas, and each of the monitoring components monitors the sub-areas one by one.

9. The computing device according to any one of claims 1-3, wherein The monitoring component is communicatively connected to the chip.

10. A chip packaging structure, characterized in that, It includes a substrate, a chip, a thermal interface material layer, a crimping device and a monitoring component, wherein the chip is arranged on the substrate, the crimping device includes a crimping portion, the crimping portion is located on the side of the chip away from the substrate, the thermal interface material layer is arranged between the chip and the crimping portion, and the monitoring component includes a signal acquisition end, the signal acquisition end is in contact with at least an easily deformed area of ​​the thermal interface material layer, so as to monitor the state parameters of the easily deformed area.

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