Display panel

Abstract

The invention provides a display panel which comprises a pixel driving circuit, the pixel driving circuit comprises a driving transistor and a first reset transistor, a first end of a first reset active part of the first reset transistor is electrically connected to a first reset signal line, and a second end of a second reset active part of the first reset transistor is electrically connected to a second reset signal line. The second end of the first reset active part and the anode of the light-emitting device are electrically connected to a first node; the ratio of first conduction impedance between a first reset signal line and a first node in one pixel driving circuit to second conduction impedance between the first reset signal line and a first node in the other pixel driving circuit is limited between 9: 10 and 10: 9. According to the display panel, the potential difference of the anodes of the light-emitting devices corresponding to the two pixel driving circuits in the same pixel driving circuit group during resetting can be reduced, so that the current difference during light emitting of the light-emitting devices is reduced, the brightness difference of adjacent rows of pixels can be reduced, the brightness uniformity of the display panel can be improved, and the split-screen phenomenon can be improved.

Description

Technical Field

[0001] The present application relates to the field of display technologies, and particularly to a display panel. Background Art

[0002] With the development of display technologies, display panels have been widely used in people's lives, such as the display panels of mobile phones, computers, and televisions. With the progress of life and the development of technologies, people not only have higher and higher requirements for the display performance of display panels, but also have higher and higher requirements for the resolution of display panels.

[0003] However, since the potentials of the anodes of adjacent two rows of light-emitting devices are not equal during reset, there are differences in the currents of adjacent two rows of light-emitting devices during light emission, resulting in differences in the brightness of adjacent two rows of light-emitting devices, and causing a problem of split screen in the display picture of the display panel.

[0004] Therefore, it is necessary to provide a display panel to improve this defect. Summary of the Invention

[0005] An embodiment of the present application provides a display panel, which can improve the brightness uniformity of the display panel and improve the phenomenon of split screen.

[0006] To achieve the above object, according to a first aspect of the present application, there is provided a display panel, including a plurality of pixel driving circuits, a first reset signal line, a first power supply signal line, a second power supply signal line, and a light-emitting device. The pixel driving circuit includes:

[0007] A driving transistor, which is connected in series with the light-emitting device between the first power supply signal line and the second power supply signal line; and

[0008] A first reset transistor, including a first reset active part, a first end of the first reset active part is electrically connected to the first reset signal line, and a second end of the first reset active part and an anode of the light-emitting device are electrically connected to a first node;

[0009] Wherein, the plurality of pixel driving circuits include at least one pixel driving circuit group. The pixel driving circuit group includes two pixel driving circuits, and the two pixel driving circuits are electrically connected to the same first reset signal line through the same via hole. There is a first conduction impedance between the first reset signal line and the first node in one of the pixel driving circuits, and there is a second conduction impedance between the first reset signal line and the first node in the other pixel driving circuit. The ratio of the first conduction impedance to the second conduction impedance is greater than or equal to 9:10 and less than or equal to 10:9.

[0010] Optionally, the transfer hole is closer to the first node in one of the pixel driving circuits than to the first node in the other pixel driving circuit;

[0011] Wherein, the number of bent segments of the first reset active part in one of the pixel driving circuits is less than the number of bent segments of the first reset active part in the other pixel driving circuit.

[0012] Optionally, the first active part in the other pixel driving circuit includes a first bent segment, a second bent segment, and a third bent segment connected in sequence, and the first node is connected to the first reset signal line through the first bent segment, the second bent segment, and the third bent segment in sequence.

[0013] Optionally, the plurality of first reset signal lines include a first sub-reset signal line, and the display panel includes:

[0014] A substrate;

[0015] An active layer disposed on one side of the substrate, and the active layer includes the first reset active part;

[0016] A first gate layer disposed on the side of the active layer away from the substrate, and the first gate layer includes the first sub-reset signal line;

[0017] Wherein, the orthographic projection of the second bent segment on the substrate overlaps with the orthographic projection of the first sub-reset signal line on the substrate.

[0018] Optionally, the length of the first bent segment is greater than the length of the second bent segment and the length of the third bent segment.

[0019] Optionally, at least one pixel driving circuit group includes a first pixel driving circuit group, and the first pixel driving circuit group includes two first pixel driving circuits adjacent in a direction perpendicular to the extending direction of the first reset signal line; wherein, in the other first pixel driving circuit, the extending directions of the first bent segment and the third bent segment are perpendicular to the extending direction of the first reset signal line, and the extending direction of the second bent segment is parallel to the extending direction of the first reset signal line;

[0020] And / or, at least one pixel driving circuit group includes a second pixel driving circuit group, and the second pixel driving circuit group includes two second pixel driving circuits adjacent in a direction perpendicular to the extending direction of the first reset signal line; wherein, in the other second pixel driving circuit, the extending directions of the first bent segment and the third bent segment are perpendicular to the extending direction of the first reset signal line, and the included angle between the extending direction of the second bent segment and the extending direction of the first reset signal line is an acute angle;

[0021] And / or, at least one of the pixel driving circuit groups includes a third pixel driving circuit group, and the third pixel driving circuit group includes two third pixel driving circuits adjacent to each other in a direction perpendicular to the extending direction of the first reset signal line; wherein, in the other third pixel driving circuit, the extending directions of the first bent segment and the third bent segment are perpendicular to the extending direction of the first reset signal line, and the extending direction of the second bent segment forms an acute angle with the extending direction of the first reset signal line.

[0022] Optionally, the first reset active portions in the other second pixel driving circuit and the other third sub-pixel driving circuit both include a fourth bent segment connected to the third bent segment;

[0023] Wherein, the fourth bent segment in the other second sub-pixel driving circuit is connected to the two fourth bent segments in the other third sub-pixel driving circuit to be continuously arranged, and the extending directions of the two fourth bent segments are parallel to the extending direction of the first reset signal line.

[0024] Optionally, the first reset active portion in one of the first pixel driving circuits includes a fifth bent segment and a sixth bent segment connected in sequence, and the first node is electrically connected to the first reset signal line through the fifth bent segment and the sixth bent segment in sequence;

[0025] Wherein, the extending direction of the fifth bent segment is perpendicular to the extending direction of the first reset signal line, the extending direction of the sixth bent segment forms an acute angle with the extending direction of the first reset signal line, and the width of a part of the fifth bent segment is greater than the width of the sixth bent segment.

[0026] Optionally, the width of at least part of the first reset active portion in one of the pixel driving circuits is greater than the width of at least part of the first reset active portion in the other pixel driving circuit.

[0027] Optionally, the display panel further includes a display signal line for transmitting a signal to the pixel driving circuit, and the extending direction of the display signal line is parallel to the extending direction of the first reset signal line;

[0028] Wherein, the display signal line and the first reset active portion are arranged in different layers, the display signal line includes at least two sub-line segments arranged at intervals, and the first reset active portion in one of the pixel driving circuits is arranged between two adjacent sub-line segments.

[0029] In the display panel according to the embodiment of the present application, by limiting the ratio of the first conduction impedance between the first reset signal line and the first node in one of the pixel driving circuits to the second conduction impedance between the first reset signal line and the first node in another pixel driving circuit to be between 9:10 and 10:9, the potential difference between the anodes of the light-emitting devices corresponding to two adjacent pixel driving circuits in the same pixel driving circuit during reset can be reduced, thereby reducing the current difference when the light-emitting devices emit light. In this way, the brightness difference between adjacent rows of pixels can be reduced, and thus the brightness uniformity of the display panel can be improved, and the phenomenon of screen splitting can be improved.

[0030] Other features and advantages of the present application will be described in detail in the subsequent specific implementation section. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the present application, and those skilled in the art can also obtain other drawings based on these drawings without creative efforts.

[0032] In order to more fully understand the present application and its beneficial effects, the following will be described in conjunction with the drawings, where the same reference numerals in the following description represent the same parts.

[0033] Figure 1 A top view of the display panel provided by the embodiment of the present application;

[0034] Figure 2 A schematic diagram of the pixel driving circuit provided by the embodiment of the present application;

[0035] Figure 3 A schematic diagram of the film layer structure of the display panel provided by the embodiment of the present application;

[0036] Figure 4 A stacked diagram of the active layer, the second gate layer, the first gate layer, and the first source-drain layer in the display panel provided by the embodiment of the present application;

[0037] Figure 5 A film layer diagram of the active layer provided by the embodiment of the present application;

[0038] Figure 6 A film layer diagram of the second gate layer provided by the embodiment of the present application;

[0039] Figure 7 A stacked diagram of the active layer and the second gate layer in the display panel of the present application;

[0040] Figure 8The film layer diagram of the first gate layer in the display panel provided by the embodiment of the present application;

[0041] Figure 9 The stacked diagram of the active layer, the second gate layer and the first gate layer in the display panel of the present application;

[0042] Figure 10 The film layer diagram of the first source-drain layer in the display panel provided by the embodiment of the present application;

[0043] Figure 11 The schematic diagram of the display device provided by the embodiment of the present application. Detailed implementation manners

[0044] Next, the technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative efforts shall fall within the protection scope of the present application.

[0045] The embodiment of the present application provides a display panel. The display panel includes a plurality of pixel driving circuits, a first reset signal line, a first power supply signal line, a second power supply signal line, and a light-emitting device. The pixel driving circuit includes: a driving transistor, which is connected in series with the light-emitting device between the first power supply signal line and the second power supply signal line; and a first reset transistor, which includes a first reset active part. The first end of the first reset active part is electrically connected to the first reset signal line, and the second end of the first reset active part and the anode of the light-emitting device are electrically connected to a first node. Among them, the plurality of pixel driving circuits include at least one pixel driving circuit group. The pixel driving circuit group includes two pixel driving circuits, and the two pixel driving circuits are electrically connected to the same first reset signal line through the same via hole. There is a first conduction impedance between the first reset signal line and the first node in one of the pixel driving circuits, and there is a second conduction impedance between the first reset signal line and the first node in the other pixel driving circuit. The ratio of the first conduction impedance to the second conduction impedance is greater than or equal to 9:10 and less than or equal to 10:9.

[0046] In the embodiments of the present application, by electrically connecting the first reset transistors of two pixel driving circuits in the pixel driving circuit to the same first reset signal line, the number of first reset signal lines can be reduced. Therefore, the space occupied by the first reset signal lines can be reduced, which is beneficial to improving the pixel density of the display panel. On this basis, by limiting the ratio of the first conduction impedance between the first reset signal line and the first node in one pixel driving circuit to the second conduction impedance between the first reset signal line and the first node in the other pixel driving circuit to be between 9:10 and 10:9, the potential difference between the anodes of the light-emitting devices corresponding to two adjacent pixel driving circuits in the same pixel driving circuit during reset can be reduced, thereby reducing the current difference when the light-emitting devices emit light. In this way, the brightness difference between adjacent rows of pixels can be reduced, and thus the brightness uniformity of the display panel can be improved, and the phenomenon of screen splitting can be improved.

[0047] In some embodiments, the ratio of the first conduction impedance to the second conduction impedance can be 9:10, 11:12, 13:14, 15:16, 17:18, 19:20, 1:1, 20:19, 18:17, 16:15, 14:13, 12:11, 10:9, etc., and only needs to be between 9:10 and 10:9.

[0048] In some embodiments, the ratio of the first conduction impedance to the second conduction impedance is greater than or equal to 17:18 and less than or equal to 18:17. It should be noted that if the ratio of the first conduction impedance to the second conduction impedance is too small or too large, it means that the difference between the first conduction impedance and the second conduction impedance is too large, which will cause a large current difference between the light-emitting devices corresponding to two adjacent pixel driving circuits in the pixel driving circuit when emitting light, resulting in the phenomenon of screen splitting in the display screen. In this embodiment, by limiting the ratio of the first conduction impedance to the second conduction impedance to be between 17:18 and 18:17, the difference in the conduction impedance between the first reset signal line and the first node corresponding to two pixel driving circuits in the pixel driving circuit group can be further reduced, so as to further reduce the potential difference between the anodes of the light-emitting devices corresponding to two adjacent pixel driving circuits in the same pixel driving circuit during reset, thereby reducing the current difference when the light-emitting devices emit light. In this way, the brightness difference between adjacent rows of pixels can be reduced, and thus the brightness uniformity of the display panel can be improved, and the phenomenon of screen splitting can be improved.

[0049] Please refer to Figure 1 , Figure 1A top view of a display panel provided by an embodiment of the present application. The display panel 100 includes a display area AA and a border area NA, and the border area NA is disposed around the display area AA. The display panel includes a plurality of sub-pixels, and each sub-pixel includes a light-emitting device 20 and a pixel driving circuit 10 electrically connected to the light-emitting device 20. Both the light-emitting device 20 and the pixel driving circuit 10 are disposed in the display area AA.

[0050] Please refer to Figure 2 , Figure 2 A schematic diagram of a pixel driving circuit provided by an embodiment of the present application. The pixel driving circuit includes a driving transistor T1, a switching transistor T2, a compensation transistor T3, a second reset transistor T4, a first light-emitting control transistor T5, a second light-emitting control transistor T6, a first reset transistor T7, a third reset transistor T8, and a storage capacitor Cst.

[0051] As Figure 2As shown, the first electrode of driving transistor T1 is electrically connected to the second node A, the second electrode of driving transistor T1 is electrically connected to the third node B, and the driving gate of driving transistor T1 is electrically connected to the fourth node Q; the first electrode of switching transistor T2 is electrically connected to the data signal line Data, the second electrode of switching transistor T2 is electrically connected to the second node A, and the switching gate of switching transistor T2 is electrically connected to the first scan signal line Sscan1; the first electrode of compensating transistor T3 is electrically connected to the fourth node Q, the second electrode of compensating transistor T3 is electrically connected to the third node B, and the compensating gate of compensating transistor T3 is electrically connected to the first scan signal line Scan1; the first electrode of the second reset transistor T4 is electrically connected to the second reset signal line VI2, the second electrode of the second reset transistor T4 is electrically connected to the fourth node Q, and the second reset gate of the second reset transistor T4 is electrically connected to the reset control signal line Rst; the first electrode of the first light-emitting control transistor T5 is electrically connected to the first power supply signal line VDD, the second electrode of the first light-emitting control transistor T5 is electrically connected to the second node A, and the first light-emitting control gate of the first light-emitting control transistor T5 is electrically connected to the light-emitting control signal line EM; the first electrode of the second light-emitting control transistor T6 is electrically connected to the third node B, the second electrode of the second light-emitting control transistor T6 is electrically connected to the first node C, and the second light-emitting control gate of the second light-emitting control transistor T6 is electrically connected to the light-emitting control signal line EM; the first electrode of the first reset transistor T7 is electrically connected to the first reset signal line VI1, the second electrode of the first reset transistor T7 is electrically connected to the first node A, and the first reset gate of the first reset transistor T7 is electrically connected to the second scan signal line Scan2; the first electrode of the third reset transistor T8 is electrically connected to the third reset signal line VI3, the second electrode of the third reset transistor T8 is electrically connected to the second node A, and the third reset gate of the third reset transistor T8 is electrically connected to the second scan signal line Scan2; the first plate of the storage capacitor Cst is electrically connected to the first power supply signal line VDD, the second plate of the storage capacitor Cst is electrically connected to the fourth node Q; the anode of the light-emitting device 20 is electrically connected to the first node C, and the cathode of the light-emitting device 20 is electrically connected to the second power supply signal line VSS.

[0052] In an embodiment of the present application, the first power supply signal line VDD is used to provide a constant voltage high-level signal to the pixel driving circuit 10, and the second power supply signal line VSS is used to provide a constant voltage low-level signal to the pixel driving circuit 10.

[0053] It should be noted that, in the embodiment of the present application, the first electrode of the transistor is one of the source and the drain, the second electrode is the other of the source and the drain, and the first electrode and the second electrode of each transistor may be the same or different.

[0054] The following describes the film layer structure of the pixel driving circuit of the present application with respect to the structure shown in Figure 2 The film layer structure of the pixel driving circuit of the present application will be described with respect to the structure shown in

[0055] In some embodiments, referring to Figure 3 , Figure 3 FIG.

[0056] In some embodiments, referring to Figure 3 , the substrate 31 may be a single-layer substrate formed of an organic material or an inorganic material, or the substrate 31 may also be a double-layer or multi-layer substrate formed of at least one of an organic material and an inorganic material. Among them, the organic material may be, but is not limited to, polyimide, and the inorganic material may be, but is not limited to, glass.

[0057] As shown in Figure 3 , the barrier layer 36 is disposed on the substrate 31, and the buffer layer 37 is disposed on the barrier layer 36. The barrier layer 36 and the buffer layer 37 may both be a single-layer structure or a stacked structure formed of at least one of silicon nitride, silicon oxide, and silicon oxynitride.

[0058] As shown in Figure 3 , the active layer 32 is disposed on the buffer layer 37. The material of the active layer 32 includes a metal oxide semiconductor material or a silicon semiconductor material. Specifically, the metal oxide semiconductor material may be indium gallium zinc oxide, and the silicon semiconductor material may be amorphous silicon or low-temperature polycrystalline silicon.

[0059] In the embodiment of the present application, the material of the active layer 32 includes low-temperature polycrystalline silicon.

[0060] As shown in Figure 3As shown, a first gate insulating layer 38, a second gate insulating layer 39, a first interlayer dielectric layer 40, and a second interlayer dielectric layer 41 are respectively disposed on corresponding metal layers or active layers, so that the metal layers or active layers of different layers are separated and insulated. The first gate insulating layer 38, the second gate insulating layer 39, the first interlayer dielectric layer 40, and the second interlayer dielectric layer 41 may be a single-layer structure or a stacked structure formed of at least one of silicon nitride, silicon oxide, and silicon oxynitride.

[0061] As Figure 3 shown, a second gate layer 34, a first gate layer 33, a first source-drain layer 35, and a second source-drain layer 42 are respectively disposed on corresponding insulating layers or interlayer dielectric layers. The second gate layer 34, the first gate layer 33, the first source-drain layer 35, and the second source-drain layer 42 may be a single-layer structure formed of at least one of copper, molybdenum, titanium, aluminum, silver, etc., or may be a stacked structure of two or more layers formed of at least two of the above metal materials.

[0062] As Figure 3 shown, a planarization layer 43 is disposed on the second source-drain layer 42. The material of the planarization layer 43 may be at least one inorganic insulating material such as silicon nitride, silicon oxide, or silicon oxynitride, or may be an organic insulating material having leveling properties.

[0063] As Figure 3 shown, the display panel further includes a light-emitting device layer. The light-emitting device layer is disposed on a side of the planarization layer 43 away from the second source-drain layer 42. The light-emitting device layer includes an anode layer 44 disposed on the planarization layer 43, a pixel definition layer 45 disposed on the anode layer 44, a spacer layer 46 disposed on the pixel definition layer 45, a light-emitting material layer disposed on the pixel definition layer 45, and a cathode layer (not shown in the figure).

[0064] As Figure 4 and Figure 5 shown, Figure 4 is a stacked diagram of an active layer, a second gate layer, a first gate layer, and a first source-drain layer in the display panel provided by the embodiment of the present application. Figure 5A film layer diagram of the active layer provided by an embodiment of the present application. A plurality of pixel driving circuits 10 include at least one pixel driving circuit group 11. The pixel driving circuit group 11 includes two pixel driving circuits 10 adjacent to each other in a direction perpendicular to the extending direction of the first reset signal line VI1. The two pixel driving circuits 10 in the pixel driving circuit group 11 are electrically connected to the same first reset signal line VI1 through the same transfer hole H1. The transfer hole H1 is closer to the first node C in one of the pixel driving circuits 10 than to the first node C in the other pixel driving circuit 10. There is a first conduction impedance between the first reset signal line VI1 and the first node C in one of the pixel driving circuits 10, and a second conduction impedance between the first reset signal line VI1 and the first node C in the other pixel driving circuit 10. The ratio of the first conduction impedance to the second conduction impedance is greater than or equal to 9:10 and less than or equal to 10:9. For example, the ratio of the first conduction impedance to the second conduction impedance can be 9:10, 1:1, or 10:9, etc.

[0065] In some embodiments, the ratio of the first conduction impedance to the second conduction impedance is 1:1, that is, the first conduction impedance is equal to the second conduction impedance, and the conduction impedance between the first reset signal line VI1 and the first node C in the two pixel driving circuits of the same pixel driving circuit group is equal. In this way, the potentials of the anodes of the light-emitting devices 20 respectively corresponding to the two pixel driving circuits of the same pixel driving circuit group during reset can be made equal, so that the currents of the light-emitting devices 20 during light emission are equal, thereby avoiding differences in the brightness of the light-emitting devices corresponding to the two pixel driving circuits connected to the same first reset signal line VI1, and thus improving the brightness uniformity of the display panel and improving the phenomenon of screen splitting.

[0066] It should be noted that the conduction impedance between the first reset signal line VI1 and the first node C refers to the impedance of the line between the first reset signal line VI1 and the first node C when the first reset transistor T7 is in the on state, and the impedance of the line between the first reset signal line VI1 and the first node C is related to the first reset active part of the first reset transistor T7.

[0067] As Figure 4 and Figure 5 shown, the active layer 32 includes a driving active part T1A of the driving transistor T1A, a switching active part T2A of the switching transistor T2, a compensation active part T3A of the compensation transistor T3, a second reset active part T4A of the second reset transistor T4, a first light-emitting control active part T5A of the first light-emitting control transistor T5, a second light-emitting control active part T6A of the second light-emitting control transistor T6, a first reset active part T7A of the first reset transistor T7, and a third reset active part T8A of the third reset transistor T8.

[0068] AsFigure 5 As shown, the driving active part T1A, the switching active part T2A, the compensating active part T3A, the second reset active part T4A, the first light-emitting control active part T5A, the second light-emitting control active part T6A, and the first reset active part T7A are connected to each other, and the third reset active part T8A is separately arranged from other active parts. The switching active part T2A, the first light-emitting control active part T5A, and the second light-emitting control active part T6A are all strip-shaped and extend along the column direction Y. The driving active part T1A is in a "Ji" shape and is arranged between the first light-emitting control active part T5A and the second light-emitting control active part T6A.

[0069] Combined with Figure 4 and Figure 5 As shown, the first end of the first reset active part T7A is electrically connected to the first reset signal line VI1 through the transfer hole H1. The second end of the first reset active part T7A and the first end of the second light-emitting control active part T6A are connected to the first node C. The conduction impedance between the first reset signal line VI1 and the first node C is the conduction impedance between the first end and the second end of the first reset active part T7A.

[0070] In some embodiments, the transfer hole H1 is closer to the first node C in one pixel driving circuit 10 than to the first node C in another pixel driving circuit 10. The number of bent segments of the first reset active part T7A in one pixel driving circuit 10 is less than the number of bent segments of the first reset active part T7A in another pixel driving circuit 10. One pixel driving circuit refers to the pixel driving circuit in the pixel driving circuit group 11 whose first node is closer to the transfer hole H1, and the other pixel driving circuit refers to the pixel driving circuit in the pixel driving circuit group 11 whose first node is farther from the transfer hole H1. By increasing the number of bent segments in the first reset active part T7A of the other pixel driving circuit 10 closer to the transfer hole H1 in the pixel driving circuit group, the length of the first reset active part T7A in the other pixel driving circuit 10 is increased, thereby reducing the difference in the conduction impedance of the first reset active part T7A of the two pixel driving circuits in the pixel driving circuit, making the potentials of the anodes of the light-emitting devices 20 corresponding to the two pixel driving circuits in the same pixel driving circuit group equal during reset, so that the currents of the light-emitting devices 20 during light emission are equal, thereby avoiding the difference in the brightness of the light-emitting devices corresponding to the two pixel driving circuits connected to the same first reset signal line VI1, and thus improving the brightness uniformity of the display panel and improving the phenomenon of screen splitting.

[0071] It should be noted that the bent segments in the embodiments of the present application refer to the straight line segments connected between adjacent two bent points. As Figure 5As shown, the first reset active part T7A in the embodiment of the present application is in a zigzag shape. The first reset active part T7A has multiple bending points, that is, the first reset active part T7A has multiple bending segments, and the extending directions of adjacent two bending segments are different.

[0072] In some embodiments, in combination with Figure 4 and Figure 5 As shown, the first reset active part T7A in another pixel driving circuit 10 includes a first bending segment T7A1, a second bending segment T7A2, and a third bending segment T7A3 connected in sequence. The first node C is connected to the first reset signal line VI1 through the first bending segment T7A1, the second bending segment T7A2, and the third bending segment T7A3 in sequence.

[0073] As Figure 6 shown, Figure 6 This is a film layer diagram of the second gate layer provided by the embodiment of the present application. The second gate layer 34 includes a driving gate T1G of the driving transistor T1, a switching gate T2G of the switching transistor T2, a compensation gate T3G of the compensation transistor T3, a second reset gate T4G of the second reset transistor T4, a first light emission control gate T5G of the first light emission control transistor T5, a second light emission control gate T6G of the second light emission control transistor T6, a first reset gate T7G of the first reset transistor T7, a third reset gate T8G of the third reset transistor T8, a first electrode plate Cst1 of the storage capacitor Cst, a reset control signal line Rst, a second scan signal line Scan2, and a light emission control signal line EM.

[0074] As Figure 6 shown, the reset control signal line Rst, the second scan signal line Scan2, and the light emission control signal line EM are all arranged to extend along the first direction X. The reset control signal line Rst, the second scan signal line Scan2, and the light emission control signal line EM are arranged at intervals along the second direction Y. The driving gate T1G and the first electrode plate Cst1 are arranged between the light emission control signal line EM and away from the reset control signal line Rst. The first light emission control gate T5G is connected to the second light emission control gate T6G and the light emission control signal line EM. The first reset gate T7G, the second reset gate T8G, and the second scan signal line Scan2 are connected.

[0075] In this embodiment, the driving gate T1G can be multiplexed as the first electrode plate Cst1 of the storage capacitor Cst. The light emission control signal line EM can directly serve as the first light emission control gate T5G and the second light emission control gate T6G. The second scan signal line Scan2 can directly serve as the first reset gate T7G and the third reset gate T8G.

[0076] As Figure 7 shown, Figure 7This is a stacked diagram of the active layer and the second gate layer in the display panel of the present application. The driving gate T1G partially overlaps with the driving active part T1A, and the overlapping part of the driving gate T1G and the active part T1A is the channel of the driving active part T1A; the switching gate T2G partially overlaps with the switching active part T2A, and the overlapping part of the switching gate T2G and the switching active part T2A is the channel of the switching active part T2A; the compensation gate T3G partially overlaps with the compensation active part T3A, and the overlapping part of the compensation gate T3G and the compensation active part T3A is the channel of the compensation active part T3A; the second reset gate T4G partially overlaps with the second reset active part T4A, and the overlapping part of the second reset gate T4G and the second reset active part T4A is the channel of the second reset active part T4A; the first light emission control gate T5G partially overlaps with the first light emission control active part T5A, and the overlapping part of the first light emission control gate T5G and the first light emission control active part T5A is the channel of the first light emission control active part T5A; the second light emission control gate T6G partially overlaps with the second light emission control active part T6A, and the overlapping part of the second light emission control gate T6G and the second light emission control active part T6A is the channel of the second light emission control active part T6A; the first reset gate T7G partially overlaps with the first reset active part T7A, and the overlapping part of the first reset gate T7G and the first reset active part T7A is the channel of the first reset active part T7A; the third reset gate T8G partially overlaps with the third reset active part T8A, and the overlapping part of the third reset gate T8G and the third reset active part T8A is the channel of the third reset active part T8A.

[0077] In some embodiments, the multiple first reset signal lines VI1 include a first sub-reset signal line VI11 and a second sub-reset signal line VI12, and the first sub-reset signal line VI11 and the second sub-reset signal line VI12 are arranged on different layers.

[0078] As Figure 8 shown, Figure 8 This is a film layer diagram of the first gate layer in the display panel provided by the embodiment of the present application. The first gate layer 33 includes the second electrode plate Cst2 of the storage capacitor Cst and the first sub-reset signal line VI11, and the first sub-reset signal line VI11 extends along the first direction.

[0079] As Figure 8 shown, the second electrode plate Cst2 has a block structure, and at least some of the top corners of the second electrode plate Cst2 can be chamfered.

[0080] Please refer to Figure 9 , Figure 9This is a stacked diagram of the active layer, the second gate layer, and the first gate layer in the display panel of the present application. The area of the second electrode plate Cst2 is larger than that of the first electrode plate Cst1, and the orthographic projection of the second electrode plate Cst2 on the first electrode plate Cst1 covers the first electrode plate Cst1.

[0081] In some embodiments, the orthographic projection of the second bending section T7A2 on the substrate 31 partially overlaps with the orthographic projection of the first sub-reset signal line VI11 on the substrate 31.

[0082] Please refer to Figures 5 to 9 , the extending direction of the second bending section T7A2 of the first reset active part T7A in some of the pixel driving circuits 10 is parallel to the extending direction of the first reset signal line VI1. In addition, the included angle between the extending direction of the second bending section T7A2 of the first reset active part T7A in some other pixel driving circuits 10 and the extending direction of the first reset signal line VI1 is an acute angle. The orthographic projection of the second bending section T7A2 on the substrate 31 partially overlaps with the orthographic projection of the first sub-reset signal line VI11 on the substrate 31. By providing a plurality of bending sections in the first reset active part T7A, the second bending section T7A2 perpendicular to or having an acute included angle with the extending direction of the first reset signal line VI1 partially overlaps with the first sub-reset signal line VI11. In this way, the length of the first reset active part T7A in the pixel driving circuit 10 closer to the via hole H1 can be further extended, so as to reduce the difference in the on-resistance of the first reset active parts T7A of the two pixel driving circuits 10 in the pixel driving circuit group 11, make the potentials of the anodes of the light-emitting devices 20 corresponding to the two pixel driving circuits in the same pixel driving circuit group equal during reset, so that the currents of the light-emitting devices 20 during light emission are equal, thereby avoiding the difference in the brightness of the light-emitting devices corresponding to the two pixel driving circuits connected to the same first reset signal line VI1, and thus improving the brightness uniformity of the display panel and improving the phenomenon of screen splitting.

[0083] In some embodiments, such as Figure 5As shown, the length of the first bending section T7A1 is greater than the lengths of the second bending section T7A2 and the third bending section T7A3. By making the length of the first bending section T7A1 greater than the lengths of the second bending section T7A2 and the third bending section T7A3, it is avoided that the second bending section T7A2 and the third bending section T7A3 overlap with the second scan signal line Scan2 in the film thickness direction, thereby reducing the overlapping area between the first reset active part T7A and the second scan signal line Scan2. In this way, the parasitic capacitance between the second scan signal line Scan2 and the first reset active part T7A can be reduced, and the signal crosstalk between the second scan signal line Scan2 and the first reset active part T7A can be improved, so that it can be ensured that the potentials of the anodes of the light-emitting devices 20 corresponding to the two pixel driving circuits in the pixel driving circuit group are equal during reset, so that the currents of the light-emitting devices 20 during light emission are equal, thereby avoiding differences in the brightness of the light-emitting devices corresponding to the two pixel driving circuits connected to the same first reset signal line VI1, and thus the brightness uniformity of the display panel can be improved and the phenomenon of screen splitting can be improved.

[0084] As Figure 10 shown, Figure 10 FIG. is a film layer diagram of a first source-drain layer in a display panel provided by an embodiment of the present application. The first source-drain layer 35 includes a second reset signal line VI2, a reset control signal line Rst, a first scan signal line Scan1, a first power supply signal line VDD, a second sub-reset signal line VI12, a display signal line FIAA, and a third reset signal line VI3. The second reset signal line VI2, the reset control signal line Rst, the first scan signal line Scan1, the first power supply signal line VDD, the second sub-reset signal line VI12, the display signal line FIAA, and the third reset signal line VI3 are all arranged to extend along the first direction X and are arranged at intervals in the second direction Y in sequence.

[0085] As Figure 10 shown, the first source-drain layer 35 further includes a first connection portion 351, a second connection portion 352, a third connection portion 353, a fourth connection portion 354, and a fifth connection portion 355.

[0086] Combined with Figures 4 to 10As shown, the first end of the switching active part T2A is connected to the data signal line Data through the first connection part 351; one end of the compensation active part T3A and one end of the second reset active part T4A are connected to the driving gate T1G of the driving transistor T1 and the first electrode plate Cst1 of the storage capacitor Cst through the second connection part 352; the second end of the switching active part T2A and the first end of the driving active part T1A are connected to the first end of the third reset active part T8A through the third connection part 353; the second end of the first reset active part T7A and the first end of the second light-emitting control active part T6A are connected to the anode of the light-emitting device 20 through the fourth connection part 354; the first end of the first reset active part T7A in the first pixel driving circuit 1111 is connected to the first sub-reset signal line VI11 through the fifth connection part 355.

[0087] In some embodiments, in combination with Figures 4 to 10 As shown, at least one pixel driving circuit group 11 includes a first pixel driving circuit group 111, and the first pixel driving circuit group 111 includes two first pixel driving circuits 1111 adjacent in a direction perpendicular to the extending direction of the first reset signal line VI1; wherein, in another first pixel driving circuit 1111, the extending directions of the first bending segment T7A1 and the third bending segment T7A3 are perpendicular to the extending direction of the first reset signal line VI1, and the extending direction of the second bending segment T7A2 is parallel to the extending direction of the first reset signal line VI1.

[0088] In combination with Figures 4 to 10 As shown, a plurality of via holes H1 includes a first via hole H11, and the first reset active parts T7A of the two first pixel driving circuits 1111 of the first pixel driving circuit group 111 are electrically connected to the same first sub-reset signal line VI1 through the same first via hole H11 and the fifth connection part 355, and the first reset active parts T7A of the two first pixel driving circuits 1111 are connected to each other to be continuously arranged.

[0089] In some embodiments, the light-emitting color of the light-emitting device 20 electrically connected to the first pixel driving circuit 1111 is red.

[0090] In some embodiments, in combination with Figures 4 to 10 As shown, at least one pixel driving circuit group 11 includes a second pixel driving circuit group 112, and the second pixel driving circuit group 112 includes two second pixel driving circuits 1121 adjacent in a direction perpendicular to the extending direction of the first reset signal line VI1; wherein, in another second pixel driving circuit 1121, the extending directions of the first bending segment T7A1 and the third bending segment T7A3 are perpendicular to the extending direction of the first reset signal line VI1, and the included angle between the extending direction of the second bending segment T7A2 and the extending direction of the first reset signal line VI1 is an acute angle.

[0091] Combined Figures 4 to 10 As shown, a plurality of transfer holes H1 include a second transfer hole H12. The first reset active parts T7A of two second pixel driving circuits 1121 of the second pixel driving circuit group 112 are electrically connected to the same second sub-reset signal line VI12 through the same second transfer hole H12, and the first reset active parts T7A of the two second pixel driving circuits 1121 are connected to each other to be continuously arranged. The extending direction of the second bent segment T7A2 in the second pixel driving circuit 1121 forms an acute angle with the extending direction of the first reset signal line VI1.

[0092] In some embodiments, the angle between the extending direction of the second bent segment T7A2 in the second pixel driving circuit 1121 and the extending direction of the first reset signal line VI1 is greater than or equal to 30 degrees and less than or equal to 60 degrees. For example, the angle between the extending direction of the second bent segment T7A2 in the second pixel driving circuit 1121 and the extending direction of the first reset signal line VI1 can be 30 degrees, 45 degrees, 50 degrees, 55 degrees or 60 degrees, etc.

[0093] In some embodiments, the emission color of the light-emitting device 20 electrically connected to the second pixel driving circuit 1121 is one of green and blue.

[0094] In some embodiments, combined Figures 4 to 10 As shown, at least one pixel driving circuit group 11 includes a third pixel driving circuit group 113. The third pixel driving circuit group 113 includes two third pixel driving circuits 1131 adjacent in the direction perpendicular to the extending direction of the first reset signal line VI1; wherein, in another third pixel driving circuit 1131, the extending directions of the first bent segment T7A1 and the third bent segment T7A3 are perpendicular to the extending direction of the first reset signal line VI1, and the extending direction of the second bent segment T7A2 forms an acute angle with the extending direction of the first reset signal line VI1.

[0095] In some embodiments, the angle between the extending direction of the second bent segment T7A2 in the third pixel driving circuit 1131 and the extending direction of the first reset signal line VI1 is greater than or equal to 30 degrees and less than or equal to 60 degrees. For example, the angle between the extending direction of the second bent segment T7A2 in the third pixel driving circuit 1131 and the extending direction of the first reset signal line VI1 can be 30 degrees, 45 degrees, 50 degrees, 55 degrees or 60 degrees, etc.

[0096] In some embodiments, the angle between the extending direction of the second bent segment T7A2 in the second pixel driving circuit 1121 and the extending direction of the first reset signal line VI1 is equal to the angle between the extending direction of the second bent segment T7A2 in the third pixel driving circuit 1131 and the extending direction of the first reset signal line VI1.

[0097] In some embodiments, the light-emitting color of the light-emitting device 20 electrically connected to the third pixel driving circuit 1131 is the other of green and blue. For example, the light-emitting color of the light-emitting device 20 electrically connected to the second pixel driving circuit 1121 is green, and the light-emitting color of the light-emitting device 20 electrically connected to the third pixel driving circuit 1131 is blue; or, the light-emitting color of the light-emitting device 20 electrically connected to the second pixel driving circuit 1121 is blue, and the light-emitting color of the light-emitting device 20 electrically connected to the third pixel driving circuit 1131 is green.

[0098] In some embodiments, referring to Figure 4 and Figure 5 , the first reset active part T7A in another second pixel driving circuit 1121 and another third pixel driving circuit 1131 both includes a fourth bending segment T7A4 connected to the third bending segment T7A3. The fourth bending segment T7A4 in the second pixel driving circuit 1121 is connected to the fourth bending segment T7A4 in the third pixel driving circuit 1131 to be continuously arranged, and the extending direction of the fourth bending segment T7A4 is parallel to the extending direction of the first reset signal line VI1.

[0099] In this embodiment, by making the extending direction of the fourth bending segment T7A4 parallel to the extending direction of the first reset signal line VI1, the first reset active parts T7A of two adjacent second pixel driving circuits 1121 and the first reset active parts T7A of two adjacent third pixel driving circuits 1131 can be connected to each other to be continuously arranged, and the first reset active parts T7A of two adjacent second pixel driving circuits 1121 and two adjacent third pixel driving circuits 1131 are electrically connected to the second sub-reset signal line VI12 through a second transfer hole H12, so that the number of transfer holes can be reduced, which is beneficial to improving the process yield and pixel density of the display panel.

[0100] In some other embodiments, the included angle between the extending direction of the fourth bending segment T7A4 and the extending direction of the first reset signal line VI1 may also be an acute angle. Specifically, the included angle between the extending direction of the fourth bending segment T7A4 and the extending direction of the first reset signal line VI1 should be less than or equal to 45 degrees, so that while reducing the number of transfer holes, the space occupied by the first reset active part T7A in the second direction Y can be reduced, which is beneficial to improving the process yield and pixel density of the display panel.

[0101] In some embodiments, the width of at least a part of the first reset active part T7A in one of the first pixel driving circuits 1111 is greater than or equal to the width of the first reset active part T7A in another first pixel driving circuit 1111. By increasing the width of at least a part of the first active part T7A in one of the first pixel driving circuits 1111 that is farther away from the distance transfer hole H1, the on-resistance of the first active part T7A in this first pixel driving circuit 1111 is reduced, so as to reduce the difference in the on-resistance of the first reset active parts T7A of the two pixel driving circuits 10 in the pixel driving circuit group 11, making the potentials of the anodes of the light-emitting devices 20 corresponding to the two pixel driving circuits in the same pixel driving circuit group equal during reset, so that the currents of the light-emitting devices 20 during light emission are equal, thereby avoiding differences in the brightness of the light-emitting devices corresponding to the two pixel driving circuits connected to the same first reset signal line VI1, and thus improving the brightness uniformity of the display panel and improving the phenomenon of screen splitting.

[0102] As Figure 4 and Figure 5 shown, the first reset active part T7A in one of the first pixel driving circuits 1111 includes a fifth bent segment T7A5 and a sixth bent segment T7A6 connected in sequence, and the first node C is electrically connected to the first reset signal line VI1 through the fifth bent segment T7A5 and the sixth bent segment T7A6 in sequence.

[0103] As Figure 4 and Figure 5 shown, the extending direction of the fifth bent segment T7A5 is perpendicular to the extending direction of the first reset signal line VI1, the extending direction of the sixth bent segment T7A6 forms an acute angle with the extending direction of the first reset signal line VI1, the width of a part of the fifth bent segment T7A5 is greater than the width of the sixth bent segment T7A6, and the width of another part of the fifth bent segment T7A5 is equal to the width of the sixth bent segment T7A6. In this way, the on-resistance of the first reset active part T7A in one of the first pixel driving circuits 1111 can be reduced, so as to reduce the difference in the on-resistance of the first reset active parts T7A of the two pixel driving circuits 10 in the pixel driving circuit group 11, making the potentials of the anodes of the light-emitting devices 20 corresponding to the two pixel driving circuits in the same pixel driving circuit group equal during reset, so that the currents of the light-emitting devices 20 during light emission are equal, thereby avoiding differences in the brightness of the light-emitting devices corresponding to the two pixel driving circuits connected to the same first reset signal line VI1, and thus improving the brightness uniformity of the display panel and improving the phenomenon of screen splitting.

[0104] In some other embodiments, the width of the fifth bending section T7A5 is equal to the width of the sixth bending section T7A6, and is greater than the width of the first reset active part T7A in another first pixel driving circuit 1111. In this way, the difference in the on-resistance of the first reset active part T7A of the two pixel driving circuits 10 in the pixel driving circuit group 11 can also be reduced, which is beneficial to improving the brightness uniformity of the display panel and improving the phenomenon of screen splitting.

[0105] In some embodiments, as shown in Figures 4 to 10 the display signal line FIAA is arranged in a different layer from the first reset active part T7A. The display signal line FIAA is located in the first source-drain layer 35, and the first reset active part T7A is located in the active layer 32. The display signal line FIAA includes at least two sub-line segments FIAA1 arranged at intervals, and adjacent two sub-line segments FIAA1 arranged at intervals can be electrically connected through a conductive structure located in other film layers. For example, adjacent two sub-line segments FIAA1 arranged at intervals can be electrically connected through a conductive structure located in the second source-drain layer.

[0106] As shown in Figures 4 to 10 the orthographic projection of the first reset active part T7A in one pixel driving circuit on the substrate 31 is arranged between the orthographic projections of adjacent two sub-line segments FIAA1 on the substrate 31. In this way, the overlap between the first reset active part T7A and the display signal line FIAA in the film thickness direction can be avoided, thereby reducing the parasitic capacitance between the display signal line FIAA and the first reset active part T7A, and improving the signal crosstalk between the display signal line FIAA and the first reset active part T7A. Thus, it can be ensured that the potentials of the anodes of the light-emitting devices 20 corresponding to the two pixel driving circuits in the pixel driving circuit group are equal during reset, so that the currents of the light-emitting devices 20 during light emission are equal, thereby avoiding the difference in brightness of the light-emitting devices corresponding to the two pixel driving circuits connected to the same first reset signal line VI1, and thus improving the brightness uniformity of the display panel and improving the phenomenon of screen splitting.

[0107] In some embodiments, the display signal line FIAA is used to transmit signals to the pixel driving circuit, and the display signal line FIAA may include at least one of a data line, a scan line, and other signal lines related to the display function.

[0108] According to the display panel provided in the above embodiments of the present application, an embodiment of the present application further provides a display device. Please refer to Figure 11 , Figure 11Schematic diagram of a display device provided by an embodiment of the present application. The display device 1000 includes a display panel 100 and a housing 200, and the display panel 100 is disposed on the housing 200. The display panel 100 can be the display panel provided by any of the above embodiments. The display device provided by the embodiment of the present application can achieve the same technical effects as the display panel provided by any of the above embodiments, which will not be elaborated herein.

[0109] Advantageous effects of the embodiments of the present application: By limiting the ratio of the first conduction impedance between the first reset signal line and the first node in one of the pixel driving circuits to the second conduction impedance between the first reset signal line and the first node in another pixel driving circuit to between 9:10 and 10:9, the potential difference between the anodes of the light-emitting devices corresponding to two adjacent pixel driving circuits in the same pixel driving circuit during reset can be reduced, thereby reducing the current difference when the light-emitting devices emit light. In this way, the brightness difference between adjacent rows of pixels can be reduced, and thus the brightness uniformity of the display panel can be improved, and the phenomenon of screen splitting can be improved.

[0110] In the description of the present application, the terms "first" and "second" are only used for descriptive purposes and cannot be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include one or more features. In the description of the present application, "a plurality" means two or more unless otherwise specifically defined.

[0111] In the above embodiments, the descriptions of the respective embodiments have their own focuses. For the parts not elaborated in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0112] The embodiments, implementation manners and related technical features of the present application can be combined and replaced with each other without conflict.

[0113] The above are only the preferred embodiments of the present application and do not impose any form of limitation on the present application. However, any simple modification, equivalent change and modification made to the above embodiments based on the technical essence of the present application without departing from the content of the technical solution of the present application still fall within the scope of the technical solution of the present application.

Claims

1. A display panel, characterized in that, It includes a plurality of pixel driving circuits, a first reset signal line, a first power supply signal line, a second power supply signal line, and a light-emitting device. The pixel driving circuit includes: A driving transistor, which is connected in series with the light-emitting device between the first power supply signal line and the second power supply signal line; and A first reset transistor, including a first reset active part. The first end of the first reset active part is electrically connected to the first reset signal line, and the second end of the first reset active part and the anode of the light-emitting device are electrically connected to a first node; Wherein, the plurality of pixel driving circuits include at least one pixel driving circuit group. The pixel driving circuit group includes two pixel driving circuits. The two pixel driving circuits are electrically connected to the same first reset signal line through the same via hole. There is a first conduction impedance between the first reset signal line and the first node in one of the pixel driving circuits, and there is a second conduction impedance between the first reset signal line and the first node in the other pixel driving circuit. The ratio of the first conduction impedance to the second conduction impedance is greater than or equal to 9:10 and less than or equal to 10:

9.

2. The display panel according to claim 1, wherein The via hole is closer to the first node in one of the pixel driving circuits than to the first node in the other pixel driving circuit; Wherein, the number of bending segments of the first reset active part in one of the pixel driving circuits is less than the number of bending segments of the first reset active part in the other pixel driving circuit.

3. The display panel according to claim 2, wherein The first active part in the other pixel driving circuit includes a first bending segment, a second bending segment, and a third bending segment connected in sequence. The first node is connected to the first reset signal line through the first bending segment, the second bending segment, and the third bending segment in sequence.

4. The display panel according to claim 3, characterized in that, The plurality of first reset signal lines include a first sub-reset signal line. The display panel includes: A substrate; An active layer, disposed on one side of the substrate, and the active layer includes the first reset active part; A first gate layer, disposed on the side of the active layer away from the substrate, and the first gate layer includes the first sub-reset signal line; Wherein, the positive projection of the second bending segment on the substrate partially overlaps with the positive projection of the first sub-reset signal line on the substrate.

5. The display panel according to claim 3, characterized in that, The length of the first bending segment is greater than the length of the second bending segment and the length of the third bending segment.

6. The display panel according to claim 3, wherein At least one pixel driving circuit group includes a first pixel driving circuit group. The first pixel driving circuit group includes two first pixel driving circuits adjacent in a direction perpendicular to the extension direction of the first reset signal line. Wherein, in the other first pixel driving circuit, the extension directions of the first bending segment and the third bending segment are perpendicular to the extension direction of the first reset signal line, and the extension direction of the second bending segment is parallel to the extension direction of the first reset signal line; And / or, at least one of the pixel driving circuit groups includes a second pixel driving circuit group, and the second pixel driving circuit group includes two second pixel driving circuits adjacent to each other in a direction perpendicular to the extending direction of the first reset signal line; wherein, in the other second pixel driving circuit, the extending directions of the first bent section and the third bent section are perpendicular to the extending direction of the first reset signal line, and the extending direction of the second bent section forms an acute angle with the extending direction of the first reset signal line. And / or, at least one of the pixel driving circuit groups includes a third pixel driving circuit group, and the third pixel driving circuit group includes two third pixel driving circuits adjacent to each other in a direction perpendicular to the extending direction of the first reset signal line; wherein, in the other third pixel driving circuit, the extending directions of the first bent section and the third bent section are perpendicular to the extending direction of the first reset signal line, and the extending direction of the second bent section forms an acute angle with the extending direction of the first reset signal line.

7. The display panel according to claim 6, wherein The first reset active portions in the other second pixel driving circuit and the other third pixel driving circuit both include a fourth bent section connected to the third bent section; wherein, the fourth bent section in the other second pixel driving circuit is connected to the two fourth bent sections in the other third pixel driving circuit to be continuously arranged, and the extending directions of the two fourth bent sections are parallel to the extending direction of the first reset signal line.

8. The display panel according to claim 6, characterized in that, The first reset active portion in one of the first pixel driving circuits includes a fifth bent section and a sixth bent section connected in sequence, and the first node is electrically connected to the first reset signal line through the fifth bent section and the sixth bent section in sequence. Wherein, the extending direction of the fifth bent section is perpendicular to the extending direction of the first reset signal line, the extending direction of the sixth bent section forms an acute angle with the extending direction of the first reset signal line, and the width of a part of the fifth bent section is greater than the width of the sixth bent section.

9. The display panel according to claim 1, wherein The width of at least part of the first reset active portion in one of the pixel driving circuits is greater than the width of at least part of the first reset active portion in another pixel driving circuit.

10. The display panel according to any one of claims 1 to 9, characterized in that, The display panel further includes a display signal line for transmitting a signal to the pixel driving circuit, and the extending direction of the display signal line is parallel to the extending direction of the first reset signal line. Wherein, the display signal line and the first reset active portion are arranged in different layers, the display signal line includes at least two sub-line segments arranged at intervals, and the first reset active portion in one of the pixel driving circuits is arranged between two adjacent sub-line segments.

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