Driving method of display panel, display panel and display device

By accumulating the usage time of the display panel and adjusting the pulse width and level voltage of the driving signal, the brightness attenuation problem caused by the transistor characteristic curve drift of the display panel is solved, ensuring the stability of the display effect.

CN120279847APending Publication Date: 2025-07-08WUHAN TIANMA MICROELECTRONICS CO LTD SHANGHAI BRANCH
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Patent Information

Application Number
CN202510695784.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-05-27
Publication Date
2025-07-08

AI Technical Summary

Technical Problem

During use, the display panel will cause brightness attenuation due to the drift of transistor characteristic curves, which will affect the display effect.

Method used

By cumulatively calculating the total display time of the display panel, adjusting the pulse width and/or level voltage of the driving signal to compensate for the brightness attenuation and ensuring that the brightness is within the preset range.

Benefits of technology

Effectively compensate for the brightness attenuation caused by the drift of transistor characteristic curves, ensuring that the display panel can maintain a good display effect after a certain period of use.

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Abstract

The embodiment of the invention discloses a driving method of a display panel, the display panel and a display device. The display panel driving method comprises the following steps: by accumulating the total display time length of the display panel, adjusting the pulse width and / or the level voltage of a driving signal currently driving the display panel to display according to the total display time length of the display panel, so that the brightness attenuation of the display panel after the total display time length is within a preset range. According to the embodiment of the invention, the brightness decay problem of the light-emitting element caused by the drifting of the characteristic curve of the transistor of the pixel circuit can be compensated, and the brightness decay problem of the display panel caused by the drifting of the characteristic curve of the transistor is solved, so that the display panel can be accurately and effectively matched with the current brightness decay degree after being used for a certain time; and adaptive display brightness adjustment is carried out, so that the display panel is ensured to have a better display effect.
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Description

Technical Field

[0001] Embodiments of the present invention relate to the field of display technologies, and in particular, to a driving method for a display panel, a display panel, and a display device. Background Art

[0002] With the continuous development of science and technology, display devices are widely used in people's daily lives and work, bringing great convenience to people's daily lives and work, and becoming an important and indispensable tool for people currently.

[0003] However, for the pixel circuit that drives the light-emitting elements in the display panel to emit light and realizes the display function currently, the transistors therein are affected by Positive Bias Temperature Stress (PBTS), that is, under the combined action of a high-temperature environment and a positive bias (the gate voltage is positive), there will be a phenomenon of drift or degradation of electrical properties (such as threshold voltage). Therefore, as the usage time increases, the display panel will have the problem of display brightness attenuation. Summary of the Invention

[0004] The present invention provides a driving method for a display panel, a display panel, and a display device to solve the problem of display brightness attenuation of the display panel as the usage time increases.

[0005] In a first aspect, embodiments of the present invention provide a driving method for a display panel, including:

[0006] Accumulating the total display duration of the display panel;

[0007] According to the total display duration of the display panel, adjusting the pulse width and / or the level voltage of the driving signal currently used to drive the display panel to display, so that the brightness attenuation of the display panel after the total display duration is within a preset range.

[0008] In a second aspect, based on the same inventive concept, embodiments of the present invention further provide a display panel that is driven to display by using any driving method for a display panel according to embodiments of the present invention.

[0009] In a third aspect, based on the same inventive concept, embodiments of the present invention further provide a display device including any display panel provided by embodiments of the present invention.

[0010] In the technical solution of the embodiment of the present invention, firstly, the total display duration of the display panel is accumulated, and then, according to the total display duration of the display panel, the pulse width and / or the level voltage of the driving signal for currently driving the display panel to display are adjusted, so that the brightness attenuation of the display panel after the total display duration is within a preset range, which can compensate for the problem of brightness attenuation of the light-emitting element caused by the drift of the transistor characteristic curve of the pixel circuit, solve the problem of brightness attenuation of the display panel caused by the drift of the transistor characteristic curve, enable the display panel to accurately and effectively match the current brightness attenuation degree after being used for a certain period of time, perform adaptive display brightness adjustment, and ensure that the display panel has a better display effect. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1 is a schematic structural diagram of a display panel provided by an embodiment of the present invention;

[0012] Figure 2 is Figure 1 a schematic structural diagram of a pixel circuit in the shown display panel;

[0013] Figure 3 is Figure 2 a timing diagram of a driving signal of the shown pixel circuit;

[0014] Figure 4 is a flowchart of a display panel driving method provided by an embodiment of the present invention;

[0015] Figure 5 is a flowchart of another display panel driving method provided by an embodiment of the present invention;

[0016] Figure 6 is a comparison diagram of driving timings of a pixel circuit provided by an embodiment of the present invention;

[0017] Figure 7 is a comparison diagram of timings of a light-emitting control signal of a pixel circuit provided by an embodiment of the present invention;

[0018] Figure 8 and Figure 9 are schematic diagrams of two target display frame addition logics provided by an embodiment of the present invention;

[0019] Figure 10 is a flowchart of another display panel driving method provided by an embodiment of the present invention;

[0020] Figure 11 and Figure 12 are two other comparison diagrams of driving timings of a pixel circuit provided by an embodiment of the present invention;

[0021] Figure 13 is another comparison diagram of driving timings of a pixel circuit provided by an embodiment of the present invention;

[0022] Figure 14 is a flowchart of another display panel driving method provided by an embodiment of the present invention;

[0023] Figure 15 and Figure 16 are comparison diagrams of driving timings of two other pixel circuits provided by an embodiment of the present invention;

[0024] Figure 17 is a schematic structural diagram of another pixel circuit provided by an embodiment of the present invention;

[0025] Figure 18 is a comparison diagram of driving timings of another pixel circuit provided by an embodiment of the present invention;

[0026] Figure 19 is a schematic structural diagram of a display device provided by an embodiment of the present invention. Detailed implementation manners

[0027] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It can be understood that the specific embodiments described herein are only used to explain the present invention, rather than limiting the present invention. Additionally, it should be noted that for the sake of description, only parts related to the present invention are shown in the drawings rather than all the structures.

[0028] The terms used in the embodiments of the present invention are only for the purpose of describing specific embodiments, and are not intended to limit the present invention. It should be noted that the orientation terms such as "upper", "lower", "left", and "right" described in the embodiments of the present invention are described from the angles shown in the drawings, and should not be construed as limiting the embodiments of the present invention. In addition, in the context, it should also be understood that when it is mentioned that an element is formed "on" or "under" another element, it can not only be directly formed "on" or "under" another element, but also be indirectly formed "on" or "under" another element through an intermediate element. The terms "first", "second", etc. are only used for descriptive purposes, and do not represent any order, quantity, or importance, but are only used to distinguish different components. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific situations.

[0029] The term "including" and its variations used in the present invention are open-ended, that is, "including but not limited to". The term "based on" is "at least partially based on". The term "an embodiment" means "at least one embodiment".

[0030] It should be noted that the concepts such as "first" and "second" mentioned in the present invention are only used to distinguish the corresponding contents, and are not used to limit the order or the interdependent relationship.

[0031] It should be noted that the modifications of "one" and "a plurality of" mentioned in the present invention are illustrative rather than restrictive. Those skilled in the art should understand that unless otherwise clearly specified in the context, it should be understood as "one or more".

[0032] Without departing from the spirit or scope of the present invention, various modifications and variations can be made to the present invention, which will be obvious to those skilled in the art. Therefore, the present invention is intended to cover the modifications and variations of the present invention that fall within the scope of the corresponding claims (the claimed technical solutions) and their equivalents. It should be noted that the embodiments provided by the embodiments of the present invention can be combined with each other without conflict.

[0033] Figure 1 is a schematic structural diagram of a display panel provided by an embodiment of the present invention. Figure 2 is Figure 1 a schematic structural diagram of a pixel circuit in the shown display panel. Referring to Figure 1 and Figure 2 , first of all, the display panel includes a plurality of pixel units 100. Macroscopically, the pixel units 100 cooperate with each other to realize the display of a required frame of picture. The pixel unit 100 includes a pixel circuit 10 and a light-emitting element 20. The pixel circuit 10 is electrically connected to the light-emitting element 20 and is used to drive the light-emitting element 20 to emit light. Specifically, the pixel circuit 10 is responsible for controlling through a driving signal to correspondingly drive the light-emitting element 20 to light up, thereby realizing the light emission of a single pixel in the display panel. Among them, the driving signal includes a light emission control signal Emit, a gate reset control signal S1N1, a threshold compensation control signal S2N1, a data writing control signal SP, and a bias adjustment control signal SP*, and may also include a first power supply voltage signal PVDD, a second power supply voltage signal PVEE, a gate reset signal Vref1, an anode reset signal Vref2, a bias adjustment signal DVH, etc. The light-emitting element 20 is exemplified as an organic light-emitting diode (OLED), and the light-emitting element 20 can be divided into three types: red, green, and blue.

[0034] The pixel circuit 10 includes a light emission control module, a data writing module 12, a driving module 13, a gate reset module 14, a threshold compensation module 15, an anode reset module 17, a bias adjustment module 18, and a storage module 19. The light emission control module includes a first light emission control unit 11 and a second light emission control unit 16. The first light emission control unit 11 includes a first light emission control transistor M1, the data writing module 12 includes a data writing transistor M2, the driving module 13 includes a driving transistor M3, the gate reset module 14 includes a gate reset transistor M4, the threshold compensation module 15 includes a threshold compensation transistor M5, the second light emission control unit 16 includes a second light emission control transistor M6, the anode reset module 17 includes an anode reset transistor M7, the bias adjustment module 18 includes a bias adjustment transistor M8, and the storage module 19 includes a storage capacitor Cst.

[0035] Among them, the driving module 13, the light emission control module, and the light emitting element 20 are connected in series between a first power supply voltage terminal and a second power supply voltage terminal to form a series circuit. The first power supply voltage terminal receives a first power supply voltage signal PVDD, the second power supply voltage terminal receives a second power supply voltage signal PVEE, and the voltage of the first power supply voltage signal PVDD can be greater than the voltage of the second power supply voltage signal PVEE.

[0036] Specifically, the first light emission control unit 11, the driving module 13, the second light emission control unit 16, and the light emitting element 20 are connected in series between the first power supply voltage terminal and the second power supply voltage terminal in sequence. The anode of the light emitting element 20 is connected to the second light emission control unit 16. The gate of the driving transistor M3 constitutes a first node N1, the node where the driving transistor M3 is connected to the first light emission control unit 11 constitutes a second node N2, and the node where the driving transistor M3 is connected to the second light emission control unit 16 constitutes a third node N3. The data writing module 12 is connected between a data signal terminal and the second node N2, the gate reset module 14 is connected between a gate reset signal terminal and the first node N1, the threshold compensation module 15 is connected between the first node N1 and the second node N3, the anode reset transistor M7 is connected between an anode reset signal terminal and the anode of the light emitting element 20, and the bias adjustment transistor M8 is connected between a bias adjustment signal terminal and the second node N2. The storage capacitor Cst is connected between the first power supply voltage terminal and the first node N1. Exemplarily, among the above transistors, the gate reset transistor M4 and the threshold compensation transistor M5 are both N-type channel transistors, and the remaining transistors are all P-type channel transistors. And as shown in the figure, each transistor is controlled to conduct or turn off by the driving signal received by its gate.

[0037] Figure 3 Yes Figure 2 is the driving signal timing diagram of the pixel circuit shown below. Refer to Figures 1 - 3, the driving process of the pixel circuit provided by the embodiments of the present invention will be introduced. First, the specific working process of the pixel circuit 10 may include a gate reset stage t1, a data writing stage t2, a bias adjustment stage t3, and a light emitting stage t4.

[0038] The gate reset module 14 is configured to be controlled by the gate reset control signal S1N1, and write the gate reset signal Vref1 to the gate of the driving transistor M3, that is, the first node N1, to reset the gate of the driving transistor M3. In the gate reset stage t1, the gate reset control signal S1N1 is a high-level signal. At this time, the N-type gate reset transistor M4 is turned on, and the gate reset signal Vref1 is written to the first node N1 to reset the potential of the first node N1.

[0039] The data writing module 12 is configured to be controlled by the data writing control signal SP, and write the data signal Data to the gate of the driving transistor M3, that is, the first node N1. The threshold compensation module 15 is configured to be controlled by the threshold compensation control signal S2N1 to perform threshold compensation when writing the data signal Data to the gate of the driving transistor M3. In the data writing stage t2, the data writing control signal SP is a low-level signal. At this time, the P-type data writing module 12 is turned on, and at the same time, the threshold compensation control signal S2N1 is a high-level signal, and the N-type threshold compensation transistor M5 is turned on. The data signal Data is sequentially written to the first node N1 through the data writing module 12, the driving transistor M3, and the threshold compensation transistor M5, and is stored by the storage capacitor Cst. And because the data signal Data will pass through the threshold compensation transistor M5, the data signal Data written to the first node N1 is substantially threshold-compensated.

[0040] The bias adjustment module 18 is configured to be controlled by the bias adjustment control signal SP*, and adjust the bias state of the driving transistor M3. In the bias adjustment stage t3, the bias adjustment control signal SP* is a low-level signal, and the P-type bias adjustment transistor M8 is turned on, and the bias adjustment signal DVH is written to the second node N2, so that the driving transistor M3 is reverse-biased, thereby at least partially eliminating the problem of the drift of the electrical characteristic curve caused by the driving transistor M3 being in the forward-biased state in the remaining stages, ensuring the stability of the threshold voltage, and realizing the bias adjustment of the driving transistor M3. It should be noted that the anode reset module 17 is configured to be controlled by the anode reset control signal SP*, and reset the anode of the light emitting element 20. That is, the bias adjustment control signal SP* also serves as the control signal of the anode reset transistor M7. In this bias adjustment stage t3, the P-type anode reset transistor M7 is turned on synchronously, and the anode reset signal Vref2 is written to the anode of the light emitting element 20 synchronously, thereby resetting the anode of the light emitting element 20.

[0041] The light-emitting control module is configured to be controlled by the light-emitting control signal Emit, and turn on the series circuit to light up the light-emitting element 20. In the light-emitting stage t4, the light-emitting control signal Emit is at a low level, the first light-emitting control transistor M1 and the second light-emitting control transistor M6 are turned on, and a conducting circuit is formed between the first power supply voltage terminal and the second power supply voltage terminal, thereby realizing driving the light-emitting element 20 to emit light. The light-emitting brightness of the light-emitting element 20 is related to its conducting current, and this conducting current is controlled by the gate-source voltage difference of the driving transistor M3, that is, controlled by the data signal Data written to the first node N1 during the data writing stage t2. Thus, the light-emitting brightness of the light-emitting element 20 in each pixel can be changed through the data signal Data.

[0042] Based on the working process of the above pixel circuit, at the end of the data writing stage t2, the threshold compensation transistor M5 switches from the on state to the off state, and the threshold compensation control signal S2N1 jumps from a high level to a low level. During this process, until the level of the threshold compensation control signal S2N1 decreases to the point where the gate-source voltage difference of the threshold compensation transistor M5 is less than its own threshold voltage Vth, the threshold compensation transistor M5 truly turns off. Normally, before the threshold compensation transistor M5 truly turns off, the potential of the first node N1 is higher than the potential of the third node N3, and the first node N1 writes current to the third node N3, and the potential of the first node N1 will decrease.

[0043] However, the N-type threshold compensation transistor M5 is affected by positive bias temperature stress (PBTS). That is, under the combined action of a high-temperature environment and a positive bias (gate voltage is positive), as the working cumulative time increases, its electrical characteristic curve will drift, and the threshold voltage gradually increases. For the process of turning off the threshold compensation transistor M5 when the threshold compensation control signal S2N1 jumps from a high level to a low level, the true turn-off time of the threshold compensation transistor M5 will be advanced, and the threshold compensation transistor M5 will turn off earlier. Thus, for a display panel used for a long time, as the working cumulative time of the pixel circuit gradually becomes longer, the threshold voltage of the threshold compensation transistor M5 gradually increases, the threshold compensation transistor M5 gradually turns off earlier, the potential drop of the first node N1 will gradually become smaller, and the potential of the first node N1 will be higher than normal. For the driving transistor M3, the potential stored in its gate, that is, the first node N1, is inversely proportional to the driving current conducted during the light-emitting stage t4. When the usage time of the display panel gradually increases, after the threshold compensation transistor M5 turns off, the potential stored in the gate of the driving transistor M3, that is, the first node N1, gradually becomes higher, and the driving current for driving the light-emitting element 20 to emit light gradually becomes lower, resulting in gradually dimmer brightness, causing the problem of gradual brightness attenuation of the display panel and affecting the display effect.

[0044] In view of the above technical problems, an embodiment of the present invention provides a driving method for a display panel. Figure 4 It is a flowchart of a driving method for a display panel provided by an embodiment of the present invention. Refer to Figure 4 , the driving method for the display panel includes:

[0045] S110. Accumulate the total display duration of the display panel.

[0046] Among them, the total display duration of the display panel actually represents the working duration of each pixel circuit in the display panel, and also represents the working duration of the threshold compensation transistor M5 in the pixel circuit. Through means such as experiments or simulations, the deviation degree of the electrical characteristic curve of the threshold compensation transistor M5 under different working durations can be calibrated in advance, and the situation of the brightness attenuation of the display panel caused by the drift of the characteristic curve of the threshold compensation transistor M5 under different working durations can be obtained. The accumulation here more refers to the cumulative summation of the display duration of the display panel each time it is powered on for display, so as to accurately determine the actual working duration of the pixel circuit and accurately determine the degree of brightness attenuation of the display panel. In this step, by accumulating the total display duration of the display panel, the purpose is to obtain the degree of brightness attenuation of the display panel under different usage durations.

[0047] S120. Adjust the pulse width and / or level voltage of the driving signal currently used to drive the display panel to display according to the total display duration of the display panel, so that the brightness attenuation of the display panel after the total display duration is within a preset range.

[0048] This step is essentially a process of adaptively compensating the brightness of the display panel with reduced brightness based on the known real-time brightness attenuation degree of the display panel, so as to avoid poor display effects of the display panel. Specifically, as described above, the display process of the display panel is controlled by driving signals, such as the gate reset control signal S1N1, the threshold compensation control signal S2N1, the data writing control signal SP, and the bias adjustment control signal SP*, etc. Each pixel circuit 10 is controlled by these driving signals. Specifically, by adjusting the pulse width and / or the level voltage of these driving signals, the light-emitting element 20 can be driven to emit light with different brightness levels and light-emitting durations. Thus, when determining the brightness attenuation of the display panel, by changing the pulse width and / or the level voltage of the driving signal, the light-emitting brightness and / or the light-emitting duration of the light-emitting element 20 can be increased, so as to compensate or even precisely offset the brightness attenuation caused by the drift of the transistor characteristic curve of the light-emitting element 20, making the brightness attenuation of the display panel smaller or not occur after the total display duration, and ensuring good display effects. It should be noted that the brightness attenuation within the preset range here means that by effectively compensating the brightness attenuation of the display panel, the actual brightness attenuation situation of the display panel after brightness compensation is within an acceptable range, a range that users cannot effectively distinguish, or a preset error range, and the degree of ensuring that the display panel still has good display effects.

[0049] In the above technical solution, first, the total display duration of the display panel is accumulated, and then, according to the total display duration of the display panel, the pulse width and / or the level voltage of the driving signal currently driving the display panel to display are adjusted, so that the brightness attenuation of the display panel after the total display duration is within the preset range, the problem of brightness attenuation of the light-emitting element caused by the drift of the transistor characteristic curve of the pixel circuit can be compensated, the problem of brightness attenuation of the display panel caused by the drift of the transistor characteristic curve can be solved, so that after the display panel is used for a certain period of time, it can accurately and effectively match the current brightness attenuation degree, and perform adaptive display brightness adjustment to ensure that the display panel has good display effects.

[0050] As is known to those skilled in the art, since the essence of the screen display of the display panel depends on the visual persistence effect of the human eye, in the process of controlling the periodic flashing of all the light-emitting elements 20 in the display panel, one flashing of all the light-emitting elements 20 forms a display frame of the display panel, and at least one display frame displays one picture. The brightness of one picture displayed by the display panel that the user perceives in each picture update cycle is essentially the time-averaged brightness, which is directly proportional to the product of the light-emitting brightness and the light-emitting duration of the light-emitting element 20. As can be seen from the pixel circuit driving principle described above, the light-emitting brightness of the light-emitting element 20 is related not only to the data signal Data written into the pixel circuit 10, but also to driving signals such as the data writing control signal SP. The light-emitting duration of the light-emitting element 20 is related to the light-emitting control signal Emit. Therefore, it can be known that in the embodiments of the present invention, by adjusting the pulse width and / or the level voltage of the corresponding driving signal, the light-emitting element 20 can be driven to emit light with different light-emitting brightness and light-emitting duration.

[0051] Based on this, in a specific embodiment of the present invention, optionally, by adjusting the pulse width or the level voltage of the corresponding driving signal, the light-emitting brightness of the light-emitting element 20 can be separately controlled correspondingly. Or, by adjusting the pulse width or the level voltage of the corresponding driving signal, the light-emitting duration of the light-emitting element 20 can be separately controlled correspondingly, so as to compensate for the problem of the brightness attenuation of the light-emitting element caused by the drift of the characteristic curve of the pixel circuit transistor from different angles, and avoid the human eye from perceiving the brightness attenuation of the display panel, which affects the user experience. The following is a specific introduction to these two adjustment and compensation methods.

[0052] Figure 5 is a flowchart of another display panel driving method provided by an embodiment of the present invention. Refer to Figure 5 , in a specific embodiment of the present invention, the display panel driving method may include:

[0053] S210. Accumulate the total display duration of the display panel.

[0054] S220. According to the total display duration of the display panel, adjust the pulse width of the driving signal that currently controls the pixel circuit to drive the light-emitting element to emit light, so as to increase the light-emitting duration of each light-emitting element in each picture update cycle of the display panel.

[0055] The S220 is essentially a refined solution for S120 in the previous embodiment. Specifically, this step is a refinement of the process of adaptively compensating the brightness of the display panel with reduced brightness on the basis of obtaining the total display duration of the display panel, that is, on the basis of obtaining the real-time brightness attenuation degree of the display panel. By only adjusting the pulse width of the driving signal that controls the light-emitting duration of the light-emitting elements in the display panel, the light-emitting duration of the light-emitting elements in each frame update cycle is increased. Thus, from the perspective of the light-emitting duration alone, the time-average brightness of the display panel is increased, so that the brightness of the picture displayed on the display panel felt by the user does not significantly decay or is within the allowable decay range.

[0056] More specifically, the above step S220 can be specifically refined as follows:

[0057] S221. According to the total display duration of the display panel, increase the pulse width of the effective pulse of the light-emitting control signal.

[0058] Figure 6 is a comparison diagram of the driving timing of a pixel circuit provided by an embodiment of the present invention. Refer to Figure 2 and Figure 6 , first, in this example pixel circuit, the first light-emitting control transistor M1 and the second light-emitting control transistor M6 are both P-channel transistors. When the light-emitting control signal Emit is at a low level, the two light-emitting control transistors are turned on. Therefore, the effective pulse of the light-emitting control signal Emit is a low-level pulse. Refer to Figure 6 , as shown in the elliptical frame, the dotted line shows the original light-emitting control signal Emit, and the duration of its effective pulse is t4, that is, the original light-emitting duration of the light-emitting element 20 is t4. However, in this embodiment, the light-emitting control signal Emit is adjusted to the light-emitting control signal Emit' shown by the solid line, and the duration of its effective pulse is increased to t4'. That is, the adjusted light-emitting control signal Emit' can control the light-emitting duration of the light-emitting element 20 to increase to t4', thereby increasing the light-emitting duration of the light-emitting element 20 in each display frame t. Thus, the time-average brightness of the display panel can be increased, so that the brightness of the picture displayed on the display panel felt by the user does not significantly decay or is within the allowable decay range.

[0059] Optionally, the above S220 can be further refined as follows:

[0060] S2200. Every time the preset total display duration of the display panel is reached, adjust the pulse width of the driving signal currently driving the display panel to be displayed according to the preset pulse width amplitude.

[0061] This step provides a specific implementation for increasing the pulse width of the effective pulse of the light emission control signal Emit according to the total display duration. Exemplarily, it can be set that every 500 hours, the pulse width of the light emission control signal Emit is increased by a preset and fixed pulse width. For example, the increased fixed pulse width is 1% of the initial pulse width of the light emission control signal Emit. The adjustment period of the light emission control signal Emit is not limited to the 500 hours in the above example, and those skilled in the art can determine it according to actual needs or experiments, etc. For example, it can be 100 - 1000 hours. Optionally, the percentage of the preset pulse width amplitude to the initial pulse width of the driving signal for initially driving the display panel to display is 1% - 5%. Taking the example that the brightness attenuation generally reaches 30% under the normal usage limit of the display panel, that is, the brightness is only 70% of the initial brightness, in this embodiment, it is set that every 100 - 1000 hours, a 1% - 5% light emission duration compensation is performed on the light emitting element 20, which can effectively adapt to or match the brightness attenuation curve of the original display panel over time, and effectively and accurately compensate for the real-time brightness attenuation of the display panel.

[0062] In addition, as known to those skilled in the art, the display process of the display panel includes multiple picture update cycles, and a picture update cycle includes multiple display frames. In the same picture update cycle, the display panel displays the same picture in each display frame, and the pixel circuit 10 drives the light emitting element 20 to emit light once in each display frame. Exemplarily, a picture update cycle T can be set to have 36 display frames, that is, the light emitting element 20 emits light 36 times in a picture update cycle T.

[0063] In each picture update cycle T, the total light emission duration of the light emitting element 20 is equal to the product of the number of times the light emitting element 20 emits light and the time of each light emission in the picture update cycle T. On the basis that the duration of the picture update cycle T remains unchanged, the average light emission brightness of the light emitting element 20 in each picture update cycle T is also only positively correlated with the product of the number of times the light emitting element 20 emits light and the time of each light emission. Based on this, in the embodiment of the present invention, to increase the average light emission brightness of the light emitting element in the current picture update cycle, the first option can be selected, that is, for each display frame in this picture update cycle, only the pulse width of the effective pulse of the driving signal, such as the light emission control signal Emit, is uniformly increased, and the longer the total display duration of the display panel, the larger the uniformly increased pulse width; or, the second option can also be adopted, that is, for a certain number of display frames in this picture update cycle, the pulse width of its driving signal, such as the light emission control signal Emit, is increased, and the increased pulse width is a fixed value, while the number of display frames with the increased driving signal pulse width increases with the increase of the total display duration of the display panel; or, the third option can also be adopted, that is, both of the above two options are used at the same time, that is, with the increase of the total display duration of the display panel, the number of display frames with the changed driving signal pulse width and the change amplitude of the driving signal pulse width are increased at the same time.

[0064] In an alternative embodiment of the present invention, in S220 above, according to the total display duration of the display panel, the pulse width of the driving signal for controlling the pixel circuit to drive the light-emitting element to emit light is adjusted to increase the light-emitting brightness of each light-emitting element in the display panel in each frame update period. Specifically, it may include:

[0065] S2221. Select a target display frame from multiple display frames in the current frame update period according to the total display duration of the display panel;

[0066] S2222. Adjust the pulse width of the driving signal for controlling the pixel circuit to drive the light-emitting element to emit light in the target display frame to increase the average light-emitting brightness of each light-emitting element in the display panel in the current frame update period;

[0067] Among them, the number of target display frames and / or the adjustment amplitude of the pulse width of the driving signal are positively correlated with the total display duration of the display panel. The target display frame is the display frame for which the pulse width of the driving signal needs to be adjusted. The essence of S2221 above is a process of determining the number of display frames for which the pulse width of the driving signal needs to be adjusted according to the total display duration. The longer the total display duration, the more display frames for which the pulse width of the driving signal needs to be adjusted, so as to improve the effective light-emitting duration of the light-emitting element 20 in each frame update period and compensate for the brightness attenuation problem.

[0068] Figure 7 is a timing comparison diagram of the light-emitting control signal of the pixel circuit provided by the embodiment of the present invention. Refer to Figure 2 and Figure 7 , for the second solution adopted to increase the average light-emitting brightness of the light-emitting element in the current frame update period, S2221 above may specifically be:

[0069] S22210. Increase a preset number of target display frames at intervals of a preset total display duration of the display panel.

[0070] S2222 above may specifically be: S22220. Adjust the pulse width of the driving signal for controlling the pixel circuit to drive the light-emitting element to emit light in the target display frame at a fixed amplitude.

[0071] Such as Figure 7As shown, based on the initial light emission control signal Emit, every preset total display duration of the display panel, for example 500 hours, a preset number of target display frames t will be added, for example two target display frames t. Specifically, as shown in the figure example, after reaching 500 hours for the first time, the first display frame t and the second display frame t are added as target display frames, that is, according to a fixed amplitude Δt4, the pulse widths of the first and second effective pulses (low-level pulses) of the light emission control signal Emit are increased to form the light emission control signal Emit'. After reaching 500 hours for the second time, the third and fourth display frames t are continuously added as target display frames, that is, also according to the fixed amplitude Δt4, the pulse widths of the third and fourth effective pulses (low-level pulses) of the light emission control signal Emit are increased to form the light emission control signal Emit". This fixed amplitude Δt4 = t4' - t4.

[0072] It can be understood that when the same preset number of target display frames need to be added every preset total display duration of the display panel, there are different implementation manners for the positions of the added target display frames. As Figure 7 shown, optionally, according to the arrangement order of each display frame t in the frame update period T, a preset number of display frames are selected as target display frames in turn. In addition, the embodiments of the present invention also provide other implementation manners. Specifically, the above S22210 may specifically be:

[0073] Divide the multiple display frames in one frame update period into N adjustment periods T', and in the order of the N adjustment periods T', every preset total display duration of the display panel, add one target display frame in each adjustment period T' in turn; where N is an integer greater than or equal to 2; each adjustment period includes the same number of display frames.

[0074] Figure 8 and Figure 9 are two schematic diagrams of the target display frame addition logic provided by the embodiments of the present invention. Refer to Figure 8 and Figure 9 , where exemplarily, the same frame update period T includes 12 display frames t, and the 12 display frames can be divided into 2 adjustment periods T' (as Figure 8 shown, N = 2) or 3 adjustment periods T' (as Figure 9 shown, N = 3). As Figure 8As shown, exemplarily, every 500 hours, a target display frame is sequentially added to the two adjustment periods T' in a cyclic manner. That is, at the 500th hour, a target display frame is added to the first adjustment period T'; at the 1000th hour, a target display frame is added to the second adjustment period T'; at the 1500th hour, a target display frame is added to the first adjustment period T' again; at the 2000th hour, a target display frame is added to the second adjustment period T' again; at the 2500th hour, a target display frame is added to the first adjustment period T' again, and so on in an alternating cycle. As Figure 9 As shown, exemplarily, every 500 hours, a target display frame is sequentially added to the three adjustment periods T' in a cyclic manner. That is, at the 500th hour, a target display frame is added to the first adjustment period T'; at the 1000th hour, a target display frame is added to the second adjustment period T'; at the 1500th hour, a target display frame is added to the third adjustment period T'; at the 2000th hour, a target display frame is added to the first adjustment period T' again; at the 2500th hour, a target display frame is added to the second adjustment period T' again; at the 3000th hour, a target display frame is added to the third adjustment period T' again, and so on in a sequential cycle.

[0075] It can be understood that the target display frame refers to the display frame that increases the effective pulse width of the light emission control signal Emit. That is, the light emission duration of the light emitting element 20 in this display frame will increase. Among the multiple display frames in the entire frame update period, by sequentially adding a target display frame to each adjustment period T' in the order of the adjustment period T' in a cyclic manner, the display frames with increased light emission duration can be evenly distributed throughout the frame update period, avoiding the concentration of display frames with increased light emission duration in the early stage of the frame update period, resulting in a situation where the display brightness in the early stage is greater than that in the later stage, forming an obvious bright-dark change and affecting the display uniformity.

[0076] Figure 10 is a flowchart of another display panel driving method provided by an embodiment of the present invention. Referring to Figure 10 , in another specific embodiment of the present invention, the display panel driving method may include:

[0077] S310. Accumulate the total display duration of the display panel.

[0078] S320. According to the total display duration of the display panel, adjust the pulse width of the driving signal for driving the light emitting element to emit light by the current control pixel circuit, so as to increase the light emission brightness of each light emitting element in the display panel in each frame update period.

[0079] The S320 is also a refined solution for the S120 in the above embodiments. Specifically, this step is a refinement of the process of adaptively compensating the brightness of the display panel with reduced brightness based on knowing the total display duration of the display panel, that is, based on knowing the real-time brightness attenuation degree of the display panel. By only adjusting the pulse width of the driving signal that controls the light-emitting duration of the light-emitting elements in the display panel, the light-emitting brightness of the light-emitting elements in each frame update period is increased. Thus, from the perspective of light-emitting brightness alone, the time-average brightness of the display panel is increased, so that the brightness of the picture displayed on the display panel felt by the user does not significantly decay or is within the allowable decay range.

[0080] More specifically, the above step S320 can be specifically refined as follows:

[0081] S321. According to the total display duration of the display panel, reduce the pulse width of the effective pulse of the data write control signal and / or the bias adjustment control signal.

[0082] Figure 11 and Figure 12 are the comparison diagrams of the driving timings of two other pixel circuits provided by the embodiments of the present invention. Refer to Figure 2 , Figure 11 and Figure 12 , in this example pixel circuit, the data write transistor M2 and the bias adjustment transistor M8 are both P-channel transistors. When the data write control signal SP and the bias adjustment control signal SP* are at low level, the data write transistor M2 and the bias adjustment transistor M8 are turned on. Therefore, the effective pulses of the data write control signal SP and the bias adjustment control signal SP* are both low-level pulses.

[0083] Refer to Figure 11 , as shown in the elliptical frame, optionally reduce the pulse width of the effective pulse of the data write control signal SP. The dotted-line data write control signal SP is the original data write control signal SP, and the duration of its effective pulse is t2, that is, the original data write duration is t2. In this embodiment, the data write control signal SP is adjusted to the solid-line data write control signal SP’, and the duration of its effective pulse is reduced to t2’, that is, the adjusted data write time is reduced to t2’. Thus, the data write time can be reduced, thereby reducing to a certain extent the efficiency of writing the data signal Data to the gate of the driving transistor M3, that is, the first node N1, making the voltage of the first node N1 relatively low after data writing. Further, in the light-emitting stage, since the driving current is inversely proportional to the voltage of the first node N1, the light-emitting brightness of the light-emitting element 20 in the current display frame t can be made brighter, so that the time-average brightness of the display panel can be increased, and the brightness of the picture displayed on the display panel felt by the user does not significantly decay or is within the allowable decay range.

[0084] Similarly, refer toFigure 12 As shown in the ellipse, the pulse width of the effective pulse of the bias adjustment control signal SP* can be optionally reduced. The bias adjustment control signal SP* shown by the dotted line is the original bias adjustment control signal SP*, and the duration of its effective pulse is t3, that is, the original bias adjustment duration is t3. In this embodiment, the bias adjustment control signal SP* is adjusted to the bias adjustment control signal SP*' shown by the solid line, and the duration of its effective pulse is reduced to t3', that is, the adjusted bias adjustment time is reduced to t3', thereby reducing the bias adjustment time, thereby reducing the bias adjustment effect on the driving transistor M3 to a certain extent, so that the driving transistor M3 has a part of positive bias, which will cause the threshold compensation to deteriorate and cannot be effectively compensated in place, and the actual threshold voltage of the driving transistor M3 will be too large. Because in the data writing stage, the data voltage stored in the first node N1 after the threshold compensation transistor M4 performs threshold compensation is actually Vdata-|Vth|. When the actual threshold voltage Vth of the driving transistor is too large, the voltage Vdata-|Vth| of the first node N1 will be too small. Similarly, in the light-emitting stage, since the driving current is inversely proportional to the voltage of the first node N1, the light-emitting element 20 emits brighter light in the current display frame t, thereby increasing the time-averaged brightness of the display panel, so that the brightness of the picture displayed by the display panel perceived by the user does not decay significantly or is within the allowable attenuation range.

[0085] Of course, the above Figure 11 and Figure 12 The embodiment shown is to separately adjust the data writing control signal SP and the bias adjustment control signal SP*. Those skilled in the art may also reduce the pulse widths of the two control signals at the same time according to actual needs, so as to further reduce the voltage of the first node N1, thereby compensating for the brightness attenuation of the light emitting element 20.

[0086] In addition, the above S320 can be further refined as follows:

[0087] S322 . Increase the pulse width of the effective pulse of the gate reset control signal according to the total display time of the display panel.

[0088] Figure 13 is another pixel circuit driving timing comparison diagram provided by an embodiment of the present invention, referring to Figure 2 and Figure 13 In this example pixel circuit, the gate reset transistor M4 is an N-type channel transistor. When the gate reset control signal S1N1 is at a high level, the gate reset transistor M4 is turned on, so the effective pulses of the gate reset control signal S1N1 are all high-level pulses. Figure 13, as shown in the elliptical box, the gate reset control signal S1N1 shown by the dotted line is the original gate reset control signal S1N1, and the duration of its effective pulse is t1, that is, the original gate reset duration is t1. In this embodiment, the adjusted gate reset control signal S1N1 is the gate reset control signal S1N1' shown by the solid line, and the duration of its effective pulse increases to t1', that is, the adjusted gate reset time increases to t1'. Thus, the gate reset time can be increased, so as to ensure effective gate reset of the gate of the driving transistor M3, that is, the first node N1, making the voltage of the first node N1 after gate reset higher. When the driving transistor M3 is under a higher gate voltage, it is more likely to drift, and its threshold voltage will increase. As a result, the threshold compensation performed by the threshold compensation transistor M4 will become worse. As described above, the voltage stored in the first node N1 after writing the data voltage will be on the low side, and further, the light-emitting element 20 will be brighter in the current display frame t, so that the time-average brightness of the display panel can be increased, and the user can feel that the brightness of the picture displayed on the display panel does not significantly decay or decays within an allowable range.

[0089] Similarly, the above S320 can be further refined as follows:

[0090] S3200. Every preset total display duration of the display panel, adjust the pulse width of the driving signal for currently driving the display panel to display according to a preset pulse width amplitude.

[0091] This step provides a specific implementation manner for reducing the data write control signal SP, reducing the bias adjustment control signal SP*, and increasing the pulse width of the effective pulse of the gate reset signal S1N1 according to the total display duration. Taking the data write control signal SP as an example, exemplarily, it can be set that every 500 hours, the pulse width of the data write control signal SP is reduced by a preset and fixed pulse width, for example, the reduced fixed pulse width is 1% of the initial pulse width of the data write control signal SP. The adjustment period of the data write control signal SP is not limited to the above example of 500 hours, and those skilled in the art can determine it according to actual needs or experiments, etc., for example, it can be 100 - 1000 hours. Optionally, the percentage of the preset pulse width amplitude to the initial pulse width of the driving signal for initially driving the display panel to display is 1% - 5%. Taking the example that the brightness decay generally reaches 30% under the normal use limit of the display panel, that is, the brightness is only 70% of the initial brightness, in this embodiment, it is set that every 100 - 1000 hours, a 1% - 5% data write duration compensation is performed on the light-emitting element 20, which can provide corresponding light-emitting element brightness compensation, so as to effectively adapt to or match the brightness decay curve of the original display panel over time and effectively and accurately compensate the real-time brightness decay of the display panel.

[0092] Figure 14It is a flowchart of another display panel driving method provided by an embodiment of the present invention. Refer to Figure 14 In another specific embodiment of the present invention, the display panel driving method may include:

[0093] S410. Accumulate the total display duration of the display panel.

[0094] S420. According to the total display duration of the display panel, adjust the level voltage of the driving signal for currently controlling the pixel circuit to drive the light-emitting element to emit light, so as to increase the light-emitting brightness of each light-emitting element in each frame update period of the display panel.

[0095] This S420 is also a refinement of S120 in the above embodiment. Specifically, this step is a refinement of the process of adaptively compensating the brightness of the display panel with reduced brightness on the basis of knowing the total display duration of the display panel, that is, on the basis of knowing the real-time brightness attenuation degree of the display panel. Only by adjusting the level voltage of the driving signal for controlling the light-emitting duration of the light-emitting element in the display panel can the light-emitting brightness of the light-emitting element in each frame update period be increased. Thus, from the perspective of light-emitting brightness alone, the time-average brightness of the display panel is improved, so that the brightness of the picture displayed on the display panel felt by the user does not significantly decay or decays within an allowable range.

[0096] More specifically, the above S420 can be specifically refined as:

[0097] S421. According to the total display duration of the display panel, increase the level voltage of the first power supply voltage signal, and / or decrease the level voltage of the second power supply voltage signal.

[0098] Refer to Figure 2 and Figure 3, as described above, in the light-emitting stage t4, the first light-emitting control transistor M1 and the second light-emitting control transistor M6 are turned on, and a conduction circuit is formed between the first power supply voltage terminal and the second power supply voltage terminal, thereby driving the light-emitting element 20 to emit light. The luminous brightness of the light-emitting element 20 is related to its conduction current. Thus, it can be understood that the first power supply voltage signal PVDD and the second power supply voltage signal PVEE received at both ends of the conduction circuit can affect the magnitude of the conduction current, that is, the luminous brightness of the light-emitting element 20 can be controlled. In particular, the first power supply voltage signal PVDD determines the source voltage of the driving transistor M3. Thus, the gate-source voltage difference of the driving transistor M3 can be controlled, directly determining the conduction current of the driving transistor M3, that is, determining the conduction current of the entire conduction circuit. Based on this, in this embodiment, by appropriately increasing the level voltage of the first power supply voltage signal PVDD and decreasing the level voltage of the second power supply voltage signal PVEE, the voltage drop of the series circuit where the light-emitting element 20 is located can be increased, thereby increasing the conduction current of the series circuit to a certain extent, improving the luminous brightness of the light-emitting element 20, and compensating for the attenuation of the luminous brightness of the light-emitting element 20.

[0099] The above S420 can be further refined as follows:

[0100] S422. According to the total display duration of the display panel, decrease the level voltage of the gate reset signal.

[0101] Reference Figure 2 and Figure 3 , also as described above, in the gate reset stage t1, the gate reset signal Vref1 is written to the first node N1 to reset the potential of the first node N1. In this embodiment, by appropriately decreasing the level voltage of the gate reset signal Vref1, the potential of the first node N1 after gate reset can be made relatively low. Thus, after data is written to the first node N1, the first node N1 stores a relatively low data voltage, that is, the voltage of the first node N1 will be relatively small, and further, the luminous brightness of the light-emitting element 20 in the current display frame t will be relatively bright, thereby increasing the time-average brightness of the display panel and making the user feel that the brightness of the picture displayed on the display panel does not significantly decay or decays within an allowable range.

[0102] In addition, the above S420 can be further refined as follows:

[0103] S423. According to the total display duration of the display panel, increase the level voltage difference between the effective pulse and the invalid pulse of the gate reset control signal and / or the threshold compensation control signal; and / or, according to the total display duration of the display panel, decrease the level voltage difference between the effective pulse and the invalid pulse of the data write control signal.

[0104] Figure 15 and Figure 16It is a comparison diagram of the driving timings of two more pixel circuits provided by the embodiments of the present invention. First, referring to Figure 15 , the effective pulse of the gate reset control signal S1N1 is a high-level pulse, and the ineffective pulse is a low-level pulse, as shown in the ellipse in the figure. The dotted line shows the original gate reset control signal S1N1, and the voltage difference between the effective pulse and the ineffective pulse is ΔV. In this embodiment, the voltage difference between the effective pulse and the ineffective pulse of the gate reset control signal S1N1 is increased, and the voltage difference is increased to ΔV'. Thus, when the gate reset control signal S1N1 switches to a low-level pulse and the gate reset transistor M4 is turned off, the low-level gate reset control signal S1N1 received by the gate will be coupled to the first node N1. The gate reset control signal S1N1 with an increased voltage difference will increase the coupling amount of the transistor, thereby making the pulling-down effect of the transistor on the voltage of the first node N1 greater. The voltage of the first node N1 is on the low side. In the light-emitting stage t4, since the driving current is inversely proportional to the voltage of the first node N1, the light-emitting brightness of the light-emitting element 20 in the current display frame t can be made brighter, so that the time-average brightness of the display panel can be increased, and the user can feel that the brightness of the picture displayed on the display panel does not significantly decay or is within the allowable decay range.

[0105] Similarly, referring to Figure 16 , as shown in the ellipse in the figure, the dotted line shows the original threshold compensation control signal S2N1, and the voltage difference between the effective pulse and the ineffective pulse is ΔV. In this embodiment, the voltage difference between the effective pulse and the ineffective pulse of the threshold compensation control signal S2N1 is increased, and the voltage difference is increased to ΔV'. Since the threshold compensation control signal S2N1 and the gate reset control signal S1N1 have the same channel type and are both connected to the first node N1, when the threshold compensation control signal S2N1 switches to a low-level pulse, the threshold compensation transistor M5, like the gate reset transistor M4, will increase the coupling amount, and will also increase the pulling-down effect on the voltage of the first node N1, making the voltage of the first node N1 on the low side, making the light-emitting brightness of the light-emitting element 20 in the current display frame t brighter, so that the time-average brightness of the display panel can be increased, and the user can feel that the brightness of the picture displayed on the display panel does not significantly decay or is within the allowable decay range.

[0106] Figure 17 It is a schematic structural diagram of another pixel circuit provided by the embodiments of the present invention. Figure 18 It is a comparison diagram of the driving timings of another pixel circuit provided by the embodiments of the present invention. Referring to Figure 17, in another embodiment of the present invention, the pixel circuit may further be provided with a first capacitor C1. The two plates of the first capacitor C1 are respectively connected to the gate of the driving transistor M3 and the data signal writing terminal. The effective pulse of the data writing control signal SP is a low-level pulse, and the invalid pulse is a high-level pulse. After the data writing is completed, the data writing control signal SP will switch to a high level. Thus, the first node N1 can be coupled through the first capacitor C1 to raise the voltage of the first node N1, compensating for the problem of voltage drop caused by the leakage current before the threshold compensation transistor M5 is turned off after the data writing is completed, and maintaining the potential of the first node N1. Based on this, referring to Figure 18 , the effective pulse of the data writing control signal SP is a low-level pulse, and the invalid pulse is a high-level pulse. As shown in the ellipse frame in the figure, the dotted line shows the original data writing control signal SP, and the level voltage difference between its effective pulse and invalid pulse is ΔV. In this embodiment, by reducing the level voltage difference between the effective pulse and invalid pulse of the data writing control signal SP to ΔV', the coupling amount of the data writing control signal SP to the first node N1 through the first capacitor C1 can be reduced. That is, the amount of voltage increase of the first node N1 can be reduced, and the compensation for the voltage drop of the first node N1 caused by the leakage current can be reduced. Furthermore, the potential of the first node N1 can be made lower, making the light-emitting element 20 emit brighter light in the current display frame t, so that the time-average brightness of the display panel can be increased, and the user can feel that the brightness of the picture displayed on the display panel does not significantly decay or is within the allowable decay range.

[0107] Optionally, the above S420 can be further refined as:

[0108] S4200. At every preset total display duration of the display panel, adjust the level voltage of the driving signal for driving the current display panel display according to a preset voltage amplitude.

[0109] This step provides a specific implementation for adjusting the level voltages of corresponding drive signals according to the total display duration, such as the level voltages of the first power supply voltage signal PVDD, the second power supply voltage signal PVEE, and the gate reset signal Vref1, or the cross voltages of the gate reset control signal S1N1, the threshold compensation control signal S2N1, and the data write control signal SP. Exemplarily, taking the first power supply voltage signal PVDD as an example, it can be set that every 500 hours, a preset and fixed level voltage of 0.02V is added to the first power supply voltage signal PVDD. Again exemplarily, taking the gate reset control signal S1N1 as an example, it can be set that every 500 hours, the level voltage difference between the effective level voltage and the ineffective level voltage of the gate reset control signal S1N1 is reduced by a preset and fixed 0.1V. The adjustment period of the level voltages of the above drive signals is not limited to the 500 hours in the above example, and those skilled in the art can determine it according to actual needs or experiments, etc., for example, it can be 100 - 1000 hours. In addition, optionally, the preset voltage amplitude for adjusting the level voltages of the above drive signals can be selected from 0.02V to 0.5V. More specifically, for the first power supply voltage signal PVDD, its preset voltage amplitude can be selected from 0.02 to 0.1V. Since the first power supply voltage signal PVDD directly determines the source voltage of the drive transistor M3, the adjustment of its voltage will directly act on the drive current for driving the light-emitting element 20 to emit light, and a voltage adjustment amplitude of 0.02 - 0.1V can effectively adapt to or match the brightness attenuation curve of the original display panel over time, and effectively and accurately compensate for the real-time brightness attenuation of the display panel. For the level voltage of the gate reset signal Vref, the cross voltages of the gate reset control signal S1N1, the threshold compensation control signal S2N1, and the data write control signal SP, and the level voltage of the second power supply voltage signal PVEE, their brightness compensation effects on the light-emitting element 20 show a decreasing pattern. In the embodiments of the present invention, it can be optionally set that their voltage adjustment amplitudes are in the range of 0.1 - 0.5V, that is, with a relatively obvious voltage adjustment amplitude, the effect of effectively adapting to or matching the brightness attenuation curve of the original display panel over time and effectively and accurately compensating for the real-time brightness attenuation of the display panel is achieved.

[0110] Based on the same inventive concept, the embodiments of the present invention also provide a display panel and a display device. Figure 19 is a schematic structural diagram of a display device provided by an embodiment of the present invention. Refer to Figure 19 , this display device includes a display panel 1, and this display panel 1 is driven to display by using the display panel driving method provided in any embodiment of the present invention. This display device can specifically be a mobile phone, a computer, and intelligent wearable devices such as a watch or a bracelet.

[0111] Note that the above is only a preferred embodiment of the present invention and the technical principles applied. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and various obvious changes, re-adjustments, combinations with each other and substitutions can be made by those skilled in the art without departing from the protection scope of the present invention. Therefore, although the present invention has been described in more detail through the above embodiments, the present invention is not limited to the above embodiments only. Without departing from the concept of the present invention, more other equivalent embodiments can be included, and the scope of the present invention is determined by the scope of the appended claims.

Claims

1. A driving method for a display panel, characterized in that, Including: Accumulating the total display duration of the display panel; Adjusting the pulse width and / or the level voltage of the driving signal currently driving the display panel to display according to the total display duration of the display panel, so that the brightness attenuation of the display panel after the total display duration is within a preset range.

2. The driving method according to claim 1, characterized in that The display panel includes a plurality of pixel units, and each pixel unit includes a pixel circuit and a light-emitting element. The pixel circuit is electrically connected to the light-emitting element and is used to drive the light-emitting element to emit light; Adjusting the pulse width and / or the level voltage of the driving signal currently driving the display panel to display according to the total display duration of the display panel includes: Adjusting the pulse width of the driving signal currently controlling the pixel circuit to drive the light-emitting element to emit light according to the total display duration of the display panel, so as to increase the light-emitting duration of each light-emitting element in the display panel in each frame update period.

3. The driving method according to claim 2, characterized in that, The pixel circuit includes a driving module and a light-emitting control module; the driving module, the light-emitting control module and the light-emitting element are connected in series between a first power supply voltage terminal and a second power supply voltage terminal to form a series circuit; the power supply voltages received by the first power supply voltage terminal and the second power supply voltage terminal are different; The light-emitting control module is configured to be controlled by a light-emitting control signal to turn on the series circuit to light up the light-emitting element; Adjusting the pulse width of the driving signal currently controlling the pixel circuit to drive the light-emitting element to emit light according to the total display duration of the display panel includes: Increasing the pulse width of the effective pulse of the light-emitting control signal according to the total display duration of the display panel.

4. The driving method according to claim 1, wherein The display panel includes a plurality of pixel units, and each pixel unit includes a pixel circuit and a light-emitting element. The pixel circuit is electrically connected to the light-emitting element and is used to drive the light-emitting element to emit light; Adjusting the pulse width and / or the level voltage of the driving signal currently driving the display panel to display according to the total display duration of the display panel includes: Adjusting the pulse width of the driving signal currently controlling the pixel circuit to drive the light-emitting element to emit light according to the total display duration of the display panel, so as to increase the light-emitting brightness of each light-emitting element in the display panel in each frame update period.

5. The driving method according to claim 4, characterized in that The pixel circuit includes a driving module, a data writing module and a bias adjustment module, and the driving module includes a driving transistor; The data writing module is configured to be controlled by a data writing control signal to write a data voltage to the gate of the driving transistor; The bias adjustment module is configured to be controlled by a bias adjustment control signal to adjust the bias state of the driving transistor; Adjusting the pulse width of the driving signal currently controlling the pixel circuit to drive the light-emitting element to emit light according to the total display duration of the display panel includes: Reducing the pulse width of the effective pulse of the data writing control signal and / or the bias adjustment control signal according to the total display duration of the display panel.

6. The driving method according to claim 4, characterized in that The pixel circuit includes a driving module and a gate reset module, and the driving module includes a driving transistor; The gate reset module is configured to reset the gate of the driving transistor under the control of a gate reset control signal; Adjusting the pulse width of a driving signal that currently controls the pixel circuit to drive the light-emitting element to emit light according to the total display duration of the display panel, includes: According to the total display duration of the display panel, increasing the pulse width of the effective pulse of the gate reset control signal.

7. The driving method according to claim 2 or 4, characterized in that Adjusting the pulse width of a driving signal that currently controls the pixel circuit to drive the light-emitting element to emit light according to the total display duration of the display panel, includes: Every preset total display duration of the display panel, adjusting the pulse width of the driving signal that currently drives the display panel to display according to a preset pulse width amplitude.

8. The driving method according to claim 7, characterized in that, The percentage of the preset pulse width amplitude to the initial pulse width of the driving signal that initially drives the display panel to display is 1% - 5%.

9. The driving method according to claim 1, characterized in that The display panel includes a plurality of pixel units, and each pixel unit includes a pixel circuit and a light-emitting element. The pixel circuit is electrically connected to the light-emitting element and is used to drive the light-emitting element to emit light; Adjusting the pulse width and / or level voltage of the driving signal that currently drives the display panel to display according to the total display duration of the display panel, includes: According to the total display duration of the display panel, adjusting the level voltage of the driving signal that currently controls the pixel circuit to drive the light-emitting element to emit light, so as to increase the light-emitting brightness of each light-emitting element in each frame update cycle of the display panel.

10. The driving method according to claim 9, wherein The pixel circuit includes a driving module; the driving module and the light-emitting element are connected in series between a first power supply voltage terminal and a second power supply voltage terminal; the first power supply voltage terminal receives a first power supply voltage signal, the second power supply voltage terminal receives a second power supply voltage signal, and the voltage of the first power supply voltage signal is greater than the voltage of the second power supply voltage signal; According to the total display duration of the display panel, adjusting the level voltage of the driving signal that currently controls the pixel circuit to drive the light-emitting element to emit light, includes: According to the total display duration of the display panel, increasing the level voltage of the first power supply voltage signal, and / or, decreasing the level voltage of the second power supply voltage signal.

11. The driving method according to claim 9, characterized in that, The pixel circuit includes a driving module and a gate reset module, and the driving module includes a driving transistor; The gate reset module is configured to write a gate reset signal to the gate of the driving transistor for resetting; According to the total display duration of the display panel, adjusting the level voltage of the driving signal that currently controls the pixel circuit to drive the light-emitting element to emit light, includes: According to the total display duration of the display panel, decreasing the level voltage of the gate reset signal.

12. The driving method according to claim 9, wherein The pixel circuit includes a driving module, a data writing module, a threshold compensation module, and a gate reset module, and the driving module includes a driving transistor; The data writing module is configured to write a data voltage to the gate of the driving transistor under the control of a data writing signal; The threshold compensation module is configured to perform threshold compensation when writing a data voltage to the gate of the driving transistor under the control of a threshold compensation control signal; The gate reset module is configured to reset the gate of the driving transistor under the control of a gate reset control signal; Adjusting the level voltage of a driving signal that currently controls the pixel circuit to drive the light-emitting element to emit light according to the total display duration of the display panel, includes: According to the total display duration of the display panel, increasing the level voltage difference between the effective pulse and the ineffective pulse of the gate reset control signal and / or the threshold compensation control signal; And / or, according to the total display duration of the display panel, reducing the level voltage difference between the effective pulse and the ineffective pulse of the data write control signal.

13. The driving method according to claim 9, characterized in that, Adjusting the level voltage of a driving signal that currently controls the pixel circuit to drive the light-emitting element to emit light according to the total display duration of the display panel, includes: Every preset total display duration of the display panel, adjusting the level voltage of the driving signal that currently drives the display panel to display according to a preset voltage amplitude.

14. The driving method according to claim 13, characterized in that, The preset voltage amplitude is 0.02V to 0.5V.

15. The driving method according to claim 8 or 14, characterized in that The preset total display duration of the display panel is 100h to 1000h.

16. The driving method according to claim 4, characterized in that The display process of the display panel includes multiple picture update cycles, and each picture update cycle includes multiple display frames; In the same picture update cycle, the display panel displays the same picture in each display frame, and the pixel circuit drives the light-emitting element to emit light once in each display frame; Adjusting the pulse width of a driving signal that currently controls the pixel circuit to drive the light-emitting element to emit light according to the total display duration of the display panel, so as to increase the light-emitting brightness of each light-emitting element in each picture update cycle of the display panel, includes: According to the total display duration of the display panel, selecting a target display frame from multiple display frames in the current picture update cycle; Adjusting the pulse width of the driving signal that controls the pixel circuit to drive the light-emitting element to emit light in the target display frame, so as to increase the average light-emitting brightness of each light-emitting element in the current picture update cycle of the display panel; Wherein, the number of the target display frames and / or the adjustment amplitude of the pulse width of the driving signal are positively correlated with the total display duration of the display panel.

17. The driving method according to claim 16, wherein Adjusting the pulse width of the driving signal that controls the pixel circuit to drive the light-emitting element to emit light in the target display frame, includes: Adjusting the pulse width of the driving signal that controls the pixel circuit to drive the light-emitting element to emit light in the target display frame according to a fixed amplitude.

18. The driving method according to claim 16, characterized in that According to the total display duration of the display panel, selecting a target display frame from multiple display frames in the current picture update cycle, includes: Every preset total display duration of the display panel, increasing the preset number of the target display frames.

19. The driving method according to claim 18, characterized in that, Every preset total display duration of the display panel, increasing the preset number of the target display frames, includes: Dividing the multiple display frames of a picture update cycle into N adjustment cycles, and in the order of the N adjustment cycles, every preset total display duration of the display panel, sequentially and cyclically adding one target display frame in each adjustment cycle; Wherein, N is an integer greater than or equal to 2; each of the adjustment periods includes the same number of the display frames.

20. A display panel, characterized in that, Drive display by using the driving method of the display panel according to any one of claims 1-19.

21. A display device, characterized in that, Include the display panel according to claim 20.