Ultra-wideband high-power load chip based on double-coupling feedback network
Through the combination of a dual-coupled feedback network and a high-thermal conductivity substrate material, the high-power bearing and miniaturization of the chip load of the microwave system is solved, and high-frequency broadband characteristics and thermal stability are achieved, thereby avoiding resistance burnout.
Patent Information
- Application Number
- CN202510757792.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-06-09
- Publication Date
- 2025-07-08
- Estimated Expiration
- 2045-06-09
AI Technical Summary
The chip load of existing microwave systems cannot effectively carry high power, resulting in increased volume and difficult to meet the requirements of miniaturization, and poor high-frequency response performance.
Using a structure based on a dual-coupled feedback network, the parallel resistor and matching transmission line are combined with high thermal conductivity substrate materials to achieve balanced power distribution and heat dissipation, shorten the length of the transmission line, and absorb parasitic capacitance to improve high-frequency response.
It realizes high power capacity and broadband characteristics in small-area chips, improves thermal stability and high-frequency performance, avoids early burning of resistors, and reduces reflected power.
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Figure CN120281282A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the field of monolithic microwave integrated circuits, and particularly relates to an ultra-wideband high-power load chip based on a dual-coupling feedback network. Background Art
[0002] The requirements for power capacity in modern microwave systems are constantly increasing. This is not only reflected in the significant increase in the active output power of the system, but also in the corresponding increase in the passive input power. Taking an input power of 1 kW (60 dBm) as an example, even after 17 dB of isolation, coupling, and attenuation, the remaining power is still as high as 20 W (43 dBm). For modern microwave systems based on chip architectures, this power level is still too high, and this energy must be absorbed and dissipated through a load. However, ordinary chip loads cannot bear such high power, and only discrete loads can be used as an alternative solution. However, compared with chip loads, discrete loads have a significantly larger volume, and additional interface conversion is required to achieve system interconnection, which further increases the volume of the microwave system. Thus, it can be seen that discrete loads are difficult to meet the miniaturization requirements of modern high-power microwave systems.
[0003] The basic load circuit structure is as Figure 1 shown (for example, a high-frequency broadband high-power load chip disclosed in Chinese Utility Model Patent CN206451801U adopts this structure). In this structure, as Figure 1 shown, a 50-ohm resistor is used to achieve matching with a standard 50-ohm characteristic impedance microwave network, and the input power is directly dissipated on this resistor. As the input power increases, the length and width of this resistor need to be increased proportionally to ensure that the resistor is not broken down or burned. Figure 2 is the equivalent circuit of the parasitic effect of the resistor under microwave conditions, Figure 2 where c represents the parasitic capacitance and R represents the intrinsic resistor. As Figure 2 shown, due to the parallel parasitic capacitance of the resistor in the microwave frequency band, so Figure 1The performance of the shown structure deteriorates rapidly at high frequencies and does not meet the requirements of broadband and high-frequency applications. In the literature "Design of a Broadband and High-Power Matching Load Circuit" (authors: Hao Qing, Huang Xiquan, included in the Proceedings of the 2024 National Microwave and Millimeter-Wave Conference (Volume II) of the Chinese Institute of Electronics, DOI: 10.26914 / c.cnkihy.2024.015943), it is proposed to improve the frequency response by paralleling two groups of resistors, but there are still certain limitations in the maximum power capacity and bandwidth. Chinese invention patent CN118075989A discloses a load structure with multiple groups in parallel and series within the group, which can distribute heat dissipation more evenly and improve the high-frequency response through in-group matching. In addition, Chinese invention patent CN106410341A discloses a load structure using a tapered spiral layout, which can improve the high-frequency response, but the processing method is special and not universal.
[0004] Therefore, it is of great significance to study a load chip based on a general process that can achieve a larger bandwidth and a larger power capacity within as small a chip area as possible and has good heat dissipation characteristics. Summary of the Invention
[0005] In view of this, the present invention proposes an ultra-wideband high-power load chip based on a dual-coupled feedback network to solve the technical problems existing in the above-mentioned existing loads.
[0006] The technical solution adopted by the present invention is specifically as follows: An ultra-wideband high-power load chip based on a dual-coupled feedback network, comprising a substrate and a load circuit disposed on the substrate; the load circuit includes: a first coupled feedback network and a second coupled feedback network, both the first coupled feedback network and the second coupled feedback network have a first port, a second port, a third port, and a fourth port, there are four resistors in parallel and two matching transmission lines disposed between the first coupled feedback network and the second coupled feedback network, the four resistors in parallel are resistor R1, resistor R2, resistor R3, and resistor R4 respectively, the two matching transmission lines are a first matching transmission line and a second matching transmission line respectively, wherein: Resistor R1 is disposed between the first port of the first coupled matching network and the third port of the second coupled matching network, resistor R2 is disposed between the second port of the first coupled matching network and the fourth port of the second coupled matching network, resistor R3 is disposed between the third port of the first coupled matching network and the first port of the second coupled matching network, resistor R4 is disposed between the fourth port of the first coupled matching network and the second port of the second coupled matching network, and the end connected to the fourth port of the first coupled matching network is grounded; The first end of the first matching transmission line is connected to the second port of the first coupling matching network, and the second end is connected to the first port of the second coupling matching network; the first end of the second matching transmission line is connected to the third port of the first coupling matching network, and the second end is connected to the fourth port of the second coupling matching network.
[0007] Furthermore, each coupling feedback network is composed of a primary coupling transmission line and a secondary coupling transmission line.
[0008] Furthermore, each resistor is realized by a thin-film resistor process, and its corresponding unit square resistance value is 50 Ω.
[0009] Furthermore, the substrate is a material with high thermal conductivity, preferably a silicon carbide substrate or a diamond substrate.
[0010] Due to the adoption of the above technical solutions, the present invention has the following advantages: 1. By adopting a low-pass distributed structure, that is, the two ends of each resistor are connected to inductive transmission lines, the parasitic capacitance of the resistor is absorbed, and a high-frequency ultra-wideband response can be achieved. 2. By reasonably arranging four parallel resistors between adjacent two groups of coupling feedback networks, the present invention avoids thermal concentration, thereby improving the thermal stability of the chip. 3. The present invention uses a coupling feedback network to replace the transmission matching transmission line. While shortening the length of the transmission line, it balances the power dissipation of each sub-circuit channel and avoids the premature burnout of a single sub-resistor. 4. The present invention is manufactured based on a high-thermal-conductivity substrate such as silicon carbide, diamond, etc., so that it has more excellent heat dissipation performance. Description of the Drawings
[0011] Figure 1 is the load circuit structure of the prior art; Figure 2 is the equivalent circuit of the parasitic effect of the resistor under microwave conditions; Figure 3 is the circuit schematic diagram of the ultra-wideband high-power silicon carbide load chip in Embodiment 1; Figure 4 is the distributed broadband power load circuit structure of Comparative Example 1; Figure 5 is for Embodiment 1 and Figure 1 the comparison result of the return loss of the conventional single-resistor structure; Figure 6 is when the input power is 20 W (43 dBm), the comparison result of the reflected power between Embodiment 1 and Figure 1 the conventional single-resistor structure; Figure 7 is the power dissipated by each sub-resistor channel in Embodiment 1 when the input power is 20 W (43 dBm); Reference numerals: 1 is the first coupling feedback network, and 2 is the second coupling feedback network. Detailed implementation manners
[0012] The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part rather than all of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.
[0013] Embodiment 1, as Figure 3 shown, a UWB high-power load chip based on a dual-coupling feedback network provided in this embodiment includes: Two groups of coupling feedback networks, which are the first coupling feedback network 1 and the second coupling feedback network 2 respectively; the first coupling feedback network 1 is composed of a primary coupling transmission line TL1a and a secondary coupling transmission line TL1b, and the first port, the second port, the third port, and the fourth port thereof respectively correspond to Figure 3 points a, b, g, and h in Figure 3 ; the second coupling feedback network 2 is composed of a primary coupling transmission line TL2a and a secondary coupling transmission line TL2b, and its specific first port, second port, third port, and fourth port respectively correspond to
[0014] Four resistors connected in parallel, namely resistor R1, resistor R2, resistor R3, and resistor R4; Two matching transmission lines, namely the first matching transmission line TLm1 and the second matching transmission line TLm2; Resistor R1 is connected between point a and point e, resistor R2 is connected between point b and point f, resistor R3 is connected between point c and point g, resistor R4 is connected between point d and point h, and point h is grounded at the same time. The first matching transmission line TLm1 is connected between point b and point c, and the second matching transmission line TLm2 is connected between point f and point g.
[0015] In this embodiment, the matching transmission line between the ports of resistor R1 and resistor R2 close to one side of the first coupling feedback network 1 is realized by the primary coupling transmission line TL1a; the matching transmission line between the ports of resistor R1 and resistor R2 close to one side of the second coupling feedback network 2 is realized by the secondary coupling transmission line TL2b; the matching transmission line between the ports of resistor R3 and resistor R4 close to one side of the first coupling feedback network 1 is realized by the secondary coupling transmission line TL1b; the matching transmission line between R3 and R4 close to one side of the second coupling feedback is realized by the primary coupling transmission line TL2a. In this way, the high-power input signal RFin on the left side of the circuit is cross-coupled and then fed back to the right side of the circuit, realizing the transfer and balance of power and avoiding the premature burnout of the sub-resistor R1 on the input side. At the same time, the mutual inductance inside the two groups of coupling feedback networks strengthens the inductance, equivalently increases the electrical length of the microstrip line, and shortens the length of the actual transmission line required. In addition, the inductive matching transmission line and the coupling line mentioned above and the parasitic capacitance of the four resistors form an LC low-pass network, which has ultra-wideband characteristics. Therefore, the parasitic capacitance no longer becomes a factor restricting the high-frequency response and is "absorbed" in disguise, allowing the size of each sub-resistor to be further increased to meet higher power requirements.
[0016] Based on the above principles and structures, in this embodiment, a high-power ultra-wideband silicon carbide load chip based on a dual-coupling feedback network is manufactured using silicon carbide technology, and its operating frequency range is from DC to 38 GHz. The sizes of the four resistors are determined according to the required power, that is, the widths of the four resistors are all 150 μm, and theoretically, a total effective current of 0.6 A can be tolerated. According to the calculation formula of current, resistance and power: where P is power (unit: W), R is resistance (unit: Ohm), I is the effective value of current (unit: A), and the maximum tolerable RF power can reach (45.5 dBm).
[0017] Comparative example 1, as Figure 4 shown, Comparative example 1 shows a distributed broadband power load circuit, including: four resistors connected in parallel, a first matching transmission line group and a second matching transmission line group. The four resistors connected in parallel are resistor R1, resistor R2, resistor R3 and resistor R4 respectively; the first matching transmission line group is composed of matching transmission lines TL1, TL2 and TL3 connected in sequence, and the second matching transmission line group is composed of matching transmission lines TL4, TL5 and TL6 connected in sequence. It can be seen from the figure that the parasitic capacitance of each resistor is connected in parallel between the first matching transmission line group and the second matching transmission line group and constitutes a low-pass matching. Therefore, the parasitic effect can be absorbed, realizing the broadband characteristic. However, there are still two problems in this structure: one is that the length of the matching transmission line is too long, resulting in an increase in the overall area of the chip; the other is that the power consumed by each sub-resistor channel is unbalanced, resulting in the premature burnout of the first resistor.
[0018] Comparing Comparative Example 1 with Example 1, it can be seen that in this embodiment, the first coupling feedback network 1 replaces the matching transmission lines TL1 and TL6 in Comparative Example 1, and the second coupling feedback network 2 replaces the matching transmission lines TL3 and TL4 in Comparative Example 1. The two coupling feedback networks cross-feed the microwave signals at both ends. On the one hand, the coupling introduces mutual inductance, which can increase the electrical length of the equivalent microstrip line and shorten the length of the actual transmission line required; on the other hand, it forms a negative feedback loop of the signal, which can balance the power distribution of each sub-resistance channel and avoid the premature burnout of the first sub-resistance.
[0019] Figure 5 For Example 1 and Figure 1 the comparison results of the return loss of the conventional single-resistance structure, Figure 5 in which the blue curve represents the single-resistance structure and the red curve represents the structure of the present invention. The horizontal axis is the frequency (unit: GHz), and the vertical axis is the return loss (unit: dB). As can be seen from Figure 5 it, in the range of DC - 12.5 GHz in Example 1, the return loss is less than -12.5 dB; in the range of 12.5 - 38 GHz, the return loss is less than -15 dB. For the conventional single-resistance structure, it fluctuates around -10 dB in the whole frequency band, and only -9.1 dB at 22.8 GHz, far from meeting the requirements for a good load.
[0020] Figure 6 When the input power is 20 W (43 dBm), the comparison results of the reflected power between Example 1 and Figure 1 the conventional single-resistance structure; Figure 6 in which the blue curve represents the single-resistance structure and the red curve represents the structure of the present invention. The horizontal axis is the frequency (unit: GHz), and the vertical axis is the reflected power (unit: W). As can be seen from Figure 6 it, the typical value of the overall reflected power of the ultra-wideband high-power silicon carbide load chip in Example 1 is 0.5 W, about 2.5% of the total power; while the typical value of the overall reflected power of the conventional single-resistance structure is 2 W, about 10% of the total power. It can be seen that the ultra-wideband high-power silicon carbide load chip in Example 1 significantly reduces the reflected power.
[0021] Figure 7 When the input power is 20 W (43 dBm), the power dissipated in each sub-resistance channel in Example 1; Figure 7The red curve represents resistor R1, the blue curve represents resistor R2, the purple curve represents resistor R3, and the green curve represents resistor R4. The horizontal axis is the frequency (in GHz), and the vertical axis is the dissipated power (in W). It can be seen from the figure that the power dissipated in each sub-channel does not exceed the maximum allowable power of the corresponding channel and is evenly distributed, which is beneficial to improving thermal stability.
[0022] In summary, the present invention discloses a ultra-wideband high-power load chip based on a dual-coupled feedback network, which includes 4 large-size resistors, 2 sets of coupled feedback networks, 2 matching transmission lines and 1 ground connection. The chip is manufactured based on a silicon carbide substrate process with high thermal conductivity and can be integrated on a single chip, having a small size and high integration. The 4 sub-resistors are in parallel relationship, thus dispersing the heat dissipation and improving the thermal reliability of the load. The width and length of each sub-resistor can be large enough, so the parasitic capacitance brought can be absorbed by the 2 sets of coupled feedback networks and 2 matching transmission lines, ensuring the ultra-wideband characteristics.
[0023] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not restrictive. The ultra-wideband high-power load chip based on the dual-coupled feedback network is not only applicable to the silicon carbide process, but also can be applied to other high-thermal-conductivity substrate processes such as diamond, and is not limited by a specific frequency band. In addition to the DC-38GHz 20W load chip described in the embodiments, the present invention covers application solutions of various process types, frequency band ranges and power capacities.
[0024] Although the present invention has been described in detail with reference to the embodiments, those skilled in the art should understand that any modification or equivalent replacement of the technical solutions without departing from the spirit and scope of the technical solutions of the present invention shall fall within the scope of the claims of the present invention. The embodiments are intended to help understand the principle of the present invention, and the protection scope of the present invention is not limited to the specific embodiments described. According to the technical disclosure of the present invention, those skilled in the art can make various deformations and combinations without departing from the essence of the present invention, and these improvements still fall within the protection scope of the present invention.
Claims
1. A high-power ultra-wideband load chip based on a dual-coupled feedback network, comprising a substrate and a load circuit disposed on the substrate, characterized in that, The load circuit includes a first coupled feedback network and a second coupled feedback network. Both the first coupled feedback network and the second coupled feedback network have a first port, a second port, a third port, and a fourth port. There are four resistors connected in parallel and two matching transmission lines between the first coupled feedback network and the second coupled feedback network. The four resistors connected in parallel are resistor R1, resistor R2, resistor R3, and resistor R4 respectively. The two matching transmission lines are a first matching transmission line and a second matching transmission line respectively. Among them: Resistor R1 is disposed between the first port of the first coupled matching network and the third port of the second coupled matching network. Resistor R2 is disposed between the second port of the first coupled matching network and the fourth port of the second coupled matching network. Resistor R3 is disposed between the third port of the first coupled matching network and the first port of the second coupled matching network. Resistor R4 is disposed between the fourth port of the first coupled matching network and the second port of the second coupled matching network. One end of it connected to the fourth port of the first coupled matching network is grounded; The first end of the first matching transmission line is connected to the second port of the first coupled matching network, and the second end is connected to the first port of the second coupled matching network. The first end of the second matching transmission line is connected to the third port of the first coupled matching network, and the second end is connected to the fourth port of the second coupled matching network.
2. The ultra-wideband high-power load chip based on a dual-coupling feedback network according to claim 1, wherein Both the first coupled feedback network and the second coupled feedback network are composed of a primary coupled transmission line and a secondary coupled transmission line.
3. The ultra-wideband high-power load chip based on a dual-coupling feedback network according to claim 1, characterized in that Resistors R1, R2, R3, and R4 are all realized by thin-film resistor technology, and their corresponding unit square resistance values are 50Ω.
4. A high-power ultra-wideband load chip based on a dual-coupled feedback network according to any one of claims 1 to 3, characterized in that The substrate is a silicon carbide substrate or a diamond substrate.
Citation Information
Patent Citations
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