Camera data transmission method, domain controller and vehicle

Abstract

The invention provides a camera data transmission method, a domain controller and a vehicle. The domain controller comprises a master SoC, at least one slave SoC and a demultiplexer, the master SoC and the at least one slave SoC are connected to a camera through the demultiplexer, and the master SoC is connected with a selection end of the demultiplexer. According to the method provided by the embodiment of the invention, when the auxiliary of the slave SoC is needed, the register of the demultiplexer is operated by the master SoC to control the demultiplexer to conduct the channels of the slave SoC and the master SoC, so that the camera data can be synchronously sent to the slave SoC and the master SoC through the conducting channels of the demultiplexer. According to the method and the device, the camera data transmission time of each SoC which is processing the task can be delayed, and the problems such as vehicle track deviation, dragon drawing in the vehicle driving process or pause in the vehicle driving process are effectively avoided.

Description

Technical Field

[0001] The present disclosure relates to autonomous driving technology, and particularly to a camera data transmission method, a domain controller, and a vehicle. Background Art

[0002] With the wide application of autonomous driving technology, the domain controller deployed in a vehicle needs to complete many tasks such as perception, positioning, decision-making, planning, and control functions. Therefore, two or more system-on-chips (SoCs) with different computing powers can be integrated in a domain controller to meet the requirements of high-performance computing and data processing in vehicle intelligence. This design can provide higher flexibility and efficiency, especially when dealing with complex vehicle electronic systems such as intelligent cockpits, autonomous driving assistance systems, and vehicle infotainment systems.

[0003] However, in the scenario where multiple SoCs in the domain controller cooperate to execute tasks such as perception, positioning, decision-making, planning, and control functions, camera data needs to be transmitted through the interconnection channels between the SoCs, which increases the transmission delay. The camera data transmission delays in each SoC are inconsistent, and there are differences in the time when different SoCs receive or process camera data, which may cause situations such as master-slave decision logic conflicts, spatio-temporal misalignment between perception and positioning, mismatch between control execution and feedback, and system crashes. In scenarios with extremely high real-time requirements such as autonomous driving, it may cause systemic failures, resulting in problems such as vehicle trajectory deviation, the vehicle swaying frequently from side to side (i.e., frequent left-right shaking) during driving, or the vehicle jerking during driving, affecting vehicle driving safety. Summary of the Invention

[0004] In view of this, the present disclosure provides a camera data transmission method, a domain controller, and a vehicle.

[0005] According to a first aspect of the present disclosure, there is provided a camera data transmission method, which is applied to a domain controller. The domain controller includes a main SoC, at least one slave SoC, and a multiplexer. The main SoC is connected to the selection end of the multiplexer and an output end of the multiplexer. Each of the other output ends of the multiplexer except the output end connected to the main SoC is connected to one of the slave SoCs, and the input end of the multiplexer is externally connected to a camera.

[0006] The method includes: when assistance from a first slave SoC among at least one slave SoC is required, the main SoC sets the configuration value corresponding to the first slave SoC and the configuration value corresponding to the main SoC in the register of the multiplexer to an enable value; the multiplexer conducts the channel corresponding to the first slave SoC and the channel corresponding to the main SoC according to the configuration value in its own register, so that the data from the camera is sent to the main SoC and the first slave SoC in parallel through the multiplexer.

[0007] In some embodiments of the first aspect of the present disclosure, the method further includes: the main SoC sets the configuration values corresponding to other slave SoCs in the registers of the multiplexer to prohibited values, where the other slave SoCs include all slave SoCs except the first slave SoC; the multiplexer turns on the channels corresponding to the first slave SoC and the channels corresponding to the main SoC according to the configuration values in its own registers while turning off the channels of other slave SoCs.

[0008] In some embodiments of the first aspect of the present disclosure, the first slave SoC is selected by the main SoC from the at least one slave SoC.

[0009] In some embodiments of the first aspect of the present disclosure, the method further includes: after determining that the assistance of the first slave SoC is not required, the main SoC sets the configuration value corresponding to the first slave SoC in the multiplexer to a prohibited value; the multiplexer turns off the channels corresponding to the first slave SoC according to the configuration values in its own registers and keeps the channels corresponding to the main SoC turned on.

[0010] In some embodiments of the first aspect of the present disclosure, the main SoC sets the configuration values corresponding to the first slave SoC and the main SoC in the registers of the multiplexer to enable values, including: the main SoC operates the registers of the multiplexer through I2C to set the configuration values corresponding to the first slave SoC and the main SoC in the registers of the multiplexer to enable values.

[0011] In some embodiments of the first aspect of the present disclosure, the main SoC sets the configuration value corresponding to the first slave SoC in the registers of the multiplexer to an enable value in the following manner:

[0012] Determine the channel identifier corresponding to the first slave SoC, where the channel identifier is used to uniquely identify the channels in the multiplexer, and the channels of the multiplexer are in one-to-one correspondence with its output terminals;

[0013] Determine the register address corresponding to the first slave SoC according to the channel identifier corresponding to the first slave SoC, where the register address is used to identify the storage address of the configuration value corresponding to the first slave SoC in the registers of the multiplexer or the address of the independent register corresponding to the first slave SoC in the multiplexer;

[0014] The main SoC rewrites the configuration value corresponding to the first slave SoC to an enable value according to the register address corresponding to the first slave SoC;

[0015] The main SoC performs status verification on the configuration value corresponding to the first slave SoC.

[0016] According to a second aspect of the present disclosure, a domain controller is provided, including: a main SoC, at least one slave SoC, and a multiplexer. The main SoC is connected to the selection terminal of the multiplexer and one output terminal of the multiplexer. Each of the other output terminals of the multiplexer except the output terminal connected to the main SoC is connected to one of the slave SoCs. The input terminal of the multiplexer is externally connected to a camera, and the domain controller is used to implement the above method.

[0017] In some embodiments of the second aspect of the present disclosure, the main SoC is connected to the selection terminal of the multiplexer through the Inter-Integrated Circuit bus (I2C), and the main SoC is connected to one output terminal of the multiplexer through the Camera Serial Interface (CSI). Each of the other output terminals of the multiplexer is connected to one of the slave SoCs through CSI.

[0018] In some embodiments of the second aspect of the present disclosure, the main SoC is pairwise connected to at least one slave SoC.

[0019] According to a third aspect of the present disclosure, a vehicle is provided, and the vehicle includes the above domain controller.

[0020] It can be seen from the above technical solutions that in the embodiments of the present disclosure, a multiplexer is added to the domain controller. The input terminal of the multiplexer is externally connected to a camera, the output terminals are connected to each SoC, and the selection terminal is connected to the main SoC. The main SoC can control the multiplexer to perform channel selection by operating the registers of the multiplexer, so that the camera data is sent in parallel to the main SoC and the slave SoCs that assist the main SoC to execute tasks through the multiplexer. In this way, the camera data can reach each SoC that is executing tasks at the same time, and the transmission delay of the camera data of each SoC is consistent, thereby effectively avoiding problems such as vehicle trajectory deviation, snake-like driving during vehicle driving, or jerks during vehicle driving caused by inconsistent transmission delays of camera data between the main SoC and the slave SoCs, and at the same time improving the stability, real-time performance, and reliability of the domain controller. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure or the prior art, the following will briefly introduce the drawings required in the embodiments. Obviously, the drawings in the following description are only some embodiments of the present disclosure. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0022] Figure 1 It is a schematic structural diagram of the domain controller provided by the embodiment of the present disclosure;

[0023] Figure 2 It is a schematic flowchart of the camera data transmission method provided by the embodiment of the present disclosure;

[0024] Figure 3 This is a schematic flowchart of the main SoC operating the multiplexer register to set the first slave SoC configuration value involved in the embodiments of the present disclosure. Detailed implementation manners

[0025] Next, the technical solutions in the embodiments of the present disclosure will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present disclosure. Obviously, the described embodiments are only a part of the embodiments of the present disclosure, rather than all the embodiments. Based on the embodiments in the present disclosure, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present disclosure.

[0026] The terms used in the embodiments of the present disclosure are only for the purpose of describing specific embodiments, and are not intended to limit the present disclosure. The singular forms of "a", "the", and "said" used in the embodiments of the present disclosure and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise.

[0027] Depending on the context, words such as "if" and "when" used herein may be interpreted as "when" or "while" or "in response to determining" or "in response to detecting". Similarly, depending on the context, the phrases "if determined" or "if detecting (stated condition or event)" may be interpreted as "when determined" or "in response to determining" or "when detecting (stated condition or event)" or "in response to detecting (stated condition or event)".

[0028] As described above, in the scenario where multiple SoCs in the domain controller cooperate to execute tasks such as perception, positioning, decision-making, planning, and control functions, camera data needs to be transmitted through the interconnection channel between SoCs. That is, the camera data needs to be transmitted from the main SoC to the slave SoC through the interconnection channel between itself and the slave SoC, and then the slave SoC performs data processing and related calculations on the camera data. Obviously, this method increases the transmission delay, and the camera data transmission delays of the main SoC and each slave SoC are inconsistent, and there are differences in the time for different SoCs to receive or process camera data.

[0029] In view of this, embodiments of the present disclosure provide the following camera data transmission method, domain controller, memory, and vehicle. A demultiplexer is added to the domain controller. The input end of the demultiplexer is externally connected to a camera, the output end is connected to each SoC, and the selection end is connected to the main SoC. The main SoC can control the demultiplexer to perform channel selection by operating the demultiplexer register reading and writing, so that camera data is sent to the main SoC and the slave SoC that is assisting the main SoC to execute tasks in parallel through the demultiplexer. In this way, the camera data can reach each SoC at the same time, and the camera data transmission delays of each SoC are consistent (that is, the timing of receiving and processing data by each SoC is aligned), thereby effectively avoiding problems such as vehicle trajectory deviation, the vehicle drawing a snake in the process of driving, or the vehicle jerking in the process of driving caused by inconsistent camera data transmission delays between the main SoC and the slave SoC.

[0030] Figure 1 FIG. shows a schematic structural diagram of the domain controller 100 provided by an embodiment of the present disclosure. Refer to Figure 1 , the domain controller 100 may include: a main SoC 110, at least one slave SoC 120, and a demultiplexer 130 (DEMUX, Demultiplexer). The main SoC 110 is connected to the selection end and an output end of the demultiplexer 130. Each of the other output ends of the demultiplexer 130 except the output end connected to the main SoC 110 is connected to a slave SoC 120. The input end of the demultiplexer 130 is externally connected to a camera 200. The domain controller 100 can be used to implement the following camera 200 data transmission method.

[0031] In the case where the resources of the main SoC 110 are tight, the main SoC 110 can control the slave SoC 120 to assist itself in completing tasks. If the resources of the main SoC 110 are sufficient to complete the tasks, the participation of the slave SoC 120 is not required.

[0032] The main SoC 110 can selectively control one or more slave SoCs 120 to cooperate with itself to complete tasks according to needs. Specifically, the main SoC 110 can achieve the control of the slave SoC 120 through an efficient communication mechanism, task allocation strategy, and resource coordination, so as to cooperate to complete relatively complex tasks. For example, the main SoC 110 can be used to analyze global tasks such as path planning for autonomous driving to obtain multiple subtasks, decompose the subtasks into parallel modules (such as object detection, positioning, control instruction generation, etc.), and issue instructions to one or more slave SoCs 120, and these slave SoCs 120 perform specific calculations to implement the foregoing parallel modules.

[0033] In specific applications, the main SoC 110 and the slave SoC 120 can adopt SoCs with different architectures or the same architecture. Each SoC can integrate multiple processing units (such as CPUs, GPUs, DSPs, etc.) to process a large amount of data and complex computing tasks. Generally, the computing power of the main SoC 110 is stronger than that of the slave SoC 120.

[0034] The number of slave SoCs 120 can be flexibly configured according to needs. For example, 2, 4, or 8 SoCs can be integrated into the domain controller 100. Among them, the SoC with stronger computing power or higher priority serves as the main SoC 110, and the other SoCs are all slave SoCs 120.

[0035] The main SoC 110 is connected to at least one slave SoC 120 pairwise. See Figure 1 , different SoCs (that is, between the main SoC 110 and each slave SoC 120, and between different slave SoCs 120) can communicate through the Peripheral Component Interconnect Express (PCIe). Through PCIe, a large amount of data can be transferred between SoCs, thereby completing tasks such as data copying, system relocation, and log transfer.

[0036] There are usually multiple cameras 200 externally connected to the domain controller 100. Taking a vehicle as an example, the cameras 200 can be divided into forward, side, cockpit, etc. according to their positions. One or more cameras 200 can be installed at each position, and these cameras 200 can be connected to the domain controller 100 through in-vehicle wiring harnesses.

[0037] In the embodiments of the present disclosure, the domain controller 100 externally connects to the camera 200 through a multiplexer 130. See Figure 1 , the input end of the camera 200 and the multiplexer 130 can be connected through a Gigabit Multimedia Serial Links (GMSL) interface. The GMSL interface includes a serializer and a deserializer.

[0038] The serializer is located at the camera 200 end and is mainly used to convert parallel data into serial data. Specifically, the serializer samples and encodes the data from multiple cameras 200 and then sends it out through a high-speed serial interface. The serializer usually supports multiple communication media, such as coaxial cables and shielded twisted pairs, to adapt to different application scenarios.

[0039] The deserializer is located at the domain controller 100 end, and is used to decode and sample the received serial data to recover the original parallel data, so as to be sent to each SoC for further processing through the multiplexer 130. The deserializer also supports multiple communication media to ensure the integrity and reliability of data during transmission.

[0040] See Figure 1 , the main SoC 110 is connected to the selection terminal of the multiplexer 130 through an integrated circuit bus (I2C, Inter-Integrated Circuit). The main SoC 110 can operate the register of the multiplexer 130 through I2C to control the multiplexer 130 to perform channel selection.

[0041] See Figure 1 , the main SoC 110 can be connected to an output terminal of the multiplexer 130 through a camera serial interface (CSI, Camera Serial Interface). At the same time, each other output terminal of the multiplexer 130 is connected to a slave SoC 120 through CSI. Thus, each output terminal of the multiplexer 130 and the corresponding SoC can be connected through CSI to better transmit the camera 200 data. CSI not only provides an efficient hardware connection, but also supports flexible software configuration and control, enabling the camera 200 data to be accurately captured and transmitted, and better supporting advanced driver assistance systems (ADAS) and autonomous driving functions.

[0042] It should be noted that the connection method between the SoCs in the domain controller 100, the connection method between the SoC and the multiplexer 130, etc. are not limited to the above implementation methods, and any other applicable communication methods can also be adopted. In this regard, the embodiments of the present disclosure do not make limitations.

[0043] In addition, other components such as an MCU may also be included in the domain controller 100. The peripheral sensors of the domain controller 100 may also include, but are not limited to, lidar, millimeter wave radar, etc. The embodiments of the present disclosure do not make any limitations on the specific structure of the domain controller 100 and the quantity and type of its external sensors.

[0044] Figure 2 The flowchart of the camera data transmission method provided by the embodiments of the present disclosure is shown. This camera data transmission method can be executed by the aforementioned domain controller. See Figure 2 As shown, the camera data transmission method of the embodiments of the present disclosure may include:

[0045] Step 201, when at least one first slave SoC in the slave SoCs needs to be assisted, the main SoC sets the configuration value corresponding to the first slave SoC and the configuration value corresponding to the main SoC in the register of the multiplexer to an enabling value;

[0046] In step 202, the multiplexer turns on the channels corresponding to the first slave SoC and the corresponding master SoC according to the configuration values in its own register, so that the data from the camera is sent to the master SoC and the first slave SoC in parallel through the multiplexer.

[0047] In the embodiments of the present disclosure, the master SoC can control the multiplexer to select channels by operating the register of the multiplexer, so that the camera data is sent to the master SoC and the slave SoC that is about to or is assisting the master SoC in executing tasks in parallel through the multiplexer. In this way, the camera data can reach the master SoC and the slave SoC that is assisting the master SoC in executing tasks at the same time, and the transmission delay of the camera data of the master SoC and the slave SoC is consistent (that is, the timing of receiving and processing data by each SoC is aligned). In scenarios where multiple SoCs cooperate to execute complex tasks such as perception, positioning, decision-making, and planning, the consistent transmission delay of the camera data of each SoC can improve the accuracy of multi-transmitter fusion, enhance the real-time performance of decision-making and control, and optimize the utilization rate of system resources. Therefore, the embodiments of the present disclosure can significantly improve the overall performance and reliability of the domain controller and can better meet the requirements of high-real-time and high-safety scenarios such as autonomous driving.

[0048] When a certain configuration value in the register of the multiplexer is set to the enable value, the channel corresponding to the configuration value will be turned on. When a certain configuration value in the register of the multiplexer is set to the disable value, the channel corresponding to the configuration value will be closed. In specific applications, the enable value and the disable value can be predefined. For example, the enable value can be defined as "1", and the disable value can be predefined as "0". Setting a certain configuration value to the enable value means rewriting the value of the configuration value to 1, and setting a certain configuration value to the disable value means rewriting the value of the configuration value to 0.

[0049] Step 201 may further include: the master SoC sets the configuration values corresponding to other slave SoCs in the register of the multiplexer to the disable value, and the other slave SoCs include all slave SoCs except the first slave SoC; and, when the multiplexer turns on the channels corresponding to the first slave SoC and the corresponding master SoC according to the configuration values in its own register, it closes the channels of other slave SoCs. Thereby, the mistransmission of camera data to other slave SoCs can be avoided.

[0050] In step 201, the first slave SoC is selected by the master SoC from at least one slave SoC. Specifically, after determining that slave SoC assistance is needed, the master SoC can select the first slave SoC by collecting the states of all slave SoCs and generating an allocation scheme by running a scheduling algorithm.

[0051] In step 201, the main SoC can set the multiplexer register at any time after or at the same time as selecting the first slave SoC. For example, after selecting the first slave SoC, the main SoC can, through protocol instructions (such as I2C instructions) or hardware interrupts, notify the first slave SoC to execute tasks, and at the same time or after that, set the configuration values corresponding to the first slave SoC and the main SoC in the register of the multiplexer to enable values.

[0052] Taking a vehicle as an example, the slave SoC is needed in one of the following scenarios. At this time, the main SoC can select the first slave SoC and control the multiplexer to turn on the channel corresponding to the first slave SoC by operating the register of the multiplexer, so that the data from the camera can enter the main SoC and the first slave SoC synchronously through the multiplexer: 1) It is detected that the vehicle enters a highway section and the vehicle speed is equal to or greater than the first threshold (for example, 80 km / h); 2) It is detected that the vehicle enters an urban section, there are many obstacles around, and it is necessary to distinguish obstacles such as traffic lights; 3) It is detected that the vehicle is driving in rainy weather; 4) It is detected that the vehicle is driving in a tunnel section and the vehicle speed is equal to or greater than the first threshold; 5) It is detected that the vehicle is driving at night and the vehicle speed is equal to or greater than the first threshold.

[0053] In step 201, the main SoC can first read the configuration value of the main SoC in the register of the multiplexer. If the current configuration value of the main SoC is an enable value, the configuration value of the main SoC can be kept unchanged. Similarly, the main SoC can read the configuration values of other slave SoCs in the register of the multiplexer. If the configuration values of other slave SoCs are all disable values, the configuration values of other slave SoCs can be kept unchanged.

[0054] In some examples, in step 201, the main SoC can operate the register of the multiplexer through I2C to set the configuration values corresponding to the first slave SoC and the main SoC in the register of the multiplexer to enable values. If the selection terminal of the main SoC and the multiplexer is connected in other ways, other corresponding methods can be used to complete the setting of the configuration values of each SoC. The specific method for the main SoC to operate the register in the multiplexer is not limited in the embodiments of the present disclosure.

[0055] Figure 3 An exemplary implementation process of the main SoC setting the configuration value corresponding to the first slave SoC in the register of the multiplexer is shown. See Figure 3 The process of the main SoC setting the configuration value corresponding to the first slave SoC in the register of the multiplexer may include the following steps:

[0056] Step 301, determine the channel identifier corresponding to the first slave SoC;

[0057] The channel identifier is used to uniquely identify the channels in the multiplexer, and the channels of the multiplexer correspond one-to-one with its output terminals. The channel identifier can be, but is not limited to, the label or channel number of the output terminal connected to the first slave SoC.

[0058] Step 302, determine the register address corresponding to the first slave SoC according to the channel identifier corresponding to the first slave SoC;

[0059] The register address can be used to identify the storage address of the configuration value corresponding to the first slave SoC in the register of the multiplexer or the address of the independent register corresponding to the first slave SoC in the multiplexer.

[0060] In a specific application, the corresponding relationship between the channel identifier and the register address can be pre-configured in the master SoC, and the master SoC determines the register address corresponding to a slave SoC by querying this corresponding relationship.

[0061] Step 303, the master SoC rewrites the configuration value corresponding to the first slave SoC into an enable value according to the register address corresponding to the first slave SoC.

[0062] Specifically, the specific process of the master SoC rewriting the configuration value of the independent register of the first slave SoC into an enable value through I2C can include the following steps:

[0063] Step a1, the master SoC initiates I2C communication to the multiplexer;

[0064] Step a2, the master SoC sends the I2C device address of the multiplexer to the multiplexer.

[0065] Step a3, after receiving the acknowledgment (ACK) information from the multiplexer, the master SoC sends the register address of the first slave SoC to the multiplexer;

[0066] Step a4, after receiving the acknowledgment (ACK) information from the multiplexer, the master SoC sends an I2C write command, and the data carried in the I2C write command is the enable value (for example, 0x01);

[0067] Step a5, the DEMUX confirms the data reception and latches the enable value (for example, 0x01) at the register address of the first slave SoC, and returns an acknowledgment (ACK) information to the master SoC;

[0068] Step a6, the above I2C communication between the master SoC and the multiplexer ends.

[0069] Step 304, the master SoC performs a status verification on the configuration value corresponding to the first slave SoC.

[0070] Specifically, the main SoC reads the configuration value corresponding to the first slave SoC according to the register address corresponding to the first slave SoC. If the configuration value corresponding to the first slave SoC is the enable value, the status verification passes. If the configuration value corresponding to the first slave SoC is not the enable value, return to step 303 to execute again. Loop like this until timeout or the status verification passes.

[0071] The process of the main SoC setting the configuration values of other SoCs in the register of the multiplexer is the same as the aforementioned setting process of the first slave SoC, and will not be elaborated here. In a specific application, the main SoC can uniformly set the configurations of all SoCs in the register of the multiplexer to improve efficiency and further reduce latency.

[0072] The following takes a domain controller with 4 SoCs as an example to illustrate the specific implementation process of the main SoC operating on the register of the multiplexer to set the configuration values of each SoC.

[0073] Suppose the domain controller includes 4 SoCs, namely SoC1, SoC2, SoC3, and SoC4. SoC1 is the main SOC, and SoC2 to SoC4 are slave SoCs. The multiplexer has 4 output terminals, namely output terminals 1 to 4. These 4 output terminals represent 4 channels, and the channel identifiers are CH1, CH2, CH3, and CH4 respectively. Output terminal 1 is connected to SoC1, channel CH1 corresponds to SoC1, output terminal 2 is connected to SoC2, channel CH2 corresponds to SoC2, output terminal 3 is connected to SoC3, channel CH4 corresponds to SoC4. The register addresses corresponding to the 4 channels are pre-configured as: 0x60, 0x70, 0x80, 0x90.

[0074] If it is determined that SoC2 and SoC4 are the first slave SoCs, then SoC1 queries the corresponding register addresses 0x70 and 0x90 respectively through the channel identifiers CH2 and CH4 corresponding to SoC2 and SoC4, and rewrites the configuration values of the registers with addresses 0x70 and 0x90 in the multiplexer to "1" through I2C, so that the multiplexer conducts the channels CH2 corresponding to SoC2 and CH4 corresponding to SoC4.

[0075] At the same time, SoC1 queries the register address 0x80 through the channel identifier CH3 corresponding to SoC3, reads the configuration value at the register address 0x80 in the multiplexer. If the read configuration value is the disable value "0", no operation can be performed to keep the configuration value corresponding to SoC3 as the disable value, so that the multiplexer keeps the channel CH3 corresponding to SoC3 closed.

[0076] Meanwhile, SoC1 can query its register address 0x60 through its corresponding channel identifier CH1, read the configuration value at register address 0x60 in the multiplexer. If the read configuration value is the enable value "1", no operation needs to be performed to keep the configuration value corresponding to SoC1 as the enable value, so that the multiplexer keeps the corresponding channel CH1 of SoC1 conducting.

[0077] In step 202, the multiplexer can conduct or close its own channels in the following manner: The multiplexer reads all the configuration values in its own registers and decodes them into channel control signals. The channel control signals drive the switches on the corresponding channels of the multiplexer to close to conduct the corresponding channels or disconnect to close the corresponding channels.

[0078] Still taking the domain controller including 4 SoCs in the previous text as an example, the multiplexer reads the configuration values at each register address in its own registers and decodes them into 4 channel control signals S1 to S4 respectively. The 4 channel control signals respectively correspond to the 4 channels CH1 to CH4 of the multiplexer. If the configuration values at 0x60, 0x70, and 0x90 are all the enable value 1, while the configuration value at 0x80 is the disable value 0, the 4 decoded channel control signals are: S1 is high level, S2 is high level, S3 is low level, and S4 is high level. The channel control signals S1, S2, and S4 respectively drive the switches on the channels CH1, CH2, and CH4 of the multiplexer to close, opening the physical paths on the channels CH1, CH2, and CH4 so that the channels CH1, CH2, and CH4 conduct. The channel control signal S3 drives the switch on the channel CH3 of the multiplexer to disconnect, making the output end of the channel CH3 enter the high impedance state or ground, closing the physical paths on the channels CH1, CH2, and CH4 so that the channel CH3 closes. In this way, the data from the camera will be synchronously sent to SoC1, SoC2, and SoC4 through the channels CH1, CH2, and CH4.

[0079] Further, after step 202, the method of the embodiment of the present disclosure may further include: After determining that the assistance of the first slave SoC is not required, the master SoC sets the configuration value corresponding to the first slave SoC in the multiplexer to the disable value; the multiplexer closes the channel corresponding to the first slave SoC according to the configuration value in its own register and keeps the channel corresponding to the master SoC conducting. Specifically, if the current task no longer requires the assistance of the slave SoC, the master SoC notifies the slave SoC to stop through protocol instructions or hardware interrupts. At this time, the master SoC can synchronously execute this process to close the data transmission channel between the slave SoC and the camera.

[0080] Exemplarily, the main SoC may operate the register of the multiplexer to control the multiplexer to close the channel of the slave SoC while or after notifying the slave SoC to stop via a protocol instruction or a hardware interrupt.

[0081] For example, when the vehicle enters an enclosed scenario such as a closed section with fewer other vehicles and other obstacles and the vehicle speed is less than the second threshold (e.g., 60 km / h), the resource demand is low at this time, and only the main SoC is required without the assistance of the slave SoC. At this time, the main SoC may operate the register of the multiplexer to control the multiplexer to close the channel of the slave SoC while or after notifying the slave SoC to stop via a protocol instruction or a hardware interrupt.

[0082] In addition, the camera transmission method according to the embodiments of the present disclosure may further include: in the initialization stage, all configuration values in the register of the multiplexer may be default set to prohibited values.

[0083] The domain controller provided by the embodiments of the present disclosure may be of any type. For example, the domain controller may be implemented as but not limited to the following types: a power domain controller, a chassis domain controller, a body domain controller, an intelligent cockpit domain controller, an autonomous driving domain controller. For another example, the domain controller may also be implemented as but not limited to the following types: an L2-level domain controller, an L3-level domain controller, an L4-level domain controller.

[0084] The domain controller and its camera data transmission method according to the embodiments of the present disclosure may be applied to the control of various devices such as multiple wheeled mobile robots, wheeled mobile robots, mobile robots, vehicles, aircraft, ships, and intelligent rail rapid transit systems (ART, Autonomous rail Rapid Transit). The vehicle may be but not limited to passenger vehicles, commercial vehicles (e.g., trucks, buses, freight vehicles, etc.), special-purpose vehicles (e.g., ambulances, fire trucks, engineering vehicles, rescue vehicles, etc.), agricultural and industrial vehicles (e.g., harvesters, forklifts, etc.), transportation and logistics vehicles (e.g., container trucks, refrigerated trucks, etc.), new energy vehicles (e.g., electric vehicles, hybrid vehicles), and special carriers (e.g., garbage trucks, sprinkler trucks, etc.). In other words, the "vehicle", "container truck", etc. involved in the embodiments of the present disclosure may be replaced with any of the foregoing devices.

[0085] The embodiments of the present disclosure also provide a vehicle, which may include the foregoing domain controller 100. The vehicle may be implemented as but not limited to the foregoing various devices such as multiple wheeled mobile robots, wheeled mobile robots, mobile robots, vehicles, aircraft, ships, and intelligent rail rapid transit systems (ART, Autonomous rail Rapid Transit).

[0086] The embodiments of the present disclosure can be applied to scenarios such as ports, highways, logistics, mines, farms, closed parks, and urban transportation, and can be applicable to many aspects such as logistics distribution, unmanned transportation, last-mile delivery, ride-hailing, automated agricultural operations, and automated sanitation. Of course, the embodiments of the present disclosure can also be applied to any other intelligent control scenarios involving devices such as vehicles. The present disclosure does not limit the application scenarios and applicable fields of the embodiments of the present disclosure.

[0087] The technical solutions provided by the present disclosure have been introduced in detail above. Specific examples are used in this article to elaborate on the principles and implementation manners of the present disclosure. The description of the above embodiments is only used to help understand the method and its core idea of the present disclosure; at the same time, for those of ordinary skill in the art, according to the idea of the present disclosure, there will be changes in the specific implementation manners and application scopes. In summary, the content of this specification should not be construed as a limitation on the present disclosure.

[0088] The foregoing is only a preferred embodiment of the present disclosure and is not intended to limit the present disclosure. Any modifications, equivalent replacements, etc. made within the spirit and principles of the present disclosure shall be included within the protection scope of the present disclosure.

Claims

1. A camera data transmission method, characterized in that, The method is applied to a domain controller, which includes a main SoC, at least one slave SoC, and a multiplexer. The main SoC is connected to the selection terminal of the multiplexer and one output terminal of the multiplexer. Each of the other output terminals of the multiplexer except the output terminal connected to the main SoC is connected to one of the slave SoCs, and the input terminal of the multiplexer is externally connected to a camera; The method includes: When assistance from a first slave SoC among at least one slave SoC is required, the main SoC sets the configuration values corresponding to the first slave SoC and the main SoC in the register of the multiplexer to enable values; The multiplexer conducts the channels corresponding to the first slave SoC and the main SoC according to the configuration values in its own register, so that the data from the camera is sent to the main SoC and the first slave SoC in parallel through the multiplexer.

2. The method according to claim 1, wherein The method further includes: The main SoC sets the configuration values corresponding to other slave SoCs in the register of the multiplexer to disable values, where the other slave SoCs include all slave SoCs except the first slave SoC; While the multiplexer conducts the channels corresponding to the first slave SoC and the main SoC according to the configuration values in its own register, it closes the channels of other slave SoCs.

3. The method according to claim 1, characterized in that, The first slave SoC is selected by the main SoC from the at least one slave SoC.

4. The method according to claim 1, characterized in that The method further includes: After determining that the assistance of the first slave SoC is not required, the main SoC sets the configuration value corresponding to the first slave SoC in the multiplexer to a disable value; The multiplexer closes the channel corresponding to the first slave SoC according to the configuration value in its own register and keeps the channel corresponding to the main SoC conducting.

5. The method according to claim 1, characterized in that, The main SoC sets the configuration values corresponding to the first slave SoC and the main SoC in the register of the multiplexer to enable values, including: the main SoC operates the register of the multiplexer through I2C to set the configuration values corresponding to the first slave SoC and the main SoC in the register of the multiplexer to enable values.

6. The method according to claim 1 or 5, characterized in that, The main SoC sets the configuration value corresponding to the first slave SoC in the register of the multiplexer to an enable value in the following manner: Determine the channel identifier corresponding to the first slave SoC, where the channel identifier is used to uniquely identify the channels in the multiplexer, and the channels of the multiplexer are in one-to-one correspondence with its output terminals; Determine the register address corresponding to the first slave SoC according to the channel identifier corresponding to the first slave SoC, where the register address is used to identify the storage address of the configuration value corresponding to the first slave SoC in the register of the multiplexer or the address of the independent register corresponding to the first slave SoC in the multiplexer; The main SoC rewrites the configuration value corresponding to the first slave SoC to an enable value according to the register address corresponding to the first slave SoC; The main SoC verifies the status of the configuration value corresponding to the first slave SoC.

7. A domain controller, characterized in that, Including: A main SoC, at least one slave SoC, and a multiplexer. The main SoC is connected to the selection terminal of the multiplexer and one output terminal of the multiplexer. Each of the other output terminals of the multiplexer except the output terminal connected to the main SoC is connected to one of the slave SoCs. The input terminal of the multiplexer is externally connected to a camera. The domain controller is configured to implement the method according to any one of claims 1 to 6.

8. The domain controller according to claim 7, wherein The main SoC is connected to the selection terminal of the multiplexer through the Inter-Integrated Circuit bus I2C, and the main SoC is connected to one output terminal of the multiplexer through the Camera Serial Interface CSI. Each of the other output terminals of the multiplexer is connected to one of the slave SoCs through CSI.

9. The domain controller according to claim 7, wherein The main SoC is pairwise connected with at least one slave SoC.

10. A vehicle, characterized in that, The vehicle includes the domain controller according to any one of claims 7 to 9.

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