GaN device and manufacturing method thereof

Abstract

According to the GaN device and the manufacturing method thereof, a stable and low-resistance ohmic contact structure is achieved by additionally adding an in-situ growth highly-doped N + GaN layer and combining a method of growing an AlGaN barrier layer in a secondary epitaxial mode; the highly doped N + GaN layer is grown in situ, the contact potential barrier on one side of a semiconductor can be reduced, an etching process with high etching selection ratio is adopted during ohmic etching in the manufacturing method, and a low-damage stable ohmic contact structure can be obtained.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor manufacturing, and particularly to a GaN device and a manufacturing method thereof. Background Art

[0002] As a representative of the third-generation semiconductors, gallium nitride (GaN) materials have characteristics such as a wide bandgap, a high breakdown electric field strength, and a large saturated electron mobility, and have become the focus of research. GaN devices have a natural high electron density channel layer without injection, and the electron surface density is as high as 10 13 cm -2 , and theoretically, an extremely small contact resistance can be obtained. However, in the actual process flow, the etching depth, the metal layer thickness, and the annealing temperature will all affect the performance of the ohmic contact. For example, the ohmic etching stability is poor, the ohmic etching damage is serious, the surface contact resistance is high, and the injection scheme requires high-temperature annealing, which affects the quality of the epitaxial layer.

[0003] Therefore, how to obtain a stable and low-resistance ohmic contact structure is very crucial for the performance of GaN devices. Summary of the Invention

[0004] The technical problem to be solved by the present invention is to provide a GaN device and a manufacturing method thereof to achieve a stable and low-resistance ohmic contact structure.

[0005] To solve the above problems, the present invention provides a manufacturing method of a GaN device, including the following process steps: Provide a semiconductor substrate, and the semiconductor substrate includes a GaN layer as an epitaxial layer; Continuously grow an in-situ N+ GaN layer on the semiconductor substrate; Form a silicon oxide layer and perform back-etching to retain the silicon oxide in the source-drain ohmic contact region; Perform the growth of a secondary epitaxial layer; Remove the remaining retained silicon oxide; Perform the ohmic contact process of the source-drain region to form an output; Deposit a dielectric layer, perform photolithography and etching to open an etching window for the gate, and perform the deposition and etching processes of the gate to lead out the gate.

[0006] Further, a buffer layer is further included on the semiconductor substrate; the buffer layer is formed by ion implantation in the semiconductor substrate, and the epitaxial layer is formed on the buffer layer.

[0007] Further, the bottom layer material of the semiconductor substrate is a silicon substrate, or any one or several of a germanium-silicon substrate, sapphire, and silicon carbide.

[0008] Furthermore, the in-situ N+ GaN layer reduces the contact barrier on the semiconductor side in the ohmic contact structure.

[0009] Furthermore, the growth of the secondary epitaxial layer is carried out, and the grown secondary epitaxial layer is AlGaN.

[0010] Furthermore, the remaining silicon oxide that is retained is removed by etching the remaining silicon oxide with a highly selective etching process to reduce the impact on other film materials.

[0011] A GaN device includes: There is a GaN epitaxial layer on a semiconductor substrate, and an in-situ N+ GaN layer and a secondary epitaxial layer are sequentially arranged upward on the GaN epitaxial layer; The ohmic contact at the source and drain ends, the contact metal passes through the secondary epitaxial layer, and the semiconductor side of the contact surface is the in-situ N+ GaN layer.

[0012] Furthermore, the semiconductor substrate is a silicon substrate, and a buffer layer is also provided in the silicon substrate.

[0013] Furthermore, the secondary epitaxial layer is AlGaN.

[0014] The GaN device and its manufacturing method according to the present invention achieve a stable and low-resistance ohmic contact structure by adding a layer of in-situ grown highly doped N+ GaN layer and combining with the method of secondary epitaxial growth of an AlGaN barrier layer: (1) The in-situ grown highly doped N+ GaN layer can reduce the contact barrier on the semiconductor side; (2) The ohmic etching selectivity is relatively high, and a stable ohmic contact structure with low damage can be obtained. Description of the Drawings

[0015] Figure 1 is a schematic cross-sectional structure diagram of the GaN device of the present invention.

[0016] Figures 2 to 7 is a schematic diagram of each process step completed by the present invention.

[0017] Figure 8 is a process flow chart of the present invention. Description of the Reference Numerals

[0018] 1 is the semiconductor substrate, 2 is the buffer layer, 3 is the GaN epitaxial layer, 4 is the in-situ N+ GaN layer, 5 is the secondary epitaxial layer (AlGaN), 6 is the source-drain ohmic contact structure (metal end), 7 is the dielectric layer, 8 is the gate ohmic contact structure (metal end), and 9 is the silicon oxide. Detailed Embodiments

[0019] The specific embodiments of the present invention are given below in conjunction with the accompanying drawings to clearly and completely describe the technical solutions in the present invention. However, the present invention is not limited to the following embodiments. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all of the embodiments. According to the following description and the claims, the advantages and features of the present invention will be clearer. It should be noted that the accompanying drawings are all in a very simplified form and use non-precise ratios, only for the purpose of facilitating and clearly assisting in explaining the purpose of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of the present invention.

[0020] The present invention can be implemented in different forms and should not be construed as limited to the embodiments presented herein. On the contrary, providing these embodiments will make the disclosure thorough and complete, and will fully convey the scope of the present invention to those skilled in the art. In the drawings, for clarity, the dimensions and relative dimensions of layers and regions may be exaggerated, and the same reference numerals throughout the drawings denote the same elements. In the description of the present application, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the present application. In addition, the terms "first", "second", "third" are only used for descriptive purposes and cannot be construed as indicating or implying relative importance.

[0021] In order to obtain a stable and low-resistance ohmic contact structure, the present invention provides a GaN device, such as Figure 1 shown, having a GaN epitaxial layer on a silicon substrate. An in-situ N+ GaN layer and a secondary epitaxial layer AlGaN are sequentially provided upward on the GaN epitaxial layer. The substrate material is not limited to silicon and can also be other conventional semiconductor substrates, such as silicon germanium, etc. The device is mainly formed on the GaN layer.

[0022] The silicon substrate also has a buffer layer formed by ion implantation. The GaN epitaxial layer is formed on the buffer layer. The buffer layer can play roles such as balancing stress.

[0023] The ohmic contacts at the source and drain ends of the device are in contact with the in-situ N+GaN layer, which is different from the conventional direct contact with the GaN epitaxial layer. The semiconductor side of the ohmic contact of the present invention is the in-situ N+GaN layer, and the in-situ N+GaN layer can reduce the contact barrier on the semiconductor side compared with the conventional GaN epitaxial layer. The in-situ N+GaN layer has a high electron mobility, electrons can move quickly in the N+GaN material, and has a low ohmic contact resistance; since the bandgap width of GaN is smaller than that of AlGaN, the electron barrier is low, and the ohmic resistance grown in the GaN channel layer can reduce the ohmic contact resistance and reduce the switching loss.

[0024] An embodiment of the present invention provides a manufacturing method of a GaN device, including the following process steps: Provide a silicon substrate, such as Figure 2 As shown, there is a buffer layer in the silicon substrate, and a GaN layer is formed on the surface of the silicon substrate through the GaN epitaxial layer growth process. The buffer layer can optimize the electric field distribution and improve the breakdown voltage. The lattice mismatch and the difference in thermal expansion coefficient between silicon and GaN are relatively large, and stress needs to be relieved through the buffer layer and special epitaxial techniques to prevent cracks and defects. Common methods include: AlN (aluminum nitride) nucleation layer: Deposit a 20-nm-thick AlN layer at 800 °C as a template for GaN growth to reduce lattice mismatch.

[0025] GaN buffer layer: Grow an Fe-doped GaN layer (such as 2 μm thick) at 700 °C to further reduce stress and suppress leakage.

[0026] The GaN epitaxial layer growth process can adopt the common MOCVD method (metalorganic chemical vapor deposition), using TMGa (trimethylgallium) as the gallium source and NH3 as the nitrogen source to grow a high-quality GaN layer at a high temperature (700 - 1000 °C).

[0027] Continue to grow an in-situ N+GaN layer on the semiconductor substrate. As Figure 3 shown.

[0028] Form a silicon oxide layer on the in-situ N+GaN layer and perform re-etching to retain the silicon oxide in the ohmic contact regions of the source and drain ends.

[0029] Perform the growth of the secondary epitaxial layer to form an AlGaN layer as the ohmic contact barrier layer.

[0030] Use an etching process with a high etching selectivity to remove the remaining retained silicon oxide. After the silicon oxide is removed, the source-drain ohmic contact regions are revealed, and the bottom is the in-situ N+GaN layer. As Figure 6As shown. The etching process with a high etching selectivity between the AlGaN layer and silicon oxide can completely remove the silicon oxide while reducing the damage to other ohmic contact structures, resulting in a more stable ohmic contact structure.

[0031] Perform the ohmic contact process for the source-drain ohmic contact region to form an ohmic contact structure, as Figure 7 shown. Among them, the metal contacts the in-situ N+ GaN layer in the source-drain ohmic contact region.

[0032] Deposit a dielectric layer, such as a silicon oxide layer. Lithography and etching are used to open the etching window for the gate, and the deposition and etching processes for the gate are carried out. Finally, it is completed as Figure 1 shown.

[0033] The in-situ N+ GaN layer described above reduces the contact barrier on the semiconductor side in the ohmic contact structure.

[0034] The GaN device and its manufacturing method according to the present invention achieve a stable and low-resistance ohmic contact structure by adding a layer of in-situ grown highly doped N+ GaN layer and combining the method of secondary epitaxial growth of the AlGaN barrier layer: (1) The in-situ grown highly doped N+ GaN layer can reduce the contact barrier on the semiconductor side; (2) The ohmic etching uses an etching process with a relatively high selectivity, and a low-damage and stable ohmic contact structure can be obtained.

[0035] Compared with the traditional process or structure, the present invention realizes a stable and low-resistance ohmic contact structure by the method of secondary epitaxial growth of the AlGaN barrier layer. It can be implemented by using ordinary epitaxial processes, without etching, without damage, and with a low surface contact resistance, having significant advantages.

[0036] The above are only the preferred embodiments of the present invention and are not used to limit the present invention. For those skilled in the art, the present invention can have various changes and modifications. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A manufacturing method of a GaN device, characterized in that: It includes the following process steps: Provide a semiconductor substrate, which is a GaN substrate or a GaN layer is included as an epitaxial layer on other semiconductor substrates; Continuously grow an in-situ N+GaN layer on the GaN layer; Form a silicon oxide layer and perform etch-back. After etch-back, the silicon oxide in the source-drain ohmic contact region is retained, and the silicon oxide in other regions is removed; Perform the growth of the secondary epitaxial layer; Remove the remaining retained silicon oxide; Perform the ohmic contact process for the source-drain region to form an output; Deposit a dielectric layer, perform photolithography and etching to open the etching window for the gate, and perform the deposition and etching processes for the gate to form the gate.

2. The manufacturing method of the GaN device according to claim 1, characterized in that: A buffer layer is further included on the semiconductor substrate; the buffer layer is formed by ion implantation in the semiconductor substrate, and the epitaxial layer is formed on the buffer layer.

3. The manufacturing method of the GaN device according to claim 1, characterized in that: The bottom material of the semiconductor substrate is a silicon substrate, or any one or several of a silicon-germanium substrate, sapphire, and silicon carbide.

4. The manufacturing method of the GaN device according to claim 1, characterized in that: The in-situ N+GaN layer reduces the contact barrier on the semiconductor side in the ohmic contact structure.

5. The manufacturing method of the GaN device according to claim 1, characterized in that: For the growth of the secondary epitaxial layer, the grown secondary epitaxial layer is AlGaN.

6. The manufacturing method of the GaN device according to claim 1, characterized in that: For the removal of the remaining retained silicon oxide, a highly selective etching process is used to etch and remove the remaining retained silicon oxide to reduce the impact on other film materials.

7. A GaN device, characterized in that: The GaN device includes: There is a GaN epitaxial layer on the semiconductor substrate, and an in-situ N+GaN layer and a secondary epitaxial layer are sequentially upward on the GaN epitaxial layer; The ohmic contact at the source-drain end, the contact metal passes through the secondary epitaxial layer, and the semiconductor side of the contact surface is the in-situ N+GaN layer.

8. The GaN device according to claim 7, characterized in that: The semiconductor substrate is a silicon substrate, and a buffer layer is also provided in the silicon substrate.

9. The GaN device according to claim 7, wherein: The secondary epitaxial layer is AlGaN.

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