Area array detector reading circuit for detecting pulse laser signal

Abstract

The invention discloses an area array detector reading circuit for detecting pulse laser signals. The area array detector reading circuit for detecting the pulse laser signal comprises a number register unit array and an area array reading circuit. The signal registering unit array comprises a plurality of signal registering units, and each signal registering unit is suitable for being connected to a photosensitive element of the area array detector. The area array reading circuit is connected to the signal register unit array and is configured to control data output of the signal register units through array address data. The signal register unit comprises an input circuit, an integrating circuit, a voltage monitoring circuit and a sampling circuit. The integrating circuit is connected in series with the input circuit, and a voltage monitoring point is formed between the integrating circuit and the input circuit. According to the area array detector reading circuit for detecting the pulse laser signals, a voltage monitoring mechanism is designed, the pulse signals can be found in time, and the sampling circuit is triggered for sampling. Therefore, the response speed can be ensured.

Description

Technical Field

[0001] This application relates to the field of detectors, and specifically to a readout circuit for a planar array detector that detects pulsed laser signals. Background Art

[0002] In the practical application of photodetectors, the response speed is an important consideration. In some application scenarios, for example, laser warning and laser guidance, high requirements are placed on detection real-time performance.

[0003] In addition, in some application scenarios, the photosensitive elements of photodetectors are prone to being interfered by ambient light or other background light, resulting in a decrease in detection accuracy.

[0004] Therefore, in view of the problems existing in the practical application of the above-mentioned photodetectors, corresponding solutions need to be proposed. Summary of the Invention

[0005] One advantage of this application is to provide a readout circuit for a planar array detector that detects pulsed laser signals. Among them, the readout circuit for the planar array detector that detects pulsed laser signals can detect pulsed laser signals in a timely manner and perform sampling to ensure the response speed.

[0006] One advantage of this application is to provide a readout circuit for a planar array detector that detects pulsed laser signals. Among them, the readout circuit for the planar array detector that detects pulsed laser signals can convert and output the pulsed laser signals in a timely manner.

[0007] One advantage of this application is to provide a readout circuit for a planar array detector that detects pulsed laser signals. Among them, the readout circuit for the planar array detector that detects pulsed laser signals is designed with an indication signal output line, so that any unit and any time of the readout circuit for the planar array detector that detects pulsed laser signals can start the backend processing system, realizing real-time processing of planar array detection of laser signals.

[0008] One advantage of this application is to provide a readout circuit for a planar array detector that detects pulsed laser signals. Among them, after single sampling by the signal storage unit of the readout circuit for the planar array detector that detects pulsed laser signals, the charge accumulated in its integration capacitor can be released in a timely manner, so that the signal storage unit can promptly enter the next pulse detection, and to a certain extent, improves the detection ability of the planar array detector for high-repetition-rate laser signals.

[0009] According to one aspect of this application, there is provided a readout circuit for a planar array detector that detects pulsed laser signals, which includes:

[0010] An array of signal storage units, including a plurality of signal storage units, where each signal storage unit is adapted to be connected to a photosensitive element of a planar array detector;

[0011] A plane array reading circuit, connected to the signal storage unit array, is configured to control the data output of the signal storage unit through array address data;

[0012] Among them, the signal storage unit includes:

[0013] An input circuit, configured to receive a pulse signal from a photosensitive element;

[0014] An integrating circuit, connected in series with the input circuit, and forming a voltage monitoring point with the input circuit, includes an integrating capacitor and a switching tube; wherein, the switching tube is connected in parallel with the integrating capacitor;

[0015] A voltage monitoring circuit, including a voltage comparator and a timer; one end of the voltage comparator is connected to the voltage monitoring point, configured to compare the voltage at the voltage monitoring point with a preset voltage threshold, and trigger the counter to start timing when the voltage at the voltage monitoring point is greater than or equal to the preset voltage threshold;

[0016] A sampling circuit, one end of which is connected to the voltage monitoring point; used to collect the voltage at the voltage monitoring point;

[0017] Among them, the timer is connected to the switching tube, and is configured to trigger the sampling circuit to sample the voltage at the voltage monitoring point at a preset first time after starting; and turn on the switching tube at a preset second time after the voltage sampling ends, so that the integrating capacitor discharges until the voltage at the voltage monitoring point drops below the preset voltage threshold.

[0018] In an embodiment of the plane array detector readout circuit for detecting pulsed laser signals according to the present application, when the voltage at the voltage monitoring point drops below the preset voltage threshold, the voltage comparator outputs a low level, and the timing data of the timer is cleared.

[0019] In an embodiment of the plane array detector readout circuit for detecting pulsed laser signals according to the present application, the input circuit includes a DC blocking element; the DC blocking element is configured to isolate the DC signal from the photosensitive element.

[0020] In an embodiment of the plane array detector readout circuit for detecting pulsed laser signals according to the present application, the DC blocking element is implemented as a capacitor.

[0021] In an embodiment of the plane array detector readout circuit for detecting pulsed laser signals according to the present application, the input circuit further includes a bias resistor; the bias resistor is connected in series with the DC blocking element and is configured to provide a bias voltage to the photosensitive element.

[0022] In an embodiment of the area array detector readout circuit for detecting pulsed laser signals according to the present application, the sampling circuit includes an analog-to-digital converter and a register; the register is connected in series to the analog-to-digital converter.

[0023] In an embodiment of the area array detector readout circuit for detecting pulsed laser signals according to the present application, the signal storage unit further includes a strobe signal receiving circuit; the strobe signal transmission unit is connected to the register and is also connected to the row strobe signal line and the column strobe signal line.

[0024] In an embodiment of the area array detector readout circuit for detecting pulsed laser signals according to the present application, the area array readout circuit is further configured to: generate a row strobe signal and a column strobe signal based on the row address and column address of the array address data, determine the target signal storage unit through the row strobe signal and the column strobe signal, and control the register of the target signal storage unit to output data to the data output line.

[0025] Through the understanding of the subsequent description and the drawings, the further objects and advantages of the present application will be fully reflected. Description of the Drawings

[0026] By describing the embodiments of the present application in more detail in conjunction with the drawings, the above and other objects, features, and advantages of the present application will become more obvious. The drawings are used to provide a further understanding of the embodiments of the present application and constitute a part of the specification. They are used together with the embodiments of the present application to explain the present application and do not constitute a limitation to the present application. In the drawings, the same reference numerals generally represent the same components or steps.

[0027] Figure 1 The structural block diagram of the area array detector readout circuit for detecting pulsed laser signals is illustrated.

[0028] Figure 2 The circuit diagram of the signal storage unit of the area array detector readout circuit for detecting pulsed laser signals according to an embodiment of the present application is illustrated.

[0029] Figure 3 The working timing diagram of the circuit of the signal storage unit of the area array detector readout circuit for detecting pulsed laser signals according to an embodiment of the present application is illustrated.

[0030] Figure 4 The working mechanism diagram of the area array readout circuit of the area array detector readout circuit for detecting pulsed laser signals according to an embodiment of the present application is illustrated. Detailed Embodiments

[0031] Hereinafter, example embodiments according to the present application will be described in detail with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all embodiments of the present application. It should be understood that the present application is not limited by the example embodiments described herein.

[0032] It can be understood that the term "a" should be understood as "at least one" or "one or more". That is, in one embodiment, the number of an element can be one, while in other embodiments, the number of the element can be multiple. The term "a" should not be understood as a limitation on the number. "Multiple" means greater than or equal to two.

[0033] Although ordinal numbers such as "first", "second", etc. will be used to describe various components, those components are not limited herein. The term is only used to distinguish one component from another. For example, the first component can be referred to as the second component, and similarly, the second component can also be referred to as the first component, without departing from the teachings of the concept of the present application. The term "and / or" used herein includes any and all combinations of one or more of the associated listed items.

[0034] The terms used herein are for the purpose of describing various embodiments only and are not intended to be limiting. As used herein, the singular forms also include the plural forms unless the context clearly indicates otherwise. Additionally, it will be understood that the terms "comprising" and / or "having" when used in this specification specify the presence of the stated features, numbers, operations, components, elements, or combinations thereof, without excluding the presence or addition of one or more other features, numbers, operations, components, elements, or combinations thereof.

[0035] As Figures 1 to 4 shown, a planar array detector readout circuit for detecting a pulsed laser signal according to an embodiment of the present application is illustrated. The planar array detector readout circuit for detecting the pulsed laser signal can be applied to scenarios such as laser warning and laser guidance. The planar array detector readout circuit for detecting the pulsed laser signal includes a signal storage unit array A1 and a planar array readout circuit A2. The signal storage unit array A1 includes a plurality of signal storage units A11, where each signal storage unit A11 is adapted to be connected to a photosensitive element of the planar array detector. The planar array readout circuit A2 is connected to the signal storage unit array A1 and is configured to control the data output of the signal storage unit A11 through array address data. The photosensitive element refers to a single pixel of the planar array detector.

[0036] Specifically, the signal storage unit A11 includes an input circuit A111, an integration circuit A112, a voltage monitoring circuit A113, and a sampling circuit A114. The input circuit A111 is adapted to be connected to a photosensitive element and is configured to receive a pulse signal from the photosensitive element. When a pulse signal is received from the photosensitive element, the pulse signal is transmitted to the input circuit A111. The integration circuit A112 is connected in series with the input circuit A111, and a voltage monitoring point O is formed between the integration circuit A112 and the input circuit A111. The integration circuit A112 includes an integration capacitor A1121 and a switching transistor A1122; wherein, the switching transistor A1122 is connected in parallel with the integration capacitor A1121. The voltage monitoring circuit A113 includes a voltage comparator and a timer; one end of the voltage comparator is connected to the voltage monitoring point O and is configured to compare the voltage of the voltage monitoring point O with a preset voltage threshold, and when the voltage of the voltage monitoring point O is greater than or equal to the preset voltage threshold, the counter is triggered to start timing. One end of the sampling circuit A114 is connected to the voltage monitoring point O; it is used to collect the voltage of the voltage monitoring point O. The timer is connected to the switching transistor A1122 and is configured to trigger the sampling circuit A114 to sample the voltage of the voltage monitoring point O at a preset first time after starting; and connect the switching transistor A1122 at a preset second time after the voltage sampling is completed, so that the integration capacitor A1121 discharges until the voltage of the voltage monitoring point O drops below the preset voltage threshold, and can be reduced to 0. When the voltage of the voltage monitoring point O drops below the preset voltage threshold, the voltage comparator resumes outputting a low level, the timing data of the timer is cleared, the signal storage unit A11 completes photoelectric conversion, realizes pulse detection, returns to the initial state, waits for the next pulse detection, and performs the next photoelectric conversion.

[0037] It is worth mentioning that through the cooperation of the comparator and the timer in this application, the pulse signal can be detected in time by monitoring and comparing the voltage of the voltage monitoring point O, and the sampling circuit A114 is triggered to perform sampling to ensure the response speed. It can also release the charge accumulated in the integration capacitor A1121 in time after the sampling is completed, so that the signal storage unit A11 can turn to the next pulse detection in time, thereby improving the detection ability of the area array detector for high-repetition-rate laser signals to a certain extent.

[0038] Specifically, the input circuit A111 includes a DC-blocking element A1111; the DC-blocking element A1111 is configured to isolate the DC signal from the photosensitive element. In this way, the DC interference signal input by the photosensitive element cannot enter the integrating capacitor A1121, while the pulse signal can pass through the integrating capacitor A1121 smoothly, effectively eliminating the background interference problem in applications such as laser warning and laser guidance. When the photosensitive element receives a pulsed laser signal, the photosensitive element outputs a corresponding pulsed current signal i, which is coupled to the integrating capacitor A1121 through the input circuit A111, and the pulsed current signal i accumulates in the integrating capacitor A1121, causing the voltage at the voltage monitoring point O to increase.

[0039] In an embodiment of the present application, the DC-blocking element A1111 is implemented as a capacitor. It should be understood that DC signal isolation can also be achieved in other ways, for example, an AC-coupled filter circuit, a digital filter, a differential amplifier, etc.

[0040] In an embodiment of the present application, the input circuit A111 further includes a bias resistor A1112; the bias resistor A1112 is connected in series with the DC-blocking element A1111 and is configured to provide a bias voltage to the photosensitive element.

[0041] Specifically, one end of the DC-blocking element A1111 is adapted to be connected to the photosensitive element, and the other end is connected to the bias resistor A1112. The positive pole of the bias resistor A1112 is connected to the DC-blocking element A1111, and the negative pole is connected to the input ends of the integrating capacitor A1121 and the switching transistor A1122. The input circuit A111 and the integrating circuit A112 are connected in parallel with the equivalent resistance of the photosensitive element. One end of the integrating capacitor A1121 is connected to the bias resistor A1112, and the other end is grounded.

[0042] When the switching transistor A1122 is implemented as an N-type metal oxide semiconductor field effect transistor (MOSFET), the switching transistor A1122 has a drain, a source, and a gate; the input end of the switching transistor A1122 is the drain of the MOSFET.

[0043] The bias voltage is a necessary condition for the operation of the photosensitive element, which can adjust the operating point of the photosensitive element so that it responds to light signals within a specific voltage range. The magnitude of the bias resistor A1112 will affect the sensitivity and response speed of the photosensitive element. Usually, an appropriate resistance value needs to be selected according to the characteristics of the photosensitive element and the application scenario.

[0044] The bias resistor A1112, together with components such as the photosensitive element and the power supply, forms a closed-loop circuit to ensure that current can flow in the circuit, so as to ensure that the photosensitive element can work normally and output signals.

[0045] When the photosensitive element receives an optical signal, a pulsed current signal i is generated. The pulsed current signal i forms a voltage signal through the bias resistor A1112 for subsequent circuit processing. In other words, the closed-loop circuit composed of the bias resistor A1112, the photosensitive element, the power supply and other components can convert the pulsed current signal i into an electrical signal.

[0046] As described above, when the photosensitive element receives a pulsed laser signal, the pulsed current signal i accumulates in the integration capacitor A1121, causing the voltage at the voltage monitoring point O to increase. When the voltage comparator monitors that the voltage at the voltage monitoring point O is greater than or equal to the preset voltage threshold, the voltage of the voltage comparator changes from low level to high level, triggering the counter to start timing. In this way, after the photosensitive element receives the pulsed laser signal, the voltage comparator can detect it in time and trigger voltage sampling through the timer, realizing the real-time detection of the pulsed laser signal by the area array detector.

[0047] The design of the output line of the indication signal (Signal, Sig) of the area array detector readout circuit for detecting pulsed laser signals enables any unit of the area array detector readout circuit for detecting pulsed laser signals to start the backend processing system in time when receiving a pulsed laser signal at any time, realizing the real-time processing of area array detection of laser signals.

[0048] The voltage comparator is connected to the output line of the indication signal (Signal, Sig), is adapted to be connected to the backend processing system, and the signal it outputs can provide a prompt for the backend processing system; for example, the end signal output of the voltage comparator indicates that the signal storage unit A11 has completed data storage, and the backend processing system can start reading the data stored in the signal storage unit A11.

[0049] In an embodiment of the present application, the voltage comparator is implemented as an operational amplifier. In other embodiments, the voltage comparator can also be implemented in other ways, for example, a dedicated voltage comparator chip, a digital voltage comparator, an analog circuit.

[0050] The sampling circuit A114 includes an analog-to-digital converter and a register; the register is connected in series with the analog-to-digital converter. The analog-to-digital converter is configured to perform voltage sampling on the voltage monitoring point O and store the sampling result in the analog-to-digital converter.

[0051] Specifically, one end of the analog-to-digital converter is connected to the voltage monitoring point O, and the other end is connected to the register. The analog-to-digital converter is used to implement the conversion between analog signals and digital signals. After the timer is started, the analog-to-digital converter is triggered at a preset first time to sample the voltage at the voltage monitoring point O, and the sampling result is stored in the analog-to-digital converter.

[0052] The register is connected to the data (DATA, Dat) output line. The timer, the register, and the analog-to-digital converter are respectively connected to the clock (CKL) line. The input circuit A111 and the integration circuit A112 are connected in parallel with the equivalent resistance of the photosensitive element.

[0053] The signal storage unit A11 further includes a strobe signal receiving circuit A115; the strobe signal transmission unit is connected to the register and is also connected to the row strobe signal line and the column strobe signal line.

[0054] The area array reading circuit A2 is further configured to: generate a row strobe signal and a column strobe signal based on the row address and the column address of the array address data, determine the target signal storage unit A11 through the row strobe signal and the column strobe signal, and control the register of the target signal storage unit A11 to output data to the data output line through the common output port.

[0055] The signal storage unit A11 at the intersection of the row strobe signal line and the column strobe signal line corresponding to the row strobe signal and the column strobe signal is the target signal storage unit A11. In other words, the row number of the target signal storage unit A11 is consistent with the row address corresponding to the row strobe signal, and the column sequence of the target signal storage unit A11 is consistent with the column address corresponding to the column strobe signal.

[0056] In summary, the area array detector readout circuit for detecting pulsed laser signals is described. The area array detector readout circuit for detecting pulsed laser signals can detect pulsed laser signals in a timely manner, perform sampling, and ensure the response speed.

[0057] The above description of the present application and its implementation manners is not restrictive. What is shown in the drawings is only one of the implementation manners of the present application, and the actual structure is not limited thereto. Generally speaking, if those of ordinary skill in the art are inspired by it and design similar structural manners and embodiments without creative efforts without departing from the creative concept of the present application, they shall fall within the protection scope of the present application.

Claims

1. A readout circuit for a planar array detector detecting pulsed laser signals, characterized in that Comprising: A signal storage unit array including a plurality of signal storage units, wherein each signal storage unit is adapted to be connected to a photosensitive element of an area array detector; An area array reading circuit connected to the signal storage unit array and configured to control the data output of the signal storage unit through array address data; Wherein, the signal storage unit includes: An input circuit configured to receive a pulse signal from a photosensitive element; An integration circuit connected in series to the input circuit and forming a voltage monitoring point therebetween, including an integration capacitor and a switching transistor; wherein the switching transistor is connected in parallel to the integration capacitor; A voltage monitoring circuit including a voltage comparator and a timer; one end of the voltage comparator is connected to the voltage monitoring point and is configured to compare the voltage of the voltage monitoring point with a preset voltage threshold, and trigger the counter to start timing when the voltage of the voltage monitoring point is greater than or equal to the preset voltage threshold; A sampling circuit having one end connected to the voltage monitoring point; for collecting the voltage of the voltage monitoring point; Wherein, the timer is connected to the switching transistor and is configured to trigger the sampling circuit to sample the voltage of the voltage monitoring point at a preset first time after startup; and turn on the switching transistor at a preset second time after the voltage sampling ends, so that the integration capacitor discharges until the voltage of the voltage monitoring point drops below the preset voltage threshold.

2. The area array detector readout circuit for detecting pulsed laser signals according to claim 1, wherein After the voltage of the voltage monitoring point drops below the preset voltage threshold, the voltage comparator outputs a low level and the timing data of the timer is cleared.

3. The area array detector readout circuit for detecting pulsed laser signals according to claim 2, characterized in that, The input circuit includes a DC blocking element; the DC blocking element is configured to block the DC signal from the photosensitive element.

4. The area array detector readout circuit for detecting pulsed laser signals according to claim 3, wherein The DC blocking element is implemented as a capacitor.

5. The area array detector readout circuit for detecting pulsed laser signals according to claim 3, wherein The input circuit further includes a bias resistor; the bias resistor is connected in series to the DC blocking element and is configured to provide a bias voltage to the photosensitive element.

6. The area array detector readout circuit for detecting pulsed laser signals according to claim 1, characterized in that, The sampling circuit includes an analog-to-digital converter and a register; the register is connected in series to the analog-to-digital converter.

7. The area array detector readout circuit for detecting pulsed laser signals according to claim 6, characterized in that, The signal storage unit further includes a strobe signal receiving circuit; the strobe signal transmission unit is connected to the register and is connected to a row strobe signal line and a column strobe signal line.

8. The area array detector readout circuit for detecting pulsed laser signals according to claim 7, characterized in that, The area array reading circuit is further configured to: generate a row strobe signal and a column strobe signal based on the row address and column address of the array address data, and determine a target signal storage unit through the row strobe signal and the column strobe signal, and control the register of the target signal storage unit to output data to a data output line.

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