A surface array detector readout circuit for a probe pulse laser signal

Abstract

The application discloses a kind of face array detector readout circuit of probe pulse laser signal.The face array detector readout circuit of probe pulse laser signal includes: signal register unit array and face array reading circuit.The signal register unit array includes multiple signal register units, wherein each signal register unit is adapted to be connected to a photosensitive element of face array detector.The face array reading circuit is connected to the signal register unit array, configured to control the data output of the signal register unit by array address data.The signal register unit includes input circuit, integration circuit, voltage monitoring circuit and sampling circuit.The integration circuit is connected in series with the input circuit, and a voltage monitoring point is formed between the input circuit and the integration circuit.The face array detector readout circuit of probe pulse laser signal designs voltage monitoring mechanism, can discover pulse signal in time, and trigger the sampling circuit to sample.In this way, response speed can be guaranteed.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of detectors, in particular to a kind of face array detector readout circuit for detecting pulsed laser signal. BACKGROUND

[0002] In the practical application of photoelectric detector, response speed is an important consideration factor.In some application scenarios, for example, laser warning, laser guidance, the real-time requirement of detection is higher.

[0003] In addition, in some application scenarios, the photosensitive element of photoelectric detector is susceptible to ambient light or other background light interference, resulting in detection accuracy decline.

[0004] Therefore, in view of the problems existing in the practical application of photoelectric detector, corresponding solutions need to be put forward SUMMARY

[0005] An advantage of the present application is to provide a kind of face array detector readout circuit for detecting pulsed laser signal, wherein the face array detector readout circuit for detecting pulsed laser signal can find pulsed laser signal in time and carry out sampling, guarantee response speed.

[0006] An advantage of the present application is to provide a kind of face array detector readout circuit for detecting pulsed laser signal, wherein the face array detector readout circuit for detecting pulsed laser signal can convert pulsed laser signal in time and output.

[0007] An advantage of the present application is to provide a kind of face array detector readout circuit for detecting pulsed laser signal, wherein the face array detector readout circuit for detecting pulsed laser signal is designed to indicate signal output line, so that any unit of the face array detector readout circuit for detecting pulsed laser signal starts back-end processing system at any time, realizes real-time processing of laser signal face array detection.

[0008] An advantage of the present application is to provide a kind of face array detector readout circuit for detecting pulsed laser signal, wherein the face array detector readout circuit for detecting pulsed laser signal can release the charge accumulated by integrator capacitance in time after single sampling of its signal storage unit, so that the signal storage unit can turn into next pulse detection in time, to a certain extent, improve the detection ability of face array detector to high repetition rate laser signal.

[0009] According to one aspect of the present application, a kind of face array detector readout circuit for detecting pulsed laser signal is provided, which includes:

[0010] Signal storage unit array, including a plurality of signal storage units, wherein each signal storage unit is adapted to be connected to a photosensitive element of face array detector;

[0011] a surface array reading circuit connected to the signal storage cell array, configured to control data output of the signal storage cells through array address data;

[0012] The signal storage cell comprises:

[0013] an input circuit configured to receive a pulse signal from the photosensitive element;

[0014] an integration circuit connected in series to the input circuit and forming a voltage monitoring point with the input circuit, comprising an integration capacitor and a switch tube; wherein the switch tube is connected in parallel to the integration capacitor;

[0015] a voltage monitoring circuit comprising a voltage comparator and a timer; one end of the voltage comparator is connected to the voltage monitoring point and configured to compare the voltage at the voltage monitoring point with a preset voltage threshold, and trigger the timer to start timing when the voltage at the voltage monitoring point is greater than or equal to the preset voltage threshold;

[0016] a sampling circuit connected to the voltage monitoring point; for collecting the voltage at the voltage monitoring point;

[0017] The timer is connected to the switch tube and configured to trigger the sampling circuit to sample the voltage at the voltage monitoring point at a preset first time after starting; and connect the switch tube at a preset second time after the voltage sampling is completed, so that the integration capacitor is discharged until the voltage at the voltage monitoring point drops below the preset voltage threshold.

[0018] In an embodiment of the surface array detector readout circuit for detecting a pulsed laser signal according to the present application, when the voltage at the voltage monitoring point drops below the preset voltage threshold, the voltage comparator outputs a low level, and the timer clears the timing data.

[0019] In an embodiment of the surface array detector readout circuit for detecting a pulsed laser signal according to the present application, the input circuit comprises a direct current isolation element; the direct current isolation element is configured to isolate a direct current signal from the photosensitive element.

[0020] In an embodiment of the surface array detector readout circuit for detecting a pulsed laser signal according to the present application, the direct current isolation element is implemented as a capacitor.

[0021] In an embodiment of the surface array detector readout circuit for detecting a pulsed laser signal according to the present application, the input circuit further comprises a bias resistor; the bias resistor is connected in series to the direct current isolation element and configured to provide a bias voltage to the photosensitive element.

[0022] In an embodiment of the readout circuit of the area array detector for detecting pulsed laser signal according to the present application, the sampling circuit comprises an analog-to-digital converter and a register; the register is connected in series to the analog-to-digital converter.

[0023] In an embodiment of the readout circuit of the area array detector for detecting pulsed laser signal according to the present application, the signal storage unit further comprises a strobe signal receiving circuit; the strobe signal transmission unit is connected to the register, and is connected to a row strobe signal line and a column strobe signal line.

[0024] In an embodiment of the readout circuit of the area array detector for detecting pulsed laser signal according to the present application, the area array reading circuit is further configured to generate a row strobe signal and a column strobe signal based on a row address and a column address of the array address data, determine a target signal storage unit through the row strobe signal and the column strobe signal, and control the register of the target signal storage unit to output data to a data output line.

[0025] The further objects and advantages of the present application will be more readily understood from the following description, with reference to the accompanying drawings, in which: BRIEF DESCRIPTION OF DRAWINGS

[0026] The above and other objects, features and advantages of the present application will become more apparent from the following description when taken in conjunction with the accompanying drawings, in which:

[0027] Fig. 1 FIG. 1 shows a structural block diagram of a readout circuit of an area array detector for detecting pulsed laser signal according to an embodiment of the present application.

[0028] Fig. 2 FIG. 2 shows a circuit diagram of a signal storage unit of the readout circuit of the area array detector for detecting pulsed laser signal according to an embodiment of the present application.

[0029] Fig. 3 FIG. 3 shows a working timing diagram of the circuit of the signal storage unit of the readout circuit of the area array detector for detecting pulsed laser signal according to an embodiment of the present application.

[0030] Fig. 4 FIG. 4 shows a working mechanism diagram of an area array reading circuit of the readout circuit of the area array detector for detecting pulsed laser signal according to an embodiment of the present application. DETAILED DESCRIPTION

[0031] Hereinafter, exemplary embodiments according to this application will be described in detail with reference to the accompanying drawings. Obviously, the described embodiments are merely some embodiments of this application, and not all embodiments of this application. It should be understood that this application is not limited to the exemplary embodiments described herein.

[0032] It is understood that the term "a" should be understood as "at least one" or "one or more," meaning that in one embodiment, the number of an element can be one, while in another embodiment, the number of the element can be multiple. The term "a" should not be construed as a limitation on the quantity. "Multiple" means two or more.

[0033] While ordinal numbers such as “first,” “second,” etc., will be used to describe various components, there is no limitation on which components are used herein. The term is used only to distinguish one component from another. For example, a first component may be referred to as a second component, and similarly, a second component may be referred to as a first component, without departing from the teachings of this application. The term “and / or” as used herein includes any and all combinations of one or more of the associated listed items.

[0034] The terminology used herein is for the purpose of describing various embodiments only and is not intended to be limiting. As used herein, the singular form also includes the plural form, unless the context clearly indicates otherwise. It will also be understood that the terms “comprising” and / or “having” as used in this specification specify the presence of the described features, numbers, operations, components, elements or combinations thereof, without excluding the presence or addition of one or more other features, numbers, operations, components, elements or combinations thereof.

[0035] like Figs. 1 to 4 As shown, a readout circuit for a pulsed laser signal detector according to an embodiment of this application is illustrated. This readout circuit can be applied to scenarios such as laser alarm and laser guidance. The readout circuit includes a signal register unit array A1 and a readout circuit A2. The signal register unit array A1 includes multiple signal register units A11, each of which is adapted to be connected to a photosensitive element of the area array detector. The readout circuit A2 is connected to the signal register unit array A1 and is configured to control the data output of the signal register units A11 via array address data. The photosensitive element refers to a single pixel of the area array detector.

[0036] Specifically, the signal storage unit A11 includes an input circuit A111, an integration circuit A112, a voltage monitoring circuit A113 and a sampling circuit A114. The input circuit A111 is adapted to be connected to the photosensitive element and configured to receive the pulse signal from the photosensitive element. The pulse signal is transmitted to the input circuit A111 after being received from the photosensitive element. The integration circuit A112 is connected in series to the input circuit A111 and forms a voltage monitoring point O with the input circuit A111. The integration circuit A112 includes an integration capacitor A1121 and a switch tube A1122, wherein the switch tube A1122 is connected in parallel to the integration capacitor A1121. The voltage monitoring circuit A113 includes a voltage comparator and a timer. One end of the voltage comparator is connected to the voltage monitoring point O and configured to compare the voltage of the voltage monitoring point O with a preset voltage threshold value, and trigger the counter to start timing when the voltage of the voltage monitoring point O is greater than or equal to the preset voltage threshold value. One end of the sampling circuit A114 is connected to the voltage monitoring point O and used to collect the voltage of the voltage monitoring point O. The timer is connected to the switch tube A1122 and configured to trigger the sampling circuit A114 to perform voltage sampling on the voltage monitoring point O at a preset first time after starting; and connect the switch tube A1122 at a preset second time after the voltage sampling is completed, so that the integration capacitor A1121 is discharged until the voltage of the voltage monitoring point O drops below the preset voltage threshold value, which can be reduced to 0. When the voltage of the voltage monitoring point O drops below the preset voltage threshold value, the voltage comparator resumes to output a low level, the timer timing data is cleared, the signal storage unit A11 completes photoelectric conversion, realizes pulse detection, returns to the initial state, waits for the next pulse detection, and performs the next photoelectric conversion.

[0037] It is worth mentioning that, by cooperation of the comparator and the timer, the present application can discover the pulse signal in time by monitoring and comparing the voltage of the voltage monitoring point O, trigger the sampling circuit A114 to perform sampling, ensure the response speed, and release the charge accumulated by the integration capacitor A1121 in time after the sampling is completed, so that the signal storage unit A11 can enter the next pulse detection in time, and thus improve the detection capability of the area array detector on the high repetition frequency laser signal to a certain extent.

[0038] Specifically, the input circuit A111 includes a direct current (DC) blocking element A1111; the DC blocking element A1111 is configured to isolate a DC signal from a photosensitive element. In this way, a DC interference signal input by the photosensitive element cannot enter the integration capacitor A1121, while a pulse signal can pass through the integration capacitor A1121 smoothly, effectively eliminating the background interference problem in laser warning, laser guidance and other applications. When the photosensitive element receives a pulsed laser signal, the photosensitive element outputs a corresponding pulsed current signal i, which is coupled to the integration capacitor A1121 through the input circuit A111. The pulsed current signal i is accumulated in the integration capacitor A1121, causing the voltage at the voltage monitoring point O to rise.

[0039] In an embodiment of the present application, the DC blocking element A1111 is implemented as a capacitor. It should be understood that DC signal isolation can also be achieved by other means, such as an AC coupling filter circuit, a digital filter, a differential amplifier, etc.

[0040] In an embodiment of the present application, the input circuit A111 further includes a bias resistor A1112; the bias resistor A1112 is connected in series with the DC blocking element A1111 and is configured to provide a bias voltage to the photosensitive element.

[0041] Specifically, one end of the DC blocking element A1111 is adapted to be connected to the photosensitive element, and the other end is connected to the bias resistor A1112. The positive electrode of the bias resistor A1112 is connected to the DC blocking element A1111, and the negative electrode is connected to the input end of the switch tube A1122 and the integration capacitor A1121. The input circuit A111 and the integration circuit A112 are connected in parallel with the equivalent resistance of the photosensitive element. One end of the integration capacitor A1121 is connected to the bias resistor A1112, and the other end is grounded.

[0042] When the switch tube A1122 is implemented as a Metal Oxide Semiconductor Field Effect Transistor (MOSFET), the switch tube A1122 has a drain (D), a source (S) and a gate (G); the input end of the switch tube A1122 is the drain of the MOSFET.

[0043] The bias voltage is a necessary condition for the operation of the photosensitive element, which can adjust the operating point of the photosensitive element to respond to the light signal within a specific voltage range. The size of the bias resistor A1112 will affect the sensitivity and response speed of the photosensitive element. In general, it is necessary to select an appropriate resistance value according to the characteristics of the photosensitive element and the application scenario.

[0044] The bias resistor A1112, the photosensitive element, the power supply and other elements together form a closed loop circuit, which ensures that the current can flow in the circuit, so as to ensure that the photosensitive element can work normally and output a signal.

[0045] When the photosensitive element receives the optical signal, a pulse current signal i is generated, and the pulse current signal i forms a voltage signal through the bias resistor A1112 for subsequent circuit processing. In other words, the closed loop circuit formed by the bias resistor A1112, the photosensitive element, the power supply and other elements can convert the pulse current signal i into an electrical signal.

[0046] As described above, when the photosensitive element receives the pulse laser signal, the pulse current signal i is accumulated in the integration capacitor A1121, so that the voltage of the voltage monitoring point O is increased. When the voltage comparator detects that the voltage of the voltage monitoring point O is greater than or equal to the preset voltage threshold, the voltage of the voltage comparator is converted from low level to high level, triggering the start of the timer. In this way, after the photosensitive element receives the pulse laser signal, the voltage comparator can discover in time and trigger voltage sampling through the timer, so as to realize real-time detection of the pulse laser signal by the area array detector.

[0047] The indication signal (Signal, Sig) output line of the area array detector readout circuit for detecting the pulse laser signal is designed so that any unit of the area array detector readout circuit for detecting the pulse laser signal receives the pulse laser signal at any time, and the back-end processing system can be started in time to realize real-time processing of the laser signal area array detection.

[0048] The voltage comparator is connected to the indication signal (Signal, Sig) output line, is adapted to be connected to the back-end processing system, and the signal output by the voltage comparator can provide a prompt for the back-end processing system; for example, the end signal output by the voltage comparator indicates that the signal storage unit A11 completes data storage, and the back-end processing system can start reading the data stored in the signal storage unit A11.

[0049] In an embodiment of the present application, the voltage comparator is implemented as an operational amplifier. In other embodiments, the voltage comparator can also be implemented in other ways, for example, a special voltage comparator chip, a digital voltage comparator, an analog circuit.

[0050] The sampling circuit A114 includes an analog-to-digital converter and a register; the register is connected in series to the analog-to-digital converter. The analog-to-digital converter is configured to sample the voltage of the voltage monitoring point O and store the sampling result in the analog-to-digital converter.

[0051] Specifically, one end of the analog-to-digital converter is connected to the voltage monitoring point O, and the other end is connected to the register. The analog-to-digital converter is used to realize the conversion between the analog signal and the digital signal. The preset first time after the timer is started triggers the analog-to-digital converter to sample the voltage of the voltage monitoring point O, and stores the sampling result to the analog-to-digital converter.

[0052] The register is connected to a data (DATA, Dat) output line. The timer, the register and the analog-to-digital converter are respectively connected to a clock (CKL) line. The input circuit A111 and the integration circuit A112 are connected in parallel with the equivalent resistance of the photosensitive element.

[0053] The signal storage unit A11 further comprises a strobe signal receiving circuit A115; the strobe signal transmission unit is connected to the register, and is connected to a row strobe signal line and a column strobe signal line.

[0054] The area array reading circuit A2 is further configured to generate a row strobe signal and a column strobe signal based on a row address and a column address of array address data, and determine a target signal storage unit A11 through the row strobe signal and the column strobe signal, and control the register of the target signal storage unit A11 to output data to a data output line through a common output port.

[0055] The signal storage unit A11 at the position where the row strobe signal line and the column strobe signal line corresponding to the row strobe signal and the column strobe signal intersect is the target signal storage unit A11. In other words, the row sequence number of the target signal storage unit A11 is consistent with the row address corresponding to the row strobe signal, and the column sequence of the target signal storage unit A11 is consistent with the column address corresponding to the column strobe signal.

[0056] In summary, the area array detector reading circuit for detecting the pulsed laser signal is illustrated. The area array detector reading circuit for detecting the pulsed laser signal can timely detect the pulsed laser signal and sample it, and ensure the response speed.

[0057] The above describes the present application and its embodiments, which is not restrictive, and the drawings shown are only one of the embodiments of the present application, and the actual structure is not limited thereto. In summary, if a person skilled in the art is inspired thereby, without departing from the purpose of the present application, without creating a similar structure and embodiment of the technical solution, which should belong to the protection scope of the present application.

Claims

1. A readout circuit for an area array detector for detecting a pulsed laser signal, characterized by, include: The signal register unit array includes multiple signal register units, wherein each signal register unit is adapted to be connected to a photosensitive element of an area array detector; An array readout circuit, connected to the signal register unit array, is configured to control the data output of the signal register unit through array address data; The signal register unit includes: The input circuit is configured to receive pulse signals from the photosensitive element; An integrating circuit, connected in series with the input circuit and forming a voltage monitoring point between the circuit and the input circuit, includes an integrating capacitor and a switching transistor; wherein the switching transistor is connected in parallel with the integrating capacitor. A voltage monitoring circuit includes a voltage comparator and a timer; one end of the voltage comparator is connected to the voltage monitoring point and is configured to compare the voltage at the voltage monitoring point with a preset voltage threshold, and trigger the timer to start timing when the voltage at the voltage monitoring point is greater than or equal to the preset voltage threshold; A sampling circuit, one end of which is connected to the voltage monitoring point, is used to collect the voltage at the voltage monitoring point. The timer is connected to the switching transistor and is configured to trigger the sampling circuit to sample the voltage at the voltage monitoring point at a preset first time after startup; and to turn on the switching transistor at a preset second time after the voltage sampling is completed, so that the integrating capacitor discharges until the voltage at the voltage monitoring point drops below the preset voltage threshold.

2. The area array detector readout circuit for a probe pulse laser signal according to claim 1, wherein, When the voltage at the voltage monitoring point drops below the preset voltage threshold, the voltage comparator outputs a low level, and the timer's timing data is cleared.

3. The readout circuit for an area array detector for probing pulsed laser signals according to claim 2, wherein, The input circuit includes a DC blocking element; the DC blocking element is configured to isolate DC signals from the photosensitive element.

4. The readout circuit for an area array detector for probing pulsed laser signals according to claim 3, wherein, The DC blocking element is implemented as a capacitor.

5. The readout circuit for an area array detector for probing pulsed laser signals according to claim 3, wherein, The input circuit also includes a bias resistor; the bias resistor is connected in series with the DC blocking element and is configured to provide a bias voltage to the photosensitive element.

6. The readout circuit for an area array detector for probing pulsed laser signals of claim 1, wherein, The sampling circuit includes an analog-to-digital converter and a register; the register is connected in series with the analog-to-digital converter.

7. The readout circuit for a planar array detector for detecting pulsed laser signals according to claim 6, characterized in that, The signal register unit further includes a gating signal receiving circuit; the gating signal transmission unit is connected to the register and to the row gating signal line and the column gating signal line.

8. The readout circuit for a planar array detector for detecting pulsed laser signals according to claim 7, characterized in that, The array readout circuit is further configured to: generate row strobe signals and column strobe signals based on the row address and column address of the array address data, determine the target signal register unit through the row strobe signals and column strobe signals, and control the register of the target signal register unit to output data to the data output line.

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