Power supply circuit and power supply system

By introducing switch modules, charge and discharge modules and status detection modules into the power supply circuit, combining charge and discharge timing and MCU chip status signals, adjustable crash reset of the power supply circuit is achieved, solving the problem of unadjustable reset time in the prior art, and improving the stability and reliability of the embedded system.

CN120295446APending Publication Date: 2025-07-11HANGZHOU JUSHI TECH CO LTD
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Patent Information

Application Number
CN202510417414.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-04-03
Publication Date
2025-07-11

AI Technical Summary

Technical Problem

The reset time of existing power supply circuits is unadjustable, which makes it impossible to adapt to the crash reset needs of different scenarios in embedded systems, especially in unattended or high-reliability scenarios that cannot effectively prevent equipment crashes.

Method used

A power supply circuit and power supply system are designed. Through the combination of switching modules, charging and discharging modules and status detection modules, the power supply is controlled by using charging and discharging timing and MCU chip status signals to achieve flexible adjustment of the crash reset time and avoid relying on software timers.

Benefits of technology

It realizes reliable power-off reset of the power supply circuit, adapts to the reset needs of crashes in different scenarios, ensures that the system recovers quickly when it crashes, and improves the stability and reliability of the system.

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Abstract

According to the power supply circuit, the first end of a switch module is connected with an external input power source, and the second end of the switch module is connected with a system power supply end; the control end of the switch module is connected with the output ends of the charging and discharging module and the state detection module; the charging input end of the charging and discharging module is connected with the second end of the switch module, and the charging and discharging module is used for charging or discharging the control end of the switch module according to the conduction state of the first end and the second end of the switch module; the state detection module is used for outputting a first electric signal according to an input state signal; the switch module is used for controlling connection and disconnection between the first end and the second end of the switch module according to the first electric signal and the charging and discharging state of the control end of the switch module. The power supply circuit determines whether to be conducted for power supply according to the charging and discharging state of the charging and discharging module and the output signal of the state detection module. The power supply circuit does not depend on a software timer, the reset time is adjustable, and the anti-interference performance is high.
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Description

Technical Field

[0001] The present invention relates to the technical field of power supply for embedded systems, and particularly to a power supply circuit and a power supply system. Background Art

[0002] When an embedded system is working, it often faces problems such as electromagnetic interference and code logic defects, which cause the CPU to enter an abnormal state. When the system is working properly, the main program needs to send a "watchdog" signal (such as resetting a counter) regularly; if the watchdog is not fed on time due to a runaway program, infinite loop or external interference, the watchdog will trigger a reset signal to force a system restart, avoiding long-term stagnation of the device, actively interrupting the abnormal process and restarting the hardware, thus avoiding the risk of crashing. In unattended or high-reliability scenarios (such as avionics and industrial control), the watchdog can reduce manual intervention and ensure the long-term stable operation of the system.

[0003] The hardware watchdog chips in the prior art (such as MAX706) achieve the reset function through an independent timer, but they rely on external circuits and have limited flexibility; the software watchdog is implemented based on the internal timer of a single-chip microcomputer, and the running state of the main program is detected through a periodic interrupt service program. If the program runs away but the interrupt still responds normally (such as the interrupt service program is not blocked), it may cause the watchdog signal to be continuously sent and the reset cannot be triggered. The watchdog circuits in the prior art rely on dedicated watchdog chips, and the reset time is not adjustable. Summary of the Invention

[0004] The present invention provides a power supply circuit and a power supply system to solve the problem that the reset time of the current power supply circuit is not adjustable.

[0005] According to one aspect of the present invention, a power supply circuit is provided. The power supply circuit includes:

[0006] a switch module, a charge and discharge module, and a state detection module;

[0007] The first end of the switch module is connected to an external input power supply, and the second end of the switch module is connected to the system power supply terminal;

[0008] The control end of the switch module is connected to the output ends of the charge and discharge module and the state detection module;

[0009] The charging input end of the charge and discharge module is connected to the second end of the switch module, and the charge and discharge module is used to charge or discharge the control end of the switch module according to the conduction state of the first end and the second end of the switch module;

[0010] The state detection module is used to output a first electrical signal according to the input state signal;

[0011] The switch module is used to control the conduction and cut-off between the first end and the second end of the switch module according to the first electrical signal and the charge and discharge states of its control end.

[0012] Optionally, the state detection module includes: a coupling unit, a first charge and discharge unit, and a first switch unit;

[0013] The input end of the coupling unit receives the input state signal and rectifies and voltage-clamps the state signal; the output end of the coupling unit is connected to the input end of the first charge and discharge unit;

[0014] The output end of the first charge and discharge unit is connected to the control end of the first switch unit, and the output end of the first switch unit is connected to the output end of the state detection module;

[0015] The first charge and discharge unit is used to charge according to the state signal and send a conduction signal of the first switch unit after a first time delay, and the state detection module outputs a first electrical signal;

[0016] The first charge and discharge unit is further used to discharge according to the state signal and send a cut-off signal of the first switch unit after a second time delay, and the state detection module outputs a first electrical signal.

[0017] Optionally, the coupling unit includes: a first capacitor, a first diode, and a second diode;

[0018] The first end of the first capacitor is connected to the input end of the coupling unit, the second end of the first capacitor is connected to the negative electrode of the first diode, the second end of the first capacitor is connected to the positive electrode of the second diode, and the positive electrode of the first diode is grounded;

[0019] The negative electrode of the second diode is connected to the output end of the coupling unit.

[0020] Optionally, the first charge and discharge unit includes: a first resistor, a second resistor, and a second capacitor;

[0021] The first end of the first resistor is connected to the input end of the first charge and discharge unit;

[0022] The second end of the first resistor, the first end of the second resistor, and the first end of the second capacitor are connected and connected to the output end of the first charge and discharge unit;

[0023] The second end of the second resistor and the second end of the second capacitor are grounded.

[0024] Optionally, the first switch unit includes: a first switch tube and a third resistor;

[0025] The gate of the first switching transistor is connected to the control terminal of the first switching unit, the drain of the first switching transistor is connected to the first end of the third resistor, and the second end of the third resistor is connected to the output terminal of the first switching unit;

[0026] The source of the first switching transistor is grounded.

[0027] Optionally, the charge and discharge module includes: the charge and discharge module is configured to charge the control terminal of the switching module when the first end and the second end of the switching module are in a conducting state;

[0028] The charge and discharge module is configured to discharge the control terminal of the switching module for a third time period when the first end and the second end of the switching module are in a non-conducting state.

[0029] Optionally, the charge and discharge module includes: a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, a third diode, and a third capacitor;

[0030] The first ends of the sixth resistor and the fifth resistor are connected to the charging input terminal of the second charge and discharge unit, the second end of the fifth resistor is connected to the cathode of the third diode, and the second end of the sixth resistor is connected to the first end of the fourth resistor and the first end of the seventh resistor; the second end of the fourth resistor is connected to the anode of the third diode, the first end of the third capacitor, and is connected to the charging output terminal and the discharging input terminal of the charge and discharge module; the second ends of the seventh resistor and the third capacitor are grounded.

[0031] Optionally, the switching module includes: a second switching unit, a third switching unit, and a fourth switching unit;

[0032] The control terminal of the second switching unit is connected to the control terminal of the switching module; the output terminal of the second switching unit is connected to the first control terminal of the third switching unit;

[0033] The second switching unit is configured to output a first control signal according to the first electrical signal and the charge and discharge state of its control terminal;

[0034] The second control terminal of the third switching unit is connected to the first end of the switching module, and the output terminal of the third switching unit is connected to the first control terminal of the fourth switching unit; the third switching unit outputs a second control signal according to the power-on state of the first end of the switching module and the first control signal;

[0035] The second control terminal of the fourth switching unit is connected to the first end of the switching module, the first end of the fourth switching unit is connected to the first end of the switching module, and the second end of the fourth switching unit is connected to the second end of the switching module;

[0036] The fourth switching unit controls the conduction and cutoff between the first end and the second end of the fourth switching unit according to the power-on state of the first end of the switching module and the second control signal.

[0037] Optionally, the second switching unit includes: a second switching transistor;

[0038] The gate of the second switching transistor is connected to the control end of the second switching unit, the drain of the second switching transistor is connected to the output end of the second switching unit, and the source of the second switching transistor is grounded;

[0039] The third switching unit includes: a third switching transistor and an eighth resistor;

[0040] The first end of the eighth resistor is connected to the gate of the third switching transistor and is connected to the first control end of the third switching unit, and the second end of the eighth resistor is connected to the second control end of the third switching unit;

[0041] The fourth switching unit includes: a fourth switching transistor and a ninth resistor;

[0042] The first end of the ninth resistor is connected to the first control end of the fourth switching unit and the gate of the fourth switching transistor;

[0043] The second end of the ninth resistor is connected to the source of the fourth switching transistor and is connected to the second control end of the fourth switching unit;

[0044] The drain of the fourth switching transistor is connected to the second end of the fourth switching unit.

[0045] According to another aspect of the present invention, a power supply system is provided, and the power supply system includes:

[0046] An input power supply interface, a power control circuit, a master control device, and a power supply circuit according to any embodiment of the present invention;

[0047] The input power supply interface is connected to the first end of the switching module, and the input power supply interface is used to connect to an external power supply;

[0048] The input end of the power control circuit is connected to the second end of the switching module, and the output end of the power control circuit is connected to the power supply end of the master control device;

[0049] The power control circuit is used to power on or power off according to the conduction state between the first end and the second end of the switching module;

[0050] The output end of the total control device is connected to the input end of the state detection module, and the total control device is configured to send a state signal to the state detection module according to its own working state.

[0051] Embodiments of the present invention provide a power supply circuit and a power supply system. In the power supply circuit, the on / off of the power supply is controlled by a switch module, and its state is jointly determined by the charge / discharge timing of the charge / discharge module and the MCU chip state signal received by the state detection module. The switch module controls the conduction and cut-off between the first end and the second end of the switch module according to the first electrical signal and the charge / discharge state of its control end. When the MCU chip normally sends a pulse, the circuit maintains power supply; if the pulse disappears, the switch module is turned off; after the charge / discharge module discharges for a period of time, the switch module is re-triggered to power on, forcing the system to power off and reset. The power supply circuit of the embodiments of the present invention does not rely on a software timer, the deadlock reset time circuit is adjustable, and it adapts to the deadlock reset requirements of different scenarios. Description of the Drawings

[0052] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the following drawings are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0053] Figure 1 is a schematic structural diagram of a power supply circuit provided by an embodiment of the present invention;

[0054] Figure 2 is a schematic structural diagram of another power supply circuit provided by an embodiment of the present invention;

[0055] Figure 3 is a schematic structural diagram of another power supply circuit provided by an embodiment of the present invention;

[0056] Figure 4 is a schematic structural diagram of another power supply circuit provided by an embodiment of the present invention;

[0057] Figure 5 is a schematic structural diagram of another power supply circuit provided by an embodiment of the present invention;

[0058] Figure 6 is a schematic structural diagram of a power supply system provided by an embodiment of the present invention. Detailed Embodiments

[0059] To enable those skilled in the art to better understand the solution of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0060] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and do not necessarily need to describe a specific order or sequence. It should be understood that such used data can be interchanged under appropriate circumstances so that the embodiments of the present invention described here can be implemented in an order different from those illustrated or described here. In addition, the terms "comprising" and "having" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device comprising a series of steps or units does not necessarily have to be limited to those steps or units clearly listed, but may include other steps or units not clearly listed or inherent to these processes, methods, products or devices.

[0061] Figure 1 is a schematic structural diagram of a power supply circuit provided by an embodiment of the present invention. As Figure 1 shown, it includes: a switch module 103, a charge and discharge module 102, and a status detection module 101; the first end of the switch module 103 is connected to an external input power supply, and the second end of the switch module 103 is connected to the system power supply terminal; the control end of the switch module 103 is connected to the output ends of the charge and discharge module 102 and the status detection module 101; the charging input end of the charge and discharge module 102 is connected to the second end of the switch module 103, and the charge and discharge module 102 is used to charge or discharge the control end of the switch module 103 according to the conduction state of the first end and the second end of the switch module 103; the status detection module 101 is used to output a first electrical signal according to the input status signal; the switch module 103 is used to control the conduction and cut-off between the first end and the second end of the switch module 103 according to the first electrical signal and the charge and discharge status of its control end.

[0062] Specifically, the switch module 101 controls the conduction between the first end and the second end of the switch module 101 according to the charge and discharge module 102 and the status detection module 101. Exemplarily, the first end of the switch module 101 serves as the power input end of the switch module 101, externally connected to an input power supply, and the switch module 101 serves as the power output end of the switch module 101 and is connected to the system power control end of the embedded circuit. The switch module 101 controls the system power-on or power-off of the embedded circuit through the conduction and cut-off between the first end and the second end.

[0063] The charging input terminal of the charge and discharge module 102 is connected to the second end of the switch module 101, and the charge and discharge module 102 controls the reset time of the switch module according to the internal charge and discharge circuit. Exemplarily, when the first end and the second end of the switch module 101 are conducting, the charge and discharge module 102 can perform charging. The charging module 102 charges the control terminal of the switch module 103. When the charge and discharge module 102 includes an RC charging circuit inside, the charging time curve of the control terminal of the switch module 101 is controlled by the parameters of the RC charging circuit inside the charge and discharge module 102. When the first end and the second end of the switch module 101 are turned off, the charge and discharge module 102 has no external power supply, so the charge and discharge module 102 starts to discharge. When the charge and discharge module 102 includes a discharge circuit inside, the discharge time curve of the control terminal of the switch module 101 is controlled by the parameters of the discharge circuit inside the charge and discharge module 102.

[0064] The status detection module 101 detects the input status signal and outputs a corresponding electrical signal to the switch module 103. The input terminal of the detection module 105 is connected to the MCU pulse output pin, and the output terminal is connected to the control terminal of the switch module 103. The status detection module 101 outputs a first electrical signal according to the input status signal and sends it to the control terminal of the switch module 103. The switch module 103 controls the conduction and turn-off between the first end and the second end of the switch module 103 according to the first electrical signal and the charge and discharge status of its control terminal.

[0065] Further, the power supply circuit includes the charge and discharge module 102 and the status detection module 101. Among them, the charge and discharge module 102 can charge and discharge the control terminal of the switch module 103 according to the conduction state of the switch module 103; and the first electrical signal sent by the status detection module 101 is related to the working state of the measured MCU chip. The measured MCU chip is the MCU chip whose state is to be detected by the power supply circuit provided by the present invention. Exemplarily, when the first end of the switch module 103 is connected to an external power supply and the first end and the second end thereof are conducting, the charge and discharge module 102 charges the control terminal of the switch module 103. At this time, if the measured MCU chip is in good working condition, it continuously sends a corresponding status signal to the status detection module 101, and the status detection module 101 sends a first electrical signal to the control terminal of the switch module 103 according to the corresponding status signal. Then the switch module 103 can continue to conduct between its first end and the second end for power-on according to its own conduction state and the working state of the measured MCU chip. If the measured MCU chip is in a bad working state, sending a corresponding status signal to the status detection module 101 can also reflect this point. The status detection module 101 sends a first electrical signal to the control terminal of the switch module 103 according to the corresponding status signal, then the switch module 103 can disconnect between its first end and the second end for power-off according to the working state of the measured MCU chip.

[0066] Further, the charge and discharge module 102 has a corresponding charge and discharge time curve. If the working state of the MCU chip under test is not good, the control end of the switch module 103 receives a corresponding electrical signal, and the first end and the second end of the corresponding switch module 103 are disconnected. At the same time, the charge and discharge module 102 discharges to the switch module 10 without being powered on. After the discharge ends, the control end of the switch module 103 detects the charge and discharge state of the corresponding charge and discharge module 102. At this time, the first end and the second end of the switch module 103 are conducted again. The length of the reset power-on time is related to the charge and discharge time curve of the charge and discharge module 102. By setting the charge and discharge module 102 with different internal circuits, the reset power-on time of the power supply circuit can be set.

[0067] The power supply circuit of the embodiment of the present invention can be used as a watchdog circuit. The state detection module 101 can monitor the main system state in real time to realize the monitoring of the MCU chip under test. When the state detection module 101 detects an abnormality, the switch module 103 controls the conduction and cut-off of the power supply. The charge and discharge module 102 performs a reset delay of the switch module 103 through charge and discharge.

[0068] Among them, when the power supply circuit of the embodiment of the present invention is used as a watchdog circuit, the state detection module 101 can monitor the main system state in real time, such as the working state and power supply voltage of the MCU chip under test. When the main system state is abnormal (such as program runaway, infinite loop, unstable power supply voltage, etc.), the state detection module can detect these abnormal signals. Exemplarily, when the MCU chip under test is working normally, it sends a state signal to the state detection module 101. The state detection module 101 judges whether the MCU chip under test is working normally according to whether the state signal can be received. The switch module 103 controls the conduction and cut-off of the first end and the second end of the switch module 103 according to the electrical signal output by the state detection module 101 and the charge and discharge state of the charge and discharge module 102. When an abnormality is detected, the switch module 103 cuts off the power supply or triggers a reset operation to restart the main system. Exemplarily, for the discharge reset of the charge and discharge module 102: when the first end and the second end of the switch module 103 are conducted, the charge and discharge module 102 can perform a charging operation to maintain the voltage at the control end of the switch module 103 to ensure power conduction. When the first end and the second end of the switch module 103 are cut off, the charge and discharge module 102 starts a discharge operation. The charge and discharge module 102 has a corresponding charge and discharge time curve. By setting the charge and discharge module 102 with different internal circuits, the reset power-on time of the power supply circuit can be set. After the charge and discharge module 102 finishes discharging, the control end of the switch module 103 is based on the charge and discharge state of the corresponding charge and discharge module 102, and the first end and the second end of the switch module 103 are conducted again to realize the reset power-on operation.

[0069] An embodiment of the present invention provides a power supply circuit that controls the power on and off through a switching module, and its state is jointly determined by the charge and discharge timing of the charge and discharge module and the MCU chip state signal received by the state detection module. The switching module controls the conduction and cutoff between the first end and the second end of the switching module according to the first electrical signal and the charge and discharge state of its control end. When the MCU chip normally sends a pulse, the circuit maintains power supply; if the pulse disappears, the switching module is turned off; after the charge and discharge module discharges for a period of time, the switching module is re-triggered to power on, forcing the system to power off and reset. The power supply circuit of the embodiment of the present invention does not rely on a software timer, the deadlock reset time circuit is adjustable, and it adapts to the deadlock reset requirements of different scenarios.

[0070] Based on the above embodiments, Figure 2 is a schematic structural diagram of another power supply circuit provided by an embodiment of the present invention, as Figure 2 shown, the state detection module 101 includes: a coupling unit 1011, a first charge and discharge unit 1012, and a first switching unit 1013; the input end of the coupling unit 1011 receives the input state signal and rectifies and voltage-clamps the state signal; the output end of the coupling unit 1011 is connected to the input end of the first charge and discharge unit 1012; the output end of the first charge and discharge unit 1012 is connected to the control end of the first switching unit 1013, and the output end of the first switching unit 1013 is connected to the output end of the state detection module 101; the first charge and discharge unit 1012 is used to charge according to the state signal and send a conduction signal of the first switching unit 1013 after delaying for a first duration, and the state detection module 101 outputs a first electrical signal; the first charge and discharge unit 1012 is also used to discharge according to the state signal and send a cutoff signal of the first switching unit 1013 after delaying for a second duration, and the state detection module 101 outputs a first electrical signal.

[0071] The coupling unit 1011 includes: a first capacitor C1, a first diode D1, and a second diode D2; the first end of the first capacitor C1 is connected to the input end of the coupling unit 1011, the second end of the first capacitor C1 is connected to the negative electrode of the first diode D1, the second end of the first capacitor C1 is connected to the positive electrode of the second diode D2, and the positive electrode of the first diode D1 is grounded; the negative electrode of the second diode D2 is connected to the output end of the coupling unit 1011.

[0072] The first charge and discharge unit 1012 includes: a first resistor R1, a second resistor R2, and a second capacitor C2; the first end of the first resistor R1 is connected to the input end of the first charge and discharge unit 1012; the second end of the first resistor R1, the first end of the second resistor R2, and the first end of the second capacitor C2 are connected and connected to the output end of the first charge and discharge unit 1012; the second end of the second resistor R2 and the second end of the second capacitor C2 are grounded.

[0073] The first switch unit 1013 includes: a first switching transistor Q1 and a third resistor R3; the gate of the first switching transistor Q1 is connected to the control terminal of the first switch unit 1013, the drain of the first switching transistor Q1 is connected to the first end of the third resistor R3, the second end of the third resistor R3 is connected to the output terminal of the first switch unit 1013; the source of the first switching transistor Q1 is grounded.

[0074] Specifically, when the input status signal is a pulse signal. In the coupling unit 1011, the first capacitor C1 is used to block DC and pass AC, coupling the AC pulse signal of the measured MCU chip and blocking the DC component. The first diode D1 is used to clamp negative voltage. When the AC pulse signal of the measured MCU chip is at the pulse low level, it conducts, restricting the voltage on the right side of C1 near a certain voltage to prevent damage to the negative voltage of the gate of Q1. Optionally, the first diode D1 can restrict the voltage on the right side of the first capacitor C1 to around -0.7V. The second diode D2 is used for rectification. It conducts at the pulse high level, allowing the forward current to charge C2; it cuts off at the low level, blocking the reverse current.

[0075] The coupling unit 1011 receives the pulse signal of the measured MCU chip, transfers the AC component through capacitive coupling, and at the same time uses diodes for rectification and voltage clamping to ensure the safe transmission of the signal. It can also isolate the DC component and transfer the AC part of the pulse signal. At the same time, due to the setting of the first diode D1, the first diode clamps the negative voltage to protect the subsequent circuit. The coupling unit 1011 can rectify the pulse signal to ensure the transfer of forward energy.

[0076] In the first charge and discharge unit 1012, the first resistor R1 is used for current limiting: controlling the charging current of the second capacitor C2 to prevent overcurrent from damaging the second diode D2 or the first switching transistor Q1. The second resistor R2 serves as a discharge resistor: providing a discharge path for the second capacitor C2 and determining the discharge speed. The second capacitor C2 is used for energy storage, storing the energy of the pulse signal, delaying the signal through charge and discharge, and controlling the conduction and cut-off of the first switching transistor Q1. Exemplarily, the second capacitor C2 and the second resistor jointly determine the charge and discharge time of the first charge and discharge unit 1012, and the time constant of the charge and discharge of the first charge and discharge unit 1012 is the time constant τ = R2·C2. In the embodiment of the present invention, the first charge and discharge unit 1012 controls the charge and discharge process of the capacitor according to the coupled pulse signal, generates a delay signal synchronized with the pulse signal, and drives the switch unit to act. It charges at the pulse high level and triggers the switch to conduct after a delay; it discharges at the pulse low level and triggers the switch to turn off after a delay.

[0077] In the first switch unit 1013, the first switch transistor Q1 is an NMOS transistor. It conducts when the voltage of the second capacitor C2 is higher than the threshold voltage, pulling down the level of the output terminal; it cuts off when the voltage of the second capacitor C2 is lower than the threshold voltage. The third resistor R3 serves as a pull-up resistor to ensure that the output terminal is at a high level when Q1 is cut off, and at the same time, it limits the current of the drain of the first switch transistor Q1 for protection. The first switch unit 1013 controls the conduction and cut-off of the switch transistor (Q1) according to the output state of the charge and discharge unit, and outputs a first electrical signal.

[0078] Exemplarily, when the measured MCU chip normally sends pulses, during the high level of the pulse, the working process of the state detection module 101 is as follows: the measured MCU chip outputs a high level - after the first capacitor C1 is coupled, the second diode D2 conducts - the current charges the second capacitor C2 through the first resistor R1 - the voltage of the second capacitor C2 rises, and at this time, the second capacitor C2 starts to charge. When the voltage of the second capacitor C2 charges to the threshold voltage of the first switch transistor Q1, the first switch transistor Q1 conducts, and then the output terminal is pulled down to the ground potential. At this time, the first electrical signal is at a low level, indicating that the MCU is normal and maintaining the system power supply.

[0079] During the low level of the pulse, the working process of the state detection module 101 is as follows: the MCU outputs a low level - after the first capacitor C1 is coupled, D1 conducts (clamping negative voltage) - the second diode D2 cuts off - the second capacitor C2 discharges through R2. When the voltage of the second capacitor C2 drops below the threshold of the first switch transistor Q1 - the first switch transistor Q1 cuts off, and the output terminal is pulled up to a high level through R3.

[0080] At this time, the first electrical signal is at a high level, and this high-level first electrical signal only appears briefly because the MCU continuously sends pulses and the second capacitor C2 will not be completely discharged.

[0081] When the measured MCU chip crashes, at this time, the measured MCU chip does not send pulse signals, and the working process of the state detection module 101 is as follows: the pulse disappearance signal - the second capacitor C2 continuously discharges through R2 - the voltage drops below the threshold of the first switch transistor Q1 - the first switch transistor Q1 remains cut off - the output terminal is continuously at a high level. Therefore, when the measured MCU chip crashes, the first electrical signal is a continuous high-level signal.

[0082] In the embodiment of the present invention, the coupling unit receives the state signal of the measured MCU chip, and uses the RC delay characteristic of the charge and discharge unit to control the on-off of the switch unit 1013, generating a first electrical signal related to the state of the measured MCU chip. When the measured MCU chip is working normally, the signal periodically triggers the switch action to maintain the system power supply; if the measured MCU chip crashes, the charge and discharge unit discharges completely, and the switch unit outputs a continuous high level to trigger a reset.

[0083] On the basis of the above embodiments, Figure 3This is a schematic diagram of another power supply circuit provided by an embodiment of the present invention. As Figure 3 shown, the charge and discharge module 102 includes: The charge and discharge module 102 is used to charge the control end of the switch module 103 when the first end and the second end of the switch module 103 are in a conducting state; the charge and discharge module 102 is used to discharge the control end of the switch module 103 for a third time period when the first end and the second end of the switch module 103 are in a cut-off state.

[0084] The charge and discharge module 102 includes: a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, a third diode D3, and a third capacitor C3; the first ends of the sixth resistor R6 and the fifth resistor R5 are connected to the charging input end of the second charge and discharge unit, the second end of the fifth resistor R5 is connected to the cathode of the third diode D3, and the second end of the sixth resistor R6 is connected to the first end of the fourth resistor R4 and the first end of the seventh resistor R7; the second end of the fourth resistor R4 is connected to the anode of the third diode D3, the first end of the third capacitor C3, and is connected to the charging output end and the discharging input end of the charge and discharge module 102; the second ends of the seventh resistor R7 and the third capacitor C3 are grounded.

[0085] Specifically, the charge and discharge module 102 controls the charge and discharge process of its control end according to the conducting or cut-off state of the switch module 103. When the switch module 103 is in a conducting state, the charge and discharge module 102 charges, and the charge and discharge module 102 provides a charging path for the control end; when the switch module 103 is in a cut-off state, the charge and discharge module 102 discharges, and discharges quickly through the discharging path to control the reset time and ensure reliable power-off and reset of the power supply circuit.

[0086] Among them, the fourth resistor R4 and the third capacitor C3 form an RC charging circuit. The fourth resistor R4 cooperates with the voltage dividing network of the sixth resistor R6 and the seventh resistor R7 to adjust the initial charging voltage of the gate of the second switching transistor Q2. The third capacitor C3 is used for energy storage and delay control. When charging, it stores charges and the voltage gradually increases to control the conduction delay of the second switching transistor Q2; when discharging, it releases energy and the voltage drops.

[0087] The fifth resistor R5 is connected in series with the third diode D3 during the discharging process to limit the discharging current and prevent excessive current from damaging components when the third capacitor C3 discharges quickly. The third diode conducts unidirectionally to control the discharging path: it is reversely cut off during charging to prevent current from being shunted through the fifth resistor R5; it is forwardly conductive during discharging to form a low-resistance discharging path with the fifth resistor R5 to accelerate the discharging of the third capacitor C3.

[0088] When the switch module 103 is turned on, the charge and discharge module 102 charges. At this time, the charging path includes: the second terminal of the switch module 103 - the sixth resistor R6 - the fourth resistor R4 - the third capacitor C3. At this time, the sixth resistor R6 and the seventh capacitor R7 divide the voltage to provide the initial voltage of the gate of the second switching transistor Q2, and the fourth resistor R4 limits the charging current; the voltage of the third capacitor C3 gradually increases.

[0089] When the switch module 103 is turned off, the charge and discharge module 102 discharges. At this time, the discharging path includes: the positive electrode of the third capacitor C3 - the third diode D3 - the fifth resistor R5 - the ground. At this time, the third diode D3 conducts, and the fifth resistor R5 limits the discharging current, and the third capacitor C3 discharges quickly.

[0090] When the charge and discharge module 102 discharges, the discharging time constant is determined by the fifth resistor R5 and the third capacitor C3, realizing a fast reset of the third time period. Optionally, the discharging time constant τ = R5·C3.

[0091] In the charge and discharge module of the embodiment of the present invention, the initial voltage is set by the voltage-dividing resistor, and the charging delay is controlled by the RC delay network. When the switch module is turned on, the control terminal is charged to maintain the power supply; when the switch module is turned off, a low-resistance discharging path is formed through the third diode and the fifth resistor, so that C3 discharges for the third time period, and the power supply circuit is reset. In the charge and discharge module of the embodiment of the present invention, this design flexibly controls the charge and discharge time by adjusting the parameters of the RC delay network, can independently set the reset response time, and realizes reliable power management.

[0092] Based on the above embodiments, Figure 4 is a schematic structural diagram of another power supply circuit provided by the embodiment of the present invention, as Figure 4As shown, the switch module 103 includes: a second switch unit 1031, a third switch unit 1032, and a fourth switch unit 1033; the control terminal of the second switch unit 1031 is connected to the control terminal of the switch module 103; the output terminal of the second switch unit 1031 is connected to the first control terminal of the third switch unit 1032; the second switch unit 1031 is configured to output a first control signal according to the first electrical signal and the charge-discharge state of its control terminal; the second control terminal of the third switch unit 1032 is connected to the first terminal of the switch module 103, and the output terminal of the third switch unit 1032 is connected to the first control terminal of the fourth switch unit 1033; the third switch unit 1032 outputs a second control signal according to the power-on state of the first terminal of the switch module 103 and the first control signal; the second control terminal of the fourth switch unit 1033 is connected to the first terminal of the switch module 103, the first terminal of the fourth switch unit 1033 is connected to the first terminal of the switch module 103, and the second terminal of the fourth switch unit 1033 is connected to the second terminal of the switch module 103; the fourth switch unit 1033 controls the conduction and cutoff between the first terminal and the second terminal of the fourth switch unit 1033 according to the power-on state of the first terminal of the switch module 103 and the second control signal.

[0093] The second switch unit 1031 includes: a second switch transistor Q2; the gate of the second switch transistor Q2 is connected to the control terminal of the second switch unit 1031, the drain of the second switch transistor Q2 is connected to the output terminal of the second switch unit 1031, and the source of the second switch transistor Q2 is grounded; the third switch unit 1032 includes: a third switch transistor Q3 and an eighth resistor R8; the first terminal of the eighth resistor R8 and the gate of the third switch transistor Q3 are connected and connected to the first control terminal of the third switch unit 1032, and the second terminal of the eighth resistor R8 is connected to the second control terminal of the third switch unit 1032; the fourth switch unit 1033 includes: a fourth switch transistor Q4 and a ninth resistor R9; the first terminal of the ninth resistor R9 is connected to the first control terminal of the fourth switch unit 1033 and the gate of the fourth switch transistor Q4; the second terminal of the ninth resistor R9 is connected to the source of the fourth switch transistor Q4 and is connected to the second control terminal of the fourth switch unit 1033; the drain of the fourth switch transistor Q4 is connected to the second terminal of the fourth switch unit 1033.

[0094] Specifically, the second switch unit 1031 generates a first control signal to drive the third switch unit 1032 by turning on / off the second switch transistor Q2 according to the charge / discharge state from the charge / discharge module 102 and the first electrical signal from the state detection module 101. The third switch unit 1032 generates a second control signal based on the first control signal output by the second switch unit 1031 and the input power state of the first terminal voltage of the switch module 101 to control the on / off of the fourth switch unit 1033. The fourth switch unit 1033 controls the conduction between the first terminal and the second terminal according to the second control signal of the third switch unit 1032 and the input power state of the first terminal voltage of the switch module 101.

[0095] Among them, in the second switch unit 1031, the second switch transistor Q2 is an NMOS transistor, and the output terminal level is pulled low when it is turned on. When the second switch transistor Q2 is turned on, the second switch transistor Q2 outputs a low level (grounded), triggering the third switch unit to turn off; when the second switch transistor Q2 is turned off, the second switch transistor Q2 outputs a high level through the pull-up resistor, triggering the third switch unit to turn on.

[0096] In the third switch unit 1032, the third switch transistor Q3 is an NMOS transistor, and the gate level of the fourth switch transistor Q4 is controlled according to the state of the second switch transistor Q2. The eighth resistor R8 serves as a pull-up resistor to ensure that the gate of the third switch transistor Q3 is pulled up when the second switch transistor Q2 is turned off, making the third switch transistor Q3 turn on. When the first control signal is at a low level, the second switch transistor Q2 is turned on - the gate of the third switch transistor Q3 is pulled low - the third switch transistor Q3 is turned off - the second control signal is at a high level; when the first control signal is at a high level, the second switch transistor Q2 is turned off - the gate of the third switch transistor Q3 is pulled up to a high level through the eighth resistor R8 - the third switch transistor Q3 is turned on - the second control signal is at a low level.

[0097] In the fourth switch unit 1033, the fourth switch transistor Q4 is a PMOS transistor, and the first terminal and the second terminal of the switch module 103 are conducted when the fourth switch transistor Q4 is turned on. The ninth resistor R9 is a pull-down resistor, which shorts the gate and the source of the fourth switch transistor Q4 when the third switch transistor Q3 is turned off to ensure that Q4 is reliably turned off. When the second control signal is at a low level, the third switch transistor Q3 is turned on - the gate of the fourth switch transistor Q4 is pulled low - the PMOS fourth switch transistor Q4 is turned on - the first terminal and the second terminal of the switch unit 103 are conducted; when the second control signal is at a high level, the third switch transistor Q3 is turned off - the gate and the source of the fourth switch transistor Q4 are at the same potential - the PMOS fourth switch transistor Q4 is turned off - the first terminal and the second terminal of the switch unit 103 are turned off.

[0098] When the MCU chip under test is working properly, the MCU chip under test normally sends pulses, and the state detection module makes the second switching transistor Q2 cut off; after the second switching transistor Q2 is cut off, the gate of the third switching transistor Q3 is pulled up to a high level through the eighth resistor R8, and at this time the third switching transistor Q3 is turned on; after the third switching transistor Q3 is turned on, the gate of the fourth switching transistor Q4 is pulled down to the ground potential, so the PMOS fourth switching transistor Q4 is turned on, and finally the first end and the second end of the switching module 103 are turned on.

[0099] When the MCU chip under test malfunctions, the MCU chip under test has no pulses, and the state detection module makes the second switching transistor Q2 turn on;

[0100] After the second switching transistor Q2 is turned on, the gate of the third switching transistor Q3 is pulled down to the ground. Then the third switching transistor Q3 is cut off; after the third switching transistor Q3 is cut off, the gate of the fourth switching transistor Q4 is at the same potential as the source through the ninth resistor R9, that is, at a high level, and at this time the fourth switching transistor Q4 is cut off, and the system is powered off.

[0101] Based on the above embodiments, as Figure 3 and Figure 4 shown, when the power supply circuit is reset, the charge and discharge module 102 triggers the third capacitor C3 to discharge, then the second switching transistor Q2 is cut off, and the third switching transistor Q3 is turned on. Finally, the fourth switching transistor Q4 is turned on, and the system is reset and powered on again.

[0102] The switching module of the embodiment of the present invention cascades and controls through three-level switching units, converts the state detection signal (the first electrical signal) and the input power supply state into precise control of the fourth switching unit. The second switching unit responds to external signals, the third switching unit drives logic conversion, and the fourth switching unit executes power on and off, realizing reliable management of system power supply and ensuring quick power-off reset when the system freezes.

[0103] Based on the above embodiments, Figure 5 is a schematic structural diagram of another power supply circuit provided by the embodiment of the present invention. As Figure 5 shown, the power supply circuit has three stages during operation.

[0104] Stage 1: The external power supply is connected and the system starts up normally.

[0105] After the first end of the switch module 103 is connected to an external power supply, the external power supply divides the voltage through the sixth resistor R6 and the seventh resistor R7 to provide an initial voltage for the gate of the second switching transistor Q2. The third capacitor C3 starts to charge. After charging for a period of time, the gate voltage of the second switching transistor Q2 exceeds the threshold voltage, and a conduction signal of the second switching transistor Q2 is sent. If the measured MCU chip has not started working, the second switching transistor Q2 conducts, and the gate of the third switching transistor Q3 is pulled low to the ground, so the third switching transistor Q3 is cut off. The gate of the fourth switching transistor Q4 maintains a high level (at the same potential as the source) through the ninth resistor R9, so the fourth switching transistor Q4 is cut off, and the connection between the first end and the second end of the switch module 103 is turned off. If the gate voltage of the second switching transistor Q2 exceeds the threshold voltage and a conduction signal of the second switching transistor Q2 is sent, and if the measured MCU chip starts to work, it enters stage 2.

[0106] Stage 2: The system is powered on, the MCU works normally, and corresponding status signals are sent.

[0107] After the MCU is powered on briefly, it starts to work and starts to send square wave pulses of a specified frequency. The high level of the pulse is coupled through the first capacitor C1, the second diode D2 conducts, the current charges the second capacitor C2 through the first resistor R1, the voltage of the second capacitor C2 rises to the conduction threshold of the first switching transistor Q1, the first switching transistor Q1 conducts, and the gate of the second switching transistor Q2 is pulled low to the ground, so the second switching transistor Q2 is cut off. After the second switching transistor Q2 is cut off, the gate of the third switching transistor Q3 is pulled up to a high level through the eighth resistor R8, so the third switching transistor Q3 conducts; the gate of the fourth switching transistor Q4 is pulled low to the ground, so the fourth switching transistor Q4 conducts, and the connection between the first end and the second end of the switch module 103 is turned on. The low level of the pulse is coupled through the first capacitor C1, causing the first diode D1 to conduct, clamping the gate of the first switching transistor Q1 to -0.7V, the second diode D2 to cut off, and the second capacitor C2 to discharge slowly through the second resistor R2. At this time, when the pulse frequency of the status signal sent by the measured MCU chip is high enough, the discharge time of the second capacitor C2 is insufficient, the voltage remains higher than the threshold of the first switching transistor Q1, and the first switching transistor Q1 continues to conduct, maintaining the system power supply.

[0108] Stage 3: The MCU crashes, and the hardware watchdog forces a reset.

[0109] When the MCU chip under test is abnormal, the MCU chip under test does not send a status signal, and the pulse signal disappears - the second capacitor C2 stops charging and discharges completely through the second resistor R2 - the voltage of the second capacitor C2 drops below the conduction threshold of the first switching transistor Q1 - the first switching transistor Q1 turns off. The first switching transistor Q1 turns off - the gate voltage of the second switching transistor Q2 rises again by the voltage division of the sixth resistor R6 and the seventh resistor R7 - the second switching transistor Q2 turns on. After the second switching transistor Q2 turns on, the gate of the third switching transistor Q3 is pulled low - the third switching transistor Q3 turns off; the gate and source of the fourth switching transistor Q4 are at the same potential (high level) - the fourth switching transistor Q4 turns off, and the system powers off. When performing a quick reset, the third capacitor C3 discharges quickly through the third diode D3 and the fifth resistor R5 - the gate voltage of the second switching transistor Q2 decreases - the second switching transistor Q2 turns off - the third switching transistor Q3 turns on - the fourth switching transistor Q4 turns on - the system powers on again to complete the reset cycle. Among them, the reset time is determined by the third capacitor C3 and the fifth resistor R5 (the time to discharge until the second switching transistor Q2 turns off).

[0110] This solution monitors the pulse signal of the MCU chip under test through the status detection module, and uses the charge and discharge module to control the timing of the switching module to implement the pure hardware watchdog function. When the MCU chip under test is normal, the pulse maintains the conduction and power supply of the fourth switching transistor; when the MCU chip under test freezes, the capacitor discharges to trigger the fourth switching transistor to turn off and power off, and then quickly resets.

[0111] Based on the above embodiments, Figure 6 is a schematic structural diagram of a power supply system provided by an embodiment of the present invention, as Figure 6 shown. The power supply system includes: an input power interface 20, a power control circuit 30, a master control device 40, and the power supply circuit 10 of any embodiment of the present invention; the input power interface 20 is connected to the first end of the switching module 103, and the input power interface 20 is used to connect to an external power supply; the input end of the power control circuit 30 is connected to the second end of the switching module 103, and the output end of the power control circuit 30 is connected to the power supply end of the master control device 40; the power control circuit 30 is used to power on or off according to the conduction state between the first end and the second end of the switching module 103; the output end of the master control device 40 is connected to the input end of the status detection module 101, and the master control device is used to send a status signal to the status detection module 101 according to its own working state.

[0112] Specifically, Figures 1 to 6As shown in the figure, the input power interface 20 is responsible for receiving the external DC power input and transmitting the electrical energy to the switch module 103 of the power supply circuit 10. The power control circuit 30 controls whether to supply power to the master control device 40 according to the on / off state of the switch module 103 of the power supply circuit 10. The master control device 40 is the core controller of the system, including the MCU chip under test in any embodiment of the present invention, which is used to execute the main program logic and represents its normal operating state by outputting a pulse signal. When working normally, it continuously sends a pulse signal with a specified frequency to the status detection module 101 of the power supply circuit 10; when it crashes, it stops sending pulses and triggers the power-off reset mechanism of the power supply circuit 10. The power supply circuit 10 monitors the pulse signal of the master control device 40 and dynamically controls the power on / off to achieve system self-repair.

[0113] The input power interface 20 sends the external DC power to the switch module 103 of the power supply circuit 10; the initial state of the power supply circuit 10 is "power off" (the fourth switch transistor Q4 is cut off), and the system is not powered.

[0114] When the power supply circuit 10 is performing a short startup and pulse sending, the power supply circuit 10 briefly conducts the switch module 103 through internal logic - the power control circuit 30 supplies power to the master control device 40; after the master control device 40 starts, it immediately sends a pulse signal to the status detection module 101.

[0115] When the power supply circuit 10 is performing power supply maintenance, the status detection module 101 confirms that the pulse is normal, maintains the switch module 103 in a conducting state, and finally the system continuously supplies power.

[0116] When the master control device 40 is abnormal, the pulse signal stops. When the status detection module 101 detects the disappearance of the pulse, it triggers the discharge process of the charge and discharge module 102. When the power supply circuit 10 performs forced power-off, the switch module 103 is turned off, causing the power control circuit 30 to cut off the power supply to the master control device 40; the charge and discharge module 102 completes the reset timing through a fast discharge path. After the power supply circuit 10 is powered on again and the reset is completed, the switch module 103 is turned on again, then the power control circuit 30 supplies power to the master control device 40 again, and finally the system restarts.

[0117] The power supply system according to the embodiment of the present invention accesses an external power supply through the input power interface, and the hardware watchdog module of the power supply circuit monitors the pulse signal of the master control device in real time and dynamically controls the on / off of the power control circuit. When the master control device works normally, it maintains the power supply; if it crashes, the power supply circuit immediately cuts off the power and triggers a reset, and then powers on again to resume operation. This system realizes highly reliable power management with pure hardware and does not rely on a dedicated chip or software intervention.

[0118] A power supply system provided by an embodiment of the present invention includes a power supply circuit according to any embodiment of the present invention and has the beneficial effects of the power supply circuit according to any of the above embodiments of the present invention.

[0119] It should be understood that various forms of the processes shown above may be used, steps may be reordered, added or deleted. For example, the steps described in the present invention may be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solution of the present invention can be achieved, and no limitations are imposed herein.

[0120] The above specific embodiments do not constitute a limitation on the protection scope of the present invention. Those skilled in the art should understand that various modifications, combinations, sub - combinations and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions and improvements made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

Claims

1. A power supply circuit, characterized in that, Comprising: A switch module, a charge and discharge module, and a status detection module; The first end of the switch module is connected to an external input power supply, and the second end of the switch module is connected to a system power supply terminal; The control end of the switch module is connected to the output ends of the charge and discharge module and the status detection module; The charging input end of the charge and discharge module is connected to the second end of the switch module, and the charge and discharge module is used to charge or discharge the control end of the switch module according to the conduction state of the first end and the second end of the switch module; The status detection module is used to output a first electrical signal according to the input status signal; The switch module is used to control the conduction and cut-off between the first end and the second end of the switch module according to the first electrical signal and the charge and discharge status of its control end.

2. The power supply circuit according to claim 1, wherein The status detection module includes: a coupling unit, a first charge and discharge unit, and a first switch unit; The input end of the coupling unit receives the input status signal and rectifies and voltage-clamps the status signal; the output end of the coupling unit is connected to the input end of the first charge and discharge unit; The output end of the first charge and discharge unit is connected to the control end of the first switch unit, and the output end of the first switch unit is connected to the output end of the status detection module; The first charge and discharge unit is used to charge according to the status signal and send a conduction signal of the first switch unit after a first time delay, and the status detection module outputs a first electrical signal; The first charge and discharge unit is also used to discharge according to the status signal and send a cut-off signal of the first switch unit after a second time delay, and the status detection module outputs a first electrical signal.

3. The power supply circuit according to claim 2, characterized in that, The coupling unit includes: a first capacitor, a first diode, and a second diode; The first end of the first capacitor is connected to the input end of the coupling unit, the second end of the first capacitor is connected to the negative electrode of the first diode, the second end of the first capacitor is connected to the positive electrode of the second diode, and the positive electrode of the first diode is grounded; The negative electrode of the second diode is connected to the output end of the coupling unit.

4. The power supply circuit according to claim 2, wherein The first charge and discharge unit includes: a first resistor, a second resistor, and a second capacitor; The first end of the first resistor is connected to the input end of the first charge and discharge unit; The second end of the first resistor, the first end of the second resistor, and the first end of the second capacitor are connected and connected to the output end of the first charge and discharge unit; The second end of the second resistor and the second end of the second capacitor are grounded.

5. The power supply circuit according to claim 2, characterized in that The first switch unit includes: a first switch tube and a third resistor; The gate of the first switch tube is connected to the control end of the first switch unit, the drain of the first switch tube is connected to the first end of the third resistor, and the second end of the third resistor is connected to the output end of the first switch unit; The source of the first switch tube is grounded.

6. The power supply circuit according to claim 1, wherein The charge and discharge module includes: The charge and discharge module is used to charge the control end of the switch module when the first end and the second end of the switch module are in a conduction state; The charge and discharge module is used to discharge the control end of the switch module for a third duration when the first end and the second end of the switch module are in an off state.

7. The power supply circuit according to claim 6, characterized in that, The charge and discharge module includes: a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, a third diode, and a third capacitor; The first ends of the sixth resistor and the fifth resistor are connected to the charging input end of the second charge and discharge unit. The second end of the fifth resistor is connected to the cathode of the third diode. The second end of the sixth resistor is connected to the first end of the fourth resistor and the first end of the seventh resistor. The second end of the fourth resistor is connected to the anode of the third diode, the first end of the third capacitor, and is connected to the charging output end and the discharging input end of the charge and discharge module. The second ends of the seventh resistor and the third capacitor are grounded.

8. The power supply circuit according to claim 1, wherein The switch module includes: a second switch unit, a third switch unit, and a fourth switch unit; The control end of the second switch unit is connected to the control end of the switch module. The output end of the second switch unit is connected to the first control end of the third switch unit; The second switch unit is used to output a first control signal according to the first electrical signal and the charge and discharge state of its control end; The second control end of the third switch unit is connected to the first end of the switch module. The output end of the third switch unit is connected to the first control end of the fourth switch unit. The third switch unit outputs a second control signal according to the power-on state of the first end of the switch module and the first control signal; The second control end of the fourth switch unit is connected to the first end of the switch module. The first end of the fourth switch unit is connected to the first end of the switch module. The second end of the fourth switch unit is connected to the second end of the switch module; The fourth switch unit controls the conduction and cutoff between the first end and the second end of the fourth switch unit according to the power-on state of the first end of the switch module and the second control signal.

9. The power supply circuit according to claim 8, wherein, The second switch unit includes: a second switch tube; The gate of the second switch tube is connected to the control end of the second switch unit. The drain of the second switch tube is connected to the output end of the second switch unit. The source of the second switch tube is grounded; The third switch unit includes: a third switch tube and an eighth resistor; The first end of the eighth resistor and the gate of the third switch tube are connected and connected to the first control end of the third switch unit. The second end of the eighth resistor is connected to the second control end of the third switch unit; The fourth switch unit includes: a fourth switch tube and a ninth resistor; The first end of the ninth resistor is connected to the first control end of the fourth switch unit and the gate of the fourth switch tube; The second end of the ninth resistor is connected to the source of the fourth switch tube and is connected to the second control end of the fourth switch unit; The drain of the fourth switch tube is connected to the second end of the fourth switch unit.

10. A power supply system, characterized in that, Includes: An input power interface, a power control circuit, a total control device, and a power supply circuit according to any one of the above claims 1-9; The input power supply interface is connected to the first end of the switch module, and the input power supply interface is used to connect to an external power supply; The input end of the power control circuit is connected to the second end of the switch module, and the output end of the power control circuit is connected to the power supply end of the master control device; The power control circuit is used to power on or off according to the conduction state between the first end and the second end of the switch module; The output end of the master control device is connected to the input end of the status detection module, and the master control device is used to send a status signal to the status detection module according to its own working status.

Citation Information

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