Storage device

Through the dual-layer circuit board structure and stacked connection technology, the problem of insufficient memory capacity of storage devices is solved, and double expansion and miniaturization of storage devices are achieved.

CN120295548APending Publication Date: 2025-07-11SHENZHEN LONGSYS ELECTRONICS CO LTD
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Patent Information

Application Number
CN202410047338.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-01-11
Publication Date
2025-07-11

AI Technical Summary

Technical Problem

The memory capacity of existing storage devices is insufficient to meet the growing demand for computing density.

Method used

A double-layer circuit board structure is adopted, with an interface, a controller and a first storage device on the first circuit board, and a second storage device is provided on the second circuit board. The stacked connector and a flexible circuit board are used to realize the laminated connection of the circuit board, and the controller is connected to each storage device, and the storage capacity is expanded using a double-layer structure.

Benefits of technology

It realizes double expansion of memory capacity of storage devices, reduces horizontal space, and is flexible and detachable for easy maintenance and testing.

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Abstract

The invention discloses a storage device which comprises a first circuit board and a second circuit board, the first circuit board is provided with an interface, a controller and a first storage device, and the second circuit board is provided with a second storage device; the controller is connected with the interface, the first storage device and the second storage device. By means of the structure, double storage capacity expansion can be conducted on the storage device through the arrangement of the second circuit board and the second storage device, and then the memory capacity of the whole storage device is improved.
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Description

Technical Field

[0001] This application is applied to the technical field of storage devices. Background Art

[0002] With the continuous development of computer technology, the computing density continues to grow, and the demand for memory capacity is getting larger and larger.

[0003] Therefore, how to improve the memory capacity of storage devices is a technical problem that those skilled in the art need to solve currently. Summary of the Invention

[0004] This application provides a storage device to solve the problem of low memory capacity of storage devices.

[0005] To solve the above technical problem, this application provides a storage device, including: a first circuit board and a second circuit board. An interface, a controller, and a first storage device are arranged on the first circuit board, and a second storage device is arranged on the second circuit board; wherein, the controller is respectively connected to the interface, the first storage device, and the second storage device.

[0006] Wherein, the first circuit board and the second circuit board are stacked.

[0007] Wherein, the storage device further includes: a stacking connector, and a plurality of connecting members are arranged inside the stacking connector; the stacking connector is clamped between the first circuit board and the second circuit board, and one end of each connecting member is connected to the first circuit board, and the end of each connecting member away from the first circuit board is connected to the second circuit board.

[0008] Wherein, the connecting member includes a first bending portion, a fixing portion, and a second bending portion that are connected in sequence; the fixing portion is fixedly arranged with the stacking connector, the first bending portion bends towards the second bending portion, and the bending point of the first bending portion is used to connect to the first circuit board; the second bending portion bends towards the first bending portion, and the bending point of the second bending portion is used to connect to the second circuit board.

[0009] Wherein, the storage device further includes: a flexible circuit board, and a plurality of connecting lines are arranged inside the flexible circuit board; one end surface of the flexible circuit board is fixedly connected to one end surface of the first circuit board to connect to one end of each connecting line, and the other end surface on the opposite side of the flexible circuit board is fixedly connected to one end surface of the second circuit board to connect to the other end of each connecting line; the first circuit board and the second circuit board are stacked by bending the flexible circuit board.

[0010] Among them, the first storage device includes a first cache chip and a plurality of first storage units, and the second storage device includes a second cache chip and a plurality of second storage units; the controller is respectively connected to the first cache chip, each first storage unit, the second cache chip, and each second storage unit; the first cache chip is respectively connected to each first storage unit; the second cache chip is respectively connected to each second storage unit.

[0011] Among them, the controller and the first cache chip and the second cache chip respectively transmit control and address signals through a single channel; the controller and some of the first storage units and some of the second storage units respectively transmit data signals through a first channel; the controller and the remaining first storage units and the remaining second storage units respectively transmit data signals through a second channel.

[0012] Among them, a plurality of first storage units are respectively arranged on opposite sides of the first circuit board; a plurality of second storage units are respectively arranged on opposite sides of the second circuit board.

[0013] Among them, the storage device further includes a housing that houses the first circuit board and the second circuit board; among them, the housing includes an E3.S housing, an E3.S2T housing, an E3.L housing, or an E3.L 2T housing.

[0014] Among them, the interface includes a PCIE interface, and the controller includes an MXC chip.

[0015] The beneficial effect of this application is that; different from the prior art, the storage device of this application includes a first circuit board and a second circuit board, with an interface, a controller, and a first storage device arranged on the first circuit board, and a second storage device arranged on the second circuit board; among them, the controller is respectively connected to the interface, the first storage device, and the second storage device, so as to double the storage capacity of the storage device through the setting of the second circuit board and the second storage device, thereby improving the memory capacity of the entire storage device. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 is a schematic connection structure diagram of the first embodiment of the storage device provided by this application;

[0017] Figure 2 is a schematic cross-sectional structure diagram of the first embodiment of the storage device provided by this application;

[0018] Figure 3 is a schematic internal cross-sectional structure diagram of a stacked connector;

[0019] Figure 4 is a schematic connection structure diagram of the second embodiment of the storage device provided by this application;

[0020] Figure 5It is a schematic diagram of the connection structure of the third embodiment of the storage device provided by this application. Detailed implementation manners

[0021] Next, the technical solutions in the embodiments of this application will be clearly and completely described with reference to the accompanying drawings in the embodiments of this application. Obviously, the described embodiments are only a part of the embodiments of this application, rather than all the embodiments. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of this application.

[0022] It should be noted that if there are directional indications (such as up, down, left, right, front, back...) involved in the embodiments of this application, the directional indications are only used to explain the relative positional relationship and movement conditions between components in a specific posture (as shown in the drawings). If the specific posture changes, the directional indications will also change accordingly.

[0023] In addition, if there are descriptions such as "first" and "second" involved in the embodiments of this application, the descriptions of "first" and "second" are only for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include at least one of such features. In addition, the technical solutions between various embodiments can be combined with each other, but it must be based on the fact that those of ordinary skill in the art can implement them. When the combination of technical solutions is contradictory or cannot be implemented, it should be considered that such a combination of technical solutions does not exist and is not within the protection scope required by this application.

[0024] Please refer to Figure 1 , Figure 1 It is a schematic diagram of the connection structure of the first embodiment of the storage device provided by this application.

[0025] The storage device 100 of this embodiment includes: a first circuit board 110 and a second circuit board 120.

[0026] The storage device 100 of this embodiment may include, but is not limited to, hard disks, solid-state drives, portable hard disks, USB flash drives, memory cards, non-volatile memories (NAND FLASH), optical discs, and memory modules such as cloud storage. The first circuit board 110 and the second circuit board 120 may be PCB (Process Control Block) printed circuit boards, which may be multi-layer circuit boards or single-layer circuit boards, and may be specifically set based on actual requirements.

[0027] An interface 111, a controller 112, and a first storage device 113 are provided on the first circuit board 110. The interface 111 is used to achieve the external connection of the storage device 100 and can be connected to an external host to provide the storage function of the storage device 100 to the host. The controller 112 is used to manage the specific storage of the storage device 100. The first storage device 113 is used to store data.

[0028] A second storage device 121 is provided on the second circuit board 120. Both the first storage device 113 and the second storage device 121 can include, but are not limited to, any storage devices such as SIMM (Single Inline Memory Module), DIMM (Dual Inline Memory Module), and RIMM (Rambus Inline Memory Module).

[0029] Among them, the controller 112 is respectively connected to the interface 111, the first storage device 113, and the second storage device 121, so that the storage device 100 can store data through both the first storage device 113 and the second storage device 121. Thus, the double storage of the storage device 100 is achieved through the first storage device 113 and the second storage device 121 to expand the storage capacity of the storage device 100.

[0030] Among them, the storage capacities of the first storage device 113 on the first circuit board 110 and the second storage device 121 on the second circuit board 120 can be the same or different, and can be specifically set based on actual requirements. In a specific application scenario, if the maximum storage capacity of the first storage device 113 is 256GB, then through the setting of the second storage device 121, the maximum storage capacity of the entire storage device 100 can reach 512GB. If the maximum storage capacity of the first storage device 113 is 512GB, then through the setting of the second storage device 121, the maximum storage capacity of the entire storage device 100 can reach 1T.

[0031] By respectively carrying part of the storage capacity on two circuit boards, the storage of the storage device 100 can be made more flexible. If the customer has a large storage requirement for the storage device 100, the first circuit board 110 and its first storage device 113 and the second circuit board 120 and its second storage device 121 can be set for storage capacity expansion. If the customer has a small storage requirement for the storage device 100, the second circuit board 120 can be directly removed without causing any impact or modification to the structural design or installation of the first circuit board 110, and it can be flexibly changed.

[0032] With the above structure, the storage device of this embodiment includes a first circuit board and a second circuit board. An interface, a controller, and a first storage device are provided on the first circuit board, and a second storage device is provided on the second circuit board. The controller is respectively connected to the interface, the first storage device, and the second storage device. Thus, through the arrangement of the second circuit board and the second storage device, the storage capacity of the storage device is doubled, thereby improving the memory capacity of the entire storage device.

[0033] In some embodiments, the first circuit board 110 and the second circuit board 120 are stacked, so as to reduce the horizontal occupied space of the storage device 100, thereby realizing a double expansion of the storage capacity under the same horizontal space.

[0034] Please refer to Figure 2-3 , Figure 2 which is a schematic cross-sectional structure diagram of the first embodiment of the storage device provided by this application. Figure 3 which is a schematic internal cross-sectional structure diagram of the stacked connector.

[0035] The storage device 100 further includes a stacked connector 130, and a plurality of connecting members 134 are arranged in the stacked connector 130.

[0036] The stacked connector 130 is clamped between the first circuit board 110 and the second circuit board 120. One end of each connecting member 134 is connected to the first circuit board 110, and the end of each connecting member 134 away from the first circuit board 110 is connected to the second circuit board 120. Thus, the connection between the first circuit board 110 and the second circuit board 120 is realized through the stacked connector 130, and further the controller 112 is connected to the second storage device 121 through the first circuit board 110, the stacked connector 130, and the second circuit board 120 in sequence.

[0037] The arrangement of the stacked connector 130 can, while realizing the connection between the first circuit board 110 and the second circuit board 120, enable the first circuit board 110 to be stacked with the second circuit board 120, thereby reducing the horizontal occupied space of the storage device 100 and facilitating the miniaturization of the storage device 100. And the stacked connector 130 can enable the first circuit board 110 and the second circuit board 120 to be independently subjected to SMT soldering and finally assembled. After the assembly is completed, the two boards can also be disassembled and separated, which provides convenience for maintenance / repair and also provides convenience for the separate independent testing of the first circuit board 110 and the second circuit board 120.

[0038] In some embodiments, the connecting member 134 includes a first bending portion 131, a fixing portion 133, and a second bending portion 132 that are connected in sequence.

[0039] The fixing part 133 is fixedly arranged with the stacked connector 130. The first bending part 131 bends towards the second bending part 132, so that the first bending part 131 has a certain elasticity. Thus, when being pressed to connect with the first circuit board 110, it elastically abuts against the first circuit board 110 by using the elasticity. Among them, the bending point of the first bending part 131 is used to connect with the first circuit board 110. Pads or PIN points can be arranged on the first circuit board 110 corresponding to the bending point of the first bending part 131 for connection.

[0040] The second bending part 132 bends towards the first bending part 131, so that the second bending part 132 has a certain elasticity. Thus, when being pressed to connect with the second circuit board 120, it elastically abuts against the second circuit board 120 by using the elasticity. Among them, the bending point of the second bending part 132 is used to connect with the second circuit board 120. Pads or PIN points can be arranged on the second circuit board 120 corresponding to the bending point of the second bending part 132 for connection.

[0041] The above settings of the first bending part 131 and the second bending part 132 can improve the elasticity of the connecting member 134. Thus, when the connecting member 134 connects the first circuit board 110 and the second circuit board 120, the rigid stress can be buffered by using the elasticity, and the situations of deformation or breakage of the connecting member 134 can be reduced. And after the connecting member 134 connects the first circuit board 110 and the second circuit board 120, the two ends of the connecting member 134 can also elastically abut against the first circuit board 110 and the second circuit board 120 respectively by using the elasticity to improve the connection stability.

[0042] Please refer to Figure 4 , Figure 4 which is a schematic diagram of the connection structure of the second embodiment of the storage device provided by this application. This schematic diagram only illustrates the connection relationship of each component of the storage device and does not limit the positional relationship.

[0043] In some embodiments, the first storage device 113 includes a first cache chip 114 and a plurality of first storage units 115, and the second storage device 121 includes a second cache chip 124 and a plurality of second storage units 123. Among them, the number of the first storage units 115 in the first storage device 113 and the number of the second storage units 123 in the second storage device 121 can both include but are not limited to 16, 18, 20, 32, 36, 40, etc., and are specifically set based on actual needs and are not limited herein.

[0044] The first storage unit 115 and the second storage unit 123 can include but are not limited to storage units such as DRAM chips, memory particles or memory chips. In a specific application scenario, the first storage unit 115 and the second storage unit 123 can be DDR4 chips, DDR5 chips, etc., and are not limited herein.

[0045] The first cache chip 114 and the second cache chip 124 are used to temporarily store data. During data transmission, the use of cache can reduce the load on the system and improve the transmission efficiency.

[0046] The controller 112 is respectively connected to the first cache chip 114, each first storage unit 115, the second cache chip 124, and each second storage unit 123 to perform data transmission.

[0047] The first cache chip 114 is respectively connected to each first storage unit 115; the second cache chip 124 is respectively connected to each second storage unit 123 to perform data caching.

[0048] In some embodiments, the control and address signals (CA) are transmitted between the controller 112 and the first cache chip 114 and the second cache chip 124 through a single channel 163.

[0049] The data signals are transmitted between the controller 112 and some of the first storage units 115 and some of the second storage units 123 through a first channel 161; the data signals (DQ / DQS) are transmitted between the controller 112 and the remaining first storage units 115 and the remaining second storage units 123 through a second channel 162.

[0050] In a specific application scenario, the controller 112 transmits data signals to each first storage unit 115 in the right storage unit part 151 of the first storage device 113 and each second storage unit 123 in the right storage unit part 154 of the second storage device 121 through the first channel 161; and the controller 112 transmits data signals to each first storage unit 115 in the left storage unit part 152 of the first storage device 113 and each second storage unit 123 in the left storage unit part 153 of the second storage device 121 through the second channel 162.

[0051] In some embodiments, multiple first storage units 115 are respectively arranged on opposite sides of the first circuit board 110; multiple second storage units 123 are respectively arranged on opposite sides of the second circuit board 120. By arranging the storage units on opposite sides of the circuit board respectively, the storage capacity of the storage device can be further increased under the same horizontal occupied space.

[0052] In some embodiments, the storage device further includes a housing 140, and the housing 140 accommodates the first circuit board 110 and the second circuit board 120; wherein, the housing includes an E3.S housing, an E3.S2T housing, an E3.L housing or an E3.L 2T housing.

[0053] Among them, the height of the E3.S housing is 76 mm, the length is 112.75 mm, and the thickness is 7.5 mm. The height of the E3.S2T housing is 76 mm, the length is 112.75 mm, and the thickness is 16.8 mm. The height of the E3.L housing is 76 mm, the length is 142.2 mm, and the thickness is 7.5 mm. The height of the E3.L 2T housing is 76 mm, the length is 142.2 mm, and the thickness is 16.8 mm.

[0054] In some embodiments, the interface 111 includes a PCIE interface, and the controller 112 includes an MXC chip (Memory Expander Controller) or other control chips. The PCIE interface is an interface implemented by the MXC chip, specifically determined by the selected MXC chip. It can include but is not limited to types such as PCIe 5.0, PCIe 5.0x8, PCIe 5.0x16, or PCIe 6.0. Among them, the above storage unit can be any storage unit supported by the MXC chip.

[0055] The storage device 100 of this embodiment can adopt the CXL (Compute Express Link) protocol, adopt the standard E3.S housing, E3.S2T housing, E3.L housing, or E3.L 2T housing form, support CXL1.1 protocol platform applications, and has good compatibility with current server products. The CXL protocol is an open industrial standard for high-bandwidth and low-latency device interconnection. The CXL protocol can be used to connect devices such as CPUs and Accelerators, Memory Buffers, and Smart NICs, and is used in scenarios such as AI Machine Learning and high-performance computing.

[0056] Please refer to Figure 5 , Figure 5 which is a schematic diagram of the connection structure of the third embodiment of the storage device provided by this application.

[0057] In this embodiment, the connection relationships of the components in the first circuit board 210 and the second circuit board 220 are the same as those in the previous embodiments. Please refer to the previous text and will not be elaborated here. Among them, the connection method between the first circuit board 210 and the second circuit board 220 in this embodiment is different, specifically as follows:

[0058] The storage device 200 further includes: a flexible circuit board 230, and multiple connecting lines 231 are arranged in the flexible circuit board 230. The flexible circuit board 230 refers to a flexible circuit board, which is a highly reliable and excellent flexible printed circuit board made of polyimide or polyester film as the base material. It has the characteristics of high wiring density, light weight, thin thickness, and good bendability.

[0059] One end face of the flexible circuit board 230 is fixedly connected to one end face of the first circuit board 210 to connect to one end of each connection line 231, and the other end face on the opposite side of the flexible circuit board 230 is fixedly connected to one end face of the second circuit board 120 to connect to the other end of each connection line 231. That is, the controller is connected to the first storage device through the flexible circuit board 230.

[0060] The first circuit board 110 and the second circuit board 120 are stacked by bending the flexible circuit board 230. The setting of the flexible circuit board 230 can, while realizing the connection between the first circuit board 210 and the second circuit board 120, enable the first circuit board 110 to be stacked with the second circuit board 220, thereby reducing the horizontal occupied space of the storage device 200 and facilitating the miniaturization of the storage device 200.

[0061] With the above structure, the storage device of this embodiment includes a first circuit board and a second circuit board. An interface, a controller, and a first storage device are provided on the first circuit board, and a second storage device is provided on the second circuit board. Among them, the controller is respectively connected to the interface, the first storage device, and the second storage device, so as to double the storage capacity of the storage device through the setting of the second circuit board and the second storage device, thereby improving the memory capacity of the entire storage device. And the first circuit board and the second circuit board are stacked, so that the horizontal occupied space of the storage device can be reduced, and thus double expansion of the storage capacity can be achieved under the same horizontal space.

[0062] The above are only the embodiments of the present application, and do not limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made by using the content of the specification and drawings of the present application, or directly or indirectly applied to other related technical fields, shall be equally included in the patent protection scope of the present application.

Claims

1. A storage device, characterized in that, The storage device includes: A first circuit board, on which an interface, a controller, and a first storage device are provided; A second circuit board, on which a second storage device is provided; Wherein, the controller is respectively connected to the interface, the first storage device, and the second storage device.

2. The storage device according to claim 1, wherein The first circuit board and the second circuit board are stacked.

3. The storage device according to claim 2, wherein, The storage device further includes: a stacking connector, in which a plurality of connecting members are provided; The stacking connector is clamped between the first circuit board and the second circuit board, and one end of each connecting member is connected to the first circuit board, and the end of each connecting member away from the first circuit board is connected to the second circuit board.

4. The storage device according to claim 3, wherein The connecting member includes a first bending portion, a fixing portion, and a second bending portion connected in sequence; The fixing portion is fixedly arranged with the stacking connector, the first bending portion bends towards the second bending portion, and the bending point of the first bending portion is used for connecting to the first circuit board; the second bending portion bends towards the first bending portion, and the bending point of the second bending portion is used for connecting to the second circuit board.

5. The storage device according to claim 2, wherein The storage device further includes: a flexible circuit board, in which a plurality of connection lines are provided; One end surface of the flexible circuit board is fixedly connected to one end surface of the first circuit board to connect to one end of each connection line, and the other end surface on the opposite side of the flexible circuit board is fixedly connected to one end surface of the second circuit board to connect to the other end of each connection line; The first circuit board and the second circuit board are stacked by bending the flexible circuit board.

6. The storage device according to any one of claims 1-5, wherein The first storage device includes a first cache chip and a plurality of first storage units, and the second storage device includes a second cache chip and a plurality of second storage units; The controller is respectively connected to the first cache chip, each of the first storage units, the second cache chip, and each of the second storage units; The first cache chip is respectively connected to each of the first storage units; the second cache chip is respectively connected to each of the second storage units.

7. The storage device according to claim 6, wherein Between the controller and the first cache chip and the second cache chip, a single-channel transmission controls and address signals respectively; Between the controller and some of the first storage units and some of the second storage units, data signals are transmitted through a first channel; between the controller and the remaining first storage units and the remaining second storage units, data signals are transmitted through a second channel.

8. The storage device according to claim 6, wherein A plurality of the first storage units are respectively arranged on opposite sides of the first circuit board; A plurality of the second storage units are respectively arranged on opposite sides of the second circuit board.

9. The storage device according to claim 1, wherein The storage device further includes a housing, which houses the first circuit board and the second circuit board; Among them, the housing includes an E3.S housing, an E3.S2T housing, an E3.L housing, or an E3.L 2T housing.

10. The storage device according to claim 1, wherein, The interface includes a PCIE interface, and the controller includes an MXC chip.