Dpu data read-write method, device and equipment supporting multi-hypervisor device
By setting target registers and target processing units in the DPU, the hardware and data input/output logic are decoupled, enabling the same hardware unit to support data reading and writing for multiple device types with an unchanged configuration. This solves the problem of fixed hardware unit types in existing technologies and improves the flexibility and adaptability of the DPU.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-31
- Publication Date
- 2026-03-27
AI Technical Summary
The existing DPU hardware units can only support one type of device and cannot be flexibly configured to different types, resulting in the coupling of hardware and data input/output logic, which cannot adapt to the needs of multiple device types.
By setting a target register in the DPU, direct memory data access is initiated in response to changes in the register value, metadata is obtained and the device type is determined, and read and write requests are executed using the target processing unit. This decouples the hardware from the data input/output logic, allowing the same hardware unit to be flexibly configured as different types of devices.
This allows the DPU hardware unit to be flexibly configured as multiple device types without changing the hardware configuration, supporting data read and write operations for most virtualized devices, thus improving the flexibility and adaptability of the DPU.
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Figure CN120295577B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present disclosure relates to the technical field of data processing, and particularly relates to a DPU data read-write method, device and equipment supporting multiple semi-virtualization devices. BACKGROUND
[0002] At present, a data processing unit (DPU) supports network and storage functions, and provides support for different types of devices in the storage aspect. Among them, the interaction between the host and the DPU depends on a set of registers on the DPU and the driver on the host side for different types of devices. On the DPU hardware design, the PF / VF-based registers are different for different device types, and then the fixed driver on the host side corresponds to a specific type of device.
[0003] The existing DPU receives the data access request sent by the host side and implements data transfer between the DPU and the host side, which are all based on hardware implementation, that is, the hardware and the data input / output logic (i.e., IO logic) are strongly coupled. However, different hardware units in the DPU can only implement the data access logic of the specific type of device corresponding to them, and only by changing the hardware configuration can the device type be switched, that is, the same hardware unit in the DPU can only support one type of device when the hardware configuration is unchanged, and there is a problem that the same hardware unit cannot be flexibly configured as different types of devices. SUMMARY
[0004] In order to solve the above technical problems, the present disclosure provides a DPU data read-write method, device and equipment supporting multiple semi-virtualization devices.
[0005] A first aspect of the embodiments of the present disclosure provides a DPU data read-write method supporting multiple semi-virtualization devices, applied to a DPU, comprising:
[0006] In response to a change in the value in the target register, initiating a direct memory data access operation, obtaining metadata corresponding to a target read-write request from the host side, the value in the target register is used to notify the DPU that there is a new data read-write request to be processed, and the target read-write request is the read-write request that is put into the queue corresponding to the target register most recently;
[0007] Determining the request type corresponding to the target read-write request, and determining the device type corresponding to the target read-write request based on the target register;
[0008] Determining the target processing unit corresponding to the target read-write request based on the device type, and downlinking the target read-write request and the metadata to the target processing unit, and executing the target read-write request based on the request type and the target processing unit.
[0009] A second aspect of the embodiments of the present disclosure provides a DPU data read-write device supporting multiple semi-virtualization devices, applicable to a DPU, comprising:
[0010] a metadata obtaining module, configured to initiate a direct memory data access operation to obtain metadata corresponding to a target read-write request from a host side in response to a value in a target register changing, the value in the target register being used to notify the DPU that there is a new data read-write request to be processed, the target read-write request being a read-write request that is most recently put into a queue corresponding to the target register;
[0011] a type determining module, configured to determine a request type corresponding to the target read-write request, and determine a device type corresponding to the target read-write request based on the target register;
[0012] a data read-write module, configured to determine a target processing unit corresponding to the target read-write request based on the device type, and downlink the target read-write request and the metadata to the target processing unit, and execute the target read-write request based on the request type and the target processing unit.
[0013] A third aspect of the embodiments of the present disclosure provides an electronic device, comprising:
[0014] a processor;
[0015] a memory, configured to store executable instructions;
[0016] The processor is configured to read the executable instructions from the memory and execute the executable instructions to implement the DPU data read-write method supporting multiple semi-virtualization devices provided by the first aspect.
[0017] The technical solutions provided by the embodiments of the present disclosure have the following advantages compared with the prior art:
[0018] The DPU data read-write method, device and equipment supporting multiple semi-virtualization devices provided by the embodiments of the present disclosure can initiate a direct memory data access operation in response to a change in the value in the target register, obtain metadata corresponding to a target read-write request from the host side, and the value in the target register is used to notify the DPU that there is a new data read-write request to be processed. The target read-write request is the read-write request that was placed in the queue corresponding to the target register last time. After obtaining the metadata, the request type corresponding to the target read-write request is determined, and the device type corresponding to the target read-write request is determined based on the target register. The target processing unit corresponding to the target read-write request is determined based on the device type, and the target read-write request and the metadata are downlink to the target processing unit. The target read-write request is executed based on the target processing unit. In this way, by setting the target register and setting the queue for storing the read-write request in the target register, the DPU is notified of the new read-write request through the value in the target register, so that the DPU initiates the direct memory data access operation to realize data copying between the host side and the DPU. Then, the software on the DPU side realizes the specific data input / output logic according to different device types, realizes the decoupling between the hardware and the data input / output logic, and further realizes that the same hardware unit can be flexibly configured as different types of devices in the case of unchanged hardware configuration in the DPU. BRIEF DESCRIPTION OF DRAWINGS
[0019] The accompanying drawings, which are incorporated into and form a part of the specification, illustrate one embodiment consistent with the present disclosure and, together with the description, serve to explain the principles of the disclosure.
[0020] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure or the prior art, the accompanying drawings needed to be used in the embodiments or prior art description will be briefly introduced. Obviously, those skilled in the art can obtain other drawings according to these drawings without any creative effort.
[0021] Figure 1 is a flowchart of a DPU data read-write method supporting multiple semi-virtualization devices provided by an embodiment of the present disclosure;
[0022] Figure 2 is a diagram illustrating the improved effect provided by an embodiment of the present disclosure;
[0023] Figure 3 is a flowchart of another DPU data read-write method supporting multiple semi-virtualization devices provided by an embodiment of the present disclosure;
[0024] Figure 4 is a flowchart of still another DPU data read-write method supporting multiple semi-virtualization devices provided by an embodiment of the present disclosure;
[0025] Figure 5 is a structural schematic diagram of a DPU data read-write device supporting multiple semi-virtualization devices provided by an embodiment of the present disclosure.
[0026] Figure 6 is a structural schematic diagram of an electronic device provided by an embodiment of the present disclosure. DETAILED DESCRIPTION
[0027] In order to more clearly understand the above-mentioned purposes, features and advantages of the present disclosure, the solutions of the present disclosure will be further described below. It should be noted that the embodiments of the present disclosure and the features in the embodiments can be combined with each other without conflict.
[0028] In the following description, a large number of specific details are set forth in order to facilitate a thorough understanding of the present disclosure, but the present disclosure can also be implemented in other manners different from those described herein; obviously, the embodiments described in the specification are only a part of the embodiments of the present disclosure, and not all the embodiments.
[0029] It should be understood that each of the steps recorded in the method embodiments of the present disclosure can be executed in different orders and / or in parallel. In addition, the method embodiments can include additional steps and / or omit the execution of the steps shown. The scope of the present disclosure is not limited in this respect.
[0030] It should be noted that, in this document, relational terms such as "first" and "second", and the like, are used solely to distinguish one entity or action from another entity or action, without necessarily requiring or implying any actual such relationship or order between or among the entities or actions. Moreover, the terms "comprises", "comprising", or any other variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but can include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without more limitations, an element defined by the phrase "comprising a..." does not exclude the existence of additional identical elements in the process, method, article, or apparatus that includes the element.
[0031] It should be noted that the modification of "one" or "multiple" mentioned in the present disclosure is illustrative rather than limiting, and those skilled in the art should understand that, unless otherwise explicitly indicated in the context, it should be understood as "one or more".
[0032] Generally, the existing DPU receives the data access request sent by the host side and implements the data transfer between the DPU and the host side, which are all based on hardware implementation. In the DPU, a same hardware unit can only support one type of device in an unchanged hardware configuration, and there is a problem that the same hardware unit cannot be flexibly configured as different types of devices. To solve the problem, the embodiment of the present disclosure provides a DPU data read-write method supporting multiple semi-virtualization devices, which will be introduced below in combination with specific embodiments.
[0033] Figure 1 is a flowchart of a DPU data read-write method supporting multiple semi-virtualization devices provided by the embodiment of the present disclosure. The method can be executed by a DPU data read-write device supporting multiple semi-virtualization devices. The DPU data read-write device supporting multiple semi-virtualization devices can be implemented in a software and / or hardware manner, and can be configured in an electronic device, such as a server or a terminal. The terminal specifically includes a mobile phone, a computer, a tablet computer, and the like.
[0034] As shown in Figure 1 The DPU data read-write method supporting multiple semi-virtualization devices provided by the embodiment of the present disclosure is applied to a DPU, i.e., a data processing unit. The DPU is a new type of computing architecture, which has advantages of efficient data processing, low latency, enhanced security, and flexible scalability, and provides strong computing support for various application scenarios. The DPU data read-write method supporting multiple semi-virtualization devices includes the following steps.
[0035] S110, in response to a change in a value in a target register, initiating a direct memory data access operation to obtain metadata corresponding to a target read-write request from a host side. The value in the target register is used to notify the DPU that there is a new data read-write request to be processed. The target read-write request is the read-write request that is most recently put into the queue corresponding to the target register.
[0036] In the embodiment of the present disclosure, the target register can be a register used to transfer signals or commands between software such as a host or a driver and hardware such as a PCIe device. Exemplarily, the target register can be a doorbell register.
[0037] The number of target registers can be one or multiple. Each target register is provided with a queue for storing the read-write request of the target device corresponding to the target register. The read-write request stored in the queue corresponds to one type of device. It can be understood that the queue of each target register corresponds to one type of device.
[0038] The target device can be a semi-virtualization device, such as a semi-virtualization device based on a virtio protocol. For example, the target device can include virtio-fs, virtio-blk, virtio-net, virtio-sock, virtio-GPU, and the like, without limitation.
[0039] The direct memory access operation is a DMA operation. The PF / VF-based hardware unit in the DPU has a function of carrying data by DMA and a command register for negotiating a control plane, such as a virtio control plane, which corresponds to a target driver on the host side, wherein the command register is used to store a command sent by the host side.
[0040] In the embodiments of the present disclosure, the metadata can include a storage address corresponding to read data or write data of the target read-write request and the like.
[0041] Specifically, the DPU reads the value in the target register in a timely or real-time manner, initiates a direct memory access operation in response to a change in the value in the target register, that is, an increment of the value in the target register, and the PF / VF-based hardware unit obtains metadata corresponding to the target read-write request corresponding to the changed value in the register from the host side.
[0042] In S120, a request type corresponding to the target read-write request is determined, and a device type corresponding to the target read-write request is determined based on the target register.
[0043] In the embodiments of the present disclosure, the request type includes a read request and a write request.
[0044] The device type can be distinguished according to the function, characteristics, and the like of the semi-virtualization device. For example, the semi-virtualization device can include virtio-fs, virtio-blk, virtio-net, virtio-sock, virtio-GPU, and the like.
[0045] Specifically, after obtaining the metadata corresponding to the target read-write request, the DPU determines the request type corresponding to the target read-write request based on the metadata, and determines the target device type corresponding to the queue of the target register according to the correspondence between the queue and the device type, and determines the target device type as the device type corresponding to the target read-write request. For example, the device type corresponding to the target device type is virtio-fs and the like.
[0046] In S130, a target processing unit used to execute the target read-write request is determined based on the device type, and the target read-write request and the metadata are downlink to the target processing unit, and the target read-write request is executed based on the request type and the target processing unit.
[0047] In the embodiments of the present disclosure, different device types correspond to different target processing units. For example, when the device type is virtio-fs, the target processing unit is the file system layer; when the device type is virtio-blk, the target processing unit is the user-mode general block device layer; when the device type is virtio-net, the target processing unit is the virtio-net module in the kernel of the DPU; and when the device type is virtio-sock, the target processing unit is the virtio-sock module in the kernel of the DPU. When the device type is virtio-net or virtio-sock, the target read-write request can be sent to the target processing unit in the form of shared memory.
[0048] Specifically, after determining the request type and the device type corresponding to the target read-write request, the DPU determines the target processing unit corresponding to the target read-write request according to the device type, and delivers the target read-write request and the metadata to the target processing unit, so that the target processing unit executes the target read-write request based on the metadata and the request type.
[0049] In the embodiments of the present disclosure, the direct memory access operation can be initiated in response to a change in the value in the target register, the metadata corresponding to the target read-write request is obtained from the host side, the value in the target register is used to notify the DPU that there is a new data read-write request to be processed, the target read-write request is the read-write request that is most recently placed in the queue corresponding to the target register, after obtaining the metadata, the request type corresponding to the target read-write request is determined, and the device type corresponding to the target read-write request is determined based on the target register, the target processing unit corresponding to the target read-write request is determined based on the device type, and the target read-write request and the metadata are delivered to the target processing unit, and the target read-write request is executed based on the target processing unit. In this way, by setting the target register, the queue for storing the read-write request is set in the target register, and when there is a new read-write request, the value in the target register is used to notify the DPU, so that the DPU initiates the direct memory access operation to realize data copying between the host side and the DPU. Then, the software on the DPU side implements specific data input / output logic according to different device types, decouples the hardware and the data input / output logic, and further realizes that the same hardware unit can be flexibly configured as different types of devices in the case of unchanged hardware configuration in the DPU.
[0050] Figure 2 is a schematic diagram of an improvement effect provided by the embodiments of the present disclosure, as shown in Figure 2 Figure 2 The left schematic diagram is prior art, all PF / VF can only be exposed as the same type of semi-virtualization device, and different types of semi-virtualization devices cannot exist simultaneously, that is, the same PF / VF-based hardware unit can only support one type of device at the same time; Figure 2 The right schematic diagram is the present solution, each PF / VF can be exposed as any type of semi-virtualization device, and different types of semi-virtualization devices can exist simultaneously, that is, the same PF / VF-based hardware unit can be flexibly configured as different types of devices at the same time.
[0051] Figure 3 is a flowchart of another DPU data read-write method supporting multiple semi-virtualization devices provided by an embodiment of the present disclosure, as Figure 3 shown, the DPU data read-write method supporting multiple semi-virtualization devices can specifically include the following steps:
[0052] S310, in response to a change in the value in the target register, initiating a direct memory data access operation to obtain metadata corresponding to a target read-write request from the host side, the value in the target register being used to notify the DPU that there is a new data read-write request to be processed, and the target read-write request being the read-write request most recently placed in the queue corresponding to the target register.
[0053] S320, determining the request type corresponding to the target read-write request, and determining the device type corresponding to the target read-write request based on the target register.
[0054] S330, determining the target processing unit used to execute the target read-write request based on the device type.
[0055] It should be noted that the specific implementation of steps S310-S330 is similar to that of the related steps in the above embodiments, and will not be repeated here.
[0056] In the embodiment of the present disclosure, after determining the target processing unit, when the request type is a read request, executing the target read-write request based on the request type and the target processing unit specifically includes steps S340-S350; when the request type is a write request, executing the target read-write request based on the request type and the target processing unit specifically includes steps S360-S370.
[0057] S340, when the request type is a write request, initiating a direct memory data access operation to obtain write data corresponding to the target read-write request from the host side.
[0058] In the embodiment of the present disclosure, the write request can be understood as a request to write data from the host side to the DPU side; the read request can be understood as a request to read data from the DPU side to the host side.
[0059] Specifically, when determining that the request type is a write request, the DPU initiates a direct memory data access operation, determines a target storage location on the host side corresponding to the write data based on information in the metadata, and then obtains the write data corresponding to the target read-write request from the target storage location on the host side based on the hardware unit of the PF / VF.
[0060] S350, the target read-write request, the metadata and the write data are sent to the target processing unit, so that the target processing unit determines a first storage location corresponding to the write data based on the metadata, and writes the write data into the first storage location.
[0061] Specifically, after obtaining the write data, the DPU sends the target read-write request, the metadata and the write data to the target processing unit, and the target processing unit executes specific IO logic, i.e., the target processing unit determines a first storage location corresponding to the write data according to information in the metadata, and writes the write data into the first storage location.
[0062] S360, when the request type is a read request, the read data is obtained based on the target processing unit and the metadata, a second storage location corresponding to the read data is determined, and the read data is written into the second storage location.
[0063] The metadata also includes data acquisition rules of the device type corresponding to the data read-write request, such as where to obtain data, where to store the obtained data, etc.
[0064] Specifically, when determining that the request type is a read request, the target processing unit obtains read data corresponding to the target read-write request based on the data acquisition rules in the metadata, determines a second storage location corresponding to the read data, and writes the read data into the second storage location.
[0065] S370, initiate a direct memory data access operation to write the read data from the second storage location to the host side.
[0066] Specifically, when writing the read data into the second storage location, the DPU initiates a direct memory data access operation, and the read data is written from the second storage location to the host side based on the hardware unit of the PF / VF.
[0067] In the embodiments of the present disclosure, different target processing units can be determined according to different device types, and different read-write request execution logics can be determined according to different request types, so as to implement data read-write operations, and the same hardware unit can be flexibly configured into different types of devices in the case of unchanged hardware configuration in the DPU.
[0068] Figure 4 is another flowchart of a DPU data read-write method supporting multiple virtualization devices provided by the present disclosure, as shown in Figure 4As shown, the DPU data read-write method supporting the partially virtualized device can specifically include the following steps:
[0069] S410, in response to a change in the value in the target register, initiating a direct memory data access operation, obtaining metadata corresponding to the target read-write request from the host side, the value in the target register being used to notify the DPU that there is a new data read-write request to be processed, and the target read-write request being the read-write request that was most recently placed in the queue corresponding to the target register.
[0070] S420, determining the request type corresponding to the target read-write request, and determining the device type corresponding to the target read-write request based on the target register.
[0071] S430, determining the target processing unit used to execute the target read-write request based on the device type, and downlinking the target read-write request and the metadata to the target processing unit, and executing the target read-write request based on the request type and the target processing unit.
[0072] It should be noted that the specific implementation of steps S410-S430 is similar to the implementation of the related steps in the above embodiments, and will not be repeated here.
[0073] In the embodiments of the present disclosure, after executing the target read-write request based on the request type and the target processing unit, the DPU returns the status of the target read-write request to the host side according to the result of the target read-write request, specifically as steps S440 and S450.
[0074] S440, when the request type is a write request, obtaining a first request processing state returned by the target processing unit, updating the metadata based on the first request processing state, and returning the updated metadata to the host side.
[0075] In the embodiments of the present disclosure, the first request processing state is used to represent whether the target read-write request is processed and whether the processing is successful.
[0076] Specifically, when the request type is a write request, the target processing unit returns the first request processing state to the DPU when writing the write data to the first storage location of the DPU. After the DPU obtains the first request processing state, the DPU parses the first request processing state to determine whether the target read-write request is processed successfully. If the processing is successful, the metadata information of the target read-write request is directly updated, and the updated metadata is returned to the host side. If the processing fails, the cause of the failure and the error code are determined, and the cause of the failure and the error code are updated in the metadata to obtain the updated metadata, which is returned to the host side.
[0077] S450. When the request type is a read request, determine the second request processing status corresponding to the target read / write request, update the metadata based on the second request processing status, and return the updated metadata to the host side.
[0078] Specifically, when the request type is a read request, after the DPU's hardware unit based on PF / VF writes the read data from the second storage location to the host side, it determines the second request processing status corresponding to the target read / write request, that is, whether the write is successful. If the write is successful, it directly updates the metadata information of the target read / write request and returns the updated metadata to the host side. If the write fails, it determines the reason for the failure and the error code, updates the reason for the failure and the error code to the metadata, obtains the updated metadata, and returns the updated metadata to the host side.
[0079] In this embodiment of the disclosure, after executing the target read / write request, the processing status of the target read / write request can be determined and returned to the host side, so that the host side can know the processing status of the target read / write request in a timely manner.
[0080] Furthermore, after returning the updated metadata to the host side, the DPU data read / write method supporting multiple virtualization devices may further include: injecting an interrupt event to the host side to further notify the host side of the processing result of the target read / write request.
[0081] In this embodiment of the disclosure, the metadata is generated by the target driver on the host side based on the target read / write request.
[0082] The target driver can be understood as a driver that interacts with the DPU, used to implement the control plane functions of paravirtualized devices such as virtio devices in the DPU according to the VDPA framework and virtio protocol specification. This target driver can be loaded onto various types of paravirtualized devices, exposing the PF / VF as a device corresponding to the target driver, such as a VDPA device, and ultimately exposing it as different types of paravirtualized devices. For example, when the paravirtualized device is a virtio device, the target driver can be a Virtio Data Path Acceleration (VDPA) driver, and the corresponding device can be a VDPA device.
[0083] When an application on the host side sends a read / write request or I / O request to a semi-virtualized device such as a virtio device in the DPU, the target driver will convert the information of the read / write request or I / O request into metadata corresponding to the protocol supported by the semi-virtualized device based on a preset conversion rule, fill the metadata into the memory on the host side, and then increment the value of the target register such as the doorbell register to notify the DPU.
[0084] In the embodiments of the present disclosure, before initiating the direct memory data access operation in response to a change in the value in the target register, and obtaining the metadata corresponding to the target read-write request from the host side, the DPU data read-write method supporting multiple semi-virtualization devices can further include: receiving a target command sent by the host side, returning target data to the host side based on the target command, so that the host side performs a target driver loading operation based on the target data.
[0085] The target command can be understood as being used to set a negotiation for a target protocol control plane on the host side, where the target protocol can be a virtio protocol.
[0086] The target command contains a control register and a data register, where the control register is used to specify the type of the initiated command; and the data register is used to transmit data between the host side and the DPU. In the execution of the target driver loading process, by writing a specific command type in the control register, and by transmitting and copying the data corresponding to the command type between the host side and the DPU through the data register, the target driver loading can be realized, thereby being able to realize the demand for related operations of different types of semi-virtualization devices without the aid of hardware, i.e., without being affected by the hardware configuration. Through the self-defined target command, the demand for related operations of different types of semi-virtualization devices can be met even without being on the hardware of the semi-virtualization device.
[0087] The target command sent by the host side is received, target data is returned to the host side based on the target command, so that the host side performs a target driver loading operation based on the target data. Specifically, the first acquisition command sent by the host side can be received, first data corresponding to the first acquisition command is determined, the first data is returned to the host side, so that the host side determines configuration information corresponding to the target driver based on the first data, and the configuration information is registered in the kernel of the host side. The first data includes at least one target device type supported by the DPU and at least one instance identifier corresponding to each target device type. The device reset command sent by the host side is received, a reset operation is performed on at least one para-virtualization device in the DPU based on the device reset command, and reset state information is returned to the host side, so that the host side sets a device state corresponding to the at least one para-virtualization device based on the reset state information. The second acquisition command sent by the host side is received, second data corresponding to the second acquisition command is determined, and the second data is returned to the host side. The second data includes configuration items corresponding to each para-virtualization device, so that the host side determines a target configuration item supported by the host side and the DPU based on the second data, and sends the target configuration item to the DPU. The target configuration item sent by the host side is received, and configuration values corresponding to each target configuration item are returned to the host side, so that the host side sets a queue parameter corresponding to each para-virtualization device based on the configuration values, to complete the target driver loading operation.
[0088] In the embodiments of the present disclosure, the at least one instance identifier corresponding to each target device type can be understood as the number of each type of device supported by the DPU can be determined according to the instance identifier, that is, instanceid.
[0089] The reset operation can include resetting the para-virtualization device and the queue state information corresponding to the para-virtualization device.
[0090] When the host side sets the device state corresponding to the at least one para-virtualization device based on the reset state information, it is implemented based on a set of self-defined commands, wherein the self-defined commands include a control register and a data register. The control register is used to specify the type of the initiated command, and the data register is used to transmit data between the host side and the DPU. Therefore, when setting the device state, only the type of the device command in the control register is filled in, which is the command for setting the device state of the para-virtualization device, and the specific state in the data register is filled in, such as the ACKNOWLEDGE state, so that the operation of setting the device state can be realized.
[0091] The configuration items are different for different device types, and can be set by the actual use and application scenarios. For example, when the device type is virtio-blk, the configuration items can include block size, whether to support multi-queue, supported version number, etc.; when the device type is virtio-net, the configuration items can include maximum transfer unit, MAC address, etc., which are not limited here.
[0092] The queue parameter can include the number of queues used by each semi-virtualization device for data transmission, the maximum number of requests for each queue, the base address of the queue, and the like. One semi-virtualization device can correspond to multiple queues, and each queue corresponds to a target register.
[0093] Specifically, the host side obtains the PF / VF-based register address in the DPU based on the mapping relationship between the kernel and the register by means of the PCI driver of the kernel, and initializes the interrupt of the semi-virtualization device, i.e., establishes the association between the interrupt processing program with the target driver and the interrupt in the DPU, so that the target driver can respond to and process the interrupt event sent by the DPU; further, the host side sends a first acquisition command to the DPU, and the DPU determines the first data corresponding to the first acquisition command after receiving the first acquisition command and returns the first data to the host side; the host side determines the configuration information corresponding to the target driver based on the first data after receiving the first data, and registers the configuration information in the kernel of the host side; then, the host side sends a device reset command to the DPU, and the DPU receives the device reset command sent by the host side and performs a reset operation on at least one semi-virtualization device in the DPU based on the device reset command, and returns the reset state information to the host side after the reset operation is completed, so that the host side sets the device state corresponding to the at least one semi-virtualization device based on the reset state information, which includes setting the state of the at least one semi-virtualization device to a first state, wherein the first state indicates that the operating system has found the device and identified it as a valid semi-virtualization device.
[0094] Furthermore, after setting the device status, the host sends a second acquisition command to the DPU. The DPU receives the second acquisition command from the host, determines the second data corresponding to the second acquisition command, and returns the second data to the host. After receiving the second data, the host determines the target configuration items supported by both itself and the DPU based on the second data and its own supported configuration items, and sends the target configuration items to the DPU to notify the DPU. The DPU then returns the configuration value corresponding to each target configuration item to the host. The host then sets the queue parameters corresponding to each semi-virtualized device based on the configuration values to complete the loading operation of the target driver. Finally, the host sets the status of at least one semi-virtualized device in the DPU to the second status. The second status indicates that at least one semi-virtualized device has successfully loaded the relevant driver, such as the virtio-related driver VDPA driver.
[0095] In the embodiments disclosed herein, the target driver can be loaded via commands, overcoming the limitations of existing methods that use registers in the DPU to perform the target driver loading operation. This allows the hardware to be loaded with a driver based on a semi-virtualization protocol on the host side, even when the DPU's hardware design is not a semi-virtualized device. This achieves decoupling between the hardware and the data input / output logic, enabling the same hardware unit to be flexibly configured into different types of devices without changing the hardware configuration in the DPU.
[0096] Figure 5 This is a schematic diagram of the structure of a DPU data read / write device that supports multiple virtualization devices, provided in an embodiment of this disclosure.
[0097] In this embodiment, the DPU data read / write device supporting multiple virtualization devices can be located within an electronic device and is understood as a functional module within the aforementioned electronic device. Specifically, the electronic device can be a server or a terminal, wherein the terminal specifically includes mobile phones, computers, or tablet computers, etc., without limitation.
[0098] like Figure 5 As shown, the DPU data read / write device 500 supporting multi-virtualized devices is applicable to DPUs. The DPU data read / write device 500 supporting multi-virtualized devices may include a metadata acquisition module 510, a type determination module 520, and a data read / write module 530.
[0099] The metadata acquisition module 510 can be used to initiate a direct memory data access operation in response to a change in the value in the target register, and obtain the metadata corresponding to the target read / write request from the host side. The value of the target register is used to notify the DPU that there is a new data read / write request to be processed. The target read / write request is the most recent read / write request put into the queue corresponding to the target register.
[0100] The type determination module 520 can be configured to determine a request type corresponding to the target read-write request, and determine a device type corresponding to the target read-write request based on the target register.
[0101] The data read-write module 530 can be configured to determine a target processing unit corresponding to the target read-write request based on the device type, and issue the target read-write request and the metadata to the target processing unit, and execute the target read-write request based on the request type and the target processing unit.
[0102] In the embodiments of the present disclosure, the direct memory data access operation can be initiated in response to a change in a value in a target register, the metadata corresponding to the target read-write request is obtained from the host side, the value in the target register is used to notify the DPU that there is a new data read-write request to be processed, the target read-write request is the read-write request that is most recently put into the queue corresponding to the target register, after the metadata is obtained, the request type corresponding to the target read-write request is determined, and the device type corresponding to the target read-write request is determined based on the target register, the target processing unit corresponding to the target read-write request is determined based on the device type, and the target read-write request and the metadata are issued to the target processing unit, and the target read-write request is executed based on the target processing unit. In this way, by setting the target register, the queue for storing the read-write request is set in the target register, when there is a new read-write request, the value in the target register is used to notify the DPU, so that the DPU initiates the direct memory data access operation to realize the data copying between the host side and the DPU. Then, the software on the DPU side implements the specific data input / output logic according to different device types, which realizes the decoupling between the hardware and the data input / output logic, and further realizes that the same hardware unit can be flexibly configured as different types of devices in the case of unchanged hardware configuration in the DPU.
[0103] In some embodiments of the present disclosure, the request type includes a read request and a write request.
[0104] The DPU data read-write apparatus 500 supporting multiple semi-virtualization devices can further include a data carrying module.
[0105] The data carrying module can be configured to, when the request type is a write request, initiate the direct memory data access operation to obtain write data corresponding to the target read-write request from the host side, before issuing the target read-write request and the metadata to the target processing unit.
[0106] The data read-write module 530 can be specifically configured to, when the request type is a write request, issue the target read-write request, the metadata and the write data to the target processing unit, so that the target processing unit determines a first storage location corresponding to the write data based on the metadata, and writes the write data into the first storage location.
[0107] In some embodiments of the present disclosure, the data read-write module 530 can also be specifically configured to, when the request type is a read request, acquire read data based on the target processing unit and the metadata, determine a second storage location corresponding to the read data, and write the read data into the second storage location.
[0108] initiate a direct memory data access operation to write the read data from the second storage location to the host side.
[0109] In some embodiments of the present disclosure, the DPU data read-write apparatus 500 supporting a multi-hypervisor device can further include a state updating module.
[0110] The state updating module can be configured to, after the target read-write request and the metadata are sent to the target processing unit, based on the request type and the target processing unit executing the target read-write request, when the request type is a write request, acquire a first request processing state returned by the target processing unit, update the metadata based on the first request processing state, and return the updated metadata to the host side.
[0111] When the request type is a read request, determine a second request processing state corresponding to the target read-write request, update the metadata based on the second request processing state, and return the updated metadata to the host side.
[0112] In some embodiments of the present disclosure, the DPU data read-write apparatus 500 supporting a multi-hypervisor device can further include an interrupt injection module.
[0113] The interrupt injection module can be configured to, after the updated metadata is returned to the host side, inject an interrupt event to the host side to notify the host side of the processing result of the target read-write request.
[0114] In some embodiments of the present disclosure, the metadata is generated by a target driver in the host side based on the target read-write request.
[0115] The DPU data read-write apparatus 500 supporting a multi-hypervisor device can further include a command execution module.
[0116] The command execution module can be configured to, before initiating a direct memory data access operation in response to a change in the value in the target register and acquiring metadata corresponding to the target read-write request from the host side, receive a target command sent by the host side, return target data to the host side based on the target command, so that the host side performs a loading operation of the target driver based on the target data.
[0117] In some embodiments of the present disclosure, the command execution module can be specifically configured to receive a first acquisition command sent by the host side, determine first data corresponding to the first acquisition command, return the first data to the host side, so that the host side determines configuration information corresponding to the target driver based on the first data, and registers the configuration information in the kernel of the host side, wherein the first data includes at least one target device type supported by the DPU and at least one instance identifier corresponding to each target device type;
[0118] receive a device reset command sent by the host side, perform a reset operation on at least one semi-virtualization device in the DPU based on the device reset command, and return reset state information to the host side, so that the host side sets the device state corresponding to the at least one semi-virtualization device based on the reset state information;
[0119] receive a second acquisition command sent by the host side, determine second data corresponding to the second acquisition command, and return the second data to the host side, wherein the second data includes configuration items corresponding to each semi-virtualization device, so that the host side determines target configuration items supported by both the host side and the DPU based on the second data, and sends the target configuration items to the DPU;
[0120] receive target configuration items sent by the host side, return configuration values corresponding to each target configuration item to the host side, so that the host side sets queue parameters corresponding to each semi-virtualization device based on the configuration values, and completes the loading operation of the target driver.
[0121] In some embodiments of the present disclosure, an association relationship between an interrupt handling program of the target driver and an interrupt in the DPU is established in the host side, so that the target driver can respond to and process the interrupt event sent by the DPU.
[0122] It should be noted that, Figure 5 The DPU data read-write device 500 shown supports multiple semi-virtualization devices, can perform each step in the above method embodiments, and achieve each process and effect in the above method embodiments, which will not be repeated here.
[0123] Figure 6 is a structural schematic diagram of an electronic device provided by an embodiment of the present disclosure.
[0124] In an embodiment of the present disclosure, Figure 6 The electronic device can be a server or a terminal, where the terminal specifically includes a mobile phone, a computer, a tablet computer, and the like, which are not limited here.
[0125] As Figure 6 As shown, the electronic device can include a processor 610 and a memory 620 storing computer program instructions.
[0126] In particular, the processor 610 can include a central processing unit (CPU), or an application-specific integrated circuit (ASIC), or can be configured as one or more integrated circuits that implement embodiments of the present disclosure.
[0127] The memory 620 can include mass storage for information or instructions. For example, and without limitation, the memory 620 can include a hard disk drive (HDD), a floppy disk drive, a flash memory, an optical disk, a magneto-optical disk, a magnetic tape, or a Universal Serial Bus (USB) drive or a combination of two or more of these. The memory 620 can include removable or non-removable (or fixed) media, where appropriate. The memory 620 can be internal or external to the integrated access gateway device, as appropriate. In particular embodiments, the memory 620 is non-volatile solid-state memory. In particular embodiments, the memory 620 includes read-only memory (ROM). Where appropriate, this ROM can be mask-programmed ROM, programmable ROM (PROM), erasable PROM (EPROM), electrically erasable PROM (EEPROM), electrically alterable ROM (EAROM), or flash memory, or a combination of two or more of these. In particular embodiments, the memory 620 includes random-access memory (RAM). Where appropriate, this RAM can include single-data rate RAM, double-data rate RAM, or a combination of two or more of these. Where appropriate, this RAM can be volatile memory or non-volatile memory, or a combination of two or more of these.
[0128] The processor 610 performs the steps of the methods provided by embodiments of the present disclosure by reading and executing computer program instructions stored in the memory 620.
[0129] In one example, the electronic device can also include a transceiver 630 and a bus 640. As shown, the processor 610, the memory 620, and the transceiver 630 are connected and communicate with each other through the bus 640. Figure 6
[0130] Bus 640 includes a hardware, software, or both that couples components of computer system 600 to each other. By way of example, and not limitation, bus 640 can include an Accelerated Graphics Port (AGP) or other graphics bus, an Extended Industry Standard Architecture (EISA) bus, a Front Side BUS (FSB), a Hyper Transport (HT) interconnect, an Industry Standard Architecture (ISA) bus, an InfiniBand™ interconnect, a Low Pin Count (LPC) bus, a memory bus, a Micro Channel Architecture (MCA) bus, a Peripheral Component Interconnect (PCI) bus, a PCI-Express (PCI-X) bus, a Serial Advanced Technology Attachment (SATA) bus, a Video Electronics Standards Association Local Bus (VLB) bus, or another suitable bus or a combination of two or more of these. Where appropriate, bus 640 can include one or more buses of the same type or buses of different types. As an example, and not by way of limitation, bus 640 can include an Accelerated Graphics Port (AGP) bus, an Extended Industry Standard Architecture (EISA) bus, a Front Side BUS (FSB), a Hyper Transport (HT) interconnect, an Industry Standard Architecture (ISA) bus, an InfiniBand™ interconnect, a Low Pin Count (LPC) bus, a memory bus, a Micro Channel Architecture (MCA) bus, a Peripheral Component Interconnect (PCI) bus, a PCI-Express (PCI-X) bus, a Serial Advanced Technology Attachment (SATA) bus, a Video Electronics Standards Association Local Bus (VLB) bus, or another suitable bus or a combination of two or more of these.
[0131] The embodiment of the present disclosure further provides a computer readable storage medium, which can store a computer program. When the computer program is executed by a processor, the processor implements the DPU data read-write method supporting multiple semi-virtualization devices provided by the embodiment of the present disclosure.
[0132] The storage medium described above can include, for example, a memory 620 storing computer program instructions, and the instructions can be executed by a processor 610 of an electronic device to complete the DPU data read-write method supporting multiple semi-virtualization devices provided by the embodiment of the present disclosure. Alternatively, the storage medium can be a non-transitory computer readable storage medium, for example, the non-transitory computer readable storage medium can be a ROM, a Random Access Memory (RAM), a Compact Disc Read-Only Memory (CD-ROM), a magnetic tape, a floppy disk, and an optical data semi-virtualization storage device, etc.
[0133] The foregoing is merely illustrative of the various implementations of the present disclosure and the general principles thereof. Numerous modifications can be made to these illustrations, and equivalents can be substituted therefor, without departing from the scope of the present disclosure. The specific embodiments commensurate with the specific application are intended to be illustrative only and not limiting of the scope of the application as set forth in the following claims.
Claims
1. A DPU data read-write method supporting multiple semi-virtualization devices, characterized in that, The application is applied to a DPU, comprising: In response to a change in a value in a target register, initiating a direct memory data access operation, obtaining metadata corresponding to a target read-write request from a host side, the value in the target register being used to inform the DPU that there is a new data read-write request to be processed, the target read-write request being a read-write request that was most recently placed in a queue corresponding to the target register, the metadata being generated by a target driver in the host side based on the target read-write request; Determining a request type corresponding to the target read-write request, and determining a device type corresponding to the target read-write request based on the target register, the device type being distinguished according to the function and characteristics of a semi-virtualization device; Based on the device type, determining a target processing unit for executing the target read-write request, and downlinking the target read-write request and the metadata to the target processing unit, and executing the target read-write request based on the request type and the target processing unit.
2. The method of claim 1, wherein, The request type includes read requests and write requests; when the request type is a write request, before the target read-write request and the metadata are downlinked to the target processing unit, the method further comprises: Initiating a direct memory data access operation, obtaining write data corresponding to the target read-write request from the host side; The downlinking of the target read-write request to the target processing unit, the execution of the target read-write request based on the request type and the target processing unit, comprises: Downlinking the target read-write request, the metadata and the write data to the target processing unit, so that the target processing unit determines a first storage location corresponding to the write data based on the metadata, and writes the write data into the first storage location.
3. The method of claim 1, wherein, When the request type is a read request, the downlinking of the target read-write request and the metadata to the target processing unit, the execution of the target read-write request based on the request type and the target processing unit, comprises: Based on the target processing unit and the metadata, obtaining read data, determining a second storage location corresponding to the read data, and writing the read data into the second storage location; Initiating a direct memory data access operation, and writing the read data from the second storage location to the host side.
4. The method of claim 1, wherein, After the downlinking of the target read-write request and the metadata to the target processing unit, the execution of the target read-write request based on the request type and the target processing unit, the method further comprises: When the request type is a write request, obtaining a first request processing state returned by the target processing unit, updating the metadata based on the first request processing state, and returning the updated metadata to the host side; When the request type is a read request, determining a second request processing state corresponding to the target read-write request, updating the metadata based on the second request processing state, and returning the updated metadata to the host side.
5. The method of claim 4, wherein, After the updated metadata is returned to the host side, the method further comprises: Injecting an interrupt event to the host side to inform the host side of the processing result of the target read-write request.
6. The method of claim 1, wherein, Before initiating the direct memory data access operation in response to a change in the value in the target register, the method further includes: receiving a target command sent by the host side, returning target data to the host side based on the target command, so that the host side performs the target-driven loading operation based on the target data.
7. The method of claim 6, wherein, The receiving a target command sent by the host side, returning target data to the host side based on the target command, so that the host side performs the target-driven loading operation based on the target data, includes: receiving a first acquisition command sent by the host side, determining first data corresponding to the first acquisition command, and returning the first data to the host side, so that the host side determines configuration information corresponding to the target driver based on the first data, and registers the configuration information in the kernel of the host side, wherein the first data includes at least one target device type supported by the DPU and at least one instance identifier corresponding to each target device type; receiving a device reset command sent by the host side, performing a reset operation on at least one para-virtualization device in the DPU based on the device reset command, and returning reset state information to the host side, so that the host side sets the device state corresponding to the at least one para-virtualization device based on the reset state information; receiving a second acquisition command sent by the host side, determining second data corresponding to the second acquisition command, and returning the second data to the host side, the second data including configuration items corresponding to each para-virtualization device, so that the host side determines target configuration items supported by both the host side and the DPU based on the second data, and sends the target configuration items to the DPU; receiving a target configuration item sent by the host side, returning a configuration value corresponding to each target configuration item to the host side, so that the host side sets a queue parameter corresponding to each para-virtualization device based on the configuration value, to complete the loading operation of the target driver.
8. The method of claim 6, wherein, The host side establishes an association relationship between an interrupt handler of the target driver and an interrupt in the DPU, so that the target driver can respond to and process the interrupt event sent by the DPU.
9. A DPU data read / write device supporting multiple virtualized devices, characterized in that, Suitable for DPU, including: A metadata acquisition module is configured to initiate a direct memory data access operation to obtain metadata corresponding to a target read-write request from a host side in response to a change in a value in a target register, wherein the value in the target register is used to notify the DPU that there is a new data read-write request to be processed, the target read-write request is a read-write request that was recently placed in a queue corresponding to the target register, and the metadata is generated by a target driver in the host side based on the target read-write request. A type determination module is configured to determine a request type corresponding to the target read-write request, and determine a device type corresponding to the target read-write request based on the target register, wherein the device type is distinguished according to the functions and characteristics of para-virtualization devices. The data read-write module is configured to determine a target processing unit corresponding to the target read-write request based on the device type, and to issue the target read-write request and the metadata to the target processing unit, and to execute the target read-write request based on the request type and the target processing unit.
10. An electronic device, comprising: The DPU comprises: a processor; a memory configured to store executable instructions; wherein the processor is configured to read the executable instructions from the memory and execute the executable instructions to implement the method of supporting a plurality of semi-virtualized devices of the DPU data read-write method according to any one of claims 1-8.
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