A task scheduling method, device, medium and product in circuit simulation

Abstract

The present application discloses a task scheduling method, device, medium and product in circuit simulation, which relates to the field of circuit simulation technology, including: obtaining a target sparse matrix generated based on the connection relationship between circuit elements in a target circuit netlist, and dividing the target sparse matrix into multiple sub-matrices; the target circuit netlist is a circuit netlist used in circuit simulation, and each sub-matrix corresponds to a computing task; each computing task is assigned to a preset computing node cluster to use each computing node to execute the corresponding computing task; a preset monitor is used to periodically monitor the load information and task execution status of each computing node to calculate the node weight of each computing node; based on the weight of each node, it is determined whether the preset task scheduling condition is currently met. If so, the target computing task that has not been executed in the first computing node is scheduled to the second computing node; the node weight of the first computing node is less than the node weight of the second computing node.

Description

Technical Field

[0001] The present invention relates to the technical field of circuit simulation, and in particular to a task scheduling method, device, medium and product in circuit simulation. Background Art

[0002] Solving sparse matrices is a core component of large-scale analog circuit simulation. A circuit netlist generates a system of linear equations Ax=b using a modified node analysis method. A is a sparse matrix representing the connections between components (resistors, capacitors, transistors, etc.) in the circuit, and b is an excitation vector, such as the input values of a voltage or current source. Because current integrated circuits can contain billions of components, the matrix size can reach over a million orders of magnitude. Furthermore, since each component affects only a few connected nodes, the proportion of nonzero elements in matrix A is extremely low.

[0003] The efficiency of sparse matrix solution directly affects simulation performance, so accelerating sparse matrix solution is a key technical challenge for large-scale analog circuit simulation. Currently, sparse matrix solution mainly adopts a static partitioning strategy, and its typical process includes matrix reordering, uniform task block partitioning, and multi-node parallel computing. However, this static partitioning strategy does not take into account the non-uniform distribution characteristics of non-zero elements in sparse matrices. For example, some task blocks may contain dense non-zero elements, while other blocks are sparse or even all zero. This partitioning method will cause some nodes to be computationally intensive and overloaded, while other nodes are idle due to light tasks or invalid calculations, resulting in load imbalance in the solution of the entire sparse matrix and low computational efficiency.

[0004] In summary, how to solve the load imbalance problem in sparse matrix solution during circuit simulation and significantly improve computing efficiency is an issue that needs to be solved. Summary of the Invention

[0005] In view of this, the present invention aims to provide a task scheduling method, device, medium, and product for circuit simulation, which can solve the load imbalance problem in sparse matrix solving during circuit simulation and significantly improve computing efficiency. The specific solution is as follows:

[0006] In a first aspect, the present application discloses a task scheduling method in circuit simulation, comprising:

[0007] Obtaining a target sparse matrix generated based on the connection relationship between circuit elements in a target circuit netlist, and dividing the target sparse matrix into multiple sub-matrices; wherein the target circuit netlist is a circuit netlist used in circuit simulation, and each sub-matrix corresponds to a computing task;

[0008] Allocate each computing task to a preset computing node cluster so that each computing node in the computing node cluster can execute the corresponding computing task;

[0009] Using a preset monitor to periodically monitor the load information and task execution status of each computing node, and calculate the node weight of each computing node based on the load information and task execution status;

[0010] Based on the weight of each node, it is determined whether the preset task scheduling conditions are currently met. If so, the target computing task that has not been executed in the first computing node is scheduled to the second computing node; the node weight of the first computing node is less than the node weight of the second computing node.

[0011] Optionally, before dividing the target sparse matrix into multiple sub-matrices, the following steps are further included:

[0012] Determining a target sorting method according to matrix characteristics of the target sparse matrix; wherein the target sorting method is any one of a minimum degree sorting method, a spectral sorting method, and a graph partitioning method;

[0013] The target sorting method is used to rearrange the rows and columns of the target sparse matrix to obtain a reordered target sparse matrix.

[0014] Optionally, divide the target sparse matrix into multiple sub-matrices, including:

[0015] Count the number of non-zero elements in each row and column of the target sparse matrix to obtain the non-zero element distribution information;

[0016] The target sparse matrix is divided into a plurality of sub-matrices based on the non-zero element distribution information; wherein the difference in the number of non-zero elements between different sub-matrices is within a preset range.

[0017] Optionally, assign each computing task to a pre-defined cluster of computing nodes, including:

[0018] Determine a preset computing node cluster and determine the number of computing nodes in the computing node cluster;

[0019] Based on the number of computing tasks and the number of computing nodes, each computing task is evenly distributed to the task queue corresponding to each computing node in the computing node cluster.

[0020] Optionally, the load information includes CPU utilization and current remaining memory, and the task execution status is the current length of the task queue;

[0021] Accordingly, the node weight of each computing node is calculated based on the load information and task execution status, including:

[0022] The CPU utilization, current remaining memory and current length corresponding to each computing node are weighted by using the preset weight coefficient to obtain the node weight of the computing node.

[0023] Optionally, the node weight is calculated based on a preset weight formula; wherein the preset weight formula is:

[0024] ;

[0025] in, 、 、 are all weight coefficients.

[0026] Optionally, after periodically monitoring the load information and task execution status of each computing node using a preset monitor, the following steps may also be included:

[0027] If the CPU utilization of any computing node is greater than the preset utilization threshold for a consecutive preset number of cycles, or if the current remaining memory of any computing node is lower than the preset memory threshold, then the computing node will be marked as an abnormal computing node, and the unexecuted computing tasks in the computing node will be scheduled to other computing nodes.

[0028] Optionally, based on the weight of each node, it is determined whether the preset task scheduling conditions are currently met, including:

[0029] Calculate the average weight based on the weight of each node, and use the weight of each node and the average weight to calculate the corresponding weight standard deviation;

[0030] Determine whether the weight standard deviation is greater than the preset standard deviation threshold;

[0031] If it is greater than, it is determined that the preset task scheduling conditions are currently met; otherwise, it is determined that the preset task scheduling conditions are currently not met.

[0032] Optionally, scheduling the unexecuted target computing task on the first computing node to the second computing node includes:

[0033] Determining a first computing node whose node weight is lower than a first preset threshold, and determining a second computing node whose node weight is higher than a second preset threshold; wherein the first preset threshold is lower than the second preset threshold;

[0034] An unexecuted target computing task is determined according to the task execution status corresponding to the first computing node, and the target computing task is scheduled from the first computing node to the second computing node.

[0035] Optionally, scheduling the unexecuted target computing task on the first computing node to the second computing node includes:

[0036] Sort the computing nodes in descending order of node weight to obtain the sorting result;

[0037] Determine the plurality of computing nodes at a preset tail position in the sorting result as first computing nodes, and determine the plurality of computing nodes at a preset head position in the sorting result as second computing nodes;

[0038] An unexecuted target computing task is determined according to the task execution status corresponding to the first computing node, and the target computing task is scheduled from the first computing node to the second computing node.

[0039] Optionally, the task scheduling method in circuit simulation of the present application further includes:

[0040] Monitor whether all computing tasks have been completed;

[0041] If all tasks have been completed, the task execution results in each computing node are obtained, and the execution results of each task are summarized to obtain the solution result of the target sparse matrix.

[0042] Optionally, the process of scheduling the unexecuted target computing task on the first computing node to the second computing node further includes:

[0043] If there are multiple second computing nodes, for the target computing task that is not executed in the first computing node, determine whether there is a computing task adjacent to the target computing task in each computing task corresponding to each second computing node based on the target position relationship; wherein the target position relationship is the position relationship of the submatrices corresponding to each computing task in the target sparse matrix;

[0044] If so, the target computing task is scheduled to the second computing node where the computing task adjacent to the target computing task is located.

[0045] In a second aspect, the present application discloses an electronic device, comprising:

[0046] Memory, used to store computer programs;

[0047] The processor is used to execute a computer program to implement the steps of the task scheduling method in the circuit simulation disclosed above.

[0048] In a third aspect, the present application discloses a computer-readable storage medium for storing a computer program; wherein, when the computer program is executed by a processor, the steps of the task scheduling method in the circuit simulation disclosed above are implemented.

[0049] In a fourth aspect, the present application discloses a computer program product, including a computer program / instruction, which, when executed by a processor, implements the steps of the task scheduling method in the circuit simulation disclosed above.

[0050] It can be seen that the present application obtains a target sparse matrix generated based on the connection relationship between circuit elements in the target circuit netlist, and divides the target sparse matrix into multiple sub-matrices; wherein, the target circuit netlist is the circuit netlist used in circuit simulation, and each sub-matrix corresponds to a computing task; each computing task is assigned to a preset computing node cluster, so as to use each computing node in the computing node cluster to execute the corresponding computing task; a preset monitor is used to periodically monitor the load information and task execution status of each computing node, and the node weight of each computing node is calculated based on the load information and task execution status; based on the weight of each node, it is judged whether the preset task scheduling conditions are currently met. If so, the target computing task that has not been executed in the first computing node is scheduled to the second computing node; the node weight of the first computing node is less than the node weight of the second computing node.

[0051] Beneficial effect: In this application, a target sparse matrix generated based on the connection relationship between circuit elements in a target circuit netlist is first obtained, wherein the target circuit netlist is a circuit netlist used in circuit simulation; then the target sparse matrix is divided to obtain multiple sub-matrices, each sub-matrix corresponding to a computing task. Further, each computing task is first assigned to a preset computing node cluster to start executing the corresponding computing task using each computing node in the computing node cluster. After that, this application will use a preset monitor to periodically monitor the load information and task execution status of each computing node to achieve dynamic monitoring of the load and task execution of each computing node, and calculate the node weight of each computing node. The higher the node weight is, the more suitable it is for processing computing tasks. Finally, based on the weight of each node, it will be determined whether the preset task scheduling conditions are currently met. If so, the target computing task that has not been executed in the first computing node will be scheduled to the second computing node, wherein the node weight of the first computing node is less than the node weight of the second computing node. That is, when the preset task scheduling conditions are currently met, the unexecuted target computing tasks in the computing node with lower node weight will be scheduled to the second computing node with higher node weight, so as to avoid the situation where some computing nodes have high time consumption and high load due to undertaking the computing tasks corresponding to the dense sub-matrix. By scheduling the unexecuted tasks of the node to be migrated to the relatively idle computing nodes, the load imbalance problem in the solution of sparse matrices can be avoided, and the computing efficiency can also be improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0052] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are merely embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without any creative work.

[0053] Figure 1 This is a flow chart of a task scheduling method in circuit simulation disclosed in this application;

[0054] Figure 2 A schematic diagram of a specific processing architecture disclosed in this application;

[0055] Figure 3 This is a flowchart of a specific task scheduling method in circuit simulation disclosed in this application;

[0056] Figure 4 A schematic diagram of the structure of a monitor disclosed in this application;

[0057] Figure 5 A schematic diagram of the structure of a scheduler disclosed in this application;

[0058] Figure 6 This is a schematic diagram of the structure of a task scheduling device in circuit simulation disclosed in this application;

[0059] Figure 7 This is a structural diagram of an electronic device disclosed in this application. DETAILED DESCRIPTION

[0060] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0061] In large-scale analog circuit simulation, solving sparse matrices is a core link. The efficiency of sparse matrix solution directly affects the simulation performance, so accelerating sparse matrix solution is a key technical challenge in large-scale analog circuit simulation. Currently, the solution of sparse matrices mainly adopts a static partitioning strategy. However, this static partitioning strategy does not take into account the non-uniform distribution characteristics of the non-zero elements of the sparse matrix. For example, some task blocks may contain dense non-zero elements, while other blocks are sparse or even all zero. This partitioning method will cause some nodes to be computationally intensive and overloaded, while other nodes are idle due to light tasks or invalid calculations, resulting in load imbalance in the solution of the entire sparse matrix and low computational efficiency.

[0062] To this end, the embodiments of the present application disclose a task scheduling method, device, medium and product in circuit simulation, which can solve the load imbalance problem in sparse matrix solution during circuit simulation and significantly improve computing efficiency.

[0063] See also Figure 1As shown, the embodiment of the present application discloses a task scheduling method in circuit simulation, the method comprising:

[0064] Step S11: Obtain a target sparse matrix generated based on the connection relationship between circuit elements in the target circuit netlist, and divide the target sparse matrix into multiple sub-matrices; wherein the target circuit netlist is the circuit netlist used in circuit simulation, and each sub-matrix corresponds to a computing task.

[0065] In this embodiment, in the actual analog circuit simulation process, it is first necessary to generate a linear equation group Ax=b for the circuit netlist used in the circuit simulation through an improved node analysis method; where A is a sparse matrix, that is, the target sparse matrix to be solved in this embodiment, and the target sparse matrix specifically represents the connection relationship between circuit elements.

[0066] Furthermore, considering that the size of the target sparse matrix can reach over a million orders of magnitude, and the serial solution speed of a million-order sparse matrix is extremely slow, in order to optimize computing efficiency and resource utilization, this application divides the target sparse matrix into multiple sub-matrices, where each sub-matrix corresponds to a computing task. In this way, multiple sub-matrices can be assigned to different computing nodes for parallel processing. It should be noted that each sub-matrix is a square matrix with the same number of rows and columns.

[0067] In addition, it should be pointed out that before dividing the target sparse matrix into multiple sub-matrices, the following steps are also included: determining a target sorting method based on the matrix characteristics of the target sparse matrix; wherein the target sorting method is any one of the minimum degree sorting method, the spectral sorting method, and the graph partitioning method; and using the target sorting method to rearrange the rows and columns in the target sparse matrix to obtain a reordered target sparse matrix. That is, after obtaining the target sparse matrix, before dividing the target sparse matrix into multiple sub-matrices, the sparse matrix can also be preprocessed, such as reordering the target sparse matrix, the purpose of which is to reduce the number of padding zeros and reduce the matrix bandwidth. By rearranging the rows and columns of the matrix, the non-zero elements are clustered together as much as possible and close to the diagonal, thereby improving the efficiency of subsequently solving the sub-matrix locally on each computing node.

[0068] In a specific embodiment, a corresponding target sorting method can be determined based on the matrix characteristics of the target sparse matrix, so that the target sorting method is used to rearrange the rows and columns in the target sparse matrix to obtain a reordered target sparse matrix; the target sorting methods include but are not limited to minimum degree sorting, spectral sorting, and graph partitioning. For example, if the target sparse matrix is symmetric and the goal is to minimize zero padding, the minimum degree sorting method can be used first; if the target sparse matrix is asymmetric or has a relatively complex matrix structure, the spectral sorting method or graph partitioning method is preferred; and for very large-scale matrices (e.g., more than one million orders), the graph partitioning method is used.

[0069] Step S12: Allocate each computing task to a preset computing node cluster, so as to utilize each computing node in the computing node cluster to execute the corresponding computing task.

[0070] In this embodiment, after the target sparse matrix is divided into multiple sub-matrices, the computing tasks corresponding to each sub-matrix are assigned to a preset computing node cluster, so that each computing node in the computing node cluster can begin to execute the corresponding computing tasks. It is understood that for each divided sub-matrix, a local solution can be performed on its own independent computing node, which can specifically be a multi-core processor, a distributed computing node, etc. The local solution method can adopt a direct method (such as LU decomposition) or an iterative method (such as the conjugate gradient method).

[0071] Step S13: using a preset monitor to periodically monitor the load information and task execution status of each computing node, and calculating the node weight of each computing node based on the load information and task execution status.

[0072] In this embodiment, a preset monitor is also used to periodically monitor the load information and task execution status of each computing node to achieve dynamic monitoring of the load and task execution status of each computing node, and to calculate the node weight of each computing node. In this embodiment, it is stipulated that the higher the node weight, the more suitable it is for processing computing tasks.

[0073] Step S14: Based on the weight of each node, determine whether the preset task scheduling conditions are currently met. If so, schedule the target computing task that has not been executed in the first computing node to the second computing node; the node weight of the first computing node is less than the node weight of the second computing node.

[0074] In this embodiment, based on the weight of each node, it is determined whether the preset task scheduling conditions are currently met. If so, the unexecuted target computing tasks in the first computing node are scheduled to the second computing node, wherein the node weight of the first computing node is less than the node weight of the second computing node. That is, when the preset task scheduling conditions are currently met, the unexecuted target computing tasks in the computing node with the lower node weight are scheduled to the second computing node with the higher node weight. This avoids the situation where some computing nodes have high time consumption and high load due to undertaking computing tasks corresponding to dense sub-matrices. By migrating the unexecuted tasks of the node to a relatively idle computing node through scheduling, the load imbalance problem in sparse matrix solving can be avoided, while also improving computing efficiency.

[0075] In a specific embodiment, scheduling an unexecuted target computing task in a first computing node to a second computing node includes: determining a first computing node whose node weight is lower than a first preset threshold, and determining a second computing node whose node weight is higher than a second preset threshold; wherein the first preset threshold is lower than the second preset threshold; determining the unexecuted target computing task based on the task execution status corresponding to the first computing node, and scheduling the target computing task from the first computing node to the second computing node.

[0076] It is understandable that, when the preset task scheduling conditions are currently met, the purpose is to schedule the unexecuted computing tasks in some computing nodes with larger loads to be executed in computing nodes with smaller loads to achieve load balancing. In this application, the node weight of each computing node is calculated, and the higher the node weight is, the more suitable it is for processing computing tasks, that is, the lower its load is. Therefore, this application sets a first preset threshold and a second preset threshold, and the first preset threshold is less than the second preset threshold. Then, the computing node with a node weight lower than the first preset threshold is recorded as the first computing node, and the computing node with a node weight higher than the second preset threshold is recorded as the second computing node. Then, the unexecuted target computing task is determined based on the task execution status corresponding to the first computing node, so that the target computing task is scheduled from the first computing node to the second computing node for execution. In this way, the unexecuted target computing task in the computing node with lower node weight is scheduled to the computing node with higher node weight. Among them, the specific values of the first preset threshold and the second preset threshold can be customized according to actual conditions, and this embodiment does not limit their specific values.

[0077] In another specific embodiment, the target computing task that is not executed in the first computing node is scheduled to the second computing node, including: sorting the computing nodes in descending order of node weight to obtain a sorting result; determining several computing nodes located at a preset tail position in the sorting result as the first computing node, and determining several computing nodes located at a preset head position in the sorting result as the second computing node; determining the unexecuted target computing task based on the task execution status corresponding to the first computing node, and scheduling the target computing task from the first computing node to the second computing node.

[0078] That is, in addition to setting two different thresholds to determine the nodes with lower weights and the nodes with higher weights, the present application can also first sort the computing nodes in descending order of the node weight to obtain a sorting result, and then determine the computing nodes at the preset tail position in the sorting result as the first computing node, and determine the computing nodes at the preset head position in the sorting result as the second computing node; wherein the preset tail position corresponds to the position of the smallest node weight in the sorting result, and the preset head position corresponds to the position of the largest node weight in the sorting result. For example, 3 computing nodes can be selected from the preset tail position as the first computing node, that is, the 3 computing nodes with the smallest node weight are selected as the first computing node, and 3 computing nodes can be selected from the preset head position as the second computing node, that is, the 3 computing nodes with the largest node weight are selected as the second computing node; it should be noted that the number of the first computing nodes can be the same as or different from the number of the second computing nodes, and this application does not limit this. Finally, the unexecuted target computing task is determined based on the task execution status corresponding to the first computing node, and the target computing task is scheduled from the first computing node to the second computing node. In this way, the unexecuted target computing task in the computing node with lower node weight can be scheduled to the computing node with higher node weight.

[0079] It should also be noted that the process of scheduling the target computing task that has not been executed in the first computing node to the second computing node also includes: if there are multiple second computing nodes, then for the target computing task that has not been executed in the first computing node, judging whether there is a computing task adjacent to the target computing task in each computing task corresponding to each second computing node based on the target position relationship; wherein the target position relationship is the position relationship of the sub-matrices corresponding to each computing task in the target sparse matrix; if so, scheduling the target computing task to the second computing node where the computing task adjacent to the target computing task is located.

[0080] That is, if the number of selected second computing nodes is multiple, when scheduling the target computing task that is not executed in the first computing node to the second computing node, you can also refer to the positional relationship of the submatrix corresponding to each computing task in the target sparse matrix, and try to schedule adjacent computing tasks to the same computing node for execution. Its core purpose is to reduce the communication overhead between nodes and reduce the complexity of cross-node synchronization. For example, in a 10×10 sparse matrix, the elements that are simultaneously located in the first 5 rows and the first five columns are constructed as a submatrix, and the elements that are simultaneously located in the first 5 rows and the last five columns are also constructed as a submatrix, then these two submatrices are adjacent in the sparse matrix. Therefore, in this embodiment, for the target computing task that is not executed in each first computing node, it is necessary to determine whether there is a computing task adjacent to the target computing task in each computing task corresponding to each second computing node based on the positional relationship of the submatrix corresponding to each computing task in the target sparse matrix. If so, the target computing task is scheduled to the second computing node where the computing task adjacent to the target computing task is located for execution.

[0081] On the contrary, if there is no computing task adjacent to the target computing task in each computing task corresponding to each second computing node, the target computing task that has not been executed in the first computing node can be randomly scheduled to multiple second computing nodes. However, it should be noted that in the random scheduling process, it is also necessary to keep the task computing amount balanced as much as possible among multiple second computing nodes, rather than scheduling all the unexecuted computing tasks in multiple first computing nodes to the same second computing node. In a specific implementation, the total number of target computing tasks that have not been executed in each first computing node can also be counted first, and the number of second computing nodes can be determined, and then these target computing tasks can be evenly distributed to each second computing node.

[0082] In addition, the method of the present application also includes: monitoring whether each computing task has been completed; if all have been completed, obtaining the task execution results in each computing node, and summarizing the task execution results to obtain the solution result of the target sparse matrix. It is understandable that the present application is to split a large target sparse matrix into multiple sub-matrices, and perform calculations in parallel in multiple computing nodes, so the results calculated in each computing node are local solution results, so when it is monitored that each computing task has been completed, it is also necessary to obtain the task execution results in each computing node, and summarize the task execution results to obtain the solution result of the target sparse matrix. In the process of summarizing, global iterative correction can also be performed to ensure that the summarized results meet the accuracy requirements of the overall system. Finally, post-processing steps such as residual calculation and error analysis are performed to verify the accuracy of the solution.

[0083] In addition, the processing architecture applicable to this application can be as follows Figure 2As shown in , it specifically includes a preprocessing module, a monitor, a scheduler, and computing nodes. The preprocessing module is mainly used to reorder and sub-matrix the input large-scale sparse matrix; the monitor is used to monitor the load information and task execution status of each computing node in real time and calculate the node weight; the scheduler is used to schedule computing tasks in real time based on the node weight; and the computing nodes are mainly used to complete the local calculation of the computing task and synchronize the necessary data.

[0084] It can be seen that in this application, a target sparse matrix generated based on the connection relationship between circuit elements in the target circuit netlist is first obtained, wherein the target circuit netlist is the circuit netlist used in circuit simulation; then the target sparse matrix is divided to obtain multiple sub-matrices, each sub-matrix corresponding to a computing task. Further, each computing task is first assigned to a preset computing node cluster to start executing the corresponding computing task using each computing node in the computing node cluster. After that, this application will use a preset monitor to periodically monitor the load information and task execution status of each computing node to achieve dynamic monitoring of the load and task execution of each computing node, and calculate the node weight of each computing node. The higher the node weight is stipulated in this application, the more suitable it is for processing computing tasks. Finally, it will be determined based on the weight of each node whether the preset task scheduling condition is currently met. If it is met, the target computing task that has not been executed in the first computing node will be scheduled to the second computing node, wherein the node weight of the first computing node is less than the node weight of the second computing node. That is, when the preset task scheduling conditions are currently met, the unexecuted target computing tasks in the computing node with lower node weight will be scheduled to the second computing node with higher node weight, so as to avoid the situation where some computing nodes have high time consumption and high load due to undertaking the computing tasks corresponding to the dense sub-matrix. By scheduling the unexecuted tasks of the node to be migrated to the relatively idle computing nodes, the load imbalance problem in the solution of sparse matrices can be avoided, and the computing efficiency can also be improved.

[0085] See also Figure 3 As shown, the embodiment of the present application discloses a specific task scheduling method in circuit simulation. Compared with the previous embodiment, this embodiment further illustrates and optimizes the technical solution, specifically including:

[0086] Step S21: obtaining a target sparse matrix generated based on the connection relationship between circuit elements in a target circuit netlist; wherein the target circuit netlist is a circuit netlist used in circuit simulation.

[0087] Step S22: Count the number of non-zero elements in each row and each column of the target sparse matrix to obtain non-zero element distribution information, and divide the target sparse matrix into multiple sub-matrices based on the non-zero element distribution information; wherein each sub-matrix corresponds to a computing task, and the difference in the number of non-zero elements between different sub-matrices is within a preset range.

[0088] In the present embodiment, when the target sparse matrix is divided into a plurality of sub-matrices, the non-zero element distribution information of the target sparse matrix can also be specifically referred to, wherein the non-zero element distribution information can be obtained by counting the number of non-zero elements in each row and each column of the target sparse matrix. By dividing the target sparse matrix based on the non-zero element distribution information, its purpose is to make the difference in the number of non-zero elements between different sub-matrices within a preset range. That is, when initially dividing the sub-matrices, try to ensure that the number of non-zero elements in each sub-matrix is approximately the same, so that the computational load of the corresponding computing tasks will not differ too much, thereby making it possible to keep load balancing when each computing task is initially assigned to different computing nodes.

[0089] Step S23: Determine a preset computing node cluster and the number of computing nodes in the computing node cluster, and then, based on the number of each computing task and the number of computing nodes, evenly distribute each computing task to the task queue corresponding to each computing node in the computing node cluster, so as to utilize each computing node in the computing node cluster to execute the corresponding computing task.

[0090] In this embodiment, it is necessary to determine a preset computing node cluster to determine the number of computing nodes in the cluster, that is, how many computing nodes are there in the current cluster to perform computing tasks. Further, this application distributes each computing task evenly to the task queue corresponding to each computing node in the computing node cluster based on the number of each computing task and the number of computing nodes, so as to utilize each computing node in the computing node cluster to perform the corresponding computing task. For example, assuming that there are 100 computing tasks and there are 20 computing nodes, then these 100 computing tasks are evenly distributed to 20 computing nodes, and each computing node needs to perform 5 computing tasks.

[0091] Step S24: using a preset monitor to periodically monitor the load information and task execution status of each computing node; the load information includes CPU utilization and current remaining memory, and the task execution status is the current length of the task queue.

[0092] In the present embodiment, consider that as calculating proceeds, the load degree of node also can change therewith, even if for example the non-zero element that two submatrices comprise is identical, but because the non-zero element is different in the position of submatrix, its required computing time and the computing resource quantity of calling are also different.Therefore the application uses monitor to monitor the state of computing node in real time, provides data support for dynamic scheduling, guarantees that system can respond to load change quickly.In a specific embodiment, monitor can periodically monitor the load information and task execution state of each computing node, for example, carries out once monitoring every 5 seconds; Wherein, load information includes but is not limited to CPU utilization and current remaining memory, for example, can also include network bandwidth, and task execution state can specifically be the current length of task queue, can also include task completion rate, calculation error rate etc. in addition.

[0093] It should be noted that after using the preset monitor to periodically monitor the load information and task execution status of each computing node, it also includes: if the CPU utilization of any computing node is greater than the preset utilization threshold for a consecutive preset number of cycles, or if the current remaining memory of any computing node is lower than the preset memory threshold, then any computing node will be marked as an abnormal computing node, and the unexecuted computing tasks in any computing node will be scheduled to the remaining computing nodes.

[0094] That is, if it is monitored that the CPU utilization of any computing node is greater than the preset utilization threshold for a continuous preset number of cycles, for example, the CPU utilization is >90% for 1 minute, it means that the computing node is already in an overloaded state, or if it is monitored that the current remaining memory of any computing node is lower than the preset memory threshold, it means that the computing node is currently not suitable for performing computing tasks. Therefore, if the above two situations occur, the computing node is directly marked as an abnormal computing node, and the unexecuted computing tasks in the computing node are scheduled to the remaining computing nodes for execution. Among them, the specific values of the preset utilization threshold and the preset memory threshold can be customized according to actual conditions, and the embodiments of the present application do not limit this.

[0095] Step S25: Using a preset weight coefficient, weighted calculation is performed on the CPU utilization, current remaining memory, and current length corresponding to each computing node to obtain the node weight of the computing node.

[0096] In this embodiment, after obtaining the CPU utilization, current remaining memory and current length of the task queue corresponding to each computing node, the monitor uses a preset weight coefficient to perform weighted calculation on the CPU utilization, current remaining memory and current length corresponding to each computing node to obtain the node weight of the corresponding computing node.

[0097] Node weights are calculated based on a preset weight formula; the preset weight formula is:

[0098] ;

[0099] in, 、 、 They are all weight coefficients, indicating the priority of different indicators. The higher the node weight, the more suitable the node is for receiving computing tasks.

[0100] Figure 4 This is a schematic diagram of the structure of a monitor disclosed in this application, which specifically includes a data acquisition module, a data processing module, an anomaly detection module, and a communication interface module. The data acquisition module is used to deploy a lightweight agent on each computing node to periodically collect local load information (such as CPU utilization, current remaining memory, network bandwidth, etc.) and task status (such as the current length of the task queue, task completion rate, etc.); the data processing module is used to aggregate the raw data reported by multiple nodes according to a time window (such as 10 seconds) to generate a global load view, and then calculate the node weight according to a preset weight formula; the anomaly detection module is used to detect whether there is an anomaly on the node, such as whether it is overloaded or faulty, and mark it as an abnormal computing node, and then the scheduler stops allocating computing tasks to the abnormal computing node; the communication interface module interacts with the scheduler and pushes the node weight and abnormal events to the scheduler.

[0101] Step S26: Calculate the weight average based on the weight of each node, and calculate the corresponding weight standard deviation using the weight of each node and the weight average, and then determine whether the weight standard deviation is greater than a preset standard deviation threshold.

[0102] In this embodiment, after obtaining the node weights of each computing node, it is necessary to calculate the average weight, and then use the node weights and the average weight to calculate the corresponding weight standard deviation. Then, by determining whether the weight standard deviation is greater than a preset standard deviation threshold, it is determined whether the preset task scheduling conditions are currently met.

[0103] Step S27: If it is greater than, it is determined that the preset task scheduling conditions are currently met, and the target computing task that has not been executed in the first computing node is scheduled to the second computing node; otherwise, it is determined that the preset task scheduling conditions are not currently met; the node weight of the first computing node is less than the node weight of the second computing node.

[0104] In a specific embodiment, if the weight standard deviation is greater than a preset standard deviation threshold, it is determined that the preset task scheduling conditions are currently met, and the target computing task that has not been executed in the first computing node is scheduled to the second computing node; the node weight of the first computing node is less than the node weight of the second computing node.

[0105] In another specific implementation, if the weight standard deviation is not greater than a preset standard deviation threshold, it is determined that the preset task scheduling condition is not currently met, and therefore there is no need to perform task scheduling.

[0106] In actual scenarios, the specific value of the preset standard deviation threshold can be customized, which is not limited in this embodiment. For example, it can be set to 25%, 30%, etc.

[0107] In addition, when it is monitored that the idle time of the task queue corresponding to a computing node exceeds a certain threshold, such as more than 10 seconds, task scheduling can also be performed, that is, the idle node can actively obtain unexecuted computing tasks from the overloaded node.

[0108] Figure 5 This is a structural diagram of a scheduler disclosed in the present application, which specifically includes a task queue management module, a load balancing strategy module, a task migration module, and a communication interface module. Among them, the task queue management module is mainly used to maintain the status of all tasks to be assigned, in execution, and completed, such as task ID, computing amount, dependency, etc., and can also dynamically adjust the queue order according to the urgency of the task (such as deadline, computing amount); the load balancing strategy module is used to allocate tasks based on the computing amount and node weight of the computing task; the task scheduling module triggers scheduling based on the monitor's alarm (such as the weight standard deviation exceeds the preset standard deviation threshold). It should be noted that the scheduling strategy is to only schedule the calculation of tasks that have not started, avoid interrupting the running computing tasks, and migrate the calculation of adjacent tasks to the same computing node to reduce communication overhead; the communication interface module interacts with the monitor on the one hand to receive node weights and alarm information, and on the other hand interacts with the computing node to issue task instructions, receive completion notifications, and synchronize scheduling requests.

[0109] For a more specific processing procedure of the above step S21, reference may be made to the corresponding contents disclosed in the above embodiments, which will not be described again here.

[0110] It can be seen that the present application first divides the target sparse matrix based on the non-zero element distribution information, with the purpose of making the difference in the number of non-zero elements between different sub-matrices within a preset range. That is, when initially dividing the sub-matrices, try to ensure that the number of non-zero elements in each sub-matrix is approximately the same, so that the computational amount of the corresponding computing tasks will not differ too much, so that when each computing task is initially assigned to different computing nodes, the load balance is maintained as much as possible. Further, as the calculation proceeds, the load level of the node will also change accordingly. The present application uses a monitor to monitor the status of the computing node in real time, providing data support for dynamic scheduling, ensuring that the system can quickly respond to load changes. The scheduler first determines whether the preset task scheduling conditions are met by obtaining the node weights of each computing node calculated by the monitor. If met, the unexecuted target computing tasks in the computing nodes with lower node weights are scheduled to the computing nodes with higher node weights to avoid the load imbalance problem in the sparse matrix solution, while also improving the sparse matrix solution speed and circuit simulation performance.

[0111] See also Figure 6 As shown, the embodiment of the present application discloses a task scheduling device in circuit simulation, which includes:

[0112] The matrix partitioning module 11 is used to obtain a target sparse matrix generated based on the connection relationship between circuit elements in the target circuit netlist, and divide the target sparse matrix into multiple sub-matrices; wherein the target circuit netlist is the circuit netlist used in circuit simulation, and each sub-matrix corresponds to a computing task.

[0113] The task allocation module 12 is used to allocate each computing task to a preset computing node cluster, so as to utilize each computing node in the computing node cluster to execute the corresponding computing task.

[0114] The weight calculation module 13 is used to periodically monitor the load information and task execution status of each computing node using a preset monitor, and calculate the node weight of each computing node based on the load information and task execution status.

[0115] The task scheduling module 14 is used to determine whether the preset task scheduling conditions are currently met based on the weight of each node. If so, the target computing task that has not been executed in the first computing node is scheduled to the second computing node; the node weight of the first computing node is less than the node weight of the second computing node.

[0116] It can be seen that in this application, a target sparse matrix generated based on the connection relationship between circuit elements in the target circuit netlist is first obtained, wherein the target circuit netlist is the circuit netlist used in circuit simulation; then the target sparse matrix is divided to obtain multiple sub-matrices, each sub-matrix corresponding to a computing task. Further, each computing task is first assigned to a preset computing node cluster to start executing the corresponding computing task using each computing node in the computing node cluster. After that, this application will use a preset monitor to periodically monitor the load information and task execution status of each computing node to achieve dynamic monitoring of the load and task execution of each computing node, and calculate the node weight of each computing node. The higher the node weight is stipulated in this application, the more suitable it is for processing computing tasks. Finally, it will be determined based on the weight of each node whether the preset task scheduling condition is currently met. If it is met, the target computing task that has not been executed in the first computing node will be scheduled to the second computing node, wherein the node weight of the first computing node is less than the node weight of the second computing node. That is, when the preset task scheduling conditions are currently met, the unexecuted target computing tasks in the computing node with lower node weight will be scheduled to the second computing node with higher node weight, so as to avoid the situation where some computing nodes have high time consumption and high load due to undertaking the computing tasks corresponding to the dense sub-matrix. By scheduling the unexecuted tasks of the node to be migrated to the relatively idle computing nodes, the load imbalance problem in the solution of sparse matrices can be avoided, and the computing efficiency can also be improved.

[0117] Since the embodiments of the device part correspond to the above embodiments, the embodiments of the device part please refer to the description of the embodiments of the method part, and will not be repeated here.

[0118] Figure 7 This is a schematic diagram of the structure of an electronic device provided in an embodiment of the present application. Specifically, the device may include: at least one processor 21, at least one memory 22, a power supply 23, a communication interface 24, an input / output interface 25, and a communication bus 26. The memory 22 is used to store a computer program, which is loaded and executed by the processor 21 to implement the relevant steps of the task scheduling method for circuit simulation performed by an electronic device disclosed in any of the aforementioned embodiments.

[0119] In this embodiment, the power supply 23 is used to provide operating voltage for each hardware device on the electronic device 20; the communication interface 24 can create a data transmission channel between the electronic device 20 and the external device. The communication protocol it follows is any communication protocol that can be applied to the technical solution of this application and is not specifically limited here; the input and output interface 25 is used to obtain external input data or output data to the outside world. Its specific interface type can be selected according to specific application needs and is not specifically limited here.

[0120] Among them, the processor 21 may include one or more processing cores, such as a 4-core processor, an 8-core processor, etc. The processor 21 can be implemented in at least one hardware form of DSP (Digital Signal Processing), FPGA (Field-Programmable Gate Array), and PLA (Programmable Logic Array). The processor 21 may also include a main processor and a coprocessor. The main processor is a processor for processing data in the awake state, also known as a CPU (Central Processing Unit); the coprocessor is a low-power processor for processing data in the standby state. In some embodiments, the processor 21 may be integrated with a GPU (Graphics Processing Unit), which is responsible for rendering and drawing the content to be displayed on the display screen. In some embodiments, the processor 21 may also include an AI (Artificial Intelligence) processor, which is used to process computing operations related to machine learning.

[0121] In addition, the memory 22, as a carrier for resource storage, can be a read-only memory, random access memory, disk or CD, etc. The resources stored thereon include an operating system 221, a computer program 222 and data 223, etc. The storage method can be temporary storage or permanent storage.

[0122] The operating system 221 is used to manage and control the hardware devices and computer programs 222 on the electronic device 20, so as to enable the processor 21 to calculate and process the massive amount of data 223 in the memory 22. The operating system 221 can be Windows, Unix, Linux, etc. In addition to including computer programs capable of implementing the task scheduling method in the circuit simulation performed by the electronic device 20 disclosed in any of the aforementioned embodiments, the computer programs 222 can further include computer programs capable of performing other specific tasks. The data 223 can include not only data transmitted by external devices received by the electronic device, but also data collected by its own input and output interface 25.

[0123] Furthermore, an embodiment of the present application also discloses a computer-readable storage medium, in which a computer program is stored. When the computer program is loaded and executed by a processor, the task scheduling method steps in the circuit simulation disclosed in any of the aforementioned embodiments are implemented.

[0124] An embodiment of the present invention further discloses a computer program product, including a computer program / instruction, which, when executed by a processor, implements the steps of the task scheduling method in circuit simulation disclosed in any of the aforementioned embodiments.

[0125] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from the other embodiments. Reference can be made to the descriptions of the identical or similar parts between the various embodiments. For the devices disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the descriptions are relatively simple, and the relevant parts can be referred to the descriptions of the methods.

[0126] Those skilled in the art may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the above description has generally described the composition and steps of each example according to function. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art may use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0127] The steps of the methods or algorithms described in conjunction with the embodiments disclosed herein can be implemented directly using hardware, a software module executed by a processor, or a combination of the two. The software module can be placed in random access memory (RAM), internal memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, a hard disk, a removable disk, a compact disc read-only memory (CD-ROM), or any other form of storage medium known in the art.

[0128] Finally, it should be noted that, in this document, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of additional identical elements in the process, method, article, or device comprising the element.

[0129] The above is a detailed introduction to the task scheduling method, equipment, medium and product in circuit simulation provided by the present invention. Specific examples are used herein to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core ideas. At the same time, for those skilled in the art, according to the ideas of the present invention, there may be changes in the specific implementation methods and application scopes. In summary, the contents of this specification should not be understood as limiting the present invention.

Claims

1. A task scheduling method in circuit simulation, characterized in that: include: Obtaining a target sparse matrix generated based on the connection relationship between circuit elements in a target circuit netlist, and dividing the target sparse matrix into a plurality of sub-matrices; wherein the target circuit netlist is a circuit netlist used in circuit simulation, and each sub-matrix corresponds to a computing task; Allocating each of the computing tasks to a preset computing node cluster so as to utilize each computing node in the computing node cluster to perform the corresponding computing task; Periodically monitoring the load information and task execution status of each computing node using a preset monitor, and calculating a node weight of each computing node based on the load information and the task execution status; Determining whether a preset task scheduling condition is currently satisfied based on the weight of each node, and if so, scheduling the target computing task not executed in the first computing node to the second computing node; the node weight of the first computing node is less than the node weight of the second computing node; Before dividing the target sparse matrix into a plurality of sub-matrices, the method further includes: Determining a target sorting method according to matrix characteristics of the target sparse matrix; wherein the target sorting method is any one of a minimum degree sorting method, a spectral sorting method, and a graph partitioning method; Rearranging the rows and columns of the target sparse matrix using the target sorting method to obtain the reordered target sparse matrix; The step of dividing the target sparse matrix into a plurality of sub-matrices comprises: Counting the number of non-zero elements in each row and column of the target sparse matrix to obtain non-zero element distribution information; The target sparse matrix is divided into a plurality of sub-matrices based on the non-zero element distribution information; wherein the difference in the number of non-zero elements between different sub-matrices is within a preset range.

2. The task scheduling method in circuit simulation according to claim 1, characterized in that: The allocating each of the computing tasks to a preset computing node cluster includes: Determine a preset computing node cluster and determine the number of computing nodes in the computing node cluster; Based on the number of each computing task and the number of computing nodes, each computing task is evenly distributed to the task queue corresponding to each computing node in the computing node cluster.

3. The task scheduling method in circuit simulation according to claim 2, characterized in that: The load information includes CPU utilization and current remaining memory, and the task execution status is the current length of the task queue; Accordingly, the calculating of the node weight of each computing node based on the load information and the task execution status includes: The CPU utilization, current remaining memory and current length corresponding to each computing node are weightedly calculated using a preset weight coefficient to obtain the node weight of the computing node.

4. The task scheduling method in circuit simulation according to claim 3, characterized in that: The node weight is calculated based on a preset weight formula; wherein the preset weight formula is: ； in, 、 、 are all weight coefficients.

5. The task scheduling method in circuit simulation according to claim 3, characterized in that: After periodically monitoring the load information and task execution status of each computing node using a preset monitor, the method further includes: If the CPU utilization of any computing node is greater than the preset utilization threshold for a consecutive preset number of cycles, or if the current remaining memory of any computing node is lower than the preset memory threshold, then the computing node will be marked as an abnormal computing node, and the unexecuted computing tasks in the computing node will be scheduled to the remaining computing nodes.

6. The task scheduling method in circuit simulation according to claim 1, characterized in that: The determining whether a preset task scheduling condition is currently met based on the weight of each node includes: Calculating a weight average based on the weights of each node, and calculating a corresponding weight standard deviation using the weights of each node and the weight average; Determine whether the weight standard deviation is greater than a preset standard deviation threshold; If it is greater than, it is determined that the preset task scheduling conditions are currently met; otherwise, it is determined that the preset task scheduling conditions are currently not met.

7. The task scheduling method in circuit simulation according to claim 1, characterized in that: The step of scheduling the unexecuted target computing task on the first computing node to the second computing node includes: Determining a first computing node whose node weight is lower than a first preset threshold, and determining a second computing node whose node weight is higher than a second preset threshold; wherein the first preset threshold is lower than the second preset threshold; An unexecuted target computing task is determined according to the task execution status corresponding to the first computing node, and the target computing task is scheduled from the first computing node to the second computing node.

8. The task scheduling method in circuit simulation according to claim 1, characterized in that: The step of scheduling the unexecuted target computing task on the first computing node to the second computing node includes: Sorting the computing nodes in descending order of their weights to obtain a sorting result; Determine the plurality of computing nodes at a preset tail position in the sorting result as first computing nodes, and determine the plurality of computing nodes at a preset head position in the sorting result as second computing nodes; An unexecuted target computing task is determined according to the task execution status corresponding to the first computing node, and the target computing task is scheduled from the first computing node to the second computing node.

9. The task scheduling method in circuit simulation according to claim 1, characterized in that: Also includes: Monitoring whether all of the computing tasks have been completed; If all tasks have been completed, the task execution results in each computing node are obtained, and the task execution results are summarized to obtain the solution result of the target sparse matrix.

10. The task scheduling method in circuit simulation according to any one of claims 1 to 9, characterized in that: The process of scheduling the target computing task that is not executed in the first computing node to the second computing node also includes: If there are multiple second computing nodes, for the target computing task not executed in the first computing node, determine whether there is a computing task adjacent to the target computing task in each computing task corresponding to each second computing node based on the target position relationship; wherein the target position relationship is the position relationship of the submatrices corresponding to each computing task in the target sparse matrix; If so, the target computing task is scheduled to the second computing node where the computing task adjacent to the target computing task is located.

11. An electronic device, characterized in that: include: Memory, used to store computer programs; A processor is used to execute the computer program to implement the steps of the task scheduling method in circuit simulation according to any one of claims 1 to 10.

12. A computer-readable storage medium, characterized in that Used to store computer programs; wherein, when the computer program is executed by a processor, the steps of the task scheduling method in circuit simulation according to any one of claims 1 to 10 are implemented.

13. A computer program product comprising a computer program / instructions, characterized in that When the computer program / instruction is executed by a processor, the steps of the task scheduling method in circuit simulation according to any one of claims 1 to 10 are implemented.

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