DC filter configuration method and device for symmetric monopole lcc-hvdc system, equipment and medium

Abstract

The present application relates to the field of high-voltage direct current transmission, and particularly relates to a DC filter configuration method, device and equipment of a symmetric monopole LCC-HVDC system and a medium, the method comprising: obtaining a topology structure of the symmetric monopole LCC-HVDC system, considering the distributed capacitance of the DC transmission line to the ground, and determining the harmonic current circulation path of the DC side of the inverter converter of the inverter station; determining the number of harmonic components and its effective value on the DC transmission line through the harmonic current circulation path; and setting the DC filter of the corresponding number at the sending end and the receiving end according to the number of harmonic components and its effective value. Through the above DC filter configuration scheme, the problem that the harmonic distribution characteristics of the DC side of the HVDC system under the symmetric monopole connection mode are quite different from those of the traditional symmetric bipolar HVDC system is solved. Under steady-state operation, the ratio of the harmonic current effective value to the rated current is well controlled, and the harmonics at the DC outlet of the rectifier side can be filtered out.

Description

Technical Field

[0001] This invention relates to the field of high voltage direct current transmission, and more particularly to a method, apparatus, equipment and medium for configuring a DC filter in a symmetrical unipolar LCC-HVDC system. Background Technology

[0002] With the rapid growth of power capacity and electricity demand, coupled with increasing resource and energy scarcity and the urgent need for environmental protection, there is a need to significantly improve the transmission capacity of key sections of the power grid by constructing a large number of new transmission lines or upgrading existing ones. However, due to natural terrain, the development of key transmission line resources is extremely difficult. Utilizing existing key transmission lines within the regional power grid to create "embedded" high-voltage direct current (LCC-HVDC) transmission systems is an economical and feasible solution.

[0003] Compared to conventional ultra-high voltage direct current (UHVDC) transmission systems that employ a symmetrical bipolar topology, "embedded" HVDC projects are better suited to a symmetrical monopolar topology with grounding only on the inverter side within the station. However, directly applying the DC filter configuration of a symmetrical UHVDC system to a symmetrical monopolar system may present compatibility issues.

[0004] The information disclosed in this background section is intended only to enhance the understanding of the general background of the invention and should not be construed as an admission or in any way implying that the information constitutes prior art known to those skilled in the art. Summary of the Invention

[0005] This invention provides a method, apparatus, device, and medium for configuring a DC filter in a symmetrical unipolar LCC-HVDC system, thereby effectively solving the problems in the background art.

[0006] To achieve the above objectives, the technical solution adopted by this invention is: a DC filter configuration method for a symmetrical unipolar LCC-HVDC system, wherein the symmetrical unipolar LCC-HVDC system is a bipolar 12-pulse converter, comprising the following steps:

[0007] Obtain the topology of the symmetrical unipolar LCC-HVDC system, consider the distributed capacitance of the DC transmission line to ground, and determine the harmonic current circulation path on the DC side of the inverter converter.

[0008] The harmonic components and their effective values ​​on the DC transmission line are determined through the harmonic current circulation path.

[0009] Based on the order of the harmonic components and the effective value of the corresponding order, DC filters of the corresponding order are set at the sending and receiving ends respectively.

[0010] Furthermore, when setting DC filters of corresponding numbers at the sending end and the receiving end respectively, the method further includes: connecting the DC filter at the sending end between the positive and negative buses, and connecting the DC filter at the sending end between the bus and ground.

[0011] Furthermore, the DC filter at the sending end is configured as two sets.

[0012] Furthermore, it also includes:

[0013] When inter-station communication is abnormal, if the sending end loses two sets of DC filters at the same time, the DC transmission system will be blocked; if the sending end loses one set of DC filters and the receiving end loses one set of DC filters, the DC transmission system will not be blocked.

[0014] Furthermore, it also includes:

[0015] Collect data including harmonic current, voltage signals, and current filter parameter values;

[0016] The acquired raw signal is denoised and preprocessed to extract the amplitude, frequency and phase information of each harmonic component;

[0017] A discrete-time state-space model of the filter and its compensation system is constructed using the amplitude, frequency, and phase information of each harmonic component.

[0018] Define the prediction time domain and the control time domain, and use the discrete-time state-space model to predict the state within a set step size in the future;

[0019] Design a cost function that considers state deviation and changes in control input as the objective of the model predictive control MPC optimization problem;

[0020] Based on the filter hardware and system safety requirements, set the upper and lower limits of the control inputs and states;

[0021] At each sampling time, acquire the current state and real-time harmonic data; use the discrete-time state-space model to calculate the state trajectory within a set future step size.

[0022] Solve the constrained MPC optimization problem online to obtain the optimal control sequence; update the filter parameters based on the control output.

[0023] After the new filter parameters are adjusted, system data continues to be collected, and the state is updated according to the state trajectory to form a closed-loop feedback.

[0024] Furthermore, the step of constructing a discrete-time state-space model of the filter and its compensation system using the amplitude, frequency, and phase information of each harmonic component includes:

[0025] A state vector is constructed using the amplitude, frequency, and phase information of each harmonic component.

[0026] The state equations and output equations are constructed using the state vectors.

[0027] The discrete-time state-space model is constructed using the state equation and the output equation.

[0028] Furthermore, the state equation is:

[0029] x(k+1)=Ax(k)+Bu(k);

[0030] The output equation is:

[0031] y(k) = Cx(k) + Du(k);

[0032] in:

[0033]

[0034] In the formula, x(k) is the state vector describing the state of the system at time k, x(k+1) is the state vector at time k+1, u(k) is the control input vector, y(k) is the output value at time k, ΔC(k) is the capacitor adjustment, ΔL(k) is the inductor adjustment, and ΔA... comp (k) represents the compensation amplitude adjustment amount, and A, B, C, and D are the system model matrices, which are determined by the physical characteristics of the system.

[0035] Furthermore, in the setting of the prediction time domain and control time domain, and in the prediction of the state within a set future step size using the discrete-time state-space model, the discrete-time state-space model is as follows:

[0036]

[0037] In the formula, N p For the prediction time domain, x(k+i|k) is the predicted future system state at time k, u(k+i|k) is the predicted future control input at time k, and j is a parameter ranging from 0 to i-1.

[0038] Furthermore, the cost function is:

[0039]

[0040] In the formula, J represents cost, and x represents cost. ref Let u be the target state vector, representing the state under the ideal condition; refThe reference control input corresponds to the initial or nominal parameters of the filter; Q is the state error weighting matrix, reflecting the system's emphasis on harmonic suppression; R is the control input variation weighting matrix, limiting the magnitude of filter parameter adjustments; x(k) is the state vector, describing the system state at time k, x(k+1) is the state vector at time k+1, u(k) is the control input vector, and N... p For the prediction time domain; T is the total number of prediction steps.

[0041] Furthermore, the upper and lower limits for setting the control input and state include:

[0042] u min ≤u(k+i|k)≤u max i = 0, 1, ..., N c -1;

[0043] x min ≤x(k+i|k)≤x max i = 1, 2, ..., N p ;

[0044] In the formula, u min ,u max These are the minimum and maximum values ​​for adjusting the filter parameters, respectively; x min ,x max N represents the minimum and maximum values ​​of the safe working range, respectively. c To control the time domain.

[0045] Further, updating the filter parameters according to the control output includes:

[0046] C(k+1)=C(k)+ΔC(k);

[0047] L(k+1)=L(k)+ΔL(k);

[0048] A comp (k+1)=A comp (k)+ΔA comp (k);

[0049] In the formula, C(k) is the capacitance parameter at time k, and C(k+1) is the capacitance parameter at time k+1; L(k) is the inductance parameter at time k, and L(k+1) is the inductance parameter at time k+1; Acomp(k) is the compensation amplitude parameter at time k, and Acomp(k+1) is the compensation amplitude parameter at time k+1.

[0050] The present invention also includes a DC filter configuration device for a symmetrical unipolar LCC-HVDC system, comprising:

[0051] The acquisition unit is used to acquire the topology of the symmetrical unipolar LCC-HVDC system, taking into account the distributed capacitance of the DC transmission line to ground, and to determine the harmonic current circulation path on the DC side of the inverter station converter.

[0052] The harmonic calculation unit is used to determine the order of the harmonic components on the DC transmission line and the effective value of the corresponding order through the harmonic current circulation path.

[0053] A DC filter unit is used to set DC filters of corresponding orders at the sending and receiving ends according to the order and effective value of the harmonic components.

[0054] The present invention also includes a computer device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor, when executing the computer program, implements the method as described above.

[0055] The present invention also includes a storage medium having a computer program stored thereon, which, when executed by a processor, implements the method as described above.

[0056] The beneficial effects of this invention are as follows: This invention solves the problem of significant differences in the harmonic distribution characteristics of the DC side of an HVDC system with a symmetrical unipolar connection compared to a traditional symmetrical bipolar HVDC system through a DC filter configuration scheme. By using a harmonic current circulation path, the order and effective value of the harmonic components on the DC transmission line are determined; based on the order and effective value of the harmonic components, DC filters of corresponding orders are set at both the sending and receiving ends. Under steady-state operation, the ratio of the effective value of the harmonic current to the rated current is well controlled, and harmonics at the DC output of the rectifier side are effectively filtered out. Attached Figure Description

[0057] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0058] Figure 1 This is a flowchart of the method in Example 1;

[0059] Figure 2 This is a schematic diagram of the device in Example 1;

[0060] Figure 3 This is a schematic diagram of the loop of the sixth harmonic in the symmetrical unipolar topology high voltage DC system in Example 2;

[0061] Figure 4This is the equivalent circuit for the sixth harmonic in the symmetrical unipolar topology high-voltage DC system in Example 2;

[0062] Figure 5 This is a schematic diagram showing that different DC filter wiring methods are used at the sending and receiving ends in Example 2;

[0063] Figure 6 This refers to the steady-state voltage of the negative pole fault in the symmetrical unipolar system under different grounding transition resistance conditions in Example 2.

[0064] Figure 7 This is a schematic diagram showing the two sets of DC filters in the inverter station going out during a communication failure in Example 2.

[0065] Figure 8 This is a schematic diagram of the structure of the computer device of the present invention. Detailed Implementation

[0066] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments.

[0067] Example 1:

[0068] like Figure 1 As shown: A DC filter configuration method for a symmetrical unipolar LCC-HVDC system, wherein the symmetrical unipolar LCC-HVDC system is a bipolar 12-pulse converter, including the following steps:

[0069] Obtain the topology of the symmetrical unipolar LCC-HVDC system, consider the distributed capacitance of the DC transmission line to ground, and determine the harmonic current circulation path on the DC side of the inverter converter.

[0070] By using the harmonic current circulation path, the order and effective value of the harmonic components on the DC transmission line are determined;

[0071] Based on the order of the harmonic components and the effective value of the corresponding order, DC filters of the corresponding order are set at the sending and receiving ends respectively.

[0072] The above-described DC filter configuration scheme solves the problem of significant differences in the DC-side harmonic distribution characteristics of HVDC systems with symmetrical unipolar connections compared to traditional symmetrical bipolar HVDC systems. By establishing a harmonic current circulation path, the order and effective value of the harmonic components on the DC transmission line are determined. Based on the order and effective value of the harmonic components, corresponding DC filters are installed at both the sending and receiving ends. Under steady-state operation, the ratio of the effective value of the harmonic current to the rated current is well controlled, and harmonics at the rectifier-side DC output are effectively filtered out.

[0073] In this embodiment, when DC filters of corresponding numbers are set at the sending end and the receiving end respectively, the method further includes: connecting the DC filter at the sending end between the positive and negative buses, and connecting the DC filter at the sending end between the bus and ground.

[0074] The DC filter at the sending end is configured as two sets.

[0075] As a preferred embodiment of the above, it further includes:

[0076] When inter-station communication is abnormal, if the sending end loses two sets of DC filters simultaneously, the DC transmission system will be blocked; if the sending end loses one set of DC filters and the receiving end loses one set of DC filters, the DC transmission system will not be blocked. This allows for a DC system blocking scheme to be implemented during communication failures.

[0077] As a preferred embodiment of the above, it further includes:

[0078] Collect data including harmonic current, voltage signals, and current filter parameter values;

[0079] The acquired raw signal is denoised and preprocessed to extract the amplitude, frequency and phase information of each harmonic component;

[0080] A discrete-time state-space model of the filter and its compensation system is constructed using the amplitude, frequency, and phase information of each harmonic component.

[0081] Define the prediction time domain and the control time domain, and use the discrete-time state-space model to predict the state within a set step size in the future;

[0082] Design a cost function that considers state deviation and changes in control input as the objective of the model predictive control MPC optimization problem;

[0083] Based on the filter hardware and system safety requirements, set the upper and lower limits of the control inputs and states;

[0084] At each sampling time, acquire the current state and real-time harmonic data; use the discrete-time state-space model to calculate the state trajectory within a set future step size.

[0085] Solve the constrained MPC optimization problem online to obtain the optimal control sequence; update the filter parameters based on the control output.

[0086] After the new filter parameters are adjusted, system data continues to be collected, and the state is updated according to the state trajectory to form a closed-loop feedback.

[0087] Model predictive control (MMC) can dynamically adjust filter parameters based on future system predictions, achieving precise compensation for different harmonic components. This improves the system's harmonic suppression and overall operational stability, while ensuring parameter adjustments are made within a safe and smooth range. In practical engineering, this method helps reduce system energy consumption, extend equipment lifespan, and achieve efficient operation.

[0088] In this embodiment, a discrete-time state-space model of the filter and its compensation system is constructed using the amplitude, frequency, and phase information of each harmonic component, including:

[0089] A state vector is constructed using the amplitude, frequency, and phase information of each harmonic component;

[0090] Construct state equations and output equations using state vectors;

[0091] A discrete-time state-space model is constructed using state equations and output equations.

[0092] A discrete-time state-space model of the filter and its compensation system is constructed to describe the influence of filter parameters on harmonic suppression. A mathematical model is established to facilitate the prediction of the system state at future moments, providing a basis for prediction in the MPC algorithm.

[0093] The state equation is as follows:

[0094] x(k+1)=Ax(k)+Bu(k);

[0095] The output equation is:

[0096] y(k) = Cx(k) + Du(k);

[0097] in:

[0098]

[0099] In the formula, x(k) is the state vector describing the state of the system at time k, x(k+1) is the state vector at time k+1, u(k) is the control input vector, y(k) is the output value at time k, ΔC(k) is the capacitor adjustment, ΔL(k) is the inductor adjustment, and ΔA... comp (k) represents the compensation amplitude adjustment amount, and A, B, C, and D are the system model matrices, which are determined by the physical characteristics of the system.

[0100] In setting up a prediction time domain and a control time domain, a discrete-time state-space model is used to predict the state within a set future step size. The discrete-time state-space model is as follows:

[0101]

[0102] In the formula, N pFor the prediction time domain, x(k+i|k) is the predicted future system state at time k, u(k+i|k) is the predicted future control input at time k, and j is a parameter ranging from 0 to i-1.

[0103] By setting the prediction time domain and the control time domain, the discrete-time state-space model is used to predict the state within a set step size in the future. This prediction of future state changes provides a basis for solving the optimal control input and ensures that the filter parameter adjustment can respond to harmonic fluctuations in advance.

[0104] As a preferred embodiment of the above, the cost function is:

[0105]

[0106] In the formula, J represents cost, and x represents cost. ref Let u be the target state vector, representing the state under the ideal condition; ref The reference control input corresponds to the initial or nominal parameters of the filter; Q is the state error weighting matrix, reflecting the system's emphasis on harmonic suppression; R is the control input variation weighting matrix, limiting the magnitude of filter parameter adjustments; x(k) is the state vector, describing the system state at time k, x(k+1) is the state vector at time k+1, u(k) is the control input vector, and N... p For the prediction time domain; T is the total number of prediction steps.

[0107] By setting a cost function, during the optimization process, we can ensure that the system state approaches the target state as quickly as possible while avoiding overly aggressive parameter adjustments, thus ensuring stable and reliable system operation.

[0108] In this embodiment, setting the upper and lower limits of control inputs and states includes:

[0109] u min ≤u(k+i|k)≤u max i = 0, 1, ..., N c -1;

[0110] x min ≤x(k+i|k)≤x max i = 1, 2, ..., N p ;

[0111] In the formula, u min ,u max These are the minimum and maximum values ​​for adjusting the filter parameters, respectively; x min ,x max N represents the minimum and maximum values ​​of the safe working range, respectively. c To control the time domain.

[0112] By setting upper and lower limits for control inputs and states, we can ensure that the control inputs for MPC solving are within the hardware's allowable range, thus preventing system instability or equipment damage caused by parameters exceeding limits.

[0113] As a preferred embodiment of the above, updating the filter parameters according to the control output includes:

[0114] C(k+1)=C(k)+ΔC(k);

[0115] L(k+1)=L(k)+ΔL(k);

[0116] A comp (k+1)=A comp (k)+ΔA comp (k);

[0117] In the formula, C(k) is the capacitance parameter at time k, and C(k+1) is the capacitance parameter at time k+1; L(k) is the inductance parameter at time k, and L(k+1) is the inductance parameter at time k+1; Acomp(k) is the compensation amplitude parameter at time k, and Acomp(k+1) is the compensation amplitude parameter at time k+1.

[0118] Real-time solution and closed-loop control ensure that the system can respond quickly to harmonic fluctuations. By predicting in advance and optimizing the filter parameters online, the harmonic suppression is more accurate, and the dynamic performance and adaptability of the system are greatly improved.

[0119] Through the above steps, model predictive control can dynamically adjust filter parameters based on future system predictions, achieving precise compensation for different harmonic components. This improves the system's harmonic suppression effect and overall operational stability, while ensuring that parameter adjustments are made within a safe and smooth range. In practical engineering, this method helps reduce system energy consumption, extend equipment lifespan, and achieve efficient operation.

[0120] like Figure 2 As shown, this embodiment also includes a DC filter configuration device for a symmetrical unipolar LCC-HVDC system, comprising:

[0121] The acquisition unit is used to acquire the topology of the symmetrical unipolar LCC-HVDC system, taking into account the distributed capacitance of the DC transmission line to ground, and to determine the harmonic current circulation path on the DC side of the inverter station converter.

[0122] The harmonic calculation unit is used to determine the order and effective value of harmonic components on a DC transmission line through a harmonic current circulation path.

[0123] The DC filter unit is used to set DC filters of corresponding orders at the sending and receiving ends according to the effective value of the order of the harmonic component.

[0124] The aforementioned DC filter configuration device solves the problem of significant differences in the DC-side harmonic distribution characteristics of HVDC systems with symmetrical unipolar connections compared to traditional symmetrical bipolar HVDC systems. By establishing a harmonic current circulation path, the order and effective value of the harmonic components on the DC transmission line are determined. Based on the order and effective value of the harmonic components, corresponding DC filters are installed at both the sending and receiving ends. Under steady-state operation, the ratio of the effective value of the harmonic current to the rated current is well controlled, and harmonics at the rectifier-side DC output are effectively filtered out.

[0125] Example 2:

[0126] like Figure 3 As shown, this embodiment takes the Yangzhen symmetrical monopolar LCC-HVDC system as an example. The Yangzhen symmetrical monopolar LCC-HVDC system adopts a symmetrical monopolar topology, and the DC side midpoint of the 12-pulse converter in the inverter station is grounded. In addition, considering the distributed capacitance of the DC transmission line to ground, this provides a circulating path for the 6th harmonic current on the DC side of the 6-pulse converter in the inverter station.

[0127] from Figure 3 The abstracted sixth harmonic current circuit is as follows: Figure 4 As shown, L and C represent the equivalent inductance and capacitance of the DC line, respectively. It can be seen that the circuit composed of the positive and negative sixth harmonic voltage sources is decoupled from each other. Therefore, even if the amplitudes of the positive and negative sixth harmonic voltage sources are equal and their phases are opposite, the sixth harmonic components of the voltage and current on the DC transmission line cannot be eliminated.

[0128] according to Figure 4 In the circuit described above, the effective value of the sixth harmonic current I6th on the DC side of the inverter can be calculated using the following formula:

[0129]

[0130] According to the formula, under the condition that other factors remain unchanged, the longer the transmission distance L, the greater the amplitude of the sixth harmonic current I6th.

[0131] This scheme employs different DC filter wiring methods at the transmitting and receiving ends. Specifically, the DC filter at the transmitting end is connected between the positive and negative buses; the DC filter at the receiving end is connected between the bus and ground, as shown below. Figure 5 As shown.

[0132] Figure 6 The DC voltage and current waveforms are shown when Scheme 3 is used. Under steady-state operation, the ratio of the effective value of the sixth harmonic current to the rated DC current is also very small, only 2%. This is because the rectifier side is equipped with an HP12 / 24 DC filter, which can filter out the 24th harmonic at the rectifier side DC output.

[0133] This embodiment proposes a DC filter configuration scheme suitable for an "embedded" symmetrical unipolar LCC-HVDC system with a symmetrical unipolar topology, solving the problem that the DC-side harmonic distribution characteristics of the HVDC system under the symmetrical unipolar connection method differ significantly from those of the traditional symmetrical bipolar HVDC system. In a symmetrical unipolar system, the DC side where the grounding point is located is mainly dominated by the 6th / 12th harmonics to ground, while the DC side where the non-grounding point is located is mainly dominated by the 12th / 24th harmonics between poles. For this specific topology, this invention proposes a scheme to configure a 6th / 12th harmonic DC filter on the non-grounding point side and a 12th / 24th harmonic DC filter on the grounding point side.

[0134] During a communication failure, when both sets of DC filters at the inverter station are disconnected, the DC system is not blocked, such as... Figure 7 As shown. This is inconsistent with the logic strategy of DC system blocking when two sets of DC filters are simultaneously out of operation under normal communication conditions.

[0135] Therefore, the strategy is changed to: in the absence of inter-station communication, if the sending end loses two sets of DC filters at the same time, the DC system is blocked; if the receiving end loses one set of DC filters and the sending end loses one set of DC filters, the DC system is not blocked.

[0136] Please see Figure 8 The diagram shows a structural schematic of a computer device provided in an embodiment of this application. An embodiment of this application provides a computer device 400, including a processor 410 and a memory 420. The memory 420 stores a computer program executable by the processor 410. When the computer program is executed by the processor 410, it performs the method described above.

[0137] This application embodiment also provides a storage medium 430, on which a computer program is stored, and the computer program is executed by a processor 410 to perform the above method.

[0138] The storage medium 430 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as Static Random Access Memory (SRAM), Electrically Erasable Programmable Read-Only Memory (EEPROM), Erasable Programmable Read Only Memory (EPROM), Programmable Red-Only Memory (PROM), Read-Only Memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk.

[0139] In the description of this invention, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. "A plurality of" means two or more, unless otherwise explicitly specified.

[0140] In this invention, unless otherwise explicitly specified and limited, the terms "installation," "connection," "linking," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0141] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Furthermore, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0142] Any process or method description in the flowchart or otherwise herein can be understood as representing a module, segment, or portion of code comprising one or more executable instructions for implementing a particular logical function or process, and the scope of the preferred embodiments of the invention includes additional implementations in which functions may be performed not in the order shown or discussed, including substantially simultaneously or in reverse order depending on the functions involved, as will be understood by those skilled in the art to which embodiments of the invention pertain.

[0143] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as a ordered list of executable instructions for implementing logical functions, and can be embodied in any computer-readable medium for use by, or in conjunction with, an instruction execution system, apparatus, or device (such as a computer-based system, a processor-included system, or other system that can fetch and execute instructions from, an instruction execution system, apparatus, or device). For the purposes of this specification, "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transmit programs for use by, or in conjunction with, an instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of computer-readable media include: an electrical connection having one or more wires (electronic device), a portable computer disk drive (magnetic device), random access memory (RAM), read-only memory (ROM), erasable and editable read-only memory (EPROM or flash memory), fiber optic devices, and portable optical disc read-only memory (CDROM). Alternatively, the computer-readable medium may be paper or other suitable media on which the program can be printed, since the program can be obtained electronically, for example, by optically scanning the paper or other medium, followed by editing, interpreting, or otherwise processing as necessary, and then stored in a computer memory.

[0144] It should be understood that various parts of the present invention can be implemented in hardware, software, firmware, or a combination thereof. In the above embodiments, multiple steps or methods can be implemented in software or firmware stored in memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, it can be implemented using any one or a combination of the following techniques known in the art: discrete logic circuits having logic gates for implementing logical functions on data signals, application-specific integrated circuits (ASICs) having suitable combinational logic gates, programmable gate arrays (PGAs), field-programmable gate arrays (FPGAs), etc.

[0145] Those skilled in the art will understand that all or part of the steps of the methods in the above embodiments can be implemented by a program instructing related hardware. The program can be stored in a computer-readable storage medium, and when executed, the program includes one or a combination of the steps of the method embodiments.

[0146] The storage medium mentioned above can be a read-only memory, a disk, or an optical disk, etc. Although embodiments of the present invention have been shown and described above, it is to be understood that the above embodiments are exemplary and should not be construed as limiting the present invention. Those skilled in the art can make changes, modifications, substitutions, and variations to the above embodiments within the scope of the present invention.

Claims

1. A method for configuring a DC filter in a symmetrical unipolar LCC-HVDC system, wherein the symmetrical unipolar LCC-HVDC system is a bipolar 12-pulse converter, characterized in that, Includes the following steps: Obtain the topology of the symmetrical unipolar LCC-HVDC system, consider the distributed capacitance of the DC transmission line to ground, and determine the harmonic current circulation path on the DC side of the inverter converter. The harmonic components and their effective values ​​on the DC transmission line are determined through the harmonic current circulation path. Based on the order of the harmonic components and the effective value of the corresponding order, DC filters of the corresponding order are set at the sending and receiving ends respectively. It also includes the following steps: Collect data including harmonic current, voltage signals, and current filter parameter values; The acquired raw signal is denoised and preprocessed to extract the amplitude, frequency and phase information of each harmonic component; A discrete-time state-space model of the filter and its compensation system is constructed using the amplitude, frequency, and phase information of each harmonic component. Define the prediction time domain and the control time domain, and use the discrete-time state-space model to predict the state within a set step size in the future; Design a cost function that considers state deviation and changes in control input as the objective of the model predictive control MPC optimization problem; Based on the filter hardware and system safety requirements, set the upper and lower limits of the control inputs and states; At each sampling time, acquire the current state and real-time harmonic data; use the discrete-time state-space model to calculate the state trajectory within a set future step size. Solve the constrained MPC optimization problem online to obtain the optimal control sequence; update the filter parameters based on the control output. After the new filter parameters are adjusted, system data continues to be collected, and the state is updated according to the state trajectory to form a closed-loop feedback.

2. The DC filter configuration method for a symmetrical unipolar LCC-HVDC system according to claim 1, characterized in that, When setting DC filters of corresponding frequencies at the sending end and receiving end respectively, the method further includes: connecting the DC filter at the sending end between the positive and negative buses, and connecting the DC filter at the sending end between the bus and ground.

3. The DC filter configuration method for a symmetrical unipolar LCC-HVDC system according to claim 1, characterized in that, The DC filter at the sending end is set to two sets.

4. The DC filter configuration method for a symmetrical unipolar LCC-HVDC system according to claim 3, characterized in that, Also includes: If the sending end loses two sets of DC filters simultaneously when inter-station communication is abnormal, the DC transmission system will be blocked. If one set of DC filters is lost at the sending end and one set of DC filters is lost at the receiving end, the DC transmission system will not be blocked.

5. The DC filter configuration method for a symmetrical unipolar LCC-HVDC system according to claim 1, characterized in that, The construction of the discrete-time state-space model of the filter and its compensation system using the amplitude, frequency, and phase information of each harmonic component includes: A state vector is constructed using the amplitude, frequency, and phase information of each harmonic component. The state equations and output equations are constructed using the state vectors. The discrete-time state-space model is constructed using the state equation and the output equation.

6. The DC filter configuration method for a symmetrical unipolar LCC-HVDC system according to claim 5, characterized in that, The state equation is: x(k + 1) = Ax(k) + Bu(k); The output equation is: y(k) = C x(k) + Du(k); in: ； In the formula, x(k) is the state vector describing the state of the system at time k, x(k+1) is the state vector at time k+1, u(k) is the control input vector, and y(k) is the output value at time k. This is the capacitor adjustment amount. For inductance adjustment, To compensate for the amplitude adjustment, A, B, C, and D are the system model matrices, which are determined by the physical characteristics of the system.

7. The DC filter configuration method for a symmetrical unipolar LCC-HVDC system according to claim 6, characterized in that, In the process of setting the prediction time domain and control time domain, and using the discrete-time state-space model to predict the state within a set future step size, the discrete-time state-space model is as follows: ； In the formula, N p To predict the time domain, Let k be the predicted future system state at step i. Let be the control input for the i-th future step predicted at time k, and j be a parameter ranging from 0 to i-1.

8. The DC filter configuration method for a symmetrical unipolar LCC-HVDC system according to claim 1, characterized in that, The cost function is: ； In the formula, J represents cost, and x represents cost. ref Let u be the target state vector, representing the state under the ideal condition; ref The reference control input corresponds to the initial or nominal parameters of the filter; Q is the state error weighting matrix, reflecting the system's emphasis on harmonic suppression; R is the control input variation weighting matrix, limiting the magnitude of filter parameter adjustments; x(k) is the state vector, describing the system state at time k, x(k+1) is the state vector at time k+1, u(k) is the control input vector, and N... p For the prediction time domain; T is the total number of prediction steps.

9. The DC filter configuration method for a symmetrical unipolar LCC-HVDC system according to claim 8, characterized in that, The upper and lower limits for setting control inputs and states include: ； ； In the formula, u min ,u max These are the minimum and maximum values ​​for adjusting the filter parameters, respectively; x min ,x max N represents the minimum and maximum values ​​of the safe working range, respectively. c To control the time domain.

10. The DC filter configuration method for a symmetrical unipolar LCC-HVDC system according to claim 6, characterized in that, The step of updating the filter parameters according to the control output includes: ； ； ； In the formula, C(k) is the capacitance parameter at time k, and C(k+1) is the capacitance parameter at time k+1; L(k) is the inductance parameter at time k, and L(k+1) is the inductance parameter at time k+1; Acomp(k) is the compensation amplitude parameter at time k, and Acomp(k+1) is the compensation amplitude parameter at time k+1.

11. A DC filter configuration device for a symmetrical unipolar LCC-HVDC system, characterized in that, The apparatus for using the method as described in any one of claims 1 to 10 comprises: The acquisition unit is used to acquire the topology of the symmetrical unipolar LCC-HVDC system, taking into account the distributed capacitance of the DC transmission line to ground, and to determine the harmonic current circulation path on the DC side of the inverter station converter. The harmonic calculation unit is used to determine the order and effective value of the harmonic components on the DC transmission line through the harmonic current circulation path. A DC filter unit is used to set DC filters of corresponding orders at the sending and receiving ends according to the order of the harmonic components and the effective value of the corresponding orders.

12. A computer device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the method as described in any one of claims 1-10.

13. A storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the method as described in any one of claims 1-10.

Images