5G TDD signal-oriented power detection and control method and device

Abstract

The invention discloses a power detection and control method and device for a 5G TDD signal, and relates to the technical field of wireless communication, the method comprises the steps that a downlink radio frequency link is adopted to amplify and control a downlink radio frequency signal, and the downlink radio frequency link comprises a controllable attenuator; an uplink radio frequency link is adopted to amplify an uplink radio frequency signal and switch an uplink and a downlink; an input radio-frequency signal is detected and amplified, and a low-duty-ratio pulse signal is converted into a continuous and flat level signal in combination with an input peak value sampling and holding circuit; detecting and amplifying the output radio frequency signal, and outputting a continuous level signal after voltage division isolation; detecting and amplifying the reflected radio frequency signal to obtain a continuous reflected power level signal; based on a continuous level signal detected by the output power, the voltage division feedback loop dynamically adjusts the controllable attenuator to form a negative feedback loop for dynamically adjusting the output power of the downlink radio frequency link; according to the invention, the detection accuracy of the low-duty-ratio modulation signal is improved.

Description

Technical Field

[0001] This application relates to the field of wireless communication technologies, and in particular, to a method and device for power detection and control for 5G TDD signals. Background Art

[0002] In a wireless communication system, the function of a power amplifier is to amplify and transmit a modulated radio frequency signal. Only with sufficient power can a relatively long transmission distance be achieved; while a radio frequency power detection circuit, which is responsible for detecting the power of the input, output, and reflected radio frequency signals, is an important basis for power amplifier monitoring, control, and protection.

[0003] Radio frequency modulation signals can be divided into continuous frequency division (i.e., FDD) signals and discontinuous time division (i.e., TDD) signals. In terms of power detection difficulty, discontinuous time division (i.e., TDD) signals are more difficult; moreover, the smaller the duty cycle of the TDD signal, the greater the difficulty. For example, 5G (the fifth generation of mobile communication technology) TDD signals have a very small duty cycle, and their measured waveform is as Figure 1 shown, the signal pulse width is about 1 ms, and the period is 20 ms, that is, the duty cycle is only 5%, a very small value, resulting in extremely high power detection difficulty.

[0004] The existing power detection scheme is mainly software-based and supplemented by hardware. The hardware only performs simple radio frequency detection without peak extraction, and peak extraction is mainly carried out in software. The schematic diagram of the circuit architecture is shown in Figure 2 , which has relatively high requirements for the analog-to-digital conversion (i.e., ADC) unit, and is prone to problems such as missed sampling, easy measurement of empty values, and large fluctuations in readings, resulting in relatively low detection accuracy for low-duty-cycle modulation signals, so there is room for improvement. Summary of the Invention

[0005] In order to improve the detection accuracy of low-duty-cycle modulation signals, this application provides a method and device for power detection and control for 5G TDD signals.

[0006] In a first aspect, the inventive purpose of this application is achieved by adopting the following technical solutions: A method for power detection and control for 5G TDD signals, comprising: Amplifying and controlling a downlink radio frequency signal by using a downlink radio frequency link, where the downlink radio frequency link includes a controllable attenuator; Amplifying an uplink radio frequency signal and switching between the uplink and downlink links by using an uplink radio frequency link, where the uplink radio frequency link includes a radio frequency switch; Detecting and amplifying an input radio frequency signal, and converting a low-duty-cycle pulse signal into a continuous and flat level signal by combining an input peak sample-and-hold circuit; Detect and amplify the output RF signal, and combine with the output peak sampling and holding circuit to output a continuous level signal after voltage division isolation; Detect and amplify the reflected RF signal, and combine with the reflected peak sampling and holding circuit to obtain a continuous reflected power level signal; Based on the continuous level signal detected by the output power, a voltage division feedback loop is used to dynamically adjust the controllable attenuator in the downlink RF, forming a negative feedback loop for dynamically adjusting the output power of the downlink RF link.

[0007] By adopting the above technical solution, the 5G TDD RF modulation signal with a low duty cycle is directly converted into a continuous level signal, effectively avoiding the possibilities of inaccurate power measurement, easy measurement of empty, and large reading fluctuations of the 5G TDD RF modulation signal from the root cause of the problem, so as to achieve the purpose of improving the detection accuracy of the low-duty-cycle modulation signal; this application provides a method for power detection and control based on a hardware-based peak holding detection circuit, which can convert a periodic signal with a very narrow period of 20 ms before peak sampling and holding into a continuous and flat level signal after peak sampling and holding; specifically, in order to achieve high-precision detection of 5G TDD low-duty-cycle signals, this application uses peak sampling and holding circuits for both input / output / reflection power detection, converting the 5G TDD low-duty-cycle pulse signal (such as pulse width 1 ms, period 20 ms) into a continuous and flat level signal; at the same time, it also provides a dynamic power closed-loop control function, that is, the continuous level signal detected by the output power adjusts the controllable attenuator of the downlink RF link through a voltage division feedback loop to achieve negative feedback automatic control, dynamically compensate for power fluctuations (such as temperature changes, load mismatch), and stabilize the output power accuracy (such as within ±1 dB range), which is beneficial to avoiding signal distortion or link damage caused by power mutations (such as burst communication) in traditional solutions, and reducing the dependence on the MCU and system delay through hardware-level closed-loop control; at the same time, through the collaborative design of the controllable attenuator and the RF switch, it can flexibly cope with the peak-to-average ratio differences of different modulation signals (such as OFDM / QAM modulation, and the reflected power detection monitors the standing wave ratio in real time, and cooperates with the controllable attenuator for dynamic adjustment, which is beneficial to improving the anti-interference ability and reliability of the system.

[0008] In a preferred example of this application: the implementation method of the peak sampling and holding circuit is: Use a detector to perform envelope detection on the RF signal; Realize the peak holding function of fast charging and slow discharging through an RC passive network, and the RC passive network includes a charge and discharge control switch, a capacitor and a resistor connected in series; The charge and discharge control switch conducts during charging, and the operational amplifier outputs a large current for fast charging; The charge and discharge control switch cuts off during discharging, and the capacitor discharges slowly through the resistor in combination.

[0009] By adopting the above technical solution, the charge and discharge control switch includes a diode and a MOS transistor. During charging, the operational amplifier provides a large current of about 10 mA for fast charging; during discharging, the RC time constant = 10 kΩ × 10 pF = 0.1 ms. The fast charging and slow discharging of this application are beneficial to shortening the charging time for the capacitor to reach the voltage peak during charging, and solving the problem of signal front capture distortion caused by the traditional RC network (charging time constant > 1 ms).

[0010] In a preferred example of this application: the voltage division feedback loop is provided with a fast adjustment mode and a slow adjustment mode, and the method includes: When the power fluctuation of the continuous level signal detected by the output power exceeds the preset fluctuation threshold, the fast adjustment mode is started to shorten the RC time constant of the voltage division feedback loop; otherwise, it is switched to the slow adjustment mode to reduce the loop power consumption of the voltage division feedback loop; Based on the preset multi-band calibration strategy, calibration parameters for different bands are preset. When powering on, the band of the current circuit is obtained, and the corresponding gain compensation coefficient is automatically loaded based on the band of the current circuit.

[0011] By adopting the above technical solution, the power fluctuation threshold is set according to the actual circuit component parameters; for example, the RC time constant of the fast adjustment mode is 100 ns, which is suitable for application scenarios with sudden power increase or decrease, and the RC time constant of the slow adjustment mode is 10 ms, which is suitable for the normal working state; the overall operation power consumption and the stability of the output power can be reduced through the dynamic switching mechanism; based on the multi-band calibration technology with preset calibration parameters for different bands, for example, the preset multi-band calibration strategy includes 5 band calibration parameters (300 MHz - 6 GHz), the gain compensation coefficient error < 0.3 dB in each band; the automatic calibration time < 50 ms (completed after power-on); a correction model can be established for the 5G TDD characteristics (such as subcarrier spacing 15 / 30 / 60 kHz); and the gain drift is corrected in real time based on the PT100 sensor data, which is beneficial to improving the calibration frequency response consistency and reducing the calibration operation time.

[0012] In the second aspect, the invention object of this application is realized by adopting the following technical solution: A device for power detection and control of 5G TDD signals, the device includes: A downlink radio frequency link for amplifying and controlling downlink radio frequency signals, and the downlink radio frequency link includes a controllable attenuator; An uplink radio frequency link for amplifying uplink radio frequency signals and switching between uplink and downlink links, and the uplink radio frequency link includes a radio frequency switch; The input power detection module is connected to the downlink RF link and is used to detect and amplify the input RF signal, and convert the low-duty-cycle pulse signal into a continuous flat level signal in combination with the input peak sample-and-hold circuit; The output power detection module is connected to the downlink RF link and is used to detect and amplify the output RF signal, and output a continuous level signal after voltage division isolation in combination with the output peak sample-and-hold circuit, wherein the output peak sample-and-hold circuit is connected to a controllable attenuator to form a negative feedback loop to realize dynamic adjustment of the output power of the downlink RF link; The reflected power detection module is used to detect and amplify the reflected RF signal, and obtain a continuous reflected power level signal in combination with the reflected peak sample-and-hold circuit.

[0013] By adopting the above technical solutions, a closed-loop system is formed by combining the input power detection module (forward signal), the output power detection module (downlink), and the reflected power detection module (standing wave detection); at the same time, the output power detection module also realizes the dynamic negative feedback of PID closed-loop control through a controllable attenuator, and generates a PWM control signal after digital signal output by the forward-reflection dual-path detection and analog-to-digital converter at the hardware level and processed by the FPGA to control the step size of the stepper motor of the controllable attenuator, which is beneficial to improving the power control accuracy of the overall circuit; the uplink RF link and the downlink RF link of this application are physically isolated through a RF switch, effectively avoiding uplink and downlink signal crosstalk.

[0014] In a preferred example of this application: the input power detection module includes: A detection unit for performing envelope detection on the input RF signal and outputting a RF envelope voltage signal; An amplification unit is connected to the detection unit to perform impedance matching and current amplification on the detected voltage signal; The input peak sample-and-hold circuit is connected to the output end of the amplification unit and includes: A fast charging branch including a diode and a first capacitor connected in series for storing the peak voltage at the signal rising edge; A slow discharging branch including a second capacitor and a variable resistor connected in parallel, and controlling the discharging rate through the RC time constant; A voltage division isolation unit is respectively connected to the output end of the input peak sample-and-hold circuit and the analog-to-digital conversion unit to divide the peak voltage to the input range of the analog-to-digital conversion unit; the analog-to-digital conversion unit converts the divided analog signal into a digital signal and outputs it.

[0015] By adopting the above technical solution, the envelope detection unit is combined to perform envelope detection on the input radio frequency signal, and the amplification unit and the input peak sampling and holding circuit are used to ensure the accuracy and stability of the voltage signal, so as to realize the accurate measurement of the power of the input radio frequency signal; the design of the fast charging branch and the slow discharging branch enables the system to quickly capture the signal peak and maintain a stable output, which helps to improve the dynamic range and response speed of power detection.

[0016] In a preferred example of this application: the output power detection module includes: A detection unit for performing envelope detection on the output radio frequency signal; An amplification unit for linearly amplifying the output radio frequency signal after envelope detection; An output peak sampling and holding circuit for outputting a continuous level signal after voltage division and isolation; A feedback control unit is connected to the control end of the controllable attenuator to form a closed-loop circuit, converts the continuous level signal after voltage division into a control voltage, and dynamically adjusts the attenuation amount of the controllable attenuator in combination with the PID algorithm, so that the output power of the controllable attenuator is stabilized within a preset fluctuation threshold.

[0017] By adopting the above technical solution, the amplification unit linearly amplifies the output radio frequency signal after envelope detection, ensuring the linearity in the signal processing process and reducing distortion; the feedback control unit dynamically adjusts the attenuation amount of the controllable attenuator in combination with the PID algorithm to ensure the stability of the output power. The closed-loop control system can monitor and adjust the output power in real time to keep it within the preset fluctuation threshold, enhancing the stability and reliability of the power detection and control system.

[0018] In a preferred example of this application: the downlink radio frequency link includes a circulator; the reflected power detection module is connected to the circulator, and the reflected power detection module includes: A detection unit for receiving the reflected radio frequency signal from the downlink radio frequency link and performing logarithmic detection on the reflected radio frequency signal, and outputting a voltage signal reflecting the magnitude of the reflected power; A reflected peak sampling and holding circuit for capturing and holding the peak of the detected signal, and electrically isolating and proportionally amplifying the held voltage signal through an isolation amplification unit to obtain a continuous reflected power level signal; A comparator for comparing the continuous reflected power level signal with a preset level threshold, and triggering an alarm signal when the continuous reflected power level signal exceeds the preset level threshold.

[0019] By adopting the above technical solutions, the reflection power detection module monitors the reflected RF signals that may appear in the downlink RF link, discovers and processes reflection problems in a timely manner; the comparator compares the continuous reflection power level signal with a preset level threshold, and triggers an alarm signal when the threshold is exceeded, which helps to early warn of potential problems.

[0020] In a preferred example of the present application: the downlink RF link further includes an input coupler, an output coupler, and a multi-stage power amplification unit disposed between the input coupler and the output coupler. The multi-stage power amplification unit includes a driver amplifier, an intermediate amplifier, and a final power amplifier connected in sequence; A controllable attenuator is disposed between the driver amplifier and the intermediate amplifier; the circulator realizes physical isolation between the downlink signal and the uplink signal, and the third port of the circulator is connected to the reflection power detection module.

[0021] By adopting the above technical solutions, the circulator realizes physical isolation between the downlink signal and the uplink signal, effectively preventing mutual interference between the two, and improving the communication quality; the multi-stage power amplification unit (including the driver amplifier, the intermediate amplifier, and the final power amplifier) provides gradually enhanced signal gain, ensuring that the final output signal has sufficient strength and clarity; the controllable attenuator disposed between the driver amplifier and the intermediate amplifier allows precise fine-tuning of the signal strength.

[0022] In a preferred example of the present application: the uplink RF link further includes a low-noise amplifier and a RF amplifier for high-gain and low-noise amplification of the uplink signal.

[0023] By adopting the above technical solutions, the low-noise amplifier (LNA) included in the uplink RF link can perform high-gain amplification on the uplink signal without significantly increasing the noise. Using a RF amplifier in the uplink can further enhance the signal strength and stability.

[0024] In a preferred example of the present application: the applicable frequency range of the downlink RF link and the uplink RF link is the RF frequency band from 30 MHz to 300 GHz; and / or, The detection unit includes a diode detector, or a logarithmic detector, or a mean square value detector.

[0025] By adopting the above technical solutions, the applicable frequency range of the downlink RF link and the uplink RF link is from 30 MHz to 300 GHz, covering a wide range from the traditional microwave band to the millimeter wave band. The wide-band design enables the device to adapt to a variety of different application scenarios and technical requirements.

[0026] In summary, the present application includes at least one of the following beneficial technical effects: 1. Convert the 5G TDD radio frequency modulation signal with a low duty cycle directly into a continuous level signal, effectively avoiding the possibilities of inaccurate power measurement, easy measurement of empty signals, and large fluctuations in readings of the 5G TDD radio frequency modulation signal from the root cause of the problem, so as to achieve the purpose of improving the detection accuracy of the low-duty-cycle modulation signal; The present application provides a method for power detection and control based on a hardware peak-holding detection circuit, which can convert a very narrow periodic signal with a period of 20 ms before peak sampling and holding into a continuous and flat level signal after peak sampling and holding; 2. Combine the detection unit to perform envelope detection on the input radio frequency signal, and use the amplification unit and the input peak sampling and holding circuit to ensure the accuracy and stability of the voltage signal, so as to achieve the accurate measurement of the power of the input radio frequency signal; The design of the fast charging branch and the slow discharging branch enables the system to quickly capture the signal peak and maintain a stable output. Description of the Drawings

[0027] Figure 1 is a time-domain diagram of the 5G TDD debugging radio frequency signal measured by a high-speed oscilloscope in the prior art; Figure 2 is a circuit schematic diagram of the radio frequency detection part in the prior art solution; Figure 3 is a flowchart of a method for power detection and control of a 5G TDD signal in an embodiment of the present application; Figure 4 is a schematic diagram of the first specific implementation manner of a device for power detection and control of a 5G TDD signal in an embodiment of the present application; Figure 5 is a schematic diagram of the transformation timing sequence of the input power detection signal in the first specific implementation manner of a device for power detection and control of a 5G TDD signal in an embodiment of the present application; Figure 6 is a schematic diagram of the timing sequence of the input, output, and reflected power readings in the first specific implementation manner of a device for power detection and control of a 5G TDD signal in an embodiment of the present application; Figure 7 is a schematic diagram of the second specific implementation manner of a device for power detection and control of a 5G TDD signal in an embodiment of the present application; Figure 8 is a schematic diagram of other implementation manners of a device for power detection and control of a 5G TDD signal in an embodiment of the present application.

[0028] Description of the Reference Numerals: 1. Downlink RF link; 11. Input coupler; 12. Output coupler; 13. Gain amplifier tube; 14. Driver amplifier tube; 15. Final power amplifier tube; 16. Controllable attenuator; 17. Circulator; 2. Uplink RF link; 21. RF switch; 22. Low-noise amplifier; 23. RF amplifier; 3. Input power detection module; 4. Output power detection module; 5. Reflection power detection module; 6. Microprocessor; 7. Inductor. Detailed implementation manner

[0029] The following further describes the present application in detail with reference to the accompanying drawings.

[0030] In one embodiment, as Figure 1 shown, the present application discloses a method for power detection and control for 5G TDD signals, specifically including the following steps: S1: Use the downlink RF link to amplify and control the downlink RF signal. The downlink RF link includes a controllable attenuator.

[0031] In this embodiment, the downlink RF link further includes a circulator; the downlink RF signal is amplified step by step through a multi-stage power amplification architecture (such as a gain amplifier tube, a driver amplifier tube, and / or a final power amplifier tube), and the output power is dynamically adjusted by using a controllable attenuator to ensure that the signal strength adapts to the antenna transmission requirements.

[0032] Specifically, first receive the IQ modulated signal after baseband processing, with a frequency range of 30 MHz to 300 GHz; drive the final power amplifier tube through an input matching network (impedance matching degree > 95%); when performing power, use the Doherty architecture to optimize the efficiency, the peak power can reach 45 dBm, and a stepper PIN diode attenuator is used to achieve 0 - 30 dB dynamic adjustment, with a step accuracy of 0.5 dB, and then the circulator is used to achieve transceiver signal isolation (isolation degree > 25 dB) to prevent uplink signal interference.

[0033] S2: Use the uplink RF link to amplify the uplink RF signal and switch between the uplink and downlink links. The uplink RF link includes an RF switch.

[0034] In this embodiment, the uplink RF link further includes a low-noise amplifier and a variable gain amplifier (adjustment range 30 dB). The transceiver channel is switched through the RF switch, and the low-noise amplifier improves the sensitivity of weak uplink signals; the RF switch is a high-power RF switch (noise figure < 2 dB); Specifically, the low-noise amplifier pre-amplifies the uplink RF signal, the variable gain amplifier cooperates with the AGC circuit to maintain a constant output level, and a distributed impedance matching network (bandwidth > 100 MHz) is used to optimize the signal transmission efficiency.

[0035] S3: Detect and amplify the input RF signal, and convert the low-duty-cycle pulse signal into a continuous flat level signal in combination with the input peak sampling and holding circuit.

[0036] In this embodiment, the implementation method of the input peak sampling and holding circuit is as follows: Use a detector to perform envelope detection on the RF signal; Implement the peak holding function of fast charging and slow discharging through an RC passive network. The RC passive network includes a charge and discharge control switch, a capacitor and a resistor connected in series. The charge and discharge control switch conducts during charging, and the operational amplifier outputs a large current for fast charging. The charge and discharge control switch cuts off during discharging, and the capacitor discharges slowly through the resistor. Similarly, the implementation methods of the output peak sampling and holding circuit and the reflected peak sampling and holding circuit are the same as that of the input peak sampling and holding circuit; and the calculation formula for the RC time constant of the peak sampling and holding circuit is τ = RC = 10 MΩ × 1 μF = 10 s; the insertion loss formula of the circulator is IL = 10lg(Pin / Pout) (dB).

[0037] Specifically, the peak sampling and holding circuit converts the low-duty-cycle pulse signal into a stable DC level: Use a Schottky diode (response time < 1 ns) to extract the RF signal envelope, and convert the current signal into a voltage signal through a transimpedance amplifier (bandwidth > 2 GHz); further, when performing peak signal latching, for example, in the fast charging branch, a 1N5711 diode (forward voltage drop < 0.4 V) + 1 μF tantalum capacitor can be used, in the slow discharging branch, a 10 MΩ resistor + 100 pF adjustable capacitor can be used, and when performing voltage division isolation, a resistor voltage division can be used to match the ADC input range (0 - 2 V) according to the attenuation ratio of 1:1000; based on the peak sampling and holding circuit composed of the above components, the signal fidelity can reach peak-to-average ratio distortion < 1 dB (duty cycle 5% to 95%), the response speed is the rising edge capture time < 50 ns, and the anti-aliasing ability is that the Nyquist frequency > 2 times the signal bandwidth.

[0038] S4: Detect and amplify the output RF signal, and output the divided and isolated continuous level signal in combination with the output peak sampling and holding circuit.

[0039] S5: Detect and amplify the reflected RF signal, and obtain a continuous reflected power level signal in combination with the reflected peak sampling and holding circuit.

[0040] In this embodiment, a circulator is used to separate the reflected signal, and a protection alarm signal is generated after detection. For example, the reflected signal is extracted from the third port of the circulator, detection with a dynamic range of -30 to +5 dBm is achieved through an AD8318 chip, and the reflected signal is compared with a preset hysteresis voltage threshold through a comparator. An alarm signal is generated at (hysteresis voltage 200 mV), or an alarm is triggered when the reflection coefficient > 15 dB.

[0041] S6: Based on the continuous level signal detected by the output power, a voltage division feedback loop is used to dynamically adjust the controllable attenuator in the downlink radio frequency to form a negative feedback loop for dynamically adjusting the output power of the downlink radio frequency link.

[0042] In this embodiment, the controllable attenuator includes a numerically controlled attenuator based on PIN diodes; the technical parameters of the low-duty-cycle pulse signal are a pulse width of 1 ms and a period of 20 ms; the voltage division feedback loop is connected to an output power detection module for detecting the output power of the output radio frequency signal; first, the continuous level signal of the output power detection module is extracted, the difference between the set value and the feedback continuous level signal is calculated using a cloud amplifier, and then a pulse width modulation signal is output through a DAC module to control the attenuator stepper motor, and dynamic power compensation and temperature compensation coefficient calibration are achieved through PWM signal modulation.

[0043] Specifically, the voltage division feedback loop is provided with a fast adjustment mode and a slow adjustment mode. When the power fluctuation of the continuous level signal detected by the output power exceeds a preset fluctuation threshold (such as ΔP = 3 dB), the fast adjustment mode is started to shorten the RC time constant of the voltage division feedback loop; otherwise, it is switched to the slow adjustment mode to reduce the loop power consumption of the voltage division feedback loop; based on a preset multi-band calibration strategy, calibration parameters for different bands are preset. In this embodiment, the applicable frequency range of the downlink radio frequency link and the uplink radio frequency link is the radio frequency band from 30 MHz to 300 GHz; when powered on, the frequency band of the current circuit is obtained, and the corresponding gain compensation coefficient is automatically loaded based on the frequency band of the current circuit; this application adopts a hybrid architecture of "hardware peak holding + software closed-loop control".

[0044] It should be understood that the sequence numbers of the steps in the above embodiments do not mean the order of execution. The execution order of each process should be determined according to its function and internal logic, and should not constitute any limitation to the implementation process of the embodiments of this application.

[0045] In one embodiment, a device for power detection and control for 5G TDD signals is provided. The device for power detection and control for 5G TDD signals corresponds to the method for power detection and control for 5G TDD signals in the above embodiment.

[0046] The device for power detection and control of 5G TDD signals includes a downlink radio frequency link, an uplink radio frequency link, an input power detection module, an output power detection module, a reflected power detection module, and a microprocessor; to facilitate the description of the specific application of the device for power detection and control of 5G TDD signals, this application exemplifies a specific implementation manner, such as Figures 3 to 6 shown Figure 3 in which P1 is the downlink input port, P2 is the common port for downlink output and uplink input, and P3 is the uplink output port; Figure 3 is the first implementation manner of the device for power detection and control of 5G TDD signals, Figure 4 is Figure 3 the schematic diagram of the input power detection signal transformation timing of the first embodiment in Figure 5 is Figure 3 the schematic diagram of the input, output, and reflected power reading timing of the first embodiment in such as Figure 3 shown, the downlink radio frequency link 1 is used to amplify and control the downlink radio frequency signal. The downlink radio frequency link 1 includes an input coupler 11, an output coupler 12, a controllable attenuator 16, a circulator 17, and a multi-stage power amplification unit disposed between the input coupler 11 and the output coupler 12. The multi-stage power amplification unit includes a driver amplifier, an intermediate amplifier, and a final power amplifier connected in sequence; the controllable attenuator 16 is disposed between the driver amplifier and the intermediate amplifier; the circulator 17 realizes the physical isolation between the downlink signal and the uplink signal, and the third port of the circulator 17 is connected to the reflected power detection module 5; wherein the driver amplifier is a gain amplification tube 13, and the intermediate amplifier is a push amplification tube 14.

[0047] The uplink radio frequency link 2 is used to amplify the uplink radio frequency signal and switch between the uplink and downlink links. The uplink radio frequency link 2 includes a radio frequency switch 21, a low-noise amplifier 22, and a radio frequency amplifier 23. The radio frequency switch 21 is a high-power radio frequency switch, and the radio frequency switch 21 is connected to an inductor 7; when the downlink radio frequency link 1 is turned on, the radio frequency switch 21 is directed to the circulator 17, so that the downlink reflected power passes through the circulator 17, the radio frequency switch 21, the inductor 7, and then to the reflected power detection module 5 for reflected power detection; when the uplink radio frequency link 2 is turned on, the radio frequency switch 21 is directed to the low-noise amplifier 22, and the uplink input signal passes through the common port P2 for downlink output and uplink input, the circulator 17, the radio frequency switch 21, the low-noise amplifier 22, the radio frequency amplifier 23, and the uplink output port P3 for uplink signal amplification and reception. The applicable frequency range of the downlink radio frequency link 1 and the uplink radio frequency link 2 is the radio frequency band from 30 MHz to 300 GHz.

[0048] The input power detection module 3, connected to the downlink RF link 1, is used to detect and amplify the input RF signal, and convert the low-duty-cycle pulse signal into a continuous flat level signal in combination with the input peak sample-and-hold circuit; the input power detection module 3 includes a detection unit 31, amplification units 32 and 37, an input peak sample-and-hold circuit, and a voltage division isolation unit; specifically, the detection unit 31 is used to perform envelope detection on the input RF signal and output an RF envelope voltage signal; the amplification unit is connected to the detection unit 31 to perform impedance matching and current amplification on the detected voltage signal; the input peak sample-and-hold circuit is connected to the output end of the amplification unit and includes a fast charging branch and a fast charging branch; the fast charging branch includes a diode and a first capacitor connected in series (the diode in Figure 3 is diode 33, and the first capacitor is capacitor 34), and is used to store the peak voltage at the signal rising edge.

[0049] As Figure 6 and Figure 7 shown, Figure 6 This is the second embodiment of the power detection and control device for 5G TDD signals, Figure 7 to be distinguished from Figure 3 and Figure 6 of other specific embodiments; the slow discharge branch includes a second capacitor and an adjustable resistor 36 connected in parallel, and the discharge rate is controlled by the RC time constant. Figure 3 Only the adjustable resistor 36 is shown in Figure 7 ; the voltage division isolation unit is respectively connected to the output end of the input peak sample-and-hold circuit and the analog-to-digital conversion unit, and divides the peak voltage to the input range of the analog-to-digital conversion unit; the analog-to-digital conversion unit converts the divided analog signal into a digital signal for output; the analog-to-digital conversion unit is an analog-to-digital converter 38; the diode 33 can also be replaced by the emitter junction or collector junction of a triode; as

[0050] The output power detection module 4 is connected to the downlink RF link 1 and is used to detect and amplify the output RF signal, and combine with the output peak sampling and holding circuit to output a continuous level signal after voltage division isolation. The output peak sampling and holding circuit is connected to the controllable attenuator 16 to form a negative feedback loop to dynamically adjust the output power of the downlink RF link 1. Specifically, the output power detection module 4 includes a detection unit, an amplification unit, an output peak sampling and holding circuit, and a feedback control unit. (The structure of the output power detection module 4 is the detection unit 41 and the amplification unit 42 in the figure. The output peak sampling and holding circuit includes a diode 43, a capacitor 44, and a resistor 46). The detection unit performs envelope detection on the output RF signal. The amplification unit linearly amplifies the output RF signal after envelope detection. The output peak sampling and holding circuit outputs a continuous level signal after voltage division isolation. The feedback control unit (the detection unit 47 and the analog-to-digital converter 48 in the figure) is connected to the control terminal of the controllable attenuator 16 to form a closed-loop circuit, converts the continuous level signal after voltage division into a control voltage, and dynamically adjusts the attenuation of the controllable attenuator 16 in combination with the PID algorithm to make the output power of the controllable attenuator 16 stable within a preset fluctuation threshold.

[0051] The reflected power detection module 5 is used to detect and amplify the reflected RF signal, and combine with the reflected peak sampling and holding circuit to obtain a continuous reflected power level signal. The reflected power detection module 5 includes a detection unit, a reflected peak sampling and holding circuit, and a comparator (not shown in the figure). (The structure of the reflected power detection module 5 is the detection unit 51 and the amplification unit 52 in the figure. The output peak sampling and holding circuit includes a diode 53, a capacitor 54, and a resistor 56; it also includes an amplification unit 57 and an analog-to-digital converter 58). The detection unit receives the reflected RF signal from the downlink RF link 1, performs logarithmic detection on the reflected RF signal, and outputs a voltage signal reflecting the magnitude of the reflected power. The reflected peak sampling and holding circuit is used to capture and hold the peak of the detected signal, and electrically isolate and proportionally amplify the held voltage signal through the isolation amplification unit to obtain a continuous reflected power level signal. The comparator compares the continuous reflected power level signal with a preset level threshold and triggers an alarm signal when the continuous reflected power level signal exceeds the preset level threshold.

[0052] Specifically, the detection unit 31 in the input power detection module 3 includes, but is not limited to, a diode detector, a logarithmic (i.e., log) detector, or a root mean square (i.e., RMS) value detector; the input peak sampling and holding circuit includes a diode 33, a capacitor 34, and a resistor 36. The amplification unit, also known as the operational amplifier unit, mainly plays an impedance isolation role and has a large output current capacity. When at a positive voltage, it can quickly charge the capacitor 34. If the detected voltage is too small, the amplification unit can also be changed to amplification, usually 1.5 to 3 times, to ensure that the minimum voltage is greater than the threshold voltage of the diode 33 (usually 0.2 V to 0.7 V).

[0053] The implementation principle of the device for power detection and control of 5G TDD signals in this application embodiment is as follows: When the device is charging, the diode 33 in the input peak sampling and holding circuit conducts, and the amplification unit outputs a large current to quickly charge the capacitor C34; when discharging, the diode 33 is cut off, preventing the capacitor 34 from discharging towards the amplification unit 32 and only allowing it to discharge through the resistor 36. Moreover, the capacitance value of the capacitor 34 is relatively large (usually at the uF level) and the resistance value of the resistor 36 is large (usually at the MΩ level), so the discharge current is extremely small and the discharge is extremely slow. Therefore, it is fast charging and slow discharging, with the ability of peak sampling and holding; the amplification unit 37 of the input peak sampling and holding circuit mainly plays an isolation role and does not amplify. The analog-to-digital converter 38 converts the analog signal into a digital signal and hands it over to the microprocessor 6 for processing.

[0054] The composition and principle of the output power detection module 4 and the reflected power detection module 5 are the same as those of the input power detection module 3. The difference is that the output power detection module 4 also extracts a level signal after peak sampling and holding to control the variable attenuator 16, forming a negative feedback loop, which can dynamically adjust and stabilize the output power of the downlink radio frequency link 1.

[0055] For the specific limitations of the device for power detection and control of 5G TDD signals, reference can be made to the limitations of the method for power detection and control of 5G TDD signals in the above text, which will not be elaborated here; each module in the above device for power detection and control of 5G TDD signals can be implemented in whole or in part through software, hardware, and their combinations; the above modules can be embedded in the processor of the computer device in hardware form or be independent of it, or can be stored in the memory of the computer device in software form, so that the processor can call and execute the operations corresponding to the above respective modules.

[0056] Those skilled in the art can clearly understand that, for the convenience and brevity of description, only the above-mentioned division of each functional unit and module is used as an example. In actual applications, the above functions can be assigned to different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above.

[0057] The above-described embodiments are only used to illustrate the technical solutions of the present application, rather than to limit it; although the present application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements on some of the features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present application, and should all be included in the protection scope of the present application.

Claims

1. A method for power detection and control of 5G TDD signals, characterized in that Comprising: Using a downlink radio frequency link to amplify and control a downlink radio frequency signal, the downlink radio frequency link includes a controllable attenuator; Using an uplink radio frequency link to amplify an uplink radio frequency signal and switch between the uplink and downlink, the uplink radio frequency link includes a radio frequency switch; Detecting and amplifying an input radio frequency signal, and combining an input peak sample and hold circuit to convert a low duty cycle pulse signal into a continuous flat level signal; Detecting and amplifying an output radio frequency signal, and combining an output peak sample and hold circuit to output a continuous level signal after voltage division isolation; Detecting and amplifying a reflected radio frequency signal, and combining a reflected peak sample and hold circuit to obtain a continuous reflected power level signal; Based on the continuous level signal detected by the output power, using a voltage division feedback loop to dynamically adjust the controllable attenuator in the downlink radio frequency, forming a negative feedback loop for dynamically adjusting the output power of the downlink radio frequency link.

2. The method for power detection and control for 5G TDD signals according to claim 1, wherein The implementation method of the peak sample and hold circuit is: Using a detector to perform envelope detection on the radio frequency signal; Implementing a fast charge and slow discharge peak holding function through an RC passive network, the RC passive network includes a charge and discharge control switch, a connected capacitor and resistor; The charge and discharge control switch conducts during charging, and the operational amplifier outputs a large current for fast charging; The charge and discharge control switch is cut off during discharge, and combined with the capacitor, it discharges slowly through the resistor.

3. The method for power detection and control for 5G TDD signals according to claim 1, wherein The voltage division feedback loop is provided with a fast adjustment mode and a slow adjustment mode, and the method includes: When the power fluctuation of the continuous level signal detected by the output power exceeds a preset fluctuation threshold, starting the fast adjustment mode and shortening the RC time constant of the voltage division feedback loop; otherwise, switching to the slow adjustment mode to reduce the loop power consumption of the voltage division feedback loop; Based on a preset multi-band calibration strategy, calibration parameters for different bands are preset, obtaining the current band of the current circuit when powered on, and automatically loading the corresponding gain compensation coefficient based on the current band of the current circuit.

4. Device for power detection and control of 5G TDD signals, characterized in that, The device includes: A downlink radio frequency link (1) for amplifying and controlling a downlink radio frequency signal, the downlink radio frequency link (1) includes a controllable attenuator (16); An uplink radio frequency link (2) for amplifying an uplink radio frequency signal and switching between the uplink and downlink, the uplink radio frequency link (2) includes a radio frequency switch (21); An input power detection module (3) connected to the downlink radio frequency link (1) for detecting and amplifying an input radio frequency signal, and combining an input peak sample and hold circuit to convert a low duty cycle pulse signal into a continuous flat level signal; An output power detection module (4) connected to the downlink radio frequency link (1) for detecting and amplifying an output radio frequency signal, and combining an output peak sample and hold circuit to output a continuous level signal after voltage division isolation, wherein the output peak sample and hold circuit is connected to the controllable attenuator (16) to form a negative feedback loop to realize dynamically adjusting the output power of the downlink radio frequency link (1); A reflected power detection module (5) for detecting and amplifying a reflected radio frequency signal, and combining a reflected peak sample and hold circuit to obtain a continuous reflected power level signal.

5. The device for power detection and control for 5G TDD signals according to claim 4, wherein The input power detection module (3) includes: A detection unit for performing envelope detection on the input radio frequency signal and outputting a radio frequency envelope voltage signal; An amplification unit connected to the detection unit for impedance matching and current amplification of the voltage signal after detection; An input peak sampling and holding circuit connected to the output end of the amplification unit, including: A fast charging branch including a diode and a first capacitor connected in series for storing the peak voltage at the signal rising edge; A slow discharging branch including a second capacitor and a variable resistor connected in parallel for controlling the discharging rate through the RC time constant; A voltage dividing and isolation unit connected to the output end of the input peak sampling and holding circuit and the analog-to-digital conversion unit respectively for dividing the peak voltage to the input range of the analog-to-digital conversion unit; the analog-to-digital conversion unit converts the divided analog signal into a digital signal for output.

6. The device for power detection and control for 5G TDD signals according to claim 4, characterized in that The output power detection module (4) includes: A detection unit for performing envelope detection on the output radio frequency signal; An amplification unit for linearly amplifying the output radio frequency signal after envelope detection; An output peak sampling and holding circuit for outputting a continuous level signal after voltage dividing and isolation; A feedback control unit connected to the control end of the controllable attenuator (16) to form a closed-loop circuit, converting the continuous level signal after voltage dividing into a control voltage, and dynamically adjusting the attenuation amount of the controllable attenuator (16) in combination with the PID algorithm to make the output power of the controllable attenuator (16) stable within a preset fluctuation threshold.

7. The device for power detection and control for 5G TDD signals according to claim 4, characterized in that, The downlink radio frequency link (1) includes a circulator (17); the reflected power detection module (5) is connected to the circulator (17), and the reflected power detection module (5) includes: A detection unit for receiving the reflected radio frequency signal from the downlink radio frequency link (1) and performing logarithmic detection on the reflected radio frequency signal, and outputting a voltage signal reflecting the magnitude of the reflected power; A reflected peak sampling and holding circuit for peak capturing and holding of the detected signal, and electrically isolating and proportionally amplifying the held voltage signal through an isolation and amplification unit to obtain a continuous reflected power level signal; A comparator for comparing the continuous reflected power level signal with a preset level threshold and triggering an alarm signal when the continuous reflected power level signal exceeds the preset level threshold.

8. The device for power detection and control for 5G TDD signals according to claim 7, wherein The downlink radio frequency link (1) further includes an input coupler (11), an output coupler (12), and a multi-stage power amplification unit provided between the input coupler (11) and the output coupler (12), and the multi-stage power amplification unit includes a driver amplifier, an intermediate amplifier, and a final power amplifier connected in sequence; The controllable attenuator (16) is provided between the driver amplifier and the intermediate amplifier; the circulator (17) realizes physical isolation between the downlink signal and the uplink signal, and the third port of the circulator (17) is connected to the reflected power detection module (5).

9. The apparatus for power detection and control for 5G TDD signals according to claim 4, characterized in that The uplink radio frequency link (2) further includes a low-noise amplifier (22) and a radio frequency amplifier (23) for performing high-gain and low-noise amplification on the uplink signal.

10. The device for power detection and control of 5G TDD signals according to any one of claims 5 to 7, characterized in that, The applicable frequency range of the downlink radio frequency link (1) and the uplink radio frequency link (2) is the radio frequency band from 30 MHz to 300 GHz; and / or, The detection unit includes a diode detector, a logarithmic detector, or a mean square value detector.

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