Display panel and display device

Abstract

The invention relates to a display panel and a display device. The display panel comprises a large pixel group and a large pixel circuit group. The pixel large group comprises a first pixel and a second pixel; the plurality of pixel circuit large groups comprise a first pixel circuit group and a second pixel circuit group; a first sub-pixel driving circuit and a third sub-pixel driving circuit in the first pixel circuit group and a second sub-pixel driving circuit in the second pixel circuit group are respectively provided with a first wiring pattern; a second sub-pixel driving circuit in the first pixel circuit group, and a first sub-pixel driving circuit and a third sub-pixel driving circuit in the second pixel circuit group are all provided with a second wiring pattern; the first wiring pattern and the second wiring pattern are in line symmetry; the first sub-pixel, the second sub-pixel and the third sub-pixel are electrically connected with different sub-pixel driving circuits respectively, and in the same pixel circuit large group, the wiring patterns of the sub-pixel driving circuits electrically connected with two of the first sub-pixel, the second sub-pixel and the third sub-pixel are the same.

Description

Technical Field

[0001] The present application relates to the field of display technologies, and particularly to a display panel and a display device. Background Art

[0002] With the continuous development of display technologies, organic light-emitting diode (OLED) display devices have been widely used in multiple fields such as flat panel displays, flexible displays, vehicle-mounted displays, and solid-state lighting due to advantages such as a wide color gamut, high contrast ratio, energy conservation, and foldability.

[0003] However, there are problems in the prior art where process deviations lead to poor display. Summary of the Invention

[0004] Based on this, it is necessary to provide a display panel and a display device, aiming to solve the problem of how to avoid or improve the poor display caused by process deviations.

[0005] In a first aspect, an embodiment of the present application provides a display panel, including a substrate, and a plurality of pixel macro groups located on one side of the substrate. The pixel macro groups include a first pixel and a second pixel arranged along a first direction. Both the first pixel and the second pixel include a first sub-pixel, a second sub-pixel, and a third sub-pixel;

[0006] The display panel further includes a plurality of pixel circuit macro groups located on one side of the substrate. The pixel circuit macro groups are correspondingly arranged with the pixel macro groups. The plurality of pixel circuit macro groups include a first pixel circuit group and a second pixel circuit group arranged along the first direction. Both the first pixel circuit group and the second pixel circuit group include a first sub-pixel driving circuit, a second sub-pixel driving circuit, and a third sub-pixel driving circuit arranged in sequence along the first direction;

[0007] Wherein, the wiring patterns of the first sub-pixel driving circuit in the first pixel circuit group, the third sub-pixel driving circuit in the first pixel circuit group, and the second sub-pixel driving circuit in the second pixel circuit group all have a first wiring pattern. The wiring patterns of the second sub-pixel driving circuit in the first pixel circuit group, the first sub-pixel driving circuit in the second pixel circuit group, and the third sub-pixel driving circuit in the second pixel circuit group all have a second wiring pattern;

[0008] In the same pixel circuit macro group, the first wiring pattern and the second wiring pattern are line-symmetric figures, and the wiring patterns of the first wiring pattern and the second wiring pattern are different;

[0009] The first sub-pixel, the second sub-pixel, and the third sub-pixel are respectively electrically connected to different sub-pixel driving circuits. Among the two types of sub-pixels in the same large pixel circuit group, the wiring patterns of the sub-pixel driving circuits to which the two sub-pixels of each type of sub-pixel are respectively electrically connected are the same.

[0010] In a second aspect, based on the same inventive concept, an embodiment of the present application further provides a display device, and the display device includes any one of the display panels provided in the first aspect.

[0011] In the embodiment of the present application, the first sub-pixel, the second sub-pixel, and the third sub-pixel are respectively electrically connected to different sub-pixel driving circuits. Among the two types of sub-pixels in the same large pixel circuit group, the wiring patterns of the sub-pixel driving circuits to which the two sub-pixels of each type of sub-pixel are respectively electrically connected are the same; that is, at least in at least one direction in a partial region, the adjacent sub-pixel driving circuits are arranged in a line-symmetric wiring pattern. Among the two types of sub-pixels in two adjacent pixels, the wiring patterns of the sub-pixel driving circuits to which the two sub-pixels of each type of sub-pixel are respectively electrically connected are the same. When the manufacturing process deviates (during process fluctuations), for example, the alignment accuracy has a single-direction offset, for example, the etching direction shifts in one direction (for example, shifts to the left), the offset directions of the wiring patterns of the sub-pixel driving circuits to which the two sub-pixels of each type of sub-pixel in two adjacent pixels are respectively electrically connected are the same. For example, the capacitances of the sub-pixel driving circuits to which the red sub-pixels in two pixels are electrically connected both increase, so that the capacitances of the sub-pixel driving circuits to which the two sub-pixels of each type of sub-pixel in two adjacent pixels are respectively electrically connected are consistent, so that the brightnesses of the two sub-pixels of each type of sub-pixel in two adjacent pixels in a pure color screen are the same, improving or avoiding problems such as uneven display performance degradation in the displayed image, and thus can improve or avoid problems of poor display caused by process deviation. Description of the Drawings

[0012] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0013] Figure 1 It is a schematic diagram of the sub-pixel arrangement and the sub-pixel driving circuit arrangement in a partial region of an improved display panel provided by an embodiment of the present application.

[0014] Figure 2 It is a schematic diagram of the whole of a display panel provided by an embodiment of the present application.

[0015] Figure 3The first schematic diagram of the sub-pixel arrangement and the sub-pixel driving circuit arrangement in a partial area of a display panel provided by an embodiment of the present application.

[0016] Figure 4 The second schematic diagram of the sub-pixel arrangement and the sub-pixel driving circuit arrangement in a partial area of a display panel provided by an embodiment of the present application.

[0017] Figure 5 The third schematic diagram of the sub-pixel arrangement and the sub-pixel driving circuit arrangement in a partial area of a display panel provided by an embodiment of the present application.

[0018] Figure 6 The fourth schematic diagram of the sub-pixel arrangement and the sub-pixel driving circuit arrangement in a partial area of a display panel provided by an embodiment of the present application.

[0019] Figure 7 The fifth schematic diagram of the sub-pixel arrangement and the sub-pixel driving circuit arrangement in a partial area of a display panel provided by an embodiment of the present application.

[0020] Figure 8 The schematic diagram of a display device provided by an embodiment of the present application.

[0021] Reference numerals: display device 200; display panel 100; substrate 101; large pixel group 10; first pixel 11; second pixel 12; first sub-pixel 111; second sub-pixel 112; third sub-pixel 113; large pixel circuit group 20; first pixel circuit group 21; second pixel circuit group 22; first sub-pixel driving circuit 211; second sub-pixel driving circuit 212; third sub-pixel driving circuit 213; first wiring pattern 20a; second wiring pattern 20b; first direction X; first connection portion 111a; second connection portion 112a; third connection portion 113a; dummy triangle S1. Detailed implementation manners

[0022] To facilitate the understanding of the present application, the present application will be described more comprehensively below with reference to the relevant drawings. The preferred embodiments of the present application are shown in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, these embodiments are provided to make the understanding of the disclosure of the present application more thorough and comprehensive.

[0023] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the technical field to which the present application belongs. The terms used in the specification of the present application herein are only for the purpose of describing specific embodiments and are not intended to limit the present application. The term "and / or" used herein includes any and all combinations of one or more of the related listed items.

[0024] When describing positional relationships, unless otherwise specified, when an element such as a layer, film, or substrate is referred to as being "on" another element, it can be directly on the other element or there can also be intervening elements. Further, when a layer is referred to as being "under" another layer, it can be directly underneath or there can be one or more intervening elements. It can also be understood that when a layer is referred to as being "between" two layers, it can be the only layer between the two layers or there can also be one or more intervening elements.

[0025] In cases where "comprising", "having", and "including" as described herein are used, unless an explicit limiting term such as "only", "consisting of", etc. is used, another component can also be added. Unless otherwise mentioned, terms in the singular form can include the plural form and should not be understood as having a quantity of one.

[0026] It should be understood that although terms such as "first", "second", etc. can be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, without departing from the scope of the present application, the first element can be referred to as the second element, and similarly, the second element can be referred to as the first element.

[0027] It should also be understood that when interpreting an element, although not explicitly described, the element is interpreted as including an error range, and this error range should be within the acceptable deviation range of a specific value determined by those skilled in the art. For example, "about", "approximate", or "substantially" can mean within one or more standard deviations, which is not limited herein.

[0028] In addition, in the specification, the phrase "schematic diagram of planar distribution" refers to the drawing when observing the target part from above, and the phrase "schematic cross-sectional diagram" refers to the drawing when observing the cross-section intercepted by vertically cutting the target part from the side.

[0029] In addition, the drawings are not drawn to a 1:1 scale, and the relative dimensions of each element are only drawn by way of example in the drawings and not necessarily to the true scale.

[0030] Without departing from the spirit or scope of the present application, various modifications and variations can be made in the present application, which are obvious to those skilled in the art. Thus, the present application is intended to cover modifications and variations of the present application that fall within the scope of the corresponding claims (claimed technical solutions) and their equivalents. It should be noted that the embodiments provided in the embodiments of the present application can be combined with each other without contradiction.

[0031] As described in the background art section, the prior art has the problem that display defects are caused by process deviations (process fluctuations). Please refer to Figure 1 , Figure 1 which is a schematic diagram of the sub-pixel arrangement and the sub-pixel driving circuit arrangement in a partial area of a display panel before improvement provided by an embodiment of the present application. The inventors have found that in order to reduce the layout space occupied by the layout design (layout), or to set more wirings and electrodes in a limited layout space, or to improve the resolution of the display panel, in at least one arrangement direction of at least a part of the area, adjacent sub-pixel driving circuits can be set into a line-symmetric wiring pattern. When the sub-pixels are sequentially electrically connected to the corresponding sub-pixel driving circuits in two adjacent pixels, two sub-pixels of the same color in the two adjacent pixels are respectively electrically connected to two sub-pixel driving circuits with a line-symmetric wiring pattern. When the process deviates (during process fluctuations), for example, the alignment accuracy deviates in a single direction, for example, the etching direction deviates in one direction (for example Figure 1 to the left in

[0032] ), in two adjacent pixels, the offset directions of the wiring patterns of the adjacent sub-pixel driving circuits to which two sub-pixels of the same color are electrically connected are opposite. For example, the capacitance of the sub-pixel driving circuit to which the red sub-pixel in one pixel is electrically connected increases, and the capacitance of the sub-pixel driving circuit to which the red sub-pixel in the adjacent pixel is electrically connected decreases. This will result in a situation where the capacitances of the sub-pixel driving circuits to which two sub-pixels of the same color in two adjacent pixels are respectively electrically connected are one large and one small, causing the brightness of the first sub-pixel, the second sub-pixel, or the third sub-pixel in two adjacent pixels in a pure color screen to be different, resulting in a decrease in display performance such as uneven display of the pure color screen.Based on the above technical problems, the inventors have studied and found that the display panel includes a plurality of pixel groups and a plurality of pixel circuit groups. The pixel circuit groups are correspondingly arranged with the pixel groups. The pixel groups include a first pixel and a second pixel arranged along a first direction. Both the first pixel and the second pixel include a first sub-pixel, a second sub-pixel, and a third sub-pixel. The plurality of pixel circuit groups include a first pixel circuit group and a second pixel circuit group arranged along the first direction. Both the first pixel circuit group and the second pixel circuit group include a first sub-pixel driving circuit, a second sub-pixel driving circuit, and a third sub-pixel driving circuit arranged in sequence along the first direction. Among them, the wiring patterns of the first sub-pixel driving circuit in the first pixel circuit group, the third sub-pixel driving circuit in the first pixel circuit group, and the second sub-pixel driving circuit in the second pixel circuit group all have a first wiring pattern. The wiring patterns of the second sub-pixel driving circuit in the first pixel circuit group, the first sub-pixel driving circuit in the second pixel circuit group, and the third sub-pixel driving circuit in the second pixel circuit group all have a second wiring pattern. In the same pixel circuit group, the first wiring pattern and the second wiring pattern are line-symmetric figures, and the wiring patterns of the first wiring pattern and the second wiring pattern are different. The first sub-pixel, the second sub-pixel, and the third sub-pixel are respectively electrically connected to different sub-pixel driving circuits. Among the two types of sub-pixels in the same pixel circuit group, the wiring patterns of the sub-pixel driving circuits to which the two sub-pixels of each type of sub-pixel are respectively electrically connected are the same. That is, at least in at least one direction in a partial region, the adjacent sub-pixel driving circuits are set to have a line-symmetric wiring pattern. Among the two types of sub-pixels of two adjacent pixels, the wiring patterns of the sub-pixel driving circuits to which the two sub-pixels of each type of sub-pixel are respectively electrically connected are the same. When the manufacturing process has an offset (process fluctuation), for example, the alignment accuracy has a one-way offset, for example, the etching direction has an offset in one direction (for example, offset to the left), among the two types of sub-pixels of two adjacent pixels, the offset directions of the wiring patterns of the sub-pixel driving circuits to which the two sub-pixels of each type of sub-pixel are respectively electrically connected are the same. For example, the capacitances of the sub-pixel driving circuits to which the red sub-pixels in two pixels are electrically connected both increase, so that among the two types of sub-pixels of two adjacent pixels, the capacitances of the sub-pixel driving circuits to which the two sub-pixels of each type of sub-pixel are respectively electrically connected are consistent, so that in a pure color screen, the brightness of the two sub-pixels of each type of sub-pixel in two adjacent pixels is the same, improving or avoiding problems such as uneven display performance degradation in the display, thereby improving or avoiding problems of poor display caused by manufacturing process deviation.

[0033] The above is the core idea of this application. Next, the technical solutions in the embodiments of this application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of this application. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without making creative efforts belong to the scope of protection of this application.

[0034] Please refer toFigures 2 to 7 . Figure 2 This is an overall schematic diagram of a display panel provided by an embodiment of the present application. Figure 3 This is a first schematic diagram of the sub-pixel arrangement and the sub-pixel driving circuit arrangement in a partial area of a display panel provided by an embodiment of the present application. Figure 4 This is a second schematic diagram of the sub-pixel arrangement and the sub-pixel driving circuit arrangement in a partial area of a display panel provided by an embodiment of the present application. Figure 5 This is a third schematic diagram of the sub-pixel arrangement and the sub-pixel driving circuit arrangement in a partial area of a display panel provided by an embodiment of the present application. Figure 6 This is a fourth schematic diagram of the sub-pixel arrangement and the sub-pixel driving circuit arrangement in a partial area of a display panel provided by an embodiment of the present application. Figure 7 This is a fifth schematic diagram of the sub-pixel arrangement and the sub-pixel driving circuit arrangement in a partial area of a display panel provided by an embodiment of the present application.

[0035] Figures 3 to 7 Schematically shows Figure 2 a partial enlarged schematic diagram of the part within the dashed box in Figure 7 in Figures 3 to 6 is different from the arrangement mode of the sub-pixels in

[0036] The present application provides a display panel 100. The display panel 100 includes a substrate 101 and a plurality of pixel groups 10 located on one side of the substrate 101. The pixel group 10 includes a first pixel 11 and a second pixel 12 arranged along a first direction X. Both the first pixel 11 and the second pixel 12 include a first sub-pixel 111, a second sub-pixel 112, and a third sub-pixel 113. The display panel 100 further includes a plurality of pixel circuit groups 20 located on one side of the substrate 101. The pixel circuit groups 20 are correspondingly arranged with the pixel groups 10. The plurality of pixel circuit groups 20 includes a first pixel circuit group 21 and a second pixel circuit group 22 arranged along the first direction X. Both the first pixel circuit group 21 and the second pixel circuit group 22 include a first sub-pixel driving circuit 211, a second sub-pixel driving circuit 212, and a third sub-pixel driving circuit 213 arranged in sequence along the first direction X. Among them, the wiring patterns of the first sub-pixel driving circuit 211 in the first pixel circuit group 21, the third sub-pixel driving circuit 213 in the first pixel circuit group 21, and the second sub-pixel driving circuit 212 in the second pixel circuit group 22 all have a first wiring pattern 20a. The wiring patterns of the second sub-pixel driving circuit 212 in the first pixel circuit group 21, the first sub-pixel driving circuit 211 in the second pixel circuit group 22, and the third sub-pixel driving circuit 213 in the second pixel circuit group 22 all have a second wiring pattern 20b. In the same pixel circuit group 20, the first wiring pattern 20a and the second wiring pattern 20b are line-symmetric figures, and the wiring patterns of the first wiring pattern 20a and the second wiring pattern 20b are different. The first sub-pixel 111, the second sub-pixel 112, and the third sub-pixel 113 are respectively electrically connected to different sub-pixel driving circuits. Among the two types of sub-pixels in the same pixel circuit group 20, the wiring patterns of the sub-pixel driving circuits to which the two sub-pixels of each type of sub-pixel are respectively electrically connected are the same.

[0037] Exemplarily, in some embodiments, the display panel 100 includes a plurality of pixel groups 10. The pixel group 10 includes a first pixel 11 and a second pixel 12 arranged along the first direction X. For example, in some embodiments, in the first direction X of at least a part of the area of the display panel 100, the first pixel 11 and the second pixel 12 are alternately arranged.

[0038] Exemplarily, in some embodiments, the display panel 100 further includes a plurality of pixel circuit groups 20. The pixel circuit groups 20 are correspondingly arranged with the pixel groups 10. The plurality of pixel circuit groups 20 includes a first pixel circuit group 21 and a second pixel circuit group 22 arranged along the first direction X. For example, in some embodiments, in the first direction X of at least a part of the area of the display panel 100, the first pixel circuit group 21 and the second pixel circuit group 22 are alternately arranged.

[0039] Exemplarily, a large group of pixel circuits 20 is correspondingly arranged with a large group of pixels 10, that is, the sub-pixels in the large group of pixels 10 are correspondingly electrically connected to the sub-pixel driving circuits in the corresponding large group of pixel circuits 20.

[0040] Exemplarily, the display panel 100 includes a plurality of sub-pixel driving circuits. The sub-pixel driving circuits may include structures such as a driving module, a data writing module, a threshold compensation module, a light emission control module, and a storage module. The driving module and the sub-pixel are sequentially electrically connected between a first power supply line (VDD) and a second power supply line (VSS). The driving module is configured to provide a driving current to the sub-pixel, and the driving module includes a driving transistor; the data writing module includes a data writing transistor. The first pole of the data writing transistor is electrically connected to the data signal line, and the second pole of the data writing transistor is electrically connected to the first end of the driving module. The data writing module is configured to write a data signal to the first end of the driving module during the data writing stage; the threshold compensation module is electrically connected between the second pole and the gate of the driving transistor, and the threshold compensation module is configured to compensate the threshold voltage of the driving transistor; the light emission control module is connected in series between the first power supply line and the sub-pixel, and the light emission control module is configured to control the sub-pixel to emit light. The structure of the sub-pixel driving circuit is not limited to this.

[0041] Exemplarily, the arrangement of the plurality of sub-pixel driving circuits includes a plurality of first sub-pixel driving circuits 211, a plurality of second sub-pixel driving circuits 212, and a plurality of third sub-pixel driving circuits 213.

[0042] Exemplarily, the display panel 100 includes a plurality of sub-pixels. The types of the plurality of sub-pixels may include red sub-pixels, green sub-pixels, and blue sub-pixels; the sub-pixels can be understood as light-emitting devices. The structure of the plurality of sub-pixels (light-emitting devices) may include a first electrode, a light-emitting functional layer, and a second electrode that are sequentially stacked in a direction perpendicular to the plane where the substrate 101 is located. One of the first electrode and the second electrode is an anode, and the other of the first electrode and the second electrode is a cathode; the sub-pixel is electrically connected to the corresponding sub-pixel driving circuit, which means that the first electrode of the light-emitting device is electrically connected to the corresponding sub-pixel driving circuit.

[0043] Exemplarily, the arrangement or types of the plurality of sub-pixels include a plurality of first sub-pixels 111, a plurality of second sub-pixels 112, and a plurality of third sub-pixels 113.

[0044] Exemplarily, the first pixel 11 and the second pixel 12 both include a first sub-pixel 111, a second sub-pixel 112, and a third sub-pixel 113. That is, the first pixel 11 includes a first sub-pixel 111, a second sub-pixel 112, and a third sub-pixel 113, and the second pixel 12 also includes another first sub-pixel 111, another second sub-pixel 112, and another third sub-pixel 113.

[0045] Exemplarily, both the first pixel circuit group 21 and the second pixel circuit group 22 include a first sub-pixel driving circuit 211, a second sub-pixel driving circuit 212, and a third sub-pixel driving circuit 213 arranged in sequence along the first direction X. That is, the first pixel circuit group 21 includes a first sub-pixel driving circuit 211, a second sub-pixel driving circuit 212, and a third sub-pixel driving circuit 213 arranged in sequence along the first direction X, and the second pixel circuit group 22 also includes another first sub-pixel driving circuit 211, another second sub-pixel driving circuit 212, and another third sub-pixel driving circuit 213 arranged in sequence along the first direction X.

[0046] Exemplarily, the wiring patterns of the first sub-pixel driving circuit 211 in the first pixel circuit group 21, the third sub-pixel driving circuit 213 in the first pixel circuit group 21, and the second sub-pixel driving circuit 212 in the second pixel circuit group 22 all have a first wiring pattern 20a, and the wiring patterns of the second sub-pixel driving circuit 212 in the first pixel circuit group 21, the first sub-pixel driving circuit 211 in the second pixel circuit group 22, and the third sub-pixel driving circuit 213 in the second pixel circuit group 22 all have a second wiring pattern 20b; in the same large pixel circuit group 20, the first wiring pattern 20a and the second wiring pattern 20b are line-symmetric figures, and the wiring patterns of the first wiring pattern 20a and the second wiring pattern 20b are different. As Figure 3 shown, in the same large pixel circuit group 20, the first sub-pixel driving circuit 211 in the first pixel circuit group 21, the second sub-pixel driving circuit 212 in the first pixel circuit group 21, the third sub-pixel driving circuit 213 in the first pixel circuit group 21, the first sub-pixel driving circuit 211 in the second pixel circuit group 22, the second sub-pixel driving circuit 212 in the second pixel circuit group 22, and the third sub-pixel driving circuit 213 in the second pixel circuit group 22 are arranged in sequence, and the wiring patterns (patterns of the layout) of two adjacent sub-pixel driving circuits are line-symmetric figures. For example, the wiring pattern (pattern of the layout) of the first sub-pixel driving circuit 211 in the first pixel circuit group 21 and the second sub-pixel driving circuit 212 in the first pixel circuit group 21 are symmetric about an intermediate line therebetween.

[0047] For example, in the same large pixel circuit group 20, the first sub-pixel 111, the second sub-pixel 112, and the third sub-pixel 113 are respectively electrically connected to different sub-pixel driving circuits. Among the two types of sub-pixels in the same large pixel circuit group 20, the wiring patterns of the sub-pixel driving circuits to which two sub-pixels of each type of sub-pixel are respectively electrically connected are the same. For example, the wiring patterns of the sub-pixel driving circuits to which two first sub-pixels 111 in the same large pixel circuit group 20 are electrically connected are the same, and the wiring patterns of the sub-pixel driving circuits to which two second sub-pixels 112 in the same large pixel circuit group 20 are electrically connected are the same. For example, the wiring patterns of the sub-pixel driving circuits to which two first sub-pixels 111 in the same large pixel circuit group 20 are electrically connected are the same, and the wiring patterns of the sub-pixel driving circuits to which two third sub-pixels 113 in the same large pixel circuit group 20 are electrically connected are the same. For example, the wiring patterns of the sub-pixel driving circuits to which two second sub-pixels 112 in the same large pixel circuit group 20 are electrically connected are the same, and the wiring patterns of the sub-pixel driving circuits to which two third sub-pixels 113 in the same large pixel circuit group 20 are electrically connected are the same.

[0048] For example, in some embodiments, among the two types of sub-pixels in the same large pixel circuit group 20, the wiring patterns of the sub-pixel driving circuits to which two sub-pixels of each type of sub-pixel are respectively electrically connected are the same, and the wiring patterns of the sub-pixel driving circuits electrically connected between these two types of sub-pixels are different. For example, the wiring patterns of the sub-pixel driving circuits to which two first sub-pixels 111 in the same large pixel circuit group 20 are electrically connected are the same, the wiring patterns of the sub-pixel driving circuits to which two second sub-pixels 112 in the same large pixel circuit group 20 are electrically connected are the same, and the wiring patterns of the sub-pixel driving circuits to which two first sub-pixels 111 and two second sub-pixels 112 are electrically connected are different. However, it is not limited thereto.

[0049] In the application embodiment, in the same large pixel circuit group 20, the first wiring pattern 20a and the second wiring pattern 20b are line-symmetric figures, and the wiring patterns of the first wiring pattern 20a and the second wiring pattern 20b are different; the first sub-pixel 111, the second sub-pixel 112, and the third sub-pixel 113 are respectively electrically connected to different sub-pixel driving circuits. Among the two types of sub-pixels in the same large pixel circuit group, the wiring patterns of the sub-pixel driving circuits to which two sub-pixels of each type of sub-pixel are respectively electrically connected are the same; that is, at least in at least one direction in a partial region, the adjacent sub-pixel driving circuits are set to have line-symmetric wiring patterns. Among the two types of sub-pixels of two adjacent pixels, the wiring patterns of the sub-pixel driving circuits to which two sub-pixels of each type of sub-pixel are respectively electrically connected are the same. When the manufacturing process has an offset (process fluctuation), for example, the alignment accuracy has a one-way offset, for example, the etching direction has an offset in one direction (for example Figure 3(shifted to the left), among the two types of sub-pixels of two adjacent pixels, the wiring pattern offset directions of the sub-pixel driving circuits respectively electrically connected to the two sub-pixels of each type of sub-pixel are the same. For example, the capacitances of the sub-pixel driving circuits electrically connected to the red sub-pixels in two pixels both increase. Among the two types of sub-pixels of two adjacent pixels, the capacitances of the sub-pixel driving circuits respectively electrically connected to the two sub-pixels of each type of sub-pixel are consistent, such that in a solid color screen, the brightnesses of the two sub-pixels of each type of sub-pixel in two adjacent pixels are the same, improving or avoiding problems such as uneven display of the screen and degradation of display performance, thereby improving or avoiding problems of display defects caused by process deviation.

[0050] In some embodiments, such as Figure 3 and Figure 4 、 Figure 7 shown, the sub-pixels in the first pixel 11 are electrically connected to the sub-pixel driving circuits in the first pixel circuit group 21; the sub-pixels in the second pixel 12 are electrically connected to the sub-pixel driving circuits in the second pixel circuit group 22.

[0051] Exemplarily, as Figure 3 and Figure 4 shown, in the same large pixel circuit group 20, the sub-pixels in the first pixel 11 are electrically connected to the sub-pixel driving circuits in the first pixel circuit group 21, and the sub-pixels in the second pixel 12 are electrically connected to the sub-pixel driving circuits in the second pixel circuit group 22. And among the two types of sub-pixels in the same large pixel circuit group 20, the wiring patterns of the sub-pixel driving circuits respectively electrically connected to the two sub-pixels of each type of sub-pixel are the same, such that among the two types of sub-pixels of two adjacent pixels, the wiring patterns of the sub-pixel driving circuits respectively electrically connected to the two sub-pixels of each type of sub-pixel are the same. When a process deviation occurs (process fluctuation), for example, the alignment accuracy is offset in a single direction, for example, the etching direction is offset in one direction, among the two types of sub-pixels of two adjacent pixels, the wiring pattern offset directions of the sub-pixel driving circuits respectively electrically connected to the two sub-pixels of each type of sub-pixel are the same. For example, the capacitances of the sub-pixel driving circuits electrically connected to the red sub-pixels in two pixels both increase, such that among the two types of sub-pixels of two adjacent pixels, the capacitances of the sub-pixel driving circuits respectively electrically connected to the two sub-pixels of each type of sub-pixel are consistent, such that in a solid color screen, the brightnesses of the two sub-pixels of each type of sub-pixel in two adjacent pixels are the same, improving or avoiding problems such as uneven display of the screen and degradation of display performance, thereby improving or avoiding problems of display defects caused by process deviation.

[0052] In some embodiments, such as Figure 3 and Figure 7As shown, the first sub-pixel 111 in the first pixel 11 is electrically connected to the first sub-pixel driving circuit 211 in the first pixel circuit group 21, the second sub-pixel 112 in the first pixel 11 is electrically connected to the second sub-pixel driving circuit 212 in the first pixel circuit group 21, and the third sub-pixel 113 in the first pixel 11 is electrically connected to the third sub-pixel driving circuit 213 in the first pixel circuit group 21; the first sub-pixel 111 in the second pixel 12 is electrically connected to the second sub-pixel driving circuit 212 in the second pixel circuit group 22, the second sub-pixel 112 in the second pixel 12 is electrically connected to the first sub-pixel driving circuit 211 in the second pixel circuit group 22, and the third sub-pixel 113 in the second pixel 12 is electrically connected to the third sub-pixel driving circuit 213 in the second pixel circuit group 22.

[0053] Exemplarily, as Figure 3 and Figure 7 shown, the first sub-pixel 111 in the first pixel 11 and the first sub-pixel 111 in the second pixel 12 are electrically connected to a sub-pixel driving circuit having a first wiring pattern 20a, the second sub-pixel 112 in the first pixel 11 and the second sub-pixel 112 in the second pixel 12 are electrically connected to a sub-pixel driving circuit having a second wiring pattern 20b. When the manufacturing process has an offset (process fluctuation), for example, the alignment accuracy has a unidirectional offset, for example, the etching direction has an offset in one direction, the offset directions of the wiring patterns of the sub-pixel driving circuits to which the first sub-pixels 111 in two adjacent pixels are electrically connected are the same, and the offset directions of the wiring patterns of the sub-pixel driving circuits to which the second sub-pixels 112 in two adjacent pixels are electrically connected are the same. This makes the capacitances of the sub-pixel driving circuits to which the first sub-pixels 111 in two adjacent pixels are respectively electrically connected consistent, makes the capacitances of the sub-pixel driving circuits to which the second sub-pixels 112 in two adjacent pixels are respectively electrically connected consistent, makes the first sub-pixels 111 in two adjacent pixels have the same brightness in a pure color screen, makes the second sub-pixels 112 in two adjacent pixels have the same brightness in a pure color screen, improves or avoids problems such as uneven display performance degradation, and thus can improve or avoid problems of poor display caused by manufacturing process deviations.

[0054] In some embodiments, as Figure 4As shown, the first sub-pixel 111 in the first pixel 11 is electrically connected to the first sub-pixel driving circuit 211 in the first pixel circuit group 21, the second sub-pixel 112 in the first pixel 11 is electrically connected to the second sub-pixel driving circuit 212 in the first pixel circuit group 21, and the third sub-pixel 113 in the first pixel 11 is electrically connected to the third sub-pixel driving circuit 213 in the first pixel circuit group 21; the first sub-pixel 111 in the second pixel 12 is electrically connected to the first sub-pixel driving circuit 211 in the second pixel circuit group 22, the second sub-pixel 112 in the second pixel 12 is electrically connected to the third sub-pixel driving circuit 213 in the second pixel circuit group 22, and the third sub-pixel 113 in the second pixel 12 is electrically connected to the second sub-pixel driving circuit 212 in the second pixel circuit group 22.

[0055] Exemplarily, as Figure 4 shown, the second sub-pixels 112 in the first pixel 11 and the second pixel 12 are electrically connected to a sub-pixel driving circuit having a second wiring pattern 20b, and the third sub-pixels 113 in the first pixel 11 and the second pixel 12 are electrically connected to a sub-pixel driving circuit having a first wiring pattern 20a. When a process shift occurs (process variation), for example, a unidirectional shift in alignment accuracy, such as an etching direction shift in one direction, the wiring pattern shift directions of the sub-pixel driving circuits to which the second sub-pixels 112 in two adjacent pixels are electrically connected are the same, and the wiring pattern shift directions of the sub-pixel driving circuits to which the third sub-pixels 113 in two adjacent pixels are electrically connected are the same. This makes the capacitances of the sub-pixel driving circuits to which the second sub-pixels 112 in two adjacent pixels are electrically connected consistent, and the capacitances of the sub-pixel driving circuits to which the third sub-pixels 113 in two adjacent pixels are electrically connected consistent. As a result, the second sub-pixels 112 in two adjacent pixels have the same brightness in a solid color screen, and the third sub-pixels 113 in two adjacent pixels have the same brightness in a solid color screen, improving or avoiding problems such as uneven display performance degradation, thereby improving or avoiding problems of poor display caused by process deviation.

[0056] In some embodiments, as Figure 5 and Figure 6 shown, the third sub-pixel 113 in the first pixel 11 is electrically connected to the first sub-pixel driving circuit 211 in the second pixel circuit group 22; the first sub-pixel 111 in the second pixel 12 is electrically connected to the third sub-pixel driving circuit 213 in the first pixel circuit group 21.

[0057] Exemplarily, as Figure 5 and Figure 6As shown, in the same large pixel circuit group 20, the third sub-pixel 113 in the first pixel 11 is electrically connected to the first sub-pixel driving circuit 211 in the second pixel circuit group 22; the first sub-pixel 111 in the second pixel 12 is electrically connected to the third sub-pixel driving circuit 213 in the first pixel circuit group 21, and in the two types of sub-pixels in the same large pixel circuit group 20, the wiring patterns of the sub-pixel driving circuits to which the two sub-pixels of each type of sub-pixel are respectively electrically connected are the same, so that in the two types of sub-pixels of two adjacent pixels, the wiring patterns of the sub-pixel driving circuits to which the two sub-pixels of each type of sub-pixel are respectively electrically connected are the same. When the manufacturing process has an offset (process variation), for example, the alignment accuracy has a one-way offset, or for example, the etching direction has an offset in one direction, in the two types of sub-pixels of two adjacent pixels, the offset directions of the wiring patterns of the sub-pixel driving circuits to which the two sub-pixels of each type of sub-pixel are respectively electrically connected are the same. For example, the capacitances of the sub-pixel driving circuits to which the red sub-pixels in two pixels are electrically connected both increase, so that in the two types of sub-pixels of two adjacent pixels, the capacitances of the sub-pixel driving circuits to which the two sub-pixels of each type of sub-pixel are respectively electrically connected are consistent, so that in the two types of sub-pixels of two adjacent pixels in a pure color screen, the brightnesses of the two sub-pixels of each type of sub-pixel are the same, improving or avoiding problems such as uneven display performance degradation in the display, and thus improving or avoiding problems of poor display caused by manufacturing process deviations.

[0058] In some embodiments, as Figure 5 shown, the first sub-pixel 111 in the first pixel 11 is electrically connected to the first sub-pixel driving circuit 211 in the first pixel circuit group 21, and the second sub-pixel 112 in the first pixel 11 is electrically connected to the second sub-pixel driving circuit 212 in the first pixel circuit group 21; the second sub-pixel 112 in the second pixel 12 is electrically connected to the second sub-pixel driving circuit 212 in the second pixel circuit group 22, and the third sub-pixel 113 in the second pixel 12 is electrically connected to the third sub-pixel driving circuit 213 in the second pixel circuit group 22.

[0059] Exemplarily, as Figure 5As shown, the first sub-pixel 111 in the first pixel 11 and the first sub-pixel 111 in the second pixel 12 are electrically connected to the sub-pixel driving circuit having the first wiring pattern 20a. The third sub-pixel 113 in the first pixel 11 and the third sub-pixel 113 in the second pixel 12 are electrically connected to the sub-pixel driving circuit having the second wiring pattern 20b. When the manufacturing process has an offset (process variation), for example, the alignment accuracy has a one-way offset, for example, the etching direction has an offset in one direction, the offset directions of the wiring patterns of the sub-pixel driving circuits to which the first sub-pixels 111 in two adjacent pixels are electrically connected are the same, and the offset directions of the wiring patterns of the sub-pixel driving circuits to which the third sub-pixels 113 in two adjacent pixels are electrically connected are the same. This makes the capacitances of the sub-pixel driving circuits to which the first sub-pixels 111 in two adjacent pixels are respectively electrically connected consistent, and makes the capacitances of the sub-pixel driving circuits to which the third sub-pixels 113 in two adjacent pixels are respectively electrically connected consistent. When displaying a solid-color image, the first sub-pixels 111 in two adjacent pixels have the same brightness, and the third sub-pixels 113 in two adjacent pixels have the same brightness. This improves or avoids problems such as uneven display performance degradation, and thus can improve or avoid problems of poor display caused by manufacturing process deviations.

[0060] In some embodiments, such as Figure 6 , the first sub-pixel 111 in the first pixel 11 is electrically connected to the second sub-pixel driving circuit 212 in the first pixel circuit group 21, and the second sub-pixel 112 in the first pixel 11 is electrically connected to the first sub-pixel driving circuit 211 in the first pixel circuit group 21; the second sub-pixel 112 in the second pixel 12 is electrically connected to the second sub-pixel driving circuit 212 in the second pixel circuit group 22, and the third sub-pixel 113 in the second pixel 12 is electrically connected to the third sub-pixel driving circuit 213 in the second pixel circuit group 22.

[0061] Exemplarily, such as Figure 6, the second sub-pixel 112 in the first pixel 11 and the second sub-pixel 112 in the second pixel 12 are electrically connected to a sub-pixel driving circuit having a first wiring pattern 20a, and the third sub-pixel 113 in the first pixel 11 and the third sub-pixel 113 in the second pixel 12 are electrically connected to a sub-pixel driving circuit having a second wiring pattern 20b. When a process shift occurs (process fluctuation), for example, the alignment accuracy shifts unidirectionally, for example, the etching direction shifts in one direction, the wiring pattern of the sub-pixel driving circuit to which the second sub-pixel 112 in two adjacent pixels is electrically connected has the same shift direction, and the wiring pattern of the sub-pixel driving circuit to which the third sub-pixel 113 in two adjacent pixels is electrically connected has the same shift direction. This makes the capacitances of the sub-pixel driving circuits to which the second sub-pixel 112 in two adjacent pixels are respectively electrically connected consistent, and makes the capacitances of the sub-pixel driving circuits to which the third sub-pixel 113 in two adjacent pixels are respectively electrically connected consistent. This makes the second sub-pixel 112 in two adjacent pixels have the same brightness in a solid-color screen, and makes the third sub-pixel 113 in two adjacent pixels have the same brightness in a solid-color screen, improving or avoiding problems such as uneven display performance degradation, and thus can improve or avoid problems of poor display caused by process deviation.

[0062] It should be noted that, as Figures 2 to 6 shown, the sub-pixel being electrically connected to the corresponding sub-pixel driving circuit may mean that the first electrode of the sub-pixel or the light-emitting device is electrically connected to the corresponding sub-pixel driving circuit. The first sub-pixel 111 is electrically connected to the corresponding sub-pixel driving circuit through the first connection portion 111a of the first electrode, the second sub-pixel 112 is electrically connected to the corresponding sub-pixel driving circuit through the second connection portion 112a of the first electrode, and the third sub-pixel 113 is electrically connected to the corresponding sub-pixel driving circuit through the third connection portion 113a of the first electrode. As Figure 3 and Figure 4 shown, the first connection portion 111a, the second connection portion 112a, and the third connection portion 113a may respectively be a part of the corresponding first electrode or formed by extending the corresponding first electrode. As Figure 5 and Figure 6 shown, there is an overlap or intersection between the third connection portion 113a of the first electrode of the third sub-pixel 113 in the first pixel 11 and the first connection portion 111a of the first electrode of the first sub-pixel 111 in the second pixel 12. One of the third connection portion 113a in the first pixel 11 and the first connection portion 111a in the second pixel 12 can be set to be formed by extending the corresponding first electrode, and the other can be connected by a bridging electrode of a different layer. For example, the other is set to be of the same layer and the same material as the data signal line (Data) or the first power supply line (VDD).

[0063] In some embodiments, as Figure 5As shown, in the same large pixel circuit group 20, the first sub-pixel driving circuit 211, the second sub-pixel driving circuit 212, and the third sub-pixel driving circuit 213 are arranged on the same straight line; in the first pixel 11 and the second pixel 12, the first sub-pixel 111, the second sub-pixel 112, and the third sub-pixel 113 are respectively arranged at the three vertex positions of the virtual triangle S1.

[0064] Exemplarily, as Figure 5 shown, in the first pixel 11 and the second pixel 12, the first sub-pixel 111, the second sub-pixel 112, and the third sub-pixel 113 are respectively arranged at the three vertex positions of the virtual triangle S1, that is, in the same pixel, the first sub-pixel 111, the second sub-pixel 112, and the third sub-pixel 113 are arranged in a triangle. Regarding the center line in the first direction X in the same pixel, the center lines of the first sub-pixel 111, the second sub-pixel 112, and the third sub-pixel 113 can be arranged in sequence in the first direction X, and the second sub-pixel 112 and the second sub-pixel driving circuit 212 are stacked in a direction perpendicular to the plane of the substrate.

[0065] Exemplarily, as Figure 7 shown, it schematically shows a triangular arrangement different from that in Figures 2 to 6 . In the same pixel, the first sub-pixel 111, the second sub-pixel 112, and the third sub-pixel 113 are arranged in a triangle, which is also called a pi-shaped arrangement.

[0066] In some embodiments, the first sub-pixel 111 is one of a red sub-pixel, a green sub-pixel, and a blue sub-pixel, the second sub-pixel 112 is one of a red sub-pixel, a green sub-pixel, and a blue sub-pixel different from the first sub-pixel 111, and the third sub-pixel 113 is one of a red sub-pixel, a green sub-pixel, and a blue sub-pixel different from both the first sub-pixel 111 and the second sub-pixel 112.

[0067] Exemplarily, the first sub-pixel 111 is a red sub-pixel, the second sub-pixel 112 is a green sub-pixel, and the third sub-pixel 113 is a blue sub-pixel, but it is not limited thereto.

[0068] Please refer to Figure 8 , Figure 8 which is a schematic diagram of a display device provided by an embodiment of the present application.

[0069] In a second aspect, based on the same application concept, the present application further provides a display device 200. The display device 200 includes the display panel 100 of any one of the above, or the display device 200 includes the display panel 100 combined with several of the above features.

[0070] Exemplarily, the display device 200 also has the beneficial effects of the display panel 100 in the above embodiments. For the same parts, reference may be made to the explanations of the display panel 100 above, and details will not be repeated hereinafter.

[0071] Exemplarily, the display device 200 provided by the embodiments of the present application may be a mobile phone as shown in the schematic diagram, or any electronic product with a display function, including but not limited to the following categories: television, notebook computer, desktop display, tablet computer, digital camera, smart bracelet, smart glasses, in-vehicle display, industrial control equipment, medical display screen, touch interaction terminal, etc. The embodiments of the present application do not make special limitations thereto.

[0072] The technical features of the above embodiments can be combined arbitrarily. For the sake of concise description, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope recorded in this specification.

[0073] The above embodiments only represent several implementation manners of the present application. The description is relatively specific and detailed, but it should not be construed as a limitation on the scope of the invention patent. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present application, several modifications and improvements can still be made, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the appended claims.

Claims

1. A display panel, characterized in that, It includes a substrate, and a plurality of large pixel groups located on one side of the substrate. The large pixel groups include a first pixel and a second pixel arranged along a first direction. Both the first pixel and the second pixel include a first sub-pixel, a second sub-pixel, and a third sub-pixel; The display panel further includes a plurality of large pixel circuit groups located on one side of the substrate. The large pixel circuit groups are correspondingly arranged with the large pixel groups. The plurality of large pixel circuit groups include a first pixel circuit group and a second pixel circuit group arranged along the first direction. Both the first pixel circuit group and the second pixel circuit group include a first sub-pixel driving circuit, a second sub-pixel driving circuit, and a third sub-pixel driving circuit arranged in sequence along the first direction; Among them, the wiring patterns of the first sub-pixel driving circuit in the first pixel circuit group, the third sub-pixel driving circuit in the first pixel circuit group, and the second sub-pixel driving circuit in the second pixel circuit group all have a first wiring pattern. The wiring patterns of the second sub-pixel driving circuit in the first pixel circuit group, the first sub-pixel driving circuit in the second pixel circuit group, and the third sub-pixel driving circuit in the second pixel circuit group all have a second wiring pattern; In the same large pixel circuit group, the first wiring pattern and the second wiring pattern are line-symmetric figures, and the wiring patterns of the first wiring pattern and the second wiring pattern are different; The first sub-pixel, the second sub-pixel, and the third sub-pixel are respectively electrically connected to different sub-pixel driving circuits. Among the two types of sub-pixels in the same large pixel circuit group, the wiring patterns of the sub-pixel driving circuits to which the two sub-pixels of each type of sub-pixel are respectively electrically connected are the same.

2. The display panel according to claim 1, wherein The sub-pixels in the first pixel are electrically connected to the sub-pixel driving circuits in the first pixel circuit group; The sub-pixels in the second pixel are electrically connected to the sub-pixel driving circuits in the second pixel circuit group.

3. The display panel according to claim 2, wherein The first sub-pixel in the first pixel is electrically connected to the first sub-pixel driving circuit in the first pixel circuit group, the second sub-pixel in the first pixel is electrically connected to the second sub-pixel driving circuit in the first pixel circuit group, and the third sub-pixel in the first pixel is electrically connected to the third sub-pixel driving circuit in the first pixel circuit group; The first sub-pixel in the second pixel is electrically connected to the second sub-pixel driving circuit in the second pixel circuit group, the second sub-pixel in the second pixel is electrically connected to the first sub-pixel driving circuit in the second pixel circuit group, and the third sub-pixel in the second pixel is electrically connected to the third sub-pixel driving circuit in the second pixel circuit group.

4. The display panel according to claim 2, characterized in that, The first sub-pixel in the first pixel is electrically connected to the first sub-pixel driving circuit in the first pixel circuit group, the second sub-pixel in the first pixel is electrically connected to the second sub-pixel driving circuit in the first pixel circuit group, and the third sub-pixel in the first pixel is electrically connected to the third sub-pixel driving circuit in the first pixel circuit group; The first sub-pixel in the second pixel is electrically connected to the first sub-pixel driving circuit in the second pixel circuit group, the second sub-pixel in the second pixel is electrically connected to the third sub-pixel driving circuit in the second pixel circuit group, and the third sub-pixel in the second pixel is electrically connected to the second sub-pixel driving circuit in the second pixel circuit group.

5. The display panel according to claim 1, wherein The third sub-pixel in the first pixel is electrically connected to the first sub-pixel driving circuit in the second pixel circuit group; The first sub-pixel in the second pixel is electrically connected to the third sub-pixel driving circuit in the first pixel circuit group.

6. The display panel according to claim 5, characterized in that, The first sub-pixel in the first pixel is electrically connected to the first sub-pixel driving circuit in the first pixel circuit group, and the second sub-pixel in the first pixel is electrically connected to the second sub-pixel driving circuit in the first pixel circuit group; The second sub-pixel in the second pixel is electrically connected to the second sub-pixel driving circuit in the second pixel circuit group, and the third sub-pixel in the second pixel is electrically connected to the third sub-pixel driving circuit in the second pixel circuit group.

7. The display panel according to claim 5, wherein The first sub-pixel in the first pixel is electrically connected to the second sub-pixel driving circuit in the first pixel circuit group, and the second sub-pixel in the first pixel is electrically connected to the first sub-pixel driving circuit in the first pixel circuit group; The second sub-pixel in the second pixel is electrically connected to the second sub-pixel driving circuit in the second pixel circuit group, and the third sub-pixel in the second pixel is electrically connected to the third sub-pixel driving circuit in the second pixel circuit group.

8. The display panel according to claim 1, wherein In the same large pixel circuit group, the first sub-pixel driving circuit, the second sub-pixel driving circuit, and the third sub-pixel driving circuit are arranged on the same straight line; In the first pixel and the second pixel, the first sub-pixel, the second sub-pixel, and the third sub-pixel are respectively arranged at three vertex positions of a virtual triangle.

9. The display panel according to claim 1, wherein, The first sub-pixel is one of a red sub-pixel, a green sub-pixel, and a blue sub-pixel, the second sub-pixel is one of the red sub-pixel, the green sub-pixel, and the blue sub-pixel that is different from the first sub-pixel, and the third sub-pixel is one of the red sub-pixel, the green sub-pixel, and the blue sub-pixel that is different from both the first sub-pixel and the second sub-pixel.

10. A display device, characterized in that, A display panel including the display panel according to any one of claims 1 to 9.

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