Preparation method of superconducting transition edge sensor and superconducting transition edge sensor

Abstract

The invention relates to a preparation method of a superconducting transition edge sensor and the superconducting transition edge sensor. The method comprises the following steps: forming a substrate; depositing a superconducting thin film layer on the substrate; oxidizing the superconducting thin film layer to form an oxide layer on the top of the superconducting thin film layer; the oxide layer and the superconducting thin film layer are etched, a superconducting transition edge sensor area and a wire area are formed on the substrate, the superconducting transition edge sensor area is formed on the oxide layer, and the wire area is formed on the superconducting thin film layer. At least precious metal or ion beam injection does not need to be used any more, and the development cost of the TES can be greatly reduced at least.

Description

Technical Field

[0001] The present disclosure relates to the technical field of superconducting device manufacturing, and particularly to a method for preparing a superconducting transition edge sensor and a superconducting transition edge sensor. Background Art

[0002] A transition edge sensor (TES) is a thermal equilibrium sensor prepared based on superconducting materials. Utilizing the characteristic that the resistance of superconducting materials is extremely sensitive to temperature changes near the critical temperature, it can be used to sense tiny energy changes. The TES mainly consists of an absorber that converts the photon energy to be measured into heat, a TES thin film that senses temperature changes, and a weak link that controls the thermal conductance of the device.

[0003] In the prior art, generally, precious metals or expensive ion implantation techniques are required to fabricate a superconducting transition edge sensor. The expensive materials and equipment increase the research and application thresholds of superconducting transition edge sensors. Summary of the Invention

[0004] Based on this, in view of the above technical problems, it is necessary to provide a method for preparing a superconducting transition edge sensor and a superconducting transition edge sensor, which no longer require the use of precious metals or ion implantation, and can at least significantly reduce the research and development cost of TES.

[0005] To achieve the above object and other objects, in a first aspect, the present disclosure provides a method for preparing a superconducting transition edge sensor, including:

[0006] Forming a substrate;

[0007] Depositing a superconducting thin film layer on the substrate;

[0008] Oxidizing the superconducting thin film layer to form an oxide layer on the top of the superconducting thin film layer;

[0009] Etching the oxide layer and the superconducting thin film layer to form a superconducting transition edge sensor region and a wire region on the substrate. The superconducting transition edge sensor region is formed on the oxide layer, and the wire region is formed on the superconducting thin film layer.

[0010] In the method for preparing a superconducting transition edge sensor in the above embodiment, during the process of forming the superconducting transition edge sensor, only an oxide layer and a superconducting thin film layer need to be formed on the substrate, and ion implantation is not required, reducing the types of materials required for manufacturing the superconducting transition edge sensor, reducing the use of deposition equipment, and no longer requiring the use of precious metals or ion implantation, which can at least significantly reduce the research and development cost of TES.

[0011] In one embodiment, etching the oxide layer and the superconducting thin film layer includes:

[0012] Etch the oxide layer to expose the superconducting thin film layer in the first target area and obtain the superconducting transition edge sensor area;

[0013] Etch the superconducting thin film layer in the first target area to remove part of the superconducting thin film layer in the first target area and obtain the wire area.

[0014] In one embodiment, etching the oxide layer and the superconducting thin film layer includes:

[0015] Etch the oxide layer and the superconducting thin film layer to remove the oxide layer and the superconducting thin film layer in the second target area and obtain the wire area;

[0016] Etch the oxide layer in the third target area to obtain the superconducting transition edge sensor area.

[0017] In one embodiment, etching the oxide layer to expose the superconducting thin film layer in the target area and obtain the superconducting transition edge sensor area includes:

[0018] Form a patterned first photoresist layer on the oxide layer;

[0019] Using the patterned first photoresist layer as a mask, etch the oxide layer to expose the superconducting thin film layer in the first target area and obtain the superconducting transition edge sensor area;

[0020] Remove the first photoresist layer;

[0021] Among them, etching the superconducting thin film layer in the first target area to remove part of the superconducting thin film layer in the first target area and obtain the wire area includes:

[0022] Form a patterned second photoresist layer on the superconducting transition edge sensor area and part of the target area, and the second photoresist layer covers the superconducting transition edge sensor area;

[0023] Using the patterned second photoresist layer as a mask, etch the superconducting thin film layer to obtain the wire area;

[0024] Remove the second photoresist layer.

[0025] In one embodiment, etching the oxide layer and the superconducting thin film layer to remove the oxide layer and the superconducting thin film layer in the second target area and obtain the wire area includes:

[0026] Form a patterned third photoresist layer on the oxide layer;

[0027] Using the patterned third photoresist layer as a mask, etch the oxide layer and the superconducting thin film layer to expose the wire area;

[0028] Remove the third photoresist layer;

[0029] Among them, etching the oxide layer of the third target area to obtain a superconducting transition edge sensor area, including:

[0030] Form a patterned fourth photoresist layer on the oxide layer;

[0031] Using the patterned fourth photoresist layer as a mask, etch the oxide layer to obtain a superconducting transition edge sensor area;

[0032] Remove the fourth photoresist layer.

[0033] In one embodiment, forming a substrate includes:

[0034] Provide a silicon substrate;

[0035] Deposit a silicon oxide layer with a first thickness on the top surface of the silicon substrate.

[0036] In one embodiment, the thickness of the silicon substrate is 300 μm - 500 μm, and the first thickness is 200 nm to 500 nm.

[0037] In one embodiment, depositing a superconducting thin film layer on the substrate includes:

[0038] Based on the DC magnetron sputtering process, form a superconducting thin film layer with a second thickness, and the second thickness is 30 nm - 100 nm.

[0039] In one embodiment, oxidizing the superconducting thin film layer includes:

[0040] Based on the DC magnetron sputtering process, after forming the superconducting thin film layer with a second thickness, input oxygen into the sputtering atmosphere to obtain an oxide layer with a third thickness, and the third thickness is 6 nm - 30 nm.

[0041] Second, the embodiments of the present disclosure also provide a superconducting transition edge sensor, including:

[0042] Provide a substrate;

[0043] A superconducting thin film layer, located on the substrate, and the superconducting thin film layer is used to form a wire area;

[0044] An oxide layer, located on top of the superconducting thin film layer, and the oxide layer is used to form a superconducting transition edge sensor area.

[0045] In the superconducting transition edge sensor in the above embodiments, during the process of forming the superconducting transition edge sensor, only an oxide layer and a superconducting thin film layer need to be formed on the substrate, and ion implantation is not required, reducing the types of materials needed to manufacture the superconducting transition edge sensor. There is no longer a need to use precious metals or ion beam implantation, which can at least significantly reduce the development cost of the TES. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] To more clearly illustrate the technical solutions of the embodiments of the present disclosure, the following will briefly introduce the drawings required for the embodiments. Obviously, the drawings in the following description are only some embodiments of the present disclosure. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0047] Figure 1 It is a schematic flow chart of a method for preparing a superconducting transition edge sensor provided in an embodiment;

[0048] Figure 2 It is a schematic structural diagram of the structure obtained in step S1000 in the method for preparing a superconducting transition edge sensor provided in an embodiment;

[0049] Figure 3 It is a schematic structural diagram of the structure obtained in step S2000 in the method for preparing a superconducting transition edge sensor provided in an embodiment;

[0050] Figure 4 It is a schematic longitudinal sectional structural diagram of the structure obtained in step S3000 in the method for preparing a superconducting transition edge sensor provided in an embodiment;

[0051] Figure 5 It is a schematic structural diagram of the structure obtained in step S4000 in the method for preparing a superconducting transition edge sensor provided in an embodiment Figure 1 ;

[0052] Figure 6 It is a schematic structural diagram of the structure obtained in step S4000 in the method for preparing a superconducting transition edge sensor provided in an embodiment Figure 2 。

[0053] Description of the reference numerals:

[0054] 101, substrate; 201, superconducting thin film layer; 301, oxide layer; 401, first photoresist layer; 501, superconducting transition edge sensor; 601, second photoresist layer; 701, wire region; 801, third photoresist layer; 901, fourth photoresist layer; 1001, first target region; 1101, second target region; 1201, third target region. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0055] To facilitate the understanding of the present disclosure, the present disclosure will be described more comprehensively hereinafter with reference to the relevant drawings. Preferred embodiments of the present disclosure are given in the drawings. However, the present disclosure may be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, these embodiments are provided so that the disclosure of the present disclosure will be thorough and complete.

[0056] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. The terms used herein in the specification of the present disclosure are for the purpose of describing specific embodiments only and are not intended to limit the present disclosure.

[0057] It should be understood that when an element or layer is referred to as "on", "adjacent to", "connected to" or "coupled to" another element or layer, it can be directly on, adjacent to, connected or coupled to the other element or layer, or there may be intervening elements or layers. In contrast, when an element is referred to as "directly on", "directly adjacent to", "directly connected to" or "directly coupled to" another element or layer, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers, doping types and / or parts, these elements, components, regions, layers, doping types and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer, doping type or part from another element, component, region, layer, doping type or part. Thus, without departing from the teachings of the present disclosure, the first element, component, region, layer, doping type or part discussed below may be referred to as the second element, component, region, layer or part; for example, the first doping type may be referred to as the second doping type, and similarly, the second doping type may be referred to as the first doping type; the first doping type and the second doping type are different doping types. For example, the first doping type may be P-type and the second doping type may be N-type, or the first doping type may be N-type and the second doping type may be P-type.

[0058] Spatial relationship terms such as "under", "below", "lower", "beneath", "above", "upper", etc. may be used herein to describe the relationship of one element or feature shown in the figures to other elements or features. It should be understood that, in addition to the orientations shown in the figures, spatial relationship terms also encompass different orientations of the device in use and operation. For example, if the device in the drawings is flipped, an element or feature described as "under other elements" or "beneath them" or "underneath them" will be oriented "above" the other elements or features. Thus, the exemplary terms "under" and "beneath" can include both an upper and a lower orientation. Additionally, the device may also have other orientations (such as, rotated 90 degrees or other orientations), and the spatial descriptors used herein are to be interpreted accordingly.

[0059] As used herein, the singular forms "a", "an", and "the" may also include the plural forms unless the context clearly dictates otherwise. It should also be understood that when the terms "comprises" and / or "comprising" are used in this specification, the presence of features, integers, steps, operations, elements, and / or components can be ascertained, but one or more other features, integers, steps, operations, elements, components, and / or groups thereof are not precluded from existence or addition. Also, as used herein, the term "and / or" includes any and all combinations of the associated listed items.

[0060] Embodiments of the invention are described herein with reference to cross-sectional views that are schematic illustrations of ideal embodiments (and intermediate structures) of the present disclosure, such that variations in the shapes shown are to be expected due to, for example, manufacturing techniques and / or tolerances. Accordingly, embodiments of the present disclosure should not be limited to the particular shapes of regions shown herein, but include shape deviations due to, for example, manufacturing techniques. For example, an implantation region shown as rectangular will typically have rounded or curved features at its edges and / or an implantation concentration gradient, rather than a binary change from the implanted region to the non-implanted region. Similarly, a buried region formed by implantation may result in some implantation in the region between the buried region and the surface through which the implantation occurs. Thus, the regions shown in the figures are substantially schematic, their shapes do not represent the actual shapes of regions of the device, and do not limit the scope of the present disclosure.

[0061] It should be noted that a transition edge sensor (TES) is a thermal equilibrium sensor prepared based on superconducting materials. Utilizing the property that the resistance of superconducting materials is extremely sensitive to temperature changes near the critical temperature, it can be used to sense minute energy changes. A TES mainly consists of an absorber that converts the photon energy to be measured into heat, a TES thin film that senses temperature changes, and a weak link that controls the thermal conductance of the device.

[0062] The working principle of TES is as follows: 1. Initial state: The TES thin film is connected to a constant-voltage negative-feedback bias circuit, and by changing the current, it operates on the superconducting transition edge; 2. Energy absorption and thermal effect: After photons are captured by the absorber of TES, the energy of the photons is completely converted into heat energy, causing the temperature of the absorber to rise; 3. Energy conduction: There is good thermal contact between the absorber and the TES thin film. After the temperature of the absorber rises, heat is conducted to the TES thin film, and the temperature of the TES thin film rises accordingly; 4. Resistance change: The increase in the temperature of the TES thin film causes a change in resistance, which in turn causes a change in the current in the TES circuit; 5. Signal reading: The change in current over time is amplified by a superconducting quantum interference device and stored at the room-temperature end. After analysis and decoding, the energy of the detected photons can be obtained. TES has the advantages of low noise, high sensitivity, high energy resolution, etc.

[0063] When preparing TES, a superconducting thin film with a suitable superconducting transition temperature (critical temperature, Tc) is required. Generally, there are three types of superconducting thin films: elemental superconductors, such as Ti (Tc ~ 390 mK), Ir (Tc ~ 112 mK); bilayer thin films based on the superconducting proximity effect, such as Ti / Au, Mo / Cu, Mo / Au, etc.; and magnetic-doped superconducting thin films, such as Al-Mn, etc. For the latter two types, the Tc of the TES thin film can be regulated by the ratio between the thicknesses of the superconducting thin film and the metal thin film or by changing the doping concentration of magnetic particles in the superconducting thin film, and the Tc can be regulated to 80 - 150 mK.

[0064] The main preparation methods for the wires for controlling and signal reading of TES are as follows: After defining the TES area using photolithography and etching technology, deposition and lift-off technology is used to deposit elemental superconducting materials with a higher Tc on both sides of the TES area as wires, such as Nb (Tc ~ 9.2 K), Al (Tc ~ 1.2 K). If the TES thin film is prepared using the superconducting proximity effect, the metal layer can also be removed, and the remaining superconducting layer can be etched into wires. If a magnetic-doped superconducting thin film is used, since magnetic doping can reduce the Tc of the superconducting thin film, the undoped area can be defined as a wire.

[0065] In the above TES design scheme, multiple materials or complex ion implantation techniques are required to manufacture TES. Not only is the material deposition complex and many deposition devices are used, but precious metals and complex ion implantation techniques are also required, resulting in extremely high research and development costs for TES.

[0066] Based on this, please refer to Figures 1-6 , the embodiments of the present disclosure provide a preparation method for a superconducting transition edge sensor 501, including the following steps:

[0067] Step S1000: Form a substrate 101.

[0068] Step S2000: Deposit a superconducting thin film layer 201 on the substrate 101.

[0069] Step S3000: Oxidize the superconducting thin film layer 201 to form an oxide layer 301 on the top of the superconducting thin film layer 201.

[0070] Step S4000: Etch the oxide layer 301 and the superconducting thin film layer 201 to form a superconducting transition edge sensor 501 region and a wire region 701 on the substrate 101.

[0071] Among them, the superconducting transition edge sensor 501 region is formed in the oxide layer 301, and the wire region 701 is formed in the superconducting thin film layer 201.

[0072] In the preparation method of the superconducting transition edge sensor 501 in the above embodiment, during the formation of the superconducting transition edge sensor 501, only the oxide layer 301 and the superconducting thin film layer 201 need to be formed on the substrate 101, and ion implantation is not required, reducing the types of materials required for manufacturing the superconducting transition edge sensor 501, reducing the use of deposition equipment, and no longer requiring the use of precious metals or ion beam implantation, which can at least significantly reduce the research and development cost of the TES.

[0073] In step S1000, please refer to Figure 2 , the steps of forming the substrate 101 include:

[0074] Provide a silicon substrate 101;

[0075] Deposit a silicon oxide layer with a first thickness on the top surface of the silicon substrate 101.

[0076] Specifically, the thickness of the silicon substrate 101 is 300 μm - 500 μm.

[0077] As an example, the thickness of the silicon substrate 101 can be 300 μm, 400 μm, 500 μm, etc.

[0078] Specifically, the first thickness is 200 nm to 500 nm.

[0079] As an example, the first thickness can be 200 nm, 300 nm, 400 nm, 500 nm, etc.

[0080] In step S2000, please refer to Figure 3 , depositing the superconducting thin film layer 201 on the substrate 101 includes: forming a superconducting thin film layer 201 with a second thickness based on the DC magnetron sputtering process.

[0081] Specifically, the second thickness is 30 nm - 100 nm.

[0082] As an example, the second thickness can be 30 nm, 50 nm, 70 nm, 100 nm, and so on.

[0083] Here, the superconducting thin film layer can be a Ti layer.

[0084] In step S3000, please refer to Figure 4 , oxidize the superconducting thin film layer 201, including: based on the DC magnetron sputtering process, after forming the superconducting thin film layer 201 with the second thickness, input oxygen into the sputtering atmosphere to obtain the oxide layer 301 with the third thickness.

[0085] Specifically, the third thickness is 6 nm - 30 nm.

[0086] Exemplarily, the third thickness can be 6 nm, 15 nm, 13 nm, 30 nm, and so on.

[0087] Here, the oxide layer can be a Ti - O layer.

[0088] In step S4000, please refer to Figure 5 , in an optional embodiment, etch the oxide layer 301 and the superconducting thin film layer 201, including: etch the oxide layer 301 to expose the superconducting thin film layer 201 in the first target area 1001 and obtain the superconducting transition edge sensor 501 area; etch the superconducting thin film layer 201 in the first target area 1001 to remove a part of the superconducting thin film layer 201 in the first target area 1001 and obtain the wire area 701.

[0089] Among them, etching the oxide layer 301 to expose the superconducting thin film layer 201 in the target area and obtain the superconducting transition edge sensor 501 area includes: forming a patterned first photoresist layer 401 on the oxide layer 301; using the patterned first photoresist layer 401 as a mask to etch the oxide layer 301 to expose the superconducting thin film layer 201 in the first target area 1001 and obtain the superconducting transition edge sensor 501 area; removing the first photoresist layer 401.

[0090] Among them, etching the superconducting thin film layer 201 in the first target area 1001 to remove a part of the superconducting thin film layer 201 in the first target area 1001 and obtain the wire area 701 includes: forming a patterned second photoresist layer 601 on the superconducting transition edge sensor 501 area and a part of the target area, and the second photoresist layer 601 covers the superconducting transition edge sensor 501 area; using the patterned second photoresist layer 601 as a mask to etch the superconducting thin film layer 201 to obtain the wire area 701; removing the second photoresist layer 601.

[0091] Specifically, please continue to refer to Figure 5 , asFigure 5 as shown in Figure a in Figure 5 The structure shown in Figure a in is formed after forming a patterned first photoresist layer 401 on the oxide layer 301. After forming the patterned first photoresist layer 401, the oxide layer 301 is etched using the patterned first photoresist layer 401 as a mask, exposing the superconducting thin film layer 201 in the first target area 1001 and obtaining the superconducting transition edge sensor 501 area; the first photoresist layer 401 is removed to form Figure 5 the structure shown in Figure b in. A patterned second photoresist layer 601 is formed on the superconducting transition edge sensor 501 area and part of the target area. The second photoresist layer 601 covers the superconducting transition edge sensor 501 area to form Figure 5 the structure shown in Figure c in; using the patterned second photoresist layer 601 as a mask, the superconducting thin film layer 201 is etched to obtain the wire area 701; the second photoresist layer 601 is removed to obtain Figure 5 the structure shown in Figure d in.

[0092] Exemplarily, the substrate 101 required for fabricating the TES device can be obtained first. For example, a 500 nm silicon nitride layer can be deposited on a 300 μm Si substrate 101, and then a Ti thin film with a certain thickness can be prepared on the obtained substrate 101 by DC magnetron sputtering. Then, a certain thickness of the Ti layer is oxidized by anodic oxidation to form a Ti-O mixed layer. Then, the TES area is defined using photoresist, and part or all of the Ti-O mixed layer is etched away by dry or wet etching. After that, the wires for TES control and signal readout are defined by lithography, and the TES area needs to be protected. Finally, the unprotected Ti and Ti-O mixed layers are etched away by dry or wet etching.

[0093] In step S4000, please refer to Figure 6 , in another alternative embodiment, etching the oxide layer 301 and the superconducting thin film layer 201 includes: etching the oxide layer 301 and the superconducting thin film layer 201 to remove the oxide layer 301 and the superconducting thin film layer 201 in the second target area 1101 to obtain the wire area 701; etching the oxide layer 301 in the third target area 1201 to obtain the superconducting transition edge sensor 501 area.

[0094] Specifically, please continue to refer to Figure 6 , as Figure 6 shown in Figure a in Figure 6The structure formed after forming the patterned third photoresist layer 801 on the a diagram in the figure on the oxide layer 301. After forming the patterned third photoresist layer 801, using the patterned third photoresist layer 801 as a mask, the oxide layer 301 and the superconducting thin film layer 201 are etched to expose the wire region 701; the third photoresist layer 801 is removed to form Figure 6 The structure of the b diagram in the figure; after forming the patterned fourth photoresist layer 901 on the oxide layer 301. Form Figure 6 The structure shown in the c diagram in the figure; using the patterned fourth photoresist layer 901 as a mask, the oxide layer 301 is etched to obtain the superconducting transition edge sensor 501 region; after removing the fourth photoresist layer 901, the Figure 6 The structure shown in the d diagram in the figure.

[0095] Exemplarily, first, the substrate 101 required for fabricating the TES device needs to be obtained. For example, a 1000 nm silicon nitride layer can be deposited on a 500 μm Si substrate 101, and then a certain thickness of Ti is first prepared on the obtained substrate 101 by DC magnetron sputtering. Subsequently, oxygen is introduced into the sputtering atmosphere to prepare a Ti-O mixed layer. The wires and the TES region of the TES device are defined simultaneously by photolithography. Then, using a dry or wet etching method, the remaining part of the Ti / Ti-O mixed layer is removed. The TES region is protected by photolithography again. Finally, using a wet or dry etching process, the Ti-O mixed layer on the wires is etched or partially etched.

[0096] In the preparation process of the present invention, the same metal element is used for the wires and the TES, which reduces the requirements for expensive thin film deposition equipment for device preparation. There is no longer a need to use precious metals or ion implantation. At least while significantly reducing the research and development cost of the TES, the adjustment range of Tc is more flexible. The oxide layer on the surface of the TES can improve the stability of the TES thin film and reduce the problem of performance degradation caused by aging during the use of the TES.

[0097] It should be understood that although Figure 1 The steps in the flowchart of Figure 1 are shown sequentially according to the indication of the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless there is a clear indication in this article, the execution of these steps has no strict order limit, and these steps can be executed in other orders. Moreover,

[0098] Based on the same inventive concept, embodiments of the present disclosure also provide a method for manufacturing the superconducting transition edge sensor 501 described in the foregoing embodiments, and the obtained superconducting transition edge sensor 501. The solution for solving the problem provided by this superconducting transition edge sensor is similar to the solution described in the above method. Therefore, for the specific limitations in one or more embodiments of the superconducting transition edge sensor 501 provided below, reference may be made to the limitations on the manufacturing method of the superconducting transition edge sensor 501 in the foregoing text, and details will not be repeated here.

[0099] In some embodiments, please refer to Figure 6 Figure d in

[0100] A superconducting transition edge sensor 501 includes: providing a substrate 101;

[0101] A superconducting thin film layer 201, located on the substrate 101, and the superconducting thin film layer 201 is used to form a wire region 701;

[0102] For the superconducting transition edge sensor 501 in the above embodiments, during the process of forming the superconducting transition edge sensor 501, only the oxide layer 301 and the superconducting thin film layer 201 need to be formed on the substrate 101, and ion implantation is not required, reducing the types of materials required for manufacturing the superconducting transition edge sensor 501, reducing the use of deposition equipment, and no longer requiring the use of precious metals or ion beam implantation, which can at least significantly reduce the research and development cost of the TES.

[0103] The above embodiments only represent several implementation manners of the present disclosure, and their descriptions are relatively specific and detailed, but should not be construed as limiting the scope of the patent application. It should be noted that for those of ordinary skill in the art, without departing from the inventive concept of the present disclosure, several modifications and improvements can still be made, and these all belong to the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure patent shall be subject to the appended claims.

Claims

1. A preparation method of a superconducting transition edge sensor, characterized in that The method includes: Forming a substrate; Depositing a superconducting thin film layer on the substrate; Oxidizing the superconducting thin film layer to form an oxide layer on the top of the superconducting thin film layer; Etching the oxide layer and the superconducting thin film layer to form a superconducting transition edge sensor region and a wire region on the substrate, the superconducting transition edge sensor region being formed in the oxide layer and the wire region being formed in the superconducting thin film layer.

2. The method according to claim 1, wherein Etching the oxide layer and the superconducting thin film layer includes: Etching the oxide layer to expose the superconducting thin film layer in a first target region and obtaining the superconducting transition edge sensor region; Etching the superconducting thin film layer in the first target region to remove a part of the superconducting thin film layer in the first target region and obtaining the wire region.

3. The method according to claim 1, characterized in that, Etching the oxide layer and the superconducting thin film layer includes: Etching the oxide layer and the superconducting thin film layer to remove the oxide layer and the superconducting thin film layer in a second target region and obtaining the wire region; Etching the oxide layer in a third target region to obtain the superconducting transition edge sensor region.

4. The method according to claim 2, wherein Etching the oxide layer to expose the superconducting thin film layer in a target region and obtaining the superconducting transition edge sensor region includes: Forming a patterned first photoresist layer on the oxide layer; Using the patterned first photoresist layer as a mask to etch the oxide layer to expose the superconducting thin film layer in the first target region and obtaining the superconducting transition edge sensor region; Removing the first photoresist layer; Wherein, etching the superconducting thin film layer in the first target region to remove a part of the superconducting thin film layer in the first target region and obtaining the wire region includes: Forming a patterned second photoresist layer on the superconducting transition edge sensor region and a partial target region, the second photoresist layer covering the superconducting transition edge sensor region; Using the patterned second photoresist layer as a mask to etch the superconducting thin film layer to obtain the wire region; Removing the second photoresist layer.

5. The method according to claim 3, characterized in that, Etching the oxide layer and the superconducting thin film layer to remove the oxide layer and the superconducting thin film layer in the second target region and obtaining the wire region includes: Forming a patterned third photoresist layer on the oxide layer; Using the patterned third photoresist layer as a mask to etch the oxide layer and the superconducting thin film layer to expose the wire region; Removing the third photoresist layer; Wherein, etching the oxide layer in the third target region to obtain the superconducting transition edge sensor region includes: Forming a patterned fourth photoresist layer on the oxide layer; Using the patterned fourth photoresist layer as a mask to etch the oxide layer to obtain the superconducting transition edge sensor region; Removing the fourth photoresist layer.

6. The method according to claim 1, characterized in that, Forming a substrate includes: Providing a silicon substrate; Depositing a silicon oxide layer with a first thickness on the top surface of the silicon substrate.

7. The method according to claim 1, characterized in that The thickness of the silicon substrate is 300 μm - 500 μm, and the first thickness is 200 nm to 500 nm.

8. The method according to claim 1, characterized in that, Depositing a superconducting thin film layer on the substrate includes: Based on a direct current magnetron sputtering process, forming a superconducting thin film layer with a second thickness, the second thickness being 30 nm - 100 nm.

9. The method according to claim 1, wherein Oxidize the superconducting thin film layer, including: Based on the DC magnetron sputtering process, after forming the superconducting thin film layer with a second thickness, introduce oxygen into the sputtering atmosphere to obtain an oxide layer with a third thickness, and the third thickness is 6nm - 30nm.

10. A superconducting transition edge sensor, characterized in that, Including: Provide a substrate; A superconducting thin film layer, located on the substrate, and the superconducting thin film layer is used to form a wire region; An oxide layer, located on top of the superconducting thin film layer, and the oxide layer is used to form a superconducting transition edge sensor region.

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