Energy storage converter, off-grid parallel control method, system and device

Abstract

The present application relates to the field of energy storage technology, and specifically to an energy storage converter, off-grid parallel control method, system and device. Among them, several energy storage converters are connected in parallel, and several energy storage converters include a host and at least one slave. The method includes: the host and the at least one slave receive a start command; in response to the start command, the host performs a black start to a first voltage and then sends a phase-locked synchronization instruction to the at least one slave; in response to the start command and the phase-locked synchronization instruction, the at least one slave establishes a synchronous voltage to the first voltage and then sends a phase-locked completion signal to the host; after determining that the phase-locked completion signal sent by all slaves has been received, the host sends an instruction to boost the voltage to a second voltage to the at least one slave; the host and the at least one slave boost the voltage from the first voltage to the second voltage. The embodiments of the present invention can achieve stable startup of multiple energy storage converters in parallel.

Description

Technical Field

[0001] The present application relates to the field of energy storage technology, and in particular to an energy storage converter, an off-grid parallel control method, a system, and a device. Background Art

[0002] A power conversion system (PCS) is a device connected between a battery system and the power grid or AC loads, capable of bidirectional current conversion. In an off-grid environment, or when no power grid is available, the PCS converts the battery system's DC power into AC power to power the AC load. In practical applications, a single PCS typically struggles to meet the power demands of off-grid loads, necessitating the parallel operation of two or more PCSs. Parallel PCS operation requires consideration of issues such as stable startup and shutdown of multiple units and load balancing. Therefore, research is needed to control off-grid parallel PCS operation. Summary of the Invention

[0003] In view of this, the present application provides an energy storage converter, an off-grid parallel control method, a system and a device, which can achieve stable startup of multiple energy storage converters in parallel.

[0004] In a first aspect, an embodiment of the present invention provides an off-grid parallel control method for an energy storage converter, comprising: connecting a plurality of energy storage converters in parallel, wherein the plurality of energy storage converters include a master and at least one slave, and the method comprises:

[0005] The host and the at least one slave receive a start command;

[0006] In response to the start command, the host sends a phase-lock synchronization instruction to the at least one slave after black starting to a first voltage;

[0007] In response to the start command and the phase-lock synchronization instruction, the at least one slave device establishes a synchronization voltage to the first voltage and then sends a phase-lock completion signal to the master device;

[0008] After determining that the phase-lock completion signals sent by all slaves are received, the host sends an instruction to boost the voltage to the second voltage to the at least one slave;

[0009] The master and the at least one slave are stepped up from the first voltage to the second voltage.

[0010] In some embodiments, the host uses an outer voltage loop and an inner current loop control method; the at least one slave uses a current loop control method;

[0011] The host determines the current mean value according to the current output of the host voltage loop;

[0012] The master specifies the current mean value as the current of the current loop of the master and the at least one slave.

[0013] In some embodiments, the method further comprises:

[0014] The host determines a power average value, and sends the power average value to the at least one slave;

[0015] The at least one slave determines a slave feedforward voltage according to the power mean value and the current mean value, and the slave feedforward voltage is used to perform voltage compensation on an output voltage of a corresponding slave current loop.

[0016] In some embodiments, the at least one slave determines a slave front-end voltage based on the power mean and the current mean, and the slave feed-forward voltage is used to perform voltage compensation on an output voltage of a corresponding slave current loop, including:

[0017] The power mean value includes: active power mean value and reactive power mean value;

[0018] The current mean value includes: a q-axis current mean value and a d-axis current mean value;

[0019] The at least one slave determines a q-axis feedforward voltage according to the active power mean and the q-axis current mean, so as to perform voltage compensation on an output voltage of a q-axis current loop of the corresponding slave;

[0020] The at least one slave determines a d-axis feedforward voltage according to the reactive power mean value and the d-axis current mean value, so as to perform voltage compensation on an output voltage of a d-axis current loop of a corresponding slave.

[0021] In some embodiments, the method further comprises:

[0022] The host determines a host feed-forward voltage according to a given voltage of the host voltage loop, and the host feed-forward voltage is used to perform voltage compensation on an output voltage of the host current loop.

[0023] In some embodiments, synchronization signal lines are sequentially connected in series between the plurality of energy storage converters;

[0024] The host sends a synchronization carrier to the connected slaves via the synchronization signal line. The synchronization carrier is sequentially sent to each slave in series for carrier synchronization of each slave.

[0025] In a second aspect, an embodiment of the present invention provides an energy storage converter, wherein the energy storage converter is a host and is connected in parallel with at least one slave, and the energy storage converter includes:

[0026] A DC energy storage unit, a bidirectional inverter, an AC filter, and a host control unit; the host control unit is used to:

[0027] Receive the start command;

[0028] In response to the start command, controlling the host to black start to a first voltage, and then sending a phase-locked synchronization instruction to the at least one slave;

[0029] receiving a phase-locked completion signal sent by the at least one slave;

[0030] After determining that the phase-locked completion signals sent by all the slaves are received, sending an instruction to boost the voltage to the second voltage to the at least one slave;

[0031] The host is controlled to increase the voltage from the first voltage to the second voltage.

[0032] In some embodiments, the host control unit includes: a host voltage loop and a host current loop;

[0033] The host control unit is configured to determine a current mean value based on the current output of the host voltage loop; use the current mean value as the current given by the host current loop; the host current loop is configured to determine an output voltage based on the current mean value; and the output voltage is converted into three-phase electricity to drive the bidirectional inverter.

[0034] The host control unit is further configured to output the current mean value to the at least one slave as a current setting of a slave current loop of the at least one slave.

[0035] In some embodiments, the host control unit further includes a feed-forward voltage branch;

[0036] The feed-forward voltage branch is connected to the input end of the host voltage loop and the output end of the host current loop, and is used to determine the host feed-forward voltage according to the voltage given by the host voltage loop. The host feed-forward voltage is used to perform voltage compensation on the output voltage of the host current loop.

[0037] In some embodiments, the host control unit is further configured to determine an average power value and send the average power value to the at least one slave.

[0038] In some embodiments, a synchronization signal line is sequentially connected in series between the host and the at least one slave;

[0039] The host control unit is further configured to send a synchronization carrier to the connected slaves. The synchronization carrier is sequentially sent to each slave in series for carrier synchronization of each slave.

[0040] In a third aspect, an embodiment of the present invention provides an energy storage converter, wherein the energy storage converter is a slave connected in parallel with a master, and comprises:

[0041] A DC energy storage unit, a bidirectional inverter, an AC filter, and a slave control unit; the slave control unit is used to:

[0042] Receive the start command;

[0043] Receive the phase-lock synchronization command sent by the host;

[0044] In response to the start command and the phase-lock synchronization instruction, after establishing a synchronization voltage with the host to the first voltage, a phase-lock completion signal is sent to the host;

[0045] receiving an instruction sent by the host to boost the voltage to a second voltage;

[0046] The slave device is controlled to boost the voltage from the first voltage to a second voltage.

[0047] In some embodiments, the slave control unit includes a slave current loop;

[0048] The slave control unit is used to receive the current average sent by the host, and the current average is used as the current given by the slave current loop. The slave current loop is used to determine the output voltage according to the current average, and the output voltage is converted into three-phase electricity to drive the bidirectional inverter to operate.

[0049] In some embodiments, the slave control unit is further configured to receive a power average value sent by the master;

[0050] The slave control unit further includes: a feedforward voltage branch;

[0051] The feedforward voltage branch is connected to the input and output ends of the slave current loop, and is used to determine the slave feedforward voltage according to the power mean and the current mean. The slave feedforward voltage is used to perform voltage compensation on the output voltage of the slave current loop.

[0052] In some embodiments, the power mean value includes: an active power mean value and a reactive power mean value;

[0053] The current mean value includes: a q-axis current mean value and a d-axis current mean value;

[0054] The feedforward voltage branch includes: a q-axis feedforward voltage branch and a d-axis feedforward voltage branch;

[0055] The q-axis feedforward voltage branch is used to determine the q-axis feedforward voltage according to the active power mean and the q-axis current mean, and the q-axis feedforward voltage is used to perform voltage compensation on the output voltage of the slave q-axis current loop;

[0056] The d-axis feedforward voltage branch is used to determine a d-axis feedforward voltage according to the reactive power mean and the d-axis current mean, and the d-axis feedforward voltage is used to perform voltage compensation on the output voltage of the slave d-axis current loop.

[0057] In some embodiments, the slave device is further connected in series with the host device or other slave devices via a synchronization signal line, and receives a synchronization carrier via the synchronization signal line to perform carrier synchronization.

[0058] In a fourth aspect, an embodiment of the present invention provides an energy storage system, including:

[0059] The energy storage converter described in the first aspect or any one of the first aspects serves as a host, and further includes at least one energy storage converter described in the second aspect or any one of the second aspects as a slave.

[0060] In a fifth aspect, an embodiment of the present invention provides an electric device, including:

[0061] The energy storage converter described in the first aspect or any one of the first aspects serves as a host, and further includes at least one energy storage converter described in the second aspect or any one of the second aspects as a slave.

[0062] The energy storage converter, off-grid parallel control method, system, and device of the embodiments of the present invention have at least the following beneficial effects:

[0063] In the embodiment of the present invention, when the PCS is started in an off-grid parallel operation condition, a master-slave following mode is adopted, and a segmented voltage boost mode is used to achieve stable startup of multiple energy storage converters in parallel. BRIEF DESCRIPTION OF THE DRAWINGS

[0064] Figure 1 A schematic diagram of the structure of a PCS provided in an embodiment of the present invention;

[0065] Figure 2 A schematic diagram of an energy storage system provided by an embodiment of the present invention;

[0066] Figure 3 A schematic diagram of an energy storage system provided by an embodiment of the present invention;

[0067] Figure 4 A schematic diagram of a plurality of PCS grid-connected connections provided by an embodiment of the present invention;

[0068] Figure 5 A schematic diagram of PWM synchronization provided by an embodiment of the present invention;

[0069] Figure 6 A schematic diagram of PWM asynchronous operation provided by an embodiment of the present invention;

[0070] Figure 7 A flow chart of an off-grid parallel control method for an energy storage converter provided by an embodiment of the present invention;

[0071] Figure 8 A schematic diagram of the structure of a PCS provided in an embodiment of the present invention;

[0072] Figure 9 A schematic structural diagram of a host control unit provided by an embodiment of the present invention;

[0073] Figure 10 A schematic diagram of the structure of a PCS provided in an embodiment of the present invention;

[0074] Figure 11 A schematic structural diagram of a slave control unit provided by an embodiment of the present invention;

[0075] Figure 12 A schematic diagram of a PCS master, a PCS slave, and the total grid-connected current provided by an embodiment of the present invention;

[0076] Figure 13 A detailed expansion diagram of the current waveforms of a PCS master, a PCS slave, and the total grid-connected current provided by an embodiment of the present invention;

[0077] Figure 14 This is a schematic diagram of the PCS host black start to a voltage of 520V;

[0078] Figure 15 Schematic diagram of the PCS slave performing voltage phase locking on the PCS master;

[0079] Figure 16 Schematic diagram of the PCS master and PCS slave voltage boosting from 520V to 690V;

[0080] Figure 17 Schematic diagram of output voltage, current and power of the output bus during the process of boosting from 520V to 690V;

[0081] Figure 18 Schematic diagram of the PCS host output voltage, current, and power during the process of boosting from 520V to 690V;

[0082] Figure 19 Schematic diagram of PCS slave output voltage, current, and power during the process of boosting from 520V to 690V;

[0083] Figure 20 The voltage and current of the PCS master and PCS slave, as well as the current on the output bus, are shown when the AC load suddenly increases from 20% to 100%.

[0084] Figure 21This is a schematic diagram of the voltage, current, and power on the output bus when the AC load suddenly increases from 20% to 100%.

[0085] Figure 22 The voltage and current of the PCS master and PCS slave, as well as the current on the output bus, when the AC load is 20%;

[0086] Figure 23 The voltage and current of the PCS master and PCS slave, as well as the current on the output bus, when the AC load is 100%;

[0087] Figure 24 The voltage and current of the PCS master and PCS slave, as well as the current on the output bus, are shown when the AC load is suddenly unloaded by 20% from 100%.

[0088] Figure 25 This is a schematic diagram of the voltage, current, and power on the output bus when the AC load suddenly decreases from 100% to 20%. DETAILED DESCRIPTION

[0089] In order to better understand the technical solution of the present application, the embodiments of the present application are described in detail below with reference to the accompanying drawings.

[0090] It should be clear that the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0091] The terms used in the embodiments of the present application are for the purpose of describing specific embodiments only and are not intended to limit the present application. The singular forms "a", "an", "the" and "the" used in the embodiments of the present application and the appended claims are also intended to include plural forms unless the context clearly indicates otherwise.

[0092] It should be understood that the term "and / or" as used herein simply describes a relationship between associated objects, indicating that three possible relationships exist. For example, "A and / or B" can represent: A alone, A and B together, or B alone. Furthermore, the character " / " in this document generally indicates an "or" relationship between the associated objects.

[0093] like Figure 1 As shown, the PCS includes a DC energy storage unit, a bidirectional inverter, an AC filter, and a control unit. The DC energy storage unit includes a DC power source. In off-grid mode, the PCS is disconnected from the grid and instead uses the DC power source to convert the DC power provided by the DC power source into AC power to power AC loads.

[0094] The DC energy storage unit includes a DC source, such as Figure 3 In the illustrated system, the PCS master includes a DC source 1, and the PCS slave includes a DC source 2. DC sources 1 and 2 are each connected to their corresponding bidirectional inverters via a DC bus. The DC bus includes a positive DC bus voltage, BUS+, and a negative DC bus voltage, BUS-. A bus capacitor is connected between the positive and negative DC bus voltages, BUS+ and BUS-. The bus capacitor serves as an energy storage and filtering device in the circuit. During PCS startup, it absorbs the instantaneous peak power of the DC source, reduces current harmonics, and provides a stable voltage input for the bidirectional inverter, preventing damage from transient voltages during startup.

[0095] Bidirectional inverters can convert DC to AC and vice versa. In off-grid mode, bidirectional inverters convert DC power from a DC source into AC. Furthermore, bidirectional inverters include components such as IGBTs (Insulated Gate Bipolar Transistors). A control unit controls the IGBTs using PWM (Pulse Width Modulation) to achieve DC-to-AC conversion.

[0096] AC filter is used to filter the AC power output by the bidirectional inverter to ensure the stability of the output voltage waveform. Figure 3 As shown, the AC filter includes an inverter filter inductor, a filter capacitor, and a grid-side inverter filter inductor L2. The inverter filter inductor is a three-phase inverter inductor, L1_R is the R-phase inverter inductor, L1_S is the S-phase inverter inductor, and L1_T is the T-phase inverter inductor. Figure 3 In the process, after the PCS master and PCS slave are connected in parallel, the three-phase voltage U is output on the output bus. R 、U S and U T .

[0097] In off-grid mode, in order to meet the power demand of AC load, Figure 1 The multiple PCSs shown in FIG. are operated in parallel. Specifically, Figure 2 and Figure 3 As shown, multiple PCSs are connected in parallel. The multiple PCSs connected in parallel operate in a master-slave mode, that is, the multiple PCSs include a PCS master and at least one PCS slave. Figure 2 As shown, the PCS host is connected in parallel with PCS slave 1 and PCS slave 2. Figure 3 As shown, the PCS master is connected in parallel with PCS slave 1.

[0098] Combine Figure 2 and Figure 3, the way of connecting multiple PCS in parallel may include: the PCS host is connected in parallel with each slave through the CAN line, and instructions or data can be exchanged between the PCS host and the PCS slave through the CAN line. Figure 2 In the example given, the PCS master is connected in parallel with PCS slave 1 and PCS slave 2 via CAN lines. Figure 3 In the example given, the PCS master is connected in parallel with PCS slave 1 via the CAN line.

[0099] Combine Figure 2 and Figure 3 In addition to being connected in parallel via CAN lines, multiple PCSs can also be connected in series via synchronization signal lines. The PCS master can send synchronization carrier waves to the connected PCS slaves via the synchronization signal lines. Figure 2 As shown, the PCS host can send a synchronization carrier to the connected PCS slave 1 through the synchronization signal line, and the synchronization carrier is then sent serially from PCS slave 1 to PCS slave 2 through the synchronization signal line. The synchronization carrier can achieve carrier synchronization between the PCS host and each PCS slave. Figure 3 As shown, the PCS host is connected in series with the PCS slave 1 via a synchronization signal line. The PCS host can send a synchronization carrier to the connected PCS slave 1 via the synchronization signal line to achieve carrier synchronization between the PCS host and the PCS slave 1.

[0100] It should be noted that the PCS master and each PCS slave may further include a communication module, through which the PCS master and each PCS slave are connected in parallel via CAN lines and in series via synchronization signal lines. In some embodiments, the transmission of data or synchronization carriers between the PCS master and each PCS slave is performed under the control of the control unit.

[0101] like Figure 4 As shown, the PCS host and each PCS slave have CANH, CANL, SYNC_IN, SYNC_OUT, and GND pins. The CANH and CANL pins of the PCS host are connected in parallel with the CANH and CANL pins of each PCS slave, such as PCS slave 1 and PCS slave 2, to achieve parallel connection between the PCS host and each PCS slave. Furthermore, the SYNC_OUT and GND pins of the PCS host are connected in series with the SYNC_IN and GND pins of one of the PCS slaves (such as PCS slave 1), and the SYNC_OUT and GND pins of PCS slave 1 are connected in series with the SYNC_IN and GND pins of the next PCS slave (such as PCS slave 2), achieving series connection between the PCS host and each PCS slave based on synchronization signal lines.

[0102] exist Figure 2-Figure 4In the energy storage system shown, multiple PCSs are operated in parallel. By distributing the output power of each PCS, the system can be made to operate stably and efficiently. When multiple PCSs are operated in parallel, the PWMs issued by the multiple PCSs are ideally kept consistent, such as Figure 5 As shown in the figure, the periods of PWM1 and PWM2 are basically the same. However, in reality, due to the differences in the chip crystal oscillator and the actual power-on timing of the chip, even if the calculated PWM period is the same, the actual PWM wave cannot be exactly the same. In extreme cases, the following may occur: Figure 6 In the scenario shown, the PWM1 and PWM2 of the two PCSs differ by 180 degrees. The most direct harm caused by a large phase difference between different PWMs is the formation of high-frequency circulating currents between the PCSs, resulting in large current ripple in the grid-side inverter filter inductor L2 and severe inductor heating. Furthermore, as the number of PCSs connected in parallel increases, high-frequency circulating currents may be fed from multiple PCSs to one PCS. To address this issue, embodiments of the present invention connect synchronization signal lines in series between each PCS. These synchronization signal lines perform carrier synchronization between the PCSs. This carrier synchronization ensures consistent PWM between the master and slave PCSs, preventing circulating currents between multiple PCSs.

[0103] Further, in Figure 2-Figure 4 In the energy storage system shown, in order to meet the power demand of the AC load, after connecting multiple PCS in parallel, it is necessary to consider the safe startup of the energy storage converter under off-grid parallel working conditions. If handled improperly, the energy storage system may not operate normally and may even cause a risk of explosion. In order to ensure the stable startup and operation of the energy storage converter under off-grid parallel working conditions, an embodiment of the present invention also provides an off-grid parallel control method for the energy storage converter. Figure 7 As shown, the processing steps of the method include:

[0104] 101. The PCS host receives a start command.

[0105] 102. The PCS slave receives a start command.

[0106] In this embodiment of the present invention, the execution order of step 101 and step 102 is not limited. Step 101 may be executed first, or step 102 may be executed first, or steps 101 and 102 may be executed relatively synchronously. In one possible implementation, the host computer sends a startup command to the PCS host and each PCS slave. The PCS host and each PCS slave receive the startup command relatively synchronously. In another possible implementation, the host computer sends a startup command to the PCS host, which then sends a startup command to each PCS slave. The PCS host first receives the startup command, and then each PCS slave receives the startup command sent by the PCS host. Alternatively, the PCS host may send startup commands to each PCS slave in parallel via a CAN line.

[0107] 103. After receiving the start command, the PCS host performs a black start to a first voltage. The PCS host may black start to the first voltage by connecting the PCS host to a DC power source and precharging the DC side. After the DC side precharging is complete, the bidirectional inverter is started to convert DC power to AC power. When converting DC power to AC power, the bidirectional inverter, under the control of the control unit, can accelerate the ramp of the AC power output by the PCS host from 0V to a first voltage V0. Once the PCS output voltage reaches V0, it maintains this value for a stable output, and then executes step 104.

[0108] 104. The PCS host sends a phase-lock synchronization instruction to each PCS slave. Optionally, after the PCS host black-starts to the first voltage, the PCS host can send the phase-lock synchronization instruction to each PCS slave in parallel via the CAN line.

[0109] 105. The PCS slave receives a phase-lock synchronization instruction from the PCS master. Optionally, the PCS slave may receive the phase-lock synchronization instruction from the PCS master via a CAN line. Optionally, after receiving the start command and the phase-lock synchronization instruction, the PCS slave executes step 106. Optionally, after receiving the start command and before receiving the phase-lock synchronization instruction, the PCS slave may enter a waiting state, awaiting the phase-lock synchronization instruction from the PCS master. If the waiting state times out, the PCS slave may exit the waiting state, for example, by exiting the startup state or entering a sleep state, thereby exiting the current startup.

[0110] 106, the PCS slave establishes a synchronization voltage to a first voltage. After receiving the phase-locked synchronization instruction sent by the PCS host, the PCS slave can establish a synchronization voltage to the first voltage based on the AC power output by the PCS host as a reference, thereby achieving phase-locked synchronization with the voltage and phase of the PCS host. Figure 3As shown, after receiving the phase-locked synchronization command from the PCS master, PCS slave 1 can use the AC power output by the PCS master's bidirectional inverter as a reference to establish synchronization with the first voltage. Alternatively, PCS slave 1 can use the AC power from the PCS master after passing through the grid-side inverter filter inductor L2 as a reference to establish synchronization with the first voltage. After the PCS slave establishes the synchronization voltage at the first voltage, step 107 is executed. If there are multiple PCS slaves, all PCS slaves execute step 107 after completing steps 105 and 106.

[0111] 107. The PCS slave sends a phase lock completion signal to the PCS master. Optionally, the PCS slave may send the phase lock completion signal to the PCS master via a CAN line.

[0112] At 108, the PCS host determines whether all PCS slaves have completed phase-lock synchronization. Optionally, the PCS host may determine whether phase-lock completion signals have been received from all PCS slaves. The PCS host may determine whether all PCS slaves have completed phase-lock synchronization based on the number of received PCS phase-lock completion signals. If it is determined that all PCS slaves have completed phase-lock synchronization, step 109 is executed. If, after issuing the phase-lock synchronization instruction and waiting for the first period of time, phase-lock completion signals from all slaves are still not received, a fault alert may be issued to the host computer, prompting the host computer to restart after the fault is determined or resolved.

[0113] 109. The PCS host sends an instruction to each PCS slave to boost the voltage to the second voltage.

[0114] 110. The PCS slave determines whether it has received an instruction to boost the voltage to the second voltage. If so, step 111 is executed; if not, the PCS slave maintains operation at the first voltage.

[0115] 111. The PCS master and each PCS slave device are boosted from a first voltage to a second voltage. After the PCS master and all slave devices have established a synchronized voltage at the first voltage, the PCS master sends a command to each PCS slave device to boost the voltage to the second voltage. The PCS master and each PCS slave device can boost the voltage from the first voltage V0 to the second voltage Vn at the same slope, ensuring the stability of the voltage, current, and power on the PCS master, PCS slaves, and output bus during the boost process. The voltage ultimately stabilizes at the second voltage Vn, completing the startup process.

[0116] In the embodiment method of the present invention, when the PCS is started in an off-grid parallel condition, a master-slave following mode is adopted, and a segmented voltage boost mode is used to achieve stable startup of multiple energy storage converters in parallel.

[0117] In the embodiment of the present invention, the PCS host and each PCS slave transmit instructions and data via the CAN line, such as the start instruction, the phase-lock synchronization instruction, the phase-lock completion signal, the instruction to boost to the second power supply, and the data of the completed instruction transmission, etc., which can ensure the real-time performance of the instructions and data. Figures 2 to 4 During the PCS startup process, the PCS host also sends a synchronization carrier to the connected PCS slave through the synchronization signal line. The synchronization carrier is sent serially to each slave in turn to achieve carrier synchronization between multiple PCSs and ensure that there is no loop current between multiple PCSs.

[0118] exist Figure 2-Figure 4 In the energy storage system shown, based on the master-slave mode, the PCS master starts in VF mode and employs an outer voltage loop and inner current loop control method. Each PCS slave can use a current loop control method. Specifically, the PCS master determines the average current value based on the current output of the master voltage loop and uses this average current value as the current reference for the current loops of the PCS master and each PCS slave. Through current loop regulation and control, the load current and power of multiple PCSs can be balanced.

[0119] Furthermore, the PCS host also determines a power mean and sends the power mean to each PCS slave. Each PCS slave can determine a slave feedforward voltage of the PCS slave based on the power mean and current mean. The slave feedforward voltage can be used to perform voltage compensation on the output voltage of the corresponding slave current loop. The slave feedforward voltage can accelerate the dynamic responsiveness of the slave under sudden loading and unloading conditions. Specifically, the power mean includes: an active power mean and a reactive power mean; the current mean includes: a q-axis current mean and a d-axis current mean; the at least one slave determines a q-axis feedforward voltage based on the active power mean and the q-axis current mean, for performing voltage compensation on the output voltage of the q-axis current loop of the corresponding slave; the at least one slave determines a d-axis feedforward voltage based on the reactive power mean and the d-axis current mean, for performing voltage compensation on the output voltage of the d-axis current loop of the corresponding slave. In this way, compensation of the slave q-axis and d-axis output voltages can be achieved, accelerating the dynamic responsiveness of the slave under sudden loading and unloading conditions.

[0120] Optionally, the PCS host also determines the host feedforward voltage based on the given host voltage loop, and performs voltage compensation on the output voltage of the host current loop through the host feedforward voltage. The host feedforward voltage can accelerate the dynamic responsiveness of the PCS host under sudden loading and unloading conditions.

[0121] See also Figure 8 , which is a structural diagram of a PCS provided in an embodiment of the present invention. Figure 8 The PCS shown is the PCS host in the energy storage system. Figure 8As shown, the PCS host includes a DC energy storage unit, a bidirectional inverter, an AC filter, and a host control unit. The host control unit performs the following functions: receiving a startup command; in response to the startup command, controlling the host to black-start to a first voltage, and then sending a phase-lock synchronization instruction to at least one slave; receiving a phase-lock completion signal from at least one slave; after determining that all phase-lock completion signals have been received from all slaves, sending a voltage-boosting instruction to the at least one slave to increase the voltage to a second voltage; and controlling the host to increase the voltage from the first voltage to the second voltage. In an embodiment of the present invention, when the PCS is started in off-grid parallel operation, it adopts a master-slave following method, and according to the segmented voltage boosting method, it can achieve stable startup of multiple energy storage converters in parallel.

[0122] In the PCS host, the host control unit adopts the control mode of outer voltage loop and inner current loop. Figure 9 As shown, the host control unit includes a host voltage loop and a host current loop. The host control unit can determine the current mean value based on the current output of the host voltage loop; the host control unit can use the current mean value as the current reference of the host current loop. The host current loop is used to determine the output voltage based on the current mean value. The output voltage of the host current loop is converted into three-phase electricity through Park inverse transformation and Clarke inverse transformation to drive the bidirectional inverter. Optionally, the host control unit is also used to output the current mean value to each PCS slave to serve as the current reference of the current loop of each PCS slave.

[0123] Specifically, such as Figure 9 As shown in Figure 1, the host voltage loop includes a d-axis voltage loop and a q-axis voltage loop. The input of the d-axis voltage loop includes: and , and After adjustment by the voltage loop PI controller, the output d-axis current value is The inputs to the q-axis voltage loop include: and , and After adjustment by the voltage loop PI controller, the output q-axis current value is .

[0124] like Figure 9 As shown, the host current loop includes the d-axis current loop and the q-axis current loop. The input of the d-axis current loop includes: and , and After the current loop PI controller is adjusted, the output d-axis voltage The inputs to the q-axis current loop include: and , and After the current loop PI controller is adjusted, the output q-axis voltage In other embodiments, the inputs of the d-axis current loop and the q-axis current loop may also be replaced by and It can also be replaced by the current average value calculated by the host control unit and .

[0125] In a specific implementation, the control formula of the host voltage loop includes:

[0126] .

[0127] In formula 1, is the voltage given by the d-axis and q-axis in the dq coordinate system, Specifically, the host control unit can perform Park transformation and Clarke transformation on the three-phase voltage output by the AC filter to convert the three-phase voltage output by the PCS host into the dq coordinate system, and obtain the dq coordinate system. . are the parameters of the voltage loop PI controller, are the outputs of the d-axis host voltage loop and the q-axis host voltage loop respectively. It can also be expressed as and , and They are the current outputs of the d-axis host voltage loop and the q-axis host voltage loop respectively.

[0128] Determining the current mean value based on the current output of the host voltage loop includes:

[0129] ;

[0130] .

[0131] Furthermore, the host control unit is further configured to determine a power average value and send the power average value to each PCS slave. Figure 9 In the host control unit shown, the calculation method of the power average includes: ; .

[0132] In the above formula, n is the number of PCS in the energy storage system. Pi is the active power of each PCS. is the mean active power. Qi is the reactive power of each PCS, is the mean reactive power. In the calculation formulas for the mean current and mean power, n is the number of PCSs in the energy storage system. For the Active power of each PCS, For the Reactive power of each PCS, The value of is 1, 2...n. is the mean active power. is the mean reactive power.

[0133] like Figure 9 As shown, the host control unit also includes a feedforward voltage branch; the feedforward voltage branch is connected to the input end of the host voltage loop and the output end of the host current loop, and is used to determine the host feedforward voltage according to the voltage given by the host voltage loop, and the host feedforward voltage is used to perform voltage compensation on the output voltage of the host current loop.

[0134] like Figure 9 As shown in the figure, the host current loop adds the host feed-forward voltage to calculate the voltage output:

[0135]

[0136] In the above calculation formula, = , = , are the voltages of the d-axis and q-axis in the dq coordinate system respectively. is the current feedback of the d-axis and q-axis in the dq coordinate system. Specifically, the host control unit can perform Park transformation and Clarke transformation on the three-phase current output by the AC filter to convert the three-phase current output by the PCS host into the dq coordinate system to obtain the current in the dq coordinate system. ; are the parameters of the current loop PI control. is the input of the host current loop. In this formula, the average current of the host voltage loop output current is and As the input of the host current loop, the host feed-forward voltage is calculated based on the current average of the host voltage loop output current. and After Park inverse transform and Clarke inverse transform, it is converted into three-phase voltages Ua, Ub and Uc. Ua, Ub and Uc are compared with the synchronous carrier to generate PWM, and the PWM signal is used to control the operation of the IGBT.

[0137] See also Figure 10 , which is a structural diagram of a PCS provided in an embodiment of the present invention. Figure 10 The PCS shown is a PCS slave in the energy storage system, connected in parallel with the PCS master. Figure 10As shown, the PCS slave includes a DC energy storage unit, a bidirectional inverter, an AC filter, and a slave control unit. The slave control unit performs the following functions: receiving a start command; receiving a phase-lock synchronization instruction from the master; in response to the start command and the phase-lock synchronization instruction, establishing a synchronized voltage with the master to the first voltage and then sending a phase-lock completion signal to the master; receiving a voltage-boosting instruction from the master to a second voltage; and controlling the slave to boost the voltage from the first voltage to the second voltage.

[0138] In a PCS slave, the slave control unit includes a slave current loop. The slave control unit receives the average current value sent by the master, which is used as the current reference for the slave current loop. The slave current loop then determines the output voltage based on the average current value. The output voltage of the slave current loop is converted to three-phase power through Park and Clarke inverse transformations, which then drive the bidirectional inverter.

[0139] like Figure 11 As shown, the slave current loop includes the d-axis current loop and the q-axis current loop. The input of the d-axis current loop includes: the d-axis current mean and , after adjustment by the current loop PI controller, the output d-axis voltage The input of the q-axis current loop includes: q-axis current mean and , after adjustment by the current loop PI controller, the output q-axis voltage .

[0140] Furthermore, the slave control unit is also used to receive the power average sent by the host; the slave control unit also includes: a feedforward voltage branch; the feedforward voltage branch is connected to the input and output ends of the slave current loop, and is used to determine the slave feedforward voltage based on the power average and the current average, and the slave feedforward voltage is used to perform voltage compensation on the output voltage of the slave current loop.

[0141] like Figure 11 As shown, the average power sent by the PCS host to the PCS slave includes: average active power and reactive power mean The current mean includes: q-axis current mean and the mean d-axis current The feedforward voltage branch includes: q-axis feedforward voltage branch and d-axis feedforward voltage branch. The q-axis feedforward voltage branch is used to calculate the average active power value. and the q-axis current mean Determine the q-axis feedforward voltage , q-axis feedforward voltage Used for the output voltage of the slave q-axis current loop Perform voltage compensation. The d-axis feedforward voltage branch is used to compensate for the reactive power mean value. and the mean d-axis current ; Determine the d-axis feedforward voltage , d-axis feedforward voltage Used for the output voltage of the slave d-axis current loop Perform voltage compensation.

[0142] Among them, the calculation formulas of the d-axis feedforward voltage and the q-axis feedforward voltage are:

[0143] ;

[0144] .

[0145] The output voltage calculation formula after adding feedforward voltage compensation to the slave current loop is:

[0146]

[0147] In the above formula, is the current feedback of the d-axis and q-axis in the dq coordinate system. Specifically, the slave control unit can perform Park transformation and Clarke transformation on the three-phase current output by the PCS slave AC filter to convert the three-phase current output by the PCS slave to the dq coordinate system and obtain the current in the dq coordinate system. ; is the parameter of the current loop PI control. The output voltage of the slave current loop and After Park inverse transform and Clarke inverse transform, it is converted into three-phase voltages Ua, Ub and Uc. Ua, Ub and Uc are compared with the synchronous carrier to generate PWM, and the PWM signal is used to control the operation of the IGBT.

[0148] In an embodiment of the invention, data such as instructions, current average, and power average are transmitted between PCSs via CAN lines to ensure real-time data transmission. In addition, carrier synchronization is achieved between PCSs by serially transmitting synchronous carriers to ensure that there is no circulating current between multiple machines. Furthermore, in an embodiment of the present invention, a master-slave mode is adopted, the master adopts the VF mode, and is controlled by the outer loop voltage loop and the inner core current loop, and the slave adopts the current loop control method. The master uses the current average of the host voltage loop as the current given by the slave current loop, and adjusts the output voltage through the current loop PI controller to balance the load current and power between multiple PCSs. In addition, a feedforward voltage is calculated in the PCS slave using the power average and current average to compensate for the voltage output of the slave current loop, which can improve the dynamic responsiveness of the PCS slave under sudden loading and unloading conditions.

[0149] like Figure 12 As shown, the three-phase current output by the PCS host and the PCS slave is synchronized using the method of the embodiment of the present invention. Figure 12 In the example, the inverter current of module 1 can correspond to the three-phase inverter current of the PCS host, and the inverter current of module 2 can correspond to the three-phase inverter current of the PCS slave. Red, green and blue represent the three phases of current respectively. Figure 12 As shown in Figure 1, the three-phase currents of the inverter current of module 1 and the inverter current of module 2 are kept synchronous. The three-phase current on the output bus after the PCS master and PCS slave are connected to the grid is called the total grid current, as shown in Figure 1. Figure 12 The total grid-connected current output is stable and synchronized with the three-phase inverter currents of modules 1 and 2. There is no circulating current between modules 1 and 2.

[0150] like Figure 13 As shown in FIG, a detailed expansion diagram of the current waveform of a PCS host, a PCS slave and a total grid current provided by an embodiment of the present invention. Figure 13 It can be seen from the figure that after carrier synchronization, there is no circulating current between module 1 and module 2, that is, there is no circulating current between the PCS master and PCS slave.

[0151] like Figure 14 The figure shows the schematic diagram of the PCS host black start to voltage 520V. Figure 14 In the figure, the waveform at the first position (upper position) is the voltage diagram of the PCS host, the waveform at the second position (middle position) is the current diagram of the PCS host, and the waveform at the third position (lower position) is the current diagram of the output bus. Figure 14 It can be seen that during the black start process, the voltage and current of the PCS host increase at a certain slope.

[0152] like Figure 15 As shown in Figure 1, the PCS slave performs voltage phase locking on the PCS master. Figure 15 As shown in the figure, after the PCS host is black-started to 520V, the PCS slave is started. Figure 15 In the diagram, the waveforms at the first group of positions (upper position) are the voltage graphs of the PCS host and PCS slave, the waveforms at the second group of positions (middle position) are the current graphs of the PCS host and PCS slave, and the waveforms at the third group of positions (lower position) are the current graphs on the output bus. Figure 15 It can be seen that during the process of the PCS slave starting up to 520V, the phases of the output current of the PCS slave and the output current of the PCS master gradually change from being out of phase to being consistent, thus completing phase locking.

[0153] like Figure 16 As shown in Figure 1, it is a schematic diagram of the PCS host and PCS slave voltage boosting from 520V to 690V. Figure 16The waveforms at the first position (upper position) are the voltage diagrams of the PCS master and PCS slave during the boost process. The waveforms at the second position (middle position) are the current diagrams of the PCS master and PCS slave during the boost process. The waveforms at the third position (lower position) are the current diagrams on the output bus. Figure 16 As can be seen from the waveform of the first group of positions in the figure, the voltage of the PCS host and PCS slave rises steadily at a certain slope. Figure 16 As can be seen from the waveform at the second group position (middle position) in the figure, during the boost process, the three-phase current output by the PCS host and PCS slave gradually increases and the phases gradually become consistent. Figure 16 As can be seen from the waveform at the third group of positions (lower position) in FIG, the current on the output bus gradually increases and gradually synchronizes with the PCS master and PCS slave.

[0154] like Figure 17 As shown in Figure 1, the output voltage, current and power on the output bus are shown in the figure when the voltage is increased from 520V to 690V. Figure 17 In the figure, the waveforms at the first position (upper position) are the waveforms of the effective voltage on the output bus during the boost process. The waveforms at the second position (middle position) are the waveforms of the positive sequence active power (green line) and reactive power (red line) on the output bus during the boost process. The waveforms at the third position (lower position) are the waveforms of the positive sequence active power (green line) and reactive current (red line) on the output bus during the boost process. Figure 18 The figure shows the output voltage, current and power of the PCS host during the process of boosting from 520V to 690V. Figure 18 In the figure, the waveforms at the first group of positions (upper position) are the waveforms of the positive sequence voltage (green line) and negative sequence voltage (red line) of the PCS host during the boost process. The waveforms at the second group of positions (middle position) are the waveforms of the positive sequence active power (green line) and reactive power (red line) of the PCS host during the boost process. The waveforms at the third group of positions (lower position) are the waveforms of the positive sequence active power (green line) and reactive current (red line) of the PCS host during the boost process. Figure 19 The figure shows the output voltage, current and power of the PCS slave during the process of boosting from 520V to 690V. Figure 19In the figure, the waveforms at the first position (top position) are the waveforms of the positive sequence voltage (green line) and negative sequence voltage (red line) of the PCS slave during the boost process. The waveforms at the second position (middle position) are the waveforms of the positive sequence active power (green line) and reactive power (red line) of the PCS slave during the boost process. The waveforms at the third position (bottom position) are the waveforms of the positive sequence active power (green line) and reactive current (red line) of the PCS slave during the boost process. Figure 17-Figure 19 It can be seen that during the boost process, the output voltage, current, and power on the PCS host, PCS slave, and output bus increase steadily at a certain slope, and the phases of the currents on the PCS host, PCS slave, and output bus gradually become consistent.

[0155] like Figure 20 As shown in Figure 1, the voltage and current of the PCS host and PCS slave as well as the current on the output bus are shown when the AC load is suddenly loaded from 20% to 100%. Figure 20 In the figure, the waveforms at the first position (top) show the voltages of the PCS master and PCS slave devices during a sudden load. The waveforms at the second position (center) show the currents of the PCS master and PCS slave devices during a sudden load. The waveforms at the third position (bottom) show the currents on the output bus.

[0156] like Figure 21 The figure shows the voltage, current and power on the output bus when the AC load suddenly increases from 20% to 100%. Figure 21 In the figure, the waveforms at the first position (top) show the RMS voltage waveform on the output bus during a sudden load. The waveforms at the second position (center) show the positive-sequence active power (green line) and reactive power (red line) waveforms on the output bus during a sudden load. The waveforms at the third position (bottom) show the positive-sequence active power (green line) and reactive current (red line) waveforms on the output bus during a sudden load.

[0157] like Figure 22 As shown in Figure 1, the voltage and current of the PCS host and PCS slave as well as the current on the output bus are shown when the AC load is 20%. Figure 22 In the figure, the waveforms at the first position (upper position) are the voltages of the PCS master and PCS slave devices when the AC load is 20%. The waveforms at the second position (middle position) are the currents of the PCS master and PCS slave devices when the AC load is 20%. The waveforms at the third position (lower position) are the currents on the output bus when the AC load is 20%. Figure 23 As shown in Figure 1, the voltage and current of the PCS host and PCS slave as well as the current on the output bus are shown when the AC load is 100%. Figure 23In the diagram, the first waveform (upper position) shows the voltage at the PCS master and PCS slave devices when the AC load is 100%. The second waveform (middle position) shows the current at the PCS master and PCS slave devices when the AC load is 100%. The third waveform (lower position) shows the current on the output bus when the AC load is 100%.

[0158] Among them, in the national standard test requirements, when the energy storage converter is in off-grid operation, when the load increases from 20% to 100%, or decreases from 100% to 20%, the absolute value of the deviation between the output voltage RMS value of the energy storage converter and the rated voltage value within 100ms should not be greater than 30% of the rated voltage, and the absolute value of the deviation between the output voltage RMS value and the rated voltage value after 100ms should not be greater than ±10% of the rated voltage. In this system, the rated voltage of the system is 690V, 690 10% is 69V.

[0159] Combine Figure 20-23 As shown, in some examples, when the AC load is suddenly loaded from 20% to 100%, the maximum transient voltage deviation on the output bus within 100ms is 56.7V, which is less than 69V and less than the 10% standard in the national standard test requirements.

[0160] like Figure 24 As shown in Figure 1, the voltage and current of the PCS host and PCS slave as well as the current on the output bus are shown when the AC load is suddenly unloaded by 20% from 100%. Figure 24 The waveforms at the first position (top) show the voltages of the PCS master and PCS slave devices when the AC load suddenly decreases by 20% from 100%. The waveforms at the second position (center) show the currents of the PCS master and PCS slave devices when the AC load suddenly decreases by 20% from 100%. The waveforms at the third position (bottom) show the currents on the output bus when the AC load suddenly decreases by 20% from 100%. Figure 25 The figure shows the voltage, current and power on the output bus when the AC load suddenly decreases from 100% to 20%. Figure 25 The waveforms at the first position (top) show the effective voltage waveform on the output bus when the AC load suddenly unloads by 20% from 100%. The waveforms at the second position (middle) show the positive-sequence active power (green line) and reactive power (red line) waveforms on the output bus when the AC load suddenly unloads by 20% from 100%. The waveforms at the third position (bottom) show the positive-sequence active power (green line) and reactive current (red line) waveforms on the output bus when the AC load suddenly unloads by 20% from 100%. Figure 22-Figure 25When the AC load is suddenly unloaded by 20% from 100%, the maximum transient voltage deviation on the output bus within 100ms is 60.4V, which is less than 69V and less than the 10% standard in the national standard test requirements.

[0161] From the above description, it can be seen that in the embodiment of the present invention, (1) the carriers between the PCS master and the PCS slave are synchronized, and there is no circulating current between the PCS master and the PCS slave. (2) The PCS master black start is normal, and the PCS slave voltage phase-locked synchronization starts normally to the black start voltage. (3) The off-grid parallel ramp runs normally from the black start voltage to the rated voltage, and the voltage and current consistency in the steady state is very high. The load power and current distribution of the PCS master and PCS slave are balanced. (4) The off-grid parallel plus power feedforward improves the dynamic response to sudden loading and unloading, meeting the national standard test requirements.

[0162] The embodiment of the present invention also provides an energy storage system, comprising Figure 8 or Figure 9 The PCS shown is used as a PCS host; it also includes at least one Figure 10 or Figure 11 The PCS shown is a slave. Optionally, the PCS master and PCS slave can be configured as follows: Figure 2-Figure 4 The methods shown are connected to perform the methods of the embodiments of the present invention.

[0163] The embodiment of the present invention further provides an electrical device, comprising Figure 8 or Figure 9 The PCS shown is used as a PCS host; it also includes at least one Figure 10 or Figure 11 The PCS shown is a slave. Optionally, the PCS master and PCS slave can be configured as follows: Figure 2-Figure 4 The methods shown are connected to perform the methods of the embodiments of the present invention.

[0164] In this specification, reference can be made to the same or similar parts between the various embodiments. In particular, for the device embodiment and the terminal embodiment, since they are basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the description in the method embodiment.

Claims

1. A method for controlling an off-grid parallel operation of an energy storage converter, characterized in that: A plurality of energy storage converters are connected in parallel, wherein the plurality of energy storage converters include a master and at least one slave, and the method includes: The host and the at least one slave receive a start command; In response to the start command, the host sends a phase-lock synchronization instruction to the at least one slave after black starting to a first voltage; In response to the start command and the phase-lock synchronization instruction, the at least one slave device establishes a synchronization voltage to the first voltage and then sends a phase-lock completion signal to the master device; After determining that the phase-lock completion signals sent by all slaves are received, the host sends an instruction to boost the voltage to the second voltage to the at least one slave; The host and the at least one slave are increased from the first voltage to the second voltage; The host adopts an outer voltage loop and an inner current loop control mode; the at least one slave adopts a current loop control mode; The host determines the current mean value according to the current output of the host voltage loop; The host sets the current mean as the current of the current loop of the host and the at least one slave; The host determines a power average and sends the power average to the at least one slave, wherein the at least one slave adopts a current loop control method, and the slave current loop is used to determine an output voltage according to the current average; The at least one slave determines a slave feedforward voltage according to the power mean value and the current mean value, and the slave feedforward voltage is used to perform voltage compensation on an output voltage of a corresponding slave current loop.

2. The off-grid parallel control method of the energy storage converter according to claim 1, characterized in that: The at least one slave determines a slave front-end voltage according to the power mean and the current mean, wherein the slave feed-forward voltage is used to perform voltage compensation on an output voltage of a corresponding slave current loop, including: The power mean value includes: active power mean value and reactive power mean value; The current mean value includes: a q-axis current mean value and a d-axis current mean value; The at least one slave determines a q-axis feedforward voltage according to the active power mean and the q-axis current mean, so as to perform voltage compensation on an output voltage of a q-axis current loop of the corresponding slave; The at least one slave determines a d-axis feedforward voltage according to the reactive power mean value and the d-axis current mean value, so as to perform voltage compensation on an output voltage of a d-axis current loop of a corresponding slave.

3. The off-grid parallel control method of the energy storage converter according to claim 1, characterized in that: The method further comprises: The host determines a host feed-forward voltage according to a given voltage of the host voltage loop, and the host feed-forward voltage is used to perform voltage compensation on an output voltage of the host current loop.

4. The off-grid parallel control method for energy storage converter according to claim 1, characterized in that: The plurality of energy storage converters are connected in series with synchronization signal lines; The host sends a synchronization carrier to the connected slaves via the synchronization signal line. The synchronization carrier is sequentially sent to each slave in series for carrier synchronization of each slave.

5. An energy storage converter, characterized in that: The energy storage converter is a host, connected in parallel with at least one slave, and includes: A DC energy storage unit, a bidirectional inverter, an AC filter, and a host control unit; the host control unit is used to: Receive the start command; In response to the start command, controlling the host to black start to a first voltage, and then sending a phase-locked synchronization instruction to the at least one slave; receiving a phase-locked completion signal sent by the at least one slave; After determining that the phase-locked completion signals sent by all the slaves are received, sending an instruction to boost the voltage to the second voltage to the at least one slave; Controlling the host to increase the voltage from the first voltage to the second voltage; The host control unit includes: a host voltage loop and a host current loop; The host control unit is configured to determine a current mean value based on the current output of the host voltage loop; use the current mean value as the current given by the host current loop; the host current loop is configured to determine an output voltage based on the current mean value; and the output voltage is converted into three-phase electricity to drive the bidirectional inverter. The host control unit is further configured to output the current mean value to the at least one slave as a current setting of a slave current loop of the at least one slave; The host control unit is further used to determine a power average and send the power average to the at least one slave. The at least one slave adopts a current loop control method, and the slave current loop is used to determine the output voltage according to the current average; the at least one slave determines a slave feedforward voltage according to the power average and the current average, and the slave feedforward voltage is used to perform voltage compensation on the output voltage of the corresponding slave current loop.

6. The energy storage converter according to claim 5, characterized in that: The host control unit further includes a feed-forward voltage branch; The feed-forward voltage branch is connected to the input end of the host voltage loop and the output end of the host current loop, and is used to determine the host feed-forward voltage according to the voltage given by the host voltage loop. The host feed-forward voltage is used to perform voltage compensation on the output voltage of the host current loop.

7. The energy storage converter according to claim 5, characterized in that: A synchronization signal line is connected in series between the host and the at least one slave; The host control unit is further configured to send a synchronization carrier to the connected slaves. The synchronization carrier is sequentially sent to each slave in series for carrier synchronization of each slave.

8. An energy storage converter, characterized in that: The energy storage converter is a slave device connected in parallel with the master device, and includes: A DC energy storage unit, a bidirectional inverter, an AC filter, and a slave control unit; the slave control unit is used to: Receive the start command; Receive the phase-lock synchronization command sent by the host; In response to the start command and the phase-lock synchronization instruction, after establishing a synchronization voltage with the host to a first voltage, a phase-lock completion signal is sent to the host; receiving an instruction sent by the host to boost the voltage to a second voltage; controlling the slave device to boost the voltage from the first voltage to a second voltage; The slave control unit includes a slave current loop; The slave control unit is configured to receive a current mean value sent by the master, the current mean value being used as a current given by the slave current loop, the slave current loop being configured to determine an output voltage based on the current mean value, and the output voltage being converted into three-phase electricity to drive the bidirectional inverter; The slave control unit is further configured to receive the power mean value sent by the master; The slave control unit further includes: a feedforward voltage branch; The feedforward voltage branch is connected to the input and output ends of the slave current loop, and is used to determine the slave feedforward voltage according to the power mean and the current mean. The slave feedforward voltage is used to perform voltage compensation on the output voltage of the slave current loop.

9. The energy storage converter according to claim 8, characterized in that: The power mean value includes: active power mean value and reactive power mean value; The current mean value includes: a q-axis current mean value and a d-axis current mean value; The feedforward voltage branch includes: a q-axis feedforward voltage branch and a d-axis feedforward voltage branch; The q-axis feedforward voltage branch is used to determine the q-axis feedforward voltage according to the active power mean and the q-axis current mean, and the q-axis feedforward voltage is used to perform voltage compensation on the output voltage of the slave q-axis current loop; The d-axis feedforward voltage branch is used to determine a d-axis feedforward voltage according to the reactive power mean and the d-axis current mean, and the d-axis feedforward voltage is used to perform voltage compensation on the output voltage of the slave d-axis current loop.

10. The energy storage converter according to claim 8, characterized in that: The slave is also connected in series with the host or other slaves via a synchronization signal line, and receives a synchronization carrier via the synchronization signal line to perform carrier synchronization.

11. An energy storage system, characterized in that: include: The energy storage converter according to any one of claims 5 to 7 serves as a host, and further comprises at least one energy storage converter according to any one of claims 8 to 10 as a slave.

12. An electrical device, characterized in that: include: The energy storage converter according to any one of claims 5 to 7 serves as a host, and further comprises at least one energy storage converter according to any one of claims 8 to 10 as a slave.

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