Switching converter and fault identification method thereof

Abstract

The invention provides a switch converter and a fault identification method thereof, the switch converter further comprises a fault identification circuit used for identifying whether a power conversion circuit has a fault, and the fault identification circuit comprises a signal acquisition module used for acquiring a current sampling signal representing an inductive current, according to the current sampling signal, obtaining a mean value signal representing an inductive current mean value; the comparator is used for comparing a difference value between the sampling signal and the mean value signal with a set bias voltage, generating a comparison signal and judging whether the power conversion circuit has a fault or not; wherein in a switching period, when the difference value is always smaller than or equal to the bias voltage, the comparison signal is always invalid, and the power conversion circuit is judged to have a fault. According to the invention, whether the power conversion circuit has a fault can be accurately identified.

Description

Technical Field

[0001] The present invention relates to the field of power electronics, and particularly to a switching converter and a fault identification method thereof. Background Art

[0002] In VR power applications, a multi-phase power supply usually satisfies the low voltage and large current required for the normal operation of a load by paralleling the power conversion circuits of multiple power stages. One of the keys to the safe and reliable operation of a multi-phase power supply is to ensure the rapid and accurate detection of the offline state of the failure of each power stage circuit, so as to enable the VR power controller to quickly respond to and report the open-phase fault.

[0003] The fault identification circuit involved in the prior art monitors the current sampling signal VCS obtained by sampling the current flowing into the drmos module of the slave power stage, and determines whether a certain phase power stage circuit fails, that is, whether there is an open phase in the multi-phase power stage circuit, by comparing VCS with the voltage Vc in the expected normal state. As Figure 1 shown, the current sampling signal VCS of a certain phase power stage circuit is compared with a preset voltage Vc by a comparator, and the comparison result is "logically ANDed" with the periodic switching signal PWM to obtain a fault identification signal DET.

[0004] Combined with Figure 2 schematic Figure 1 working waveforms, in the normal working state, the current sampling signal of a certain phase power stage circuit is always greater than the preset voltage, the comparator always outputs a high level, the PWM signal periodically appears a high level pulse signal, and the fault identification signal DET obtained after the "AND gate" processing is a periodic high level pulse signal; when a fault occurs in this phase power stage circuit, the current sampling signal quickly drops to zero, the comparator outputs a high level signal for a short time and then flips to a low level signal, and the fault identification signal DET with a shorter pulse width is obtained after ANDing with the PWM signal and no high level pulse appears in the next switching cycle (Tpwm in the figure is the switching cycle time), thereby determining that a fault (open phase) occurs in this phase power conversion circuit.

[0005] In the existing fault identification scheme, after a phase loss fault occurs in the power stage circuit, it takes nearly one cycle of delay to detect it (detection delay), and it is necessary to ensure that the peak value of the current sampling signal is greater than the preset voltage, which may lead to false triggering of fault identification. Taking the buck circuit as an example of the power conversion circuit, the peak value of the current sampling signal satisfies VCS_peak ∝ (VIN - VOUT) × TON / L, where VIN and VOUT are the input voltage and output voltage of the power conversion circuit respectively, TON is the duration of the high level of the PWM signal, and L is the inductance value. The above relationship shows that if TON or VOUT is adjusted during the operation of VR, the peak value of the current sampling signal VCS_peak will also change. This means that the preset voltage Vc should be adjusted synchronously with TON or VOUT, otherwise there is also a risk of false triggering, which greatly increases the implementation cost of this scheme.

[0006] On the other hand, the influence of non-ideal factors such as leakage, preset voltage accuracy, and the offset voltage existing in the comparator itself also makes it difficult to guarantee the reliability of this scheme, and there may even be a risk of complete failure. Summary of the Invention

[0007] The purpose of the present invention is to provide a switching converter and its fault identification method, which can quickly and accurately identify the phase loss fault of the switching converter, and the scheme is simple and reliable.

[0008] The present invention also provides a switching converter, including a power conversion circuit, and further including a fault identification circuit for identifying whether the power conversion circuit is faulty. The fault identification circuit includes: A signal processing module, which acquires a current sampling signal representing the inductor current, and obtains a mean signal representing the average value of the inductor current according to the current sampling signal; A comparator, which is used to obtain a comparison signal according to the comparison result of the difference between the sampling signal and the mean signal and a set bias voltage, and the comparison signal is used to judge whether there is a fault in the power conversion circuit; Wherein, in one switching cycle, if the difference is always less than or equal to the bias voltage, the comparison signal is always invalid, and it is determined that the power conversion circuit has a fault.

[0009] Optionally, in the normal working state of the power conversion circuit, the mean signal is greater than the valley value of the current sampling signal and less than the peak value of the current sampling signal.

[0010] Optionally, the bias voltage is zero voltage; When the peak value of the sampling signal is less than the mean signal, the comparison signal is invalid, and it is determined that the power conversion circuit has a fault.

[0011] Optionally, the bias voltage is greater than the offset voltage of the comparator; When the sum of the peak value of the sampling signal and the bias voltage is less than the mean signal, the comparison signal is invalid, and it is determined that the power conversion circuit has a fault.

[0012] Optionally, the first input terminal of the comparator receives the difference between the current sampling signal and the bias voltage, its second input terminal receives the mean signal, and outputs the comparison signal.

[0013] Optionally, the first input terminal of the comparator receives the current sampling signal, its second input terminal receives the sum of the mean signal and the bias voltage, and outputs the comparison signal.

[0014] Optionally, the first input terminal of the comparator receives the difference between the current sampling signal and the mean signal, its second input terminal receives the bias voltage, and outputs the comparison signal.

[0015] Optionally, the fault identification circuit further includes a logic processing unit, which receives a switch signal for controlling the switch state of the power conversion circuit and the comparison signal; When the switch signal is invalid to control the main power transistor of the power conversion circuit to turn off, if the comparison signal is invalid, the logic processing unit generates an invalid discrimination signal to determine that the power conversion circuit has a fault.

[0016] Optionally, the signal processing module includes a filter, and the filter filters the current sampling signal to obtain the mean signal; wherein, the time constant of the filter is greater than one switching period.

[0017] Optionally, the filter includes a first resistor and a first capacitor. The first end of the first resistor receives the current sampling signal, the second end of the first resistor is connected to the first end of the first capacitor, the second end of the first capacitor is grounded, and the common connection end of the first resistor and the first capacitor outputs the second voltage signal; The time constant is obtained according to the product of the first resistor and the first capacitor.

[0018] Optionally, it includes N phases of the power conversion circuit, where N is an integer greater than 1, It further includes N fault identification circuits corresponding to the N phases of the power conversion circuit one by one, and each fault identification circuit is used to identify whether the power conversion circuit of the corresponding phase has a fault.

[0019] The present invention also provides a method for fault identification of a switching converter. The switching converter includes a multi-phase power conversion circuit. For each phase of the power conversion circuit, a current sampling signal representing the inductor current of the power conversion circuit is acquired, and a mean signal representing the average value of the inductor current of the corresponding phase is obtained based on the current sampling signal; A comparator is used to compare the difference between the current sampling signal and the mean signal with a set bias voltage to determine whether there is a phase loss fault in each phase of the power conversion circuit; Wherein, in one switching period, if the difference is always less than or equal to the bias voltage, it is determined that the corresponding power conversion circuit has a phase loss fault.

[0020] Optionally, in the normal operating state of the power conversion circuit, the mean signal is greater than the valley value of the current sampling signal and less than the peak value of the current sampling signal.

[0021] Optionally, the bias voltage is zero, or the bias voltage is greater than the offset voltage of the comparator.

[0022] Optionally, a filter is used to filter the current sampling signal to obtain the mean signal, and the time constant of the filter is greater than one switching period of the switching converter.

[0023] Compared with the prior art, the present invention has the following advantages: a current sampling signal representing the inductor current of the power conversion circuit is acquired, and a mean signal representing the average value of the inductor current of the corresponding phase is obtained based on the current sampling signal; a comparator is used to compare the difference between the current sampling signal and the mean signal with a set bias voltage to determine / identify whether there is a phase loss fault in each phase of the power conversion circuit; wherein, in one switching period, if the difference is always less than or equal to the bias voltage, it is determined that the corresponding power conversion circuit has a phase loss fault. The fault identification scheme of the present invention is simple and reliable, with a fast fault identification response speed and high identification accuracy. Description of the Drawings

[0024] Figure 1 is a schematic circuit diagram of a fault identification circuit for an existing power conversion circuit; Figure 2 is Figure 1 the working waveform diagram of the fault identification circuit in Figure 3 is a schematic diagram of a switching converter including a multi-phase power conversion circuit; Figure 4 is a schematic diagram of Embodiment 1 of the fault identification circuit for the power conversion circuit of the present invention; Figure 5 is a schematic diagram of Embodiment 2 of the fault identification circuit for the power conversion circuit of the present invention; Figure 6 Schematic diagram of Embodiment 3 of the fault identification circuit for the power conversion circuit of the present invention; Figure 7 For the present invention Figure 4 , 5 , and the schematic diagram of the filter in 6; Figure 8 Working waveform diagram of the fault identification circuit under heavy load; Figure 9 Working waveform diagram of the fault identification circuit under light load. Specific embodiments

[0025] The preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings, but the present invention is not limited to these embodiments. The present invention covers any substitutions, modifications, equivalent methods, and solutions made within the spirit and scope of the present invention.

[0026] In order to enable the public to have a thorough understanding of the present invention, specific details are described in detail in the following preferred embodiments of the present invention, and those skilled in the art can fully understand the present invention without the description of these details.

[0027] In the following paragraphs, the present invention will be described more specifically by way of example with reference to the accompanying drawings. It should be noted that the accompanying drawings are all in a relatively simplified form and use non-precise scales to facilitate and clearly assist in explaining the purpose of the embodiments of the present invention.

[0028] As Figure 3 shown, the schematic diagram of the switching converter is shown. The switching converter may include a power conversion circuit or may include a plurality of power conversion circuits connected in parallel, abbreviated as an N-phase power conversion circuit (N is an integer greater than 1). Figure 3 shows the N-phase power conversion circuit. Each phase of the power conversion circuit takes the buck circuit as an example, and each phase of the power conversion circuit corresponds to a corresponding fault identification circuit for identifying whether the power conversion circuit of that phase fails / offline and other faults.

[0029] For example, the fault identification circuit 1 corresponds to the power conversion circuit 1. Taking the power conversion circuit 1 as an example, it includes an upper transistor HS1, a lower transistor LS1, and an inductor L1. The power conversion circuit 1 obtains a current sampling signal VCS1 representing the current of the inductor L1. The fault identification circuit 1 obtains a mean signal representing the average value of the inductor L1 current / current sampling signal VCS1 based on the current sampling signal VCS1, and determines whether there is a phase loss fault in the power conversion circuit 1 based on the current sampling signal VCS1 and the mean signal. The control circuit receives the discrimination signal output by the fault identification circuit 1. When the discrimination signal is invalid, it indicates that there is a phase loss fault in the power conversion circuit 1, and the switching signal PWM1 generated according to this discrimination signal is invalid (PWM1 is always at a low level), thereby controlling the power transistors in the power conversion circuit 1 to turn off; when the discrimination signal is valid, it indicates that there is no phase loss fault in the power conversion circuit 1, and the switching signal PWM1 is valid (PWM1 is a normal pulse signal), thereby controlling the normal on / off of the power transistors in the power conversion circuit 1. The control circuit receives the discrimination signals output by each phase fault identification circuit, determines whether each phase power conversion circuit is faulty according to each discrimination signal, and thus outputs corresponding switching control signals for control.

[0030] As Figure 4 , 5 , as shown in FIG. 6, the schematic diagram of the fault identification circuit is shown. The fault identification circuit corresponds to a corresponding power conversion circuit, obtains a current sampling signal VCS representing the inductor current of the corresponding power conversion circuit, obtains a mean signal representing the average value of the inductor current based on this current sampling signal, and compares the difference between the current sampling signal and the mean signal with a given bias voltage Vos to obtain a discrimination signal DET. Further, assuming that the comparator is an ideal comparator, when the bias voltage Vos is set to zero, it is equivalent to directly comparing the current sampling signal and the mean signal. In a switching cycle, when the current sampling signal is greater than the mean signal (the peak value of the current sampling signal is greater than the mean signal), it can be determined that there is no phase loss fault in the power conversion circuit. In a switching cycle, if the current sampling signal is always less than the mean signal (the peak value of the current sampling signal is less than the mean signal), it can be determined / identified that there is a (phase loss) fault in the power conversion circuit.

[0031] Considering the reason of offset voltage in the actual application of the comparator, for example, when the voltage at the first input terminal of the comparator is greater than the voltage at the second input terminal of the comparator, in fact, the sum of the signal received by the first input terminal of the comparator and the offset voltage is greater than the signal received by the second input terminal of the comparator. Therefore, when the sum of the current sampling signal and the comparator offset voltage is greater than the mean signal, it may be misjudged that the current sampling signal is greater than the mean signal (the actual current sampling signal may not be greater than the mean signal). Therefore, a bias voltage can be set slightly greater than the offset voltage to offset the influence of the offset voltage on the judgment result. Specifically, through the comparison of the comparator, when the difference between the current sampling signal and the mean signal in a switching period is greater than the offset voltage, it can be determined that the power conversion circuit has no fault. When the difference between the current sampling signal and the mean signal in a switching period is always less than the offset voltage, it can be determined / identified that the power conversion circuit has a phase loss fault.

[0032] See Figure 4 , which shows the schematic diagram of Embodiment 1 of the power conversion circuit, including a signal processing module 01 for processing the current sampling signal VCS to obtain two signals for comparison and judgment respectively. Specifically, the signal processing module includes a filter 101 and a voltage source 102. The filter 101 filters the current sampling signal VCS representing the inductor current to obtain a mean signal. The voltage of the voltage source 102 is a preset bias voltage Vos. The positive terminal of the voltage source 102 receives the current sampling signal, and the negative terminal voltage is VCS - Vos. It also includes a comparator 201 and a logic processing unit 202. The comparator 201 is used to compare and judge the mean signal and VCS - Vos to determine whether the power conversion circuit has a phase loss fault. Specifically, the voltage VP received by the non-inverting input terminal (the first input terminal) of the comparator 201 is VCS - Vos, and the voltage VN received by the inverting input terminal (the second input terminal) of the comparator is the mean signal. The comparator outputs a comparison signal PULSE. The logic processing unit 202 receives the comparison signal PULSE and the PWM switch signal and outputs a discrimination signal DET. In a PWM switching period, if the comparison signal PULSE appears high, the discrimination signal DET output by the logic processing unit 202 is always high, and it is determined that the power conversion circuit has no phase loss fault; if the comparison signal PULSE has not flipped when the current sampling signal reaches the peak value, the logic processing unit 202 outputs a low-level discrimination signal DET, and it is determined / identified that the power conversion circuit has a phase loss fault.

[0033] The logic processing unit 202 is preferably a D flip-flop in the figure. The data input terminal of the D flip-flop receives the output signal PULSE of the comparator 201, the clock signal input terminal receives the PWM switch signal, and outputs the discrimination signal DET. At the falling edge of the PWM signal (when the upper switch is turned off and the inductor current reaches the peak value), the sampling signal PULSE is sampled. If the sampled signal PULSE is high level, the discrimination signal DET remains high level. If the sampled signal PULSE is not high level, the discrimination signal DET flips from high level valid to low level invalid. Refer to Figure 7 Waveform.

[0034] Refer to Figure 5 , which shows the schematic diagram of Embodiment 2 of the power conversion circuit and another implementation of the signal processing module 01. The current sampling signal VCS is processed by the filter 101 to obtain the mean signal. After superimposing the bias voltage Vos on the mean signal, the mean signal and the current sampling signal VCS are respectively input to the two input terminals of the comparator 201.

[0035] Refer to Figure 6 , which shows the schematic diagram of Embodiment 3 of the power conversion circuit and another implementation of the signal processing module 01. The current sampling signal VCS is processed by the filter 101 to obtain the mean signal. The subtractor 103 subtracts the current sampling signal VCS from the mean signal, and the output results of the subtractor and the bias voltage generated by the voltage source 102 are respectively input to the two input terminals of the comparator 201.

[0036] Essentially, Figure 4 、 5 The signal processing modules in 6 all compare the difference between the current sampling signal VCS and the mean signal with the bias voltage Vos through a comparator. These embodiments are essentially equivalent, and any one of these embodiments for this comparison purpose is within the protection scope of the present invention.

[0037] Ignoring the influence of the comparator offset voltage on the fault recognition accuracy in practice, the bias voltage Vos can be set to zero voltage. If considering the influence of the comparator offset voltage on the fault recognition accuracy, the bias voltage Vos can be set to a voltage value slightly larger than the comparator offset voltage, and the bias voltage Vos should not be too large to avoid the comparator output not being able to flip under the normal working state of the power conversion circuit. That is, under the normal working state of the power conversion circuit, it is necessary to ensure that the sum of the bias voltage Vos and the offset voltage is less than the difference between the peak value of the current sampling signal and the mean signal.

[0038] Such as Figure 7 shown, which shows Figure 4 、 5, Schematic diagram of an embodiment of the filter in FIG. 6. This embodiment is a simple low-pass RC filter. The time constant τ of the filter can be set to one switching period. In the normal operating state, the output signal of the comparator 201 can still be flipped near the peak value of the current sampling signal. Considering that the mean value of the current sampling signal is difficult to change rapidly, therefore, the time constant of the filter needs to be appropriately enlarged according to the application scenario. So the time constant of the filter is usually greater than one switching period. This can not only ensure that the output of the filter can stably follow the mean value of the current sampling signal (the filter output can better represent the mean value of the current sampling signal), but also provide the best response speed and recognition reliability. Specifically, the filter includes a resistor R1 and a capacitor C1. The first end of the resistor R1 receives the current sampling signal VCS. The second end of the resistor R1 is connected to the first end of the capacitor C1. The second end of the capacitor C1 is grounded. The common connection voltage of the resistor R1 and the capacitor C1 is the mean signal obtained after filtering by the filter. The time constant τ = RC. The present invention is not limited to Figure 6 the schematic RC low-pass filter, and other filters with the same function can also be used.

[0039] As Figure 8 shown, it schematically shows the working waveform diagram of the fault recognition circuit under the overload state. Combining Figure 4 with the schematic circuit diagram, assuming that the preset bias voltage Vos is zero, VP is the current sampling signal VCS, VN is the mean signal obtained after filtering the current sampling signal VCS, PULSE is the result of comparing the current sampling signal VCS and the mean signal VN, and the DET signal is the discrimination signal obtained according to the PULSE signal. As the load decreases, the peak value of the current sampling signal VCS (inductor current) decreases, and the corresponding mean signal VN obtained according to the current sampling signal also decreases. In the normal operating state, in each switching period, the current sampling signal VCS will be greater than the mean signal VN for a period of time, and the PULSE signal will have a high level for a period of time. Especially at the peak value of the current sampling signal VCS, VCS is always greater than VN. At the falling edge of the PWM signal (the moment when the upper transistor is turned off, and the inductor current is at the peak value), when the PULSE signal is sampled as high level, the DET always remains high level. When a phase loss fault occurs in the power conversion circuit, the inductor current quickly drops to zero, but the mean signal VN does not immediately drop to zero. There is a slow decline process, so there is a stage where VCS is always less than VN until VN also drops to zero, and there will no longer be a situation where VN is greater than VCS. Therefore, at the falling edge of the PWM signal, when the high level of the PULSE signal is not detected, the DET signal flips to a low level signal, indicating that a phase loss fault has occurred in the power conversion circuit.

[0040] As Figure 9As shown, it schematically shows the working waveform diagram of the fault recognition circuit under light load conditions. Combining with Figure 4 the schematic circuit diagram shown, assuming that the preset bias voltage Vos is zero and VP is the current sampling signal VCS. Under light load, the switching frequency is low and the average current is small. At this time, the mean signal VN will show obvious charge and discharge characteristics. Due to the characteristics of the filter itself, VN will always lag behind the change of VCS. During the rising process of VCS, when VCS is higher than VN, the comparator output signal PULSE flips to high. During the falling process, when VCS is lower than VN, the comparator output signal PULSE flips to low. Therefore, the PULSE signal is still normally generated, and the function of the circuit to identify the phase loss fault is not affected. According to the above analysis, whether under heavy load or light load conditions of the switching converter, the fault recognition circuit of the present invention can accurately identify / detect whether there is a disconnection / phase loss fault in the power conversion circuit, and the technical solution is stable and reliable.

[0041] Although the above embodiments are separately described and elaborated, for the common technologies involved, in the view of those of ordinary skill in the art, substitutions and integrations can be made between the embodiments. For the content not clearly recorded in one of the embodiments, reference can be made to the other embodiment with records.

[0042] The above-described embodiments do not constitute a limitation on the protection scope of the technical solution. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principle of the above embodiments shall be included within the protection scope of the technical solution.

Claims

1. A switching converter, comprising a power conversion circuit, characterized in that: It further includes a fault identification circuit for identifying whether the power conversion circuit is faulty. The fault identification circuit includes a signal processing module that acquires a current sampling signal representing the inductor current and obtains a mean signal representing the average value of the inductor current based on the current sampling signal; a comparator for obtaining a comparison signal according to the comparison result between the difference between the sampling signal and the mean signal and a set bias voltage, and the comparison signal is used to determine whether there is a fault in the power conversion circuit; wherein, in a switching period, if the difference is always less than or equal to the bias voltage, the comparison signal is always invalid, and it is determined that there is a fault in the power conversion circuit.

2. The switching converter according to claim 1, wherein: In the normal operating state of the power conversion circuit, the mean signal is greater than the valley value of the current sampling signal and less than the peak value of the current sampling signal.

3. The switching converter according to claim 1, wherein: The bias voltage is zero voltage; When the peak value of the sampling signal is less than the mean signal, the comparison signal is invalid, and it is determined that there is a fault in the power conversion circuit.

4. The switching converter according to claim 1, wherein: The bias voltage is greater than the offset voltage of the comparator; When the sum of the peak value of the sampling signal and the bias voltage is less than the mean signal, the comparison signal is invalid, and it is determined that there is a fault in the power conversion circuit.

5. The switching converter according to claim 1, characterized in that: The first input terminal of the comparator receives the difference between the current sampling signal and the bias voltage, its second input terminal receives the mean signal, and outputs the comparison signal.

6. The switching converter according to claim 1, characterized in that: The first input terminal of the comparator receives the current sampling signal, its second input terminal receives the sum of the mean signal and the bias voltage, and outputs the comparison signal.

7. The switching converter according to claim 1, characterized in that: The first input terminal of the comparator receives the difference between the current sampling signal and the mean signal, its second input terminal receives the bias voltage, and outputs the comparison signal.

8. The switching converter according to claim 1, wherein: The fault identification circuit further includes a logic processing unit that receives a switching signal for controlling the switching state of the power conversion circuit and the comparison signal; When the switching signal is invalid to control the main power transistor of the power conversion circuit to turn off, if the comparison signal is invalid, the logic processing unit generates an invalid discrimination signal to determine that there is a fault in the power conversion circuit.

9. The switching converter according to claim 1, wherein: The signal processing module includes a filter, and the filter filters the current sampling signal to obtain the mean signal; wherein, the time constant of the filter is greater than a switching period.

10. The switching converter according to claim 9, characterized in that: The filter includes a first resistor and a first capacitor. The first end of the first resistor receives the current sampling signal, the second end of the first resistor is connected to the first end of the first capacitor, the second end of the first capacitor is grounded, and the common connection end of the first resistor and the first capacitor outputs the mean signal; The time constant is obtained according to the product of the first resistor and the first capacitor.

11. The switching converter according to any one of claims 1-10, characterized in that: It includes N phases of the power conversion circuit as described above, where N is an integer greater than 1, and further includes N fault identification circuits corresponding to the N phases of the power conversion circuit one by one, and each fault identification circuit is used to identify whether the power conversion circuit of the corresponding phase is faulty.

12. A fault identification method for a switching converter, the switching converter comprising a multiphase power conversion circuit, characterized in that: For each phase power conversion circuit, a current sampling signal representing the inductor current of the power conversion circuit is obtained, and a mean value signal representing the average value of the inductor current of the corresponding phase is obtained according to the current sampling signal; A comparator is used to compare the difference between the current sampling signal and the mean value signal with a set bias voltage to determine whether there is a phase loss fault in each phase power conversion circuit; Wherein, in one switching period, if the difference is always less than or equal to the bias voltage, it is determined that there is a phase loss fault in the corresponding power conversion circuit.

13. The fault identification method according to claim 12, wherein: In the normal working state of the power conversion circuit, the mean value signal is greater than the valley value of the current sampling signal and less than the peak value of the current sampling signal.

14. The fault identification method according to claim 12, characterized in that: The bias voltage is zero, or the bias voltage is greater than the offset voltage of the comparator.

15. The fault identification method according to claim 12, wherein: A filter is used to filter the current sampling signal to obtain the mean value signal, and the time constant of the filter is greater than one switching period of the switching converter.

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