Switching converter and fault identification method thereof

Abstract

The present invention proposes a switching converter and a fault identification method thereof, further comprising a fault identification circuit for identifying whether the power conversion circuit is faulty. The fault identification circuit comprises a signal acquisition module for acquiring a current sampling signal representing the inductor current and obtaining a mean signal representing the average value of the inductor current based on the current sampling signal; a comparator for comparing the difference between the sampling signal and the mean signal with a set bias voltage to generate a comparison signal for determining whether the power conversion circuit is faulty. When the difference is always less than or equal to the bias voltage during a switching cycle, the comparison signal is always invalid, and it is determined that the power conversion circuit is faulty. The present invention can accurately identify whether the power conversion circuit is faulty.

Description

Technical Field

[0001] The present invention relates to the field of power electronics, and in particular to a switching converter and a fault identification method thereof. Background Art

[0002] In VR power applications, multiphase power supplies typically utilize multiple power conversion stages in parallel to meet the low voltage and high current requirements of the load. One of the keys to safe and reliable multiphase power supply operation is ensuring rapid and accurate detection of faulty and offline states in each power stage, enabling the VR power controller to rapidly respond to and report phase loss faults.

[0003] The fault identification circuit involved in the prior art is based on monitoring the current sampling signal VCS obtained by sampling the current flowing into the power stage drmos module, and by comparing VCS with the expected normal state voltage Vc, it determines whether a phase power stage circuit has a fault, that is, whether a phase is missing in the multi-phase power stage circuit. Figure 1 As shown, the current sampling signal VCS of a phase power stage circuit is compared with the preset voltage Vc by a comparator, and the comparison result is processed with the periodic switching signal PWM by "logic AND" to obtain the fault identification signal DET.

[0004] Combine Figure 2 Indicative Figure 1 Working waveform: Under normal working conditions, the current sampling signal of a phase power stage circuit is always greater than the preset voltage, the comparator always outputs a high level, and the PWM signal periodically appears a high-level pulse signal. The fault identification signal DET obtained after processing by the "AND gate" is a periodic high-level pulse signal; when a fault occurs in the phase power stage circuit, the current sampling signal drops rapidly to zero, the comparator outputs a high-level signal for a short time and then flips to a low-level signal. After ANDing with the PWM signal, a fault identification signal DET with a shortened pulse width is obtained, and no high-level pulse appears in the next switching cycle (Tpwm in the figure is the switching cycle time), thereby judging that a (phase loss) fault occurs in the phase power conversion circuit.

[0005] Existing fault identification solutions require a delay of nearly one cycle (detection delay) to detect a phase loss fault in the power stage circuit. Furthermore, the peak value of the current sampling signal must be greater than a preset voltage, which can lead to false triggering of fault identification. For example, in a buck power conversion circuit, the peak value of the current sampling signal satisfies the equation VCS_peak ∝ (VIN - VOUT) × TON / L, where VIN and VOUT are the input and output voltages of the power conversion circuit, TON is the duration of the PWM signal's high level, and L is the inductor value. This relationship indicates that if TON or VOUT is adjusted during VR operation, the peak value of the current sampling signal VCS_peak will also change. This means that the preset voltage Vc must be adjusted synchronously with TON or VOUT; otherwise, there is the risk of false triggering, significantly increasing the implementation cost of this solution.

[0006] On the other hand, the influence of non-ideal factors such as leakage, preset voltage accuracy and the offset voltage of the comparator itself also makes it difficult to ensure the reliability of this solution, and there may even be a risk of complete failure. Summary of the Invention

[0007] The object of the present invention is to provide a switching converter and a fault identification method thereof. The present invention can quickly and accurately identify a phase loss fault of the switching converter, and the solution is simple and reliable.

[0008] The present invention further provides a switching converter, comprising a power conversion circuit and a fault identification circuit for identifying whether the power conversion circuit is faulty, wherein the fault identification circuit comprises:

[0009] a signal processing module for acquiring a current sampling signal representing the inductor current, and obtaining a mean value signal representing the average value of the inductor current according to the current sampling signal;

[0010] a comparator, configured to obtain a comparison signal based on a comparison result between the difference between the sampling signal and the average signal and a set bias voltage, wherein the comparison signal is used to determine whether there is a fault in the power conversion circuit;

[0011] Wherein, in a switching cycle, if the difference is always smaller than or equal to the bias voltage, the comparison signal is always invalid, and it is determined that a fault exists in the power conversion circuit.

[0012] Optionally, when the power conversion circuit is in normal working condition, the mean value signal is greater than a valley value of the current sampling signal and less than a peak value of the current sampling signal.

[0013] Optionally, the bias voltage is zero voltage;

[0014] When the peak value of the sampling signal is smaller than the average value signal, the comparison signal is invalid, and it is determined that a fault exists in the power conversion circuit.

[0015] Optionally, the bias voltage is greater than the offset voltage of the comparator;

[0016] When the sum of the peak value of the sampling signal and the bias voltage is smaller than the average signal, the comparison signal is invalid, and it is determined that a fault exists in the power conversion circuit.

[0017] Optionally, the first input terminal of the comparator receives the difference between the current sampling signal and the bias voltage, and the second input terminal receives the average signal, and outputs the comparison signal.

[0018] Optionally, the first input terminal of the comparator receives the current sampling signal, the second input terminal receives the sum of the average signal and the bias voltage, and outputs the comparison signal.

[0019] Optionally, the first input terminal of the comparator receives the difference between the current sampling signal and the average signal, and the second input terminal receives the bias voltage, and outputs the comparison signal.

[0020] Optionally, the fault identification circuit further includes a logic processing unit, which receives a switching signal for controlling a switching state of the power conversion circuit and the comparison signal;

[0021] When the switch signal is invalid to control the main power tube of the power conversion circuit to turn off, if the comparison signal is invalid, the logic processing unit generates an invalid judgment signal to determine that there is a fault in the power conversion circuit.

[0022] Optionally, the signal processing module includes a filter, which filters the current sampling signal to obtain the mean signal; wherein the time constant of the filter is greater than one switching cycle.

[0023] Optionally, the filter includes a first resistor and a first capacitor, a first end of the first resistor receives the current sampling signal, a second end of the first resistor is connected to the first end of the first capacitor, a second end of the first capacitor is grounded, and a common connection end of the first resistor and the first capacitor outputs the second voltage signal;

[0024] The time constant is obtained according to the product of the first resistor and the first capacitor.

[0025] Optionally, the power conversion circuit includes N phases, where N is an integer greater than 1.

[0026] It also includes N fault identification circuits corresponding one-to-one to the N-phase power conversion circuits, and each fault identification circuit is used to identify whether the power conversion circuit of the corresponding phase is faulty.

[0027] The present invention also provides a fault identification method for a switching converter, wherein the switching converter includes a multi-phase power conversion circuit, and for each phase of the power conversion circuit, a current sampling signal representing the inductor current of the power conversion circuit is obtained, and an average signal representing the average value of the inductor current of the corresponding phase is obtained based on the current sampling signal;

[0028] A comparator is used to compare the difference between the current sampling signal and the average signal with a set bias voltage to determine whether there is a phase loss fault in each phase power conversion circuit;

[0029] Wherein, in a switching cycle, if the difference is always smaller than or equal to the bias voltage, it is determined that a phase loss fault exists in the corresponding power conversion circuit.

[0030] Optionally, when the power conversion circuit is in normal working state, the mean signal is greater than a valley value of the current sampling signal and less than a peak value of the current sampling signal.

[0031] Optionally, the bias voltage is zero, or the bias voltage is greater than the offset voltage of the comparator.

[0032] Optionally, a filter is used to filter the current sampling signal to obtain the mean value signal, and a time constant of the filter is greater than a switching cycle of the switching converter.

[0033] Compared with the existing technology, the present invention has the following advantages: a current sampling signal representing the inductor current of the power conversion circuit is obtained, and an average signal representing the average value of the corresponding phase inductor current is obtained based on the current sampling signal; a comparator is used to compare the difference between the current sampling signal and the average signal with a set bias voltage to determine / identify whether a phase loss fault exists in each phase power conversion circuit; wherein, if the difference is always less than or equal to the bias voltage during a switching cycle, the corresponding power conversion circuit is determined to have a phase loss fault. The present invention has a simple and reliable fault identification scheme, a fast fault identification response speed, and high identification accuracy. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1 A schematic diagram of a fault identification circuit for an existing power conversion circuit;

[0035] Figure 2 for Figure 1 Working waveform of the fault identification circuit;

[0036] Figure 3A schematic diagram of a switching converter including a multi-phase power conversion circuit;

[0037] Figure 4 This is a schematic diagram of a fault identification circuit embodiment 1 of a power conversion circuit of the present invention;

[0038] Figure 5 This is a schematic diagram of a second embodiment of a fault identification circuit for a power conversion circuit according to the present invention;

[0039] Figure 6 This is a schematic diagram of a third embodiment of a fault identification circuit for a power conversion circuit according to the present invention;

[0040] Figure 7 For the present invention Figure 4 、 5 , Schematic diagram of the filter in 6;

[0041] Figure 8 This is the working waveform of the fault identification circuit under heavy load state;

[0042] Figure 9 This is the working waveform of the fault identification circuit under light load conditions. DETAILED DESCRIPTION

[0043] The preferred embodiments of the present invention are described in detail below with reference to the accompanying drawings, but the present invention is not limited to these embodiments and covers any substitution, modification, equivalent method and solution made within the spirit and scope of the present invention.

[0044] In order to make the public have a thorough understanding of the present invention, specific details are described in detail in the following preferred embodiments of the present invention, but those skilled in the art can also fully understand the present invention without description of these details.

[0045] The present invention is described in more detail in the following paragraphs with reference to the accompanying drawings. It should be noted that the drawings are simplified and not to exact proportions, in order to facilitate and clearly illustrate the embodiments of the present invention.

[0046] like Figure 3 , which illustrates a schematic diagram of a switching converter. The switching converter may include one power conversion circuit or multiple power conversion circuits connected in parallel, referred to as an N-phase power conversion circuit (N is an integer greater than 1). Figure 3 FIG. 1 illustrates an N-phase power conversion circuit, where each phase power conversion circuit is a step-down circuit as an example. Each phase power conversion circuit corresponds to a corresponding fault identification circuit for identifying whether the phase power conversion circuit is failed / offline or other faults.

[0047] For example, fault identification circuit 1 corresponds to power conversion circuit 1. Taking power conversion circuit 1 as an example, it includes a high-side transistor HS1, a low-side transistor LS1, and an inductor L1. Power conversion circuit 1 obtains a current sampling signal VCS1 representing the current of inductor L1. Based on current sampling signal VCS1, fault identification circuit 1 obtains an average signal representing the average value of the current of inductor L1 and the current sampling signal VCS1. Based on current sampling signal VCS1 and the average signal, the control circuit determines whether power conversion circuit 1 has a phase loss fault. The control circuit receives a determination signal output by fault identification circuit 1. When the determination signal is invalid, it indicates a phase loss fault has occurred in power conversion circuit 1. The switching signal PWM1 generated based on the determination signal is invalid (PWM1 is always at a low level), thereby controlling the power transistors in power conversion circuit 1 to turn off. When the determination signal is valid, it indicates that the phase loss fault has not occurred in power conversion circuit 1. The switching signal PWM1 is valid (PWM1 is a normal pulse signal), thereby controlling the normal switching of the power transistors in power conversion circuit 1. The control circuit receives the discrimination signal output by each phase fault identification circuit, determines whether each phase power conversion circuit is faulty according to each discrimination signal, and outputs corresponding switch control signal for control.

[0048] like Figure 4 、 5 Figures 6 and 7 illustrate a schematic diagram of a fault identification circuit. This fault identification circuit corresponds to a corresponding power conversion circuit and obtains a current sampling signal VCS representing the inductor current of the corresponding power conversion circuit. Based on this current sampling signal, a mean signal representing the average value of the inductor current is obtained. The difference between the current sampling signal and the mean signal is compared with a given bias voltage Vos to obtain a discrimination signal DET. Furthermore, assuming the comparator is an ideal comparator, setting the bias voltage Vos to zero is equivalent to directly comparing the current sampling signal and the mean signal. If, during a switching cycle, the current sampling signal is greater than the mean signal (the peak value of the current sampling signal is greater than the mean signal), it can be determined that a phase loss fault does not exist in the power conversion circuit. If, during a switching cycle, the current sampling signal is consistently less than the mean signal (the peak value of the current sampling signal is less than the mean signal), it can be determined / identified that a phase loss fault exists in the power conversion circuit.

[0049] Considering the existence of offset voltage in actual comparator applications, for example, if the voltage at the first input of the comparator is greater than the voltage at the second input of the comparator, this actually means that the sum of the signal received at the first input of the comparator and the offset voltage is greater than the signal received at the second input of the comparator. Therefore, when the sum of the current sampling signal and the comparator offset voltage is greater than the average signal, it may be mistakenly judged that the current sampling signal is greater than the average signal (the actual current sampling signal is not necessarily greater than the average signal). Therefore, the bias voltage can be set slightly greater than the offset voltage to offset the impact of the offset voltage on the judgment result. Specifically, through comparison by the comparator, when the difference between the current sampling signal and the average signal in a switching cycle is greater than the offset voltage, it can be determined that there is no fault in the power conversion circuit. When the difference between the current sampling signal and the average signal in a switching cycle is always less than the offset voltage, it can be determined / identified that there is a phase loss fault in the power conversion circuit.

[0050] See also Figure 4 , illustrates a schematic diagram of Embodiment 1 of a power conversion circuit. The circuit includes a signal processing module 01 for processing a current sampling signal VCS to generate two signals for comparison and determination. Specifically, the signal processing module comprises a filter 101 and a voltage source 102. Filter 101 filters the current sampling signal VCS, representing the inductor current, to generate a mean signal. The voltage of voltage source 102 is a preset bias voltage Vos. The positive electrode of voltage source 102 receives the current sampling signal, while the negative electrode voltage is VCS-Vos. The circuit also includes a comparator 201 and a logic processing unit 202. Comparator 201 compares the mean signal with VCS-Vos to determine whether a phase loss fault exists in the power conversion circuit. Specifically, the voltage VP received at the non-inverting input (first input) of comparator 201 is VCS-Vos, and the voltage VN received at the inverting input (second input) of comparator 201 is the mean signal. The comparator outputs a comparison signal PULSE. The logic processing unit 202 receives the comparison signal PULSE and the PWM switching signal and outputs a determination signal DET. During a PWM switching cycle, if the comparison signal PULSE is high, the determination signal DET output by the logic processing unit 202 remains high, indicating that a phase loss fault does not exist in the power conversion circuit. If the comparison signal PULSE has not flipped when the current sampling signal reaches its peak, the logic processing unit 202 outputs the determination signal DET at a low level, indicating that a phase loss fault exists in the power conversion circuit.

[0051] The logic processing unit 202 is preferably a D flip-flop in the figure. The data input terminal of the D flip-flop receives the output signal PULSE of the comparator 201, the clock signal input terminal receives the PWM switching signal, and outputs the judgment signal DET. At the falling edge of the PWM signal (when the upper tube is turned off and the inductor current is at its peak), the signal PULSE is sampled. If the sampled signal PULSE is high, the judgment signal DET remains high. If the sampled signal PULSE is not high, the judgment signal DET flips from high level to low level. Figure 7 waveform.

[0052] See also Figure 5 , which illustrates a schematic diagram of embodiment 2 of the power conversion circuit, and illustrates another implementation method of the signal processing module 01. The current sampling signal VCS is processed by the filter 101 to obtain an average signal, and the bias voltage Vos is superimposed on the average signal and then input into the two input terminals of the comparator 201 together with the current sampling signal VCS.

[0053] See also Figure 6 , which illustrates a schematic diagram of Example 3 of the power conversion circuit, and illustrates another implementation of the signal processing module 01. The current sampling signal VCS is processed by the filter 101 to obtain an average signal. The subtractor 103 subtracts the current sampling signal VCS from the average signal. The subtractor inputs the output result and the bias voltage generated by the voltage source 102 into the two input terminals of the comparator 201 respectively.

[0054] Essentially, Figure 4 、 5 The signal processing modules in 6 all compare the difference between the current sampling signal VCS and the average signal with the bias voltage Vos through a comparator. These embodiments are essentially equivalent, and any embodiment for this comparison purpose is within the scope of protection of the present invention.

[0055] Ignoring the actual impact of the comparator offset voltage on the fault identification accuracy, the bias voltage Vos can be set to zero voltage. If the impact of the comparator offset voltage on the fault identification accuracy is considered, the bias voltage Vos can be set to a voltage value slightly larger than the comparator offset voltage, and the bias voltage Vos should not be too large to avoid the comparator output being unable to flip when the power conversion circuit is working normally. That is, when the power conversion circuit is working normally, it is necessary to ensure that the sum of the bias voltage Vos and the offset voltage is less than the difference between the peak value and the average value of the current sampling signal.

[0056] like Figure 7 Shown, indicated Figure 4 、 5, 6 is a schematic diagram of an embodiment of the filter, which is a simple low-pass RC filter. The time constant τ of the filter can be set to one switching cycle. Under normal working conditions, the output signal of the comparator 201 can still be flipped near the peak of the current sampling signal. Considering that the mean value of the current sampling signal is difficult to change rapidly, the time constant of the filter needs to be appropriately amplified according to the application scenario. Therefore, the time constant of the filter is usually greater than one switching cycle. This can not only ensure that the output of the filter can stably follow the mean value of the current sampling signal (the filter output can better characterize the mean value of the current sampling signal), but also provide the best response speed and recognition reliability. Specifically, the filter includes a resistor R1 and a capacitor C1, the first end of the resistor R1 receives the current sampling signal VCS, the second end of the resistor R1 is connected to the first end of the capacitor C1, the second end of the capacitor C1 is grounded, and the common connection voltage of the resistor R1 and the capacitor C1 is the mean signal obtained after the filter is filtered, and the time constant τ=RC. The present invention is not limited to Figure 6 The illustrated RC low-pass filter can be used, and other filters with the same function can also be used.

[0057] like Figure 8 As shown, the working waveform of the fault identification circuit under heavy load condition is shown. Figure 4 The schematic circuit diagram assumes a preset bias voltage Vos of zero. VP represents the current sampling signal VCS, VN represents the average value of the filtered current sampling signal VCS, PULSE represents the comparison between the current sampling signal VCS and the average signal VN, and DET represents the discrimination signal derived from the PULSE signal. As the load decreases, the peak value of the current sampling signal VCS (inductor current) decreases, and the average signal VN derived from the current sampling signal decreases accordingly. Under normal operating conditions, during each switching cycle, the current sampling signal VCS will be greater than the average signal VN for a period of time, and the PULSE signal will remain high for a period of time. In particular, at the peak of the current sampling signal VCS, VCS is always greater than VN. During the falling edge of the PWM signal (the switching signal used to control the normal on / off of the power transistors in the power conversion circuit) (when the upper transistor turns off, when the inductor current is at its peak), DET remains high while the PULSE signal is high. When a phase loss fault occurs in the power conversion circuit, the inductor current drops to zero quickly, but the mean signal VN does not drop to zero immediately. There is a slow decline process, so that VCS is always less than VN until VN also drops to zero. The situation where VN is greater than VCS will no longer appear. Therefore, at the falling edge of the PWM signal, when the PULSE signal is not detected to be at a high level, the DET signal flips to a low level signal, indicating that a phase loss fault has occurred in the power conversion circuit.

[0058] like Figure 9As shown, the working waveform of the fault identification circuit under light load condition is shown. Figure 4 The schematic circuit diagram assumes that the preset bias voltage Vos is zero, and VP is the current sampling signal VCS. When lightly loaded, the switching frequency is low and the average current is relatively small. At this time, the mean signal VN will show obvious charging and discharging characteristics. Due to the characteristics of the filter itself, VN will always change slower than VCS. During the rising process of VCS, when VCS is higher than VN, the comparator output signal PULSE flips to high. During the falling process, when VCS is lower than VN, the comparator output signal PULSE flips to low. Therefore, the PULSE signal is still generated normally, and the function of the circuit to identify the phase loss fault is not affected. According to the above analysis, regardless of whether the switching converter is under heavy load or light load, the fault identification circuit of the present invention can accurately identify / detect whether the power conversion circuit has a line drop / phase loss fault, and the technical solution is stable and reliable.

[0059] Although the embodiments are described and explained separately above, some common technologies are involved. It is the opinion of ordinary technicians in this field that they can be replaced and integrated between the embodiments. If there is anything not clearly recorded in one of the embodiments, reference can be made to another recorded embodiment.

[0060] The above-described embodiments do not constitute a limitation on the scope of protection of this technical solution. Any modifications, equivalent replacements, and improvements made within the spirit and principles of the above-described embodiments shall be included in the scope of protection of this technical solution.

Claims

1. A switching converter comprising a power conversion circuit, characterized in that: Also included is a fault identification circuit for identifying whether the power conversion circuit is faulty, the fault identification circuit comprising: a signal processing module for acquiring a current sampling signal representing the inductor current, and obtaining a mean value signal representing the average value of the inductor current according to the current sampling signal; a comparator, configured to obtain a comparison signal based on a comparison result between the difference between the sampling signal and the average signal and a set bias voltage, wherein the comparison signal is used to determine whether there is a fault in the power conversion circuit; Wherein, in a switching cycle, if the difference is always smaller than or equal to the bias voltage, the comparison signal is always invalid, and it is determined that a fault exists in the power conversion circuit.

2. The switching converter according to claim 1, wherein: When the power conversion circuit is in a normal working state, the mean value signal is greater than a valley value of the current sampling signal and less than a peak value of the current sampling signal.

3. The switching converter according to claim 1, wherein: The bias voltage is zero voltage; When the peak value of the sampling signal is smaller than the average value signal, the comparison signal is invalid, and it is determined that a fault exists in the power conversion circuit.

4. The switching converter according to claim 1, wherein: The bias voltage is greater than the offset voltage of the comparator; When the sum of the peak value of the sampling signal and the bias voltage is smaller than the average signal, the comparison signal is invalid, and it is determined that a fault exists in the power conversion circuit.

5. The switching converter according to claim 1, wherein: The first input terminal of the comparator receives the difference between the current sampling signal and the bias voltage, the second input terminal receives the average signal, and outputs the comparison signal.

6. The switching converter according to claim 1, wherein: The first input terminal of the comparator receives the current sampling signal, the second input terminal receives the sum of the average signal and the bias voltage, and outputs the comparison signal.

7. The switching converter according to claim 1, wherein: The first input terminal of the comparator receives the difference between the current sampling signal and the average signal, the second input terminal of the comparator receives the bias voltage, and outputs the comparison signal.

8. The switching converter according to claim 1, wherein: The fault identification circuit further includes a logic processing unit that receives a switch signal for controlling a switch state of the power conversion circuit and the comparison signal; When the switch signal is invalid to control the main power tube of the power conversion circuit to turn off, if the comparison signal is invalid, the logic processing unit generates an invalid judgment signal to determine that there is a fault in the power conversion circuit.

9. The switching converter according to claim 1, wherein: The signal processing module includes a filter, which filters the current sampling signal to obtain the mean value signal; wherein the time constant of the filter is greater than one switching cycle.

10. The switching converter according to claim 9, wherein: The filter includes a first resistor and a first capacitor, wherein a first end of the first resistor receives the current sampling signal, a second end of the first resistor is connected to a first end of the first capacitor, a second end of the first capacitor is grounded, and a common connection end of the first resistor and the first capacitor outputs the mean signal; The time constant is obtained according to the product of the first resistor and the first capacitor.

11. The switching converter according to any one of claims 1 to 10, characterized in that: The power conversion circuit includes N phases, wherein N is an integer greater than 1. It also includes N fault identification circuits corresponding one-to-one to the N-phase power conversion circuits, and each fault identification circuit is used to identify whether the power conversion circuit of the corresponding phase is faulty.

12. A fault identification method for a switching converter, wherein the switching converter includes a multi-phase power conversion circuit, characterized in that: For each phase power conversion circuit, a current sampling signal representing the inductor current of the power conversion circuit is obtained, and an average signal representing the average value of the corresponding phase inductor current is obtained according to the current sampling signal; A comparator is used to compare the difference between the current sampling signal and the average signal with a set bias voltage to determine whether there is a phase loss fault in each phase power conversion circuit; Wherein, in a switching cycle, if the difference is always smaller than or equal to the bias voltage, it is determined that a phase loss fault exists in the corresponding power conversion circuit.

13. The fault identification method according to claim 12, characterized in that: When the power conversion circuit is in normal working state, the mean value signal is greater than the valley value of the current sampling signal and less than the peak value of the current sampling signal.

14. The fault identification method according to claim 12, characterized in that: The bias voltage is zero, or the bias voltage is greater than the offset voltage of the comparator.

15. The fault identification method according to claim 12, characterized in that: The current sampling signal is filtered using a filter to obtain the mean value signal, and the time constant of the filter is greater than one switching cycle of the switching converter.

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