Control circuit, power conversion device, control method, and program

Abstract

A control circuit (2) is a circuit for controlling a converter (1) including at least two FETs (111, 114), and is provided with: a duty setting unit (29) for setting the duty ratios of the FETs (111, 114) such that the current flowing through an inductor (12) becomes a predetermined current value by selecting a combination of ON and OFF of the FETs (111, 114) from among a first combination in which the FETs (111, 114) are not in contact with each other, and a second combination in which the FETs (111, 114) are not in contact with each other; in a first combination, the current flowing in the inductor (12) varies at a first slope, and in a second combination, the current flowing in the inductor (12) varies at a second slope that is gentle than the first slope; and an output unit (30) that outputs a signal corresponding to the set duty ratio.

Description

Technical Field

[0001] The present disclosure relates to a control circuit, a power conversion device including the control circuit, a control method for the control circuit, and a program. Background Art

[0002] The following technique is described in Patent Document 1: The inductor current at two time points is measured, and based on the time interval between the two time points and the current difference of the inductor current at the two time points, the time point at which the inductor current reaches a specified current value is predicted, and the on-period or off-period (i.e., duty ratio) of the switching element is set such that the on or off of the switching element is reversed at that time point.

[0003] In the technique described in Patent Document 1, the time from the time point at which the time point at which the inductor current reaches a specified current value is predicted to the time point at which the inductor current reaches a specified current value is not fixed. Therefore, it is required that the processing time for the above prediction and setting be sufficiently short compared to the fluctuation period. In other words, it is necessary to increase the fluctuation period (and fluctuation amplitude) relative to the processing time, which impairs the accuracy of current control.

[0004] The following technique is described in Patent Document 2: Based on the current inductor current, the input-output voltage, and the duty ratio, the duty ratio after one step is set so that the inductor current after two steps becomes a specified current value. In this case, there is sufficient margin in the processing time for the calculation and setting of the duty ratio, and current control can be performed with high accuracy.

[0005] Prior Art Documents

[0006] Patent Documents

[0007] Patent Document 1: Japanese Unexamined Patent Application Publication No. 2019-75855

[0008] Patent Document 2: US Patent No. 7148669 Specification Summary of the Invention

[0009] Problems to be Solved by the Invention

[0010] In cases where it is necessary to instantaneously and significantly change the current, such as when the output voltage fails, high-speed current control is required. However, in the technique described in Patent Document 2, the slope of the current when the current changes has only one mode when the current increases and when the current decreases, and sometimes high-speed current control cannot be performed.

[0011] Therefore, the present disclosure provides a control circuit and the like that can perform current control at high speed and with high accuracy.

[0012] Solutions to the Problems

[0013] A control circuit according to one aspect of the present disclosure controls a circuit including at least two switching elements. The control circuit includes: a duty setting unit that sets the duty ratio of each of the at least two switching elements by selecting a combination of on and off states of each of the at least two switching elements from a first combination and a second combination, such that a current flowing in the circuit becomes a specified current value. In the first combination, the current flowing in the circuit changes at a first slope, and in the second combination, the current flowing in the circuit changes at a second slope that is gentler than the first slope; and an output unit that outputs a signal corresponding to the set duty ratio.

[0014] A power conversion device according to one aspect of the present disclosure includes the above-described control circuit and the circuit.

[0015] A control method according to one aspect of the present disclosure is executed by a control circuit that controls a circuit including at least two switching elements. The control method includes the following steps: a duty setting step of setting the duty ratio of each of the at least two switching elements by selecting a combination of on and off states of each of the at least two switching elements from a first combination and a second combination, such that a current flowing in the circuit becomes a specified current value. In the first combination, the current flowing in the circuit changes at a first slope, and in the second combination, the current flowing in the circuit changes at a second slope that is gentler than the first slope; and an output step of outputting a signal corresponding to the set duty ratio.

[0016] A program according to one aspect of the present disclosure is a program for causing a computer to execute the above-described control method.

[0017] In addition, these general or specific aspects can be implemented by a system, a method, an integrated circuit, a computer program, or a recording medium such as a computer-readable CD-ROM, or by any combination of a system, a method, an integrated circuit, a computer program, and a recording medium.

[0018] Effects of the Invention

[0019] According to one aspect of the present disclosure, current control can be performed at high speed and with high accuracy. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 It is a structural diagram showing an example of a control circuit according to an embodiment and a circuit controlled by the control circuit.

[0021] Figure 2 It is a flowchart showing an example of the operation of the control circuit according to the embodiment.

[0022] Figure 3 It is a diagram for explaining the operation of the threshold setting unit according to the embodiment.

[0023] Figure 4 This is a diagram showing the relationship between the combination of on and off of each FET and the slope of the current change.

[0024] Figure 5 This is a timing chart showing an example of changes in the current flowing through the inductor in accordance with the on and off of each FET.

[0025] Figure 6 This is a timing chart showing a first example of a method for setting the duty ratio of a PWM signal in the embodiment.

[0026] Figure 7 1 is a timing chart showing a second example of the method for setting the duty ratio of the PWM signal in the embodiment.

[0027] Figure 8 It is a timing chart showing a third example of the method for setting the duty ratio of the PWM signal in the embodiment.

[0028] Figure 9 This is a timing chart showing a fourth example of the method for setting the duty ratio of the PWM signal in the embodiment. DETAILED DESCRIPTION

[0029] Hereinafter, embodiments will be described in detail with reference to the drawings.

[0030] In addition, the embodiments described below are general or specific examples. The numerical values, shapes, materials, components, configuration positions and connection methods of components, steps, and the order of steps shown in the following embodiments are examples, and their purpose is not to limit the present disclosure.

[0031] (Implementation Method)

[0032] use Figures 1 to 9 A control circuit according to the embodiment will be described.

[0033] Figure 1 1 is a structural diagram showing an example of a control circuit 2 and a circuit controlled by the control circuit 2 according to an embodiment. The control circuit 2 is a circuit that controls a circuit including at least two switching elements. The circuit including at least two switching elements is, for example, a circuit provided by a power conversion device, specifically a DC-DC converter (hereinafter referred to as a converter 1). The converter 1 increases or decreases the voltage of a power source 4 through a switching action and supplies it to a load 5. The control circuit 2 provides the converter 1 with a control signal for the switching action of at least two switching elements.

[0034] The converter 1 includes, for example, four switching elements formed by field effect transistors (hereinafter simply referred to as FETs) 111 to 114 as at least two switching elements. The FETs 111 to 114 are, for example, N-channel MOSFETs. In addition, the FETs 111 to 114 may also be P-channel MOSFETs. Further, the switching elements are not limited to FETs and may also be bipolar transistors or the like. In addition, the number of switching elements included in the converter 1 is not limited to four and may be two or more, without particular limitation. The converter 1 includes an inductor 12, a smoothing capacitor 13, a current sensor 14, and a drive circuit 15.

[0035] The FETs 111 and 112 are connected to the power supply 4 side when viewed from the inductor 12, and the FETs 113 and 114 are connected to the load 5 side when viewed from the inductor 12. The FET 111, the inductor 12, and the FET 114 are connected in series on the path connecting the power supply 4 and the load 5. Specifically, the power supply 4 is connected to the drain of the FET 111, the source of the FET 111 is connected to one end side of the inductor 12, the other end side of the inductor 12 is connected to the drain of the FET 114, and the source of the FET 114 is connected to the load 5. The drain of the FET 112 is connected to the node on the path connecting the source of the FET 111 and one end of the inductor 12, and the source of the FET 112 is connected to the ground (the reference potential of the converter 1). The drain of the FET 113 is connected to the node on the path connecting the other end of the inductor 12 and the drain of the FET 114, and the other end of the FET 113 is connected to the ground (the reference potential of the converter 1).

[0036] One end of the smoothing capacitor 13 is connected to the node on the path connecting the source of the FET 114 and the load 5, and the other end of the smoothing capacitor 13 is connected to the ground (the reference potential of the converter 1).

[0037] The current sensor 14 is a sensor that detects the current flowing in a circuit including at least two switching elements. Specifically, the current sensor 14 detects the current flowing in the inductor 12 used for power conversion as the current flowing in this circuit. For example, the current sensor 14 is connected in series with the inductor 12 on the path connecting the power supply 4 and the load 5, and converts the current flowing in the inductor 12 into a signal such as a voltage that can be detected by the control circuit 2. The current sensor 14 is realized, for example, by a current transformer, a shunt resistor, or the like.

[0038] The drive circuit 15 has a charge pump (not shown) that drives FETs 111 to 114 to be turned on or off. The drive circuit 15 supplies one of the drive signals obtained by level-converting two PWM (Pulse Width Modulation) signals provided from the control circuit 2 to FET 111 and supplies the other to FET 114. The drive circuit 15 supplies the drive signal obtained by inverting the on and off states of the drive signal supplied to FET 111 to FET 112 and supplies the drive signal obtained by inverting the on and off states of the drive signal supplied to FET 114 to FET 113. Thus, when FET 111 is on, FET 112 is off; when FET 111 is off, FET 112 is on; when FET 114 is on, FET 113 is off; and when FET 114 is off, FET 113 is on.

[0039] The control circuit 2 is implemented by a digital processor such as a microcontroller and operates as an interface between the converter 1. The control circuit 2 includes: an A / D converter 221 that detects the signal output from the current sensor 14; an A / D converter 222 that detects the voltage of the power supply 4; an A / D converter 223 that detects the voltage of the load 5; and an output unit 30 that outputs two PWM signals to the drive circuit 15. In addition, these interfaces are periodically driven according to the count value of the timing counter 21, and the timing counter 21 is periodically reset at the switching period (period Ts) of the switching element provided in the converter 1.

[0040] The control circuit 2 has a voltage loop control function and a current loop control function as its internal software. The voltage loop control function is implemented by a subtractor 23, a voltage loop controller 24, and a failure detection unit 25. The current loop control function is implemented by a threshold setting unit 26, a subtractor 27, a mode switching unit 28, and a duty setting unit 29.

[0041] The subtractor 23 calculates the difference between the voltage value Vo of the load 5 detected by the A / D converter 223 and the internal voltage target value Vref and outputs it as the voltage deviation Vref - Vo to the voltage loop controller 24.

[0042] Based on the voltage deviation Vref - Vo, the voltage loop controller 24 calculates the current target value Iref of the current flowing through the inductor 12 and outputs it to the threshold setting unit 26.

[0043] The failure detection unit 25 detects a failure in the supply voltage from the converter 1 to the load 5. Specifically, the failure detection unit 25 determines whether the voltage to be supplied to the load 5 has failed based on the voltage value Vo of the load 5 detected by the A / D converter 223. The failure detection unit 25 outputs the determination result as a failure detection signal to the threshold setting unit 26.

[0044] The threshold setting unit 26 sets two current thresholds. The specified current value described later is one of the two current thresholds set by the threshold setting unit 26. For example, the threshold setting unit 26 sets two current thresholds based on the current target value Iref of the current flowing through the inductor 12 specified by the supply voltage to the load 5. Specifically, the threshold setting unit 26 calculates two current thresholds Imax and Imin based on the voltage detection value Vin of the power supply 4 detected by the A / D converter 222, the voltage detection value Vo of the load 5 detected by the A / D converter 223, the current target value Iref output by the voltage loop controller 24, and the failure detection signal detected by the failure detection unit 25. When the failure detection unit 25 detects a failure, the threshold setting unit 26 sets the two current thresholds Imax and Imin based on a pre-prepared current value for voltage recovery instead of based on the current target value. The details will be described later.

[0045] The subtractor 27 takes the difference between the current detection value IL of the inductor 12 detected by the A / D converter 221 and the current threshold Imax or Imin set by the threshold setting unit 26, and outputs it as a current deviation Imax - IL or Imin - IL to the mode switching unit 28.

[0046] The mode switching unit 28 switches between the transient response mode and the steady response mode based on the current flowing through the inductor 12 and a specified current value that is one of the two current thresholds Imax and Imin. Specifically, the mode switching unit 28 selects either the steady response mode or the transient response mode based on the current deviation Imax - IL or Imin - IL, and outputs the selected mode as an operation mode signal to the duty setting unit 29. The details of the transient response mode and the steady response mode will be described later.

[0047] The duty setting unit 29 sets the conduction time ratio (duty ratio: also referred to as the duty value) of at least two switching elements included in the converter 1. For example, the duty setting unit 29 sets the duty ratios of the FETs 111 and 114. Specifically, the duty setting unit 29 outputs an input-side duty value Din and an output-side duty value Do to the output unit 30 based on the current detection value IL of the inductor 12 detected by the A / D converter 221, the voltage detection value Vin of the power supply 4 detected by the A / D converter 222, the voltage detection value Vo of the load 5 detected by the A / D converter 223, the current thresholds Imax and Imin set by the threshold setting unit 26, and the operation mode signal output by the mode switching unit 28. The input-side duty value Din corresponds to the duty ratio of the FET 111, and the output-side duty value Do corresponds to the duty ratio of the FET 114. The duty setting unit 29 sets the duty ratios of the FETs 111 and 114 by selecting combinations of conduction and disconnection of the respective FETs of the FETs 111 and 114 from the first combination and the second combination, such that the current flowing through the inductor 12 becomes a specified current value. In the first combination, the current flowing through the inductor 12 changes at a first slope, and in the second combination, the current flowing through the inductor 12 changes at a second slope gentler than the first slope. Details will be described later.

[0048] The output unit 30 generates two PWM signals to be sent to the drive circuit 15 based on the input-side duty value Din and the output-side duty value Do output by the duty setting unit 29. The two PWM signals are composed of an input-side PWM signal corresponding to the drive signal supplied to the FET 111 and an output-side PWM signal corresponding to the drive signal supplied to the FET 114. The periods of the input-side PWM signal and the output-side PWM signal are defined as the period Ts by the timer counter 21. The duty ratios of the PWM signals within one period of the input-side PWM signal and the output-side PWM signal are defined according to the input-side duty value Din and the output-side duty value Do, respectively. In addition, the drive signal supplied to the FET 112 is a drive signal obtained by inverting the conduction and disconnection of the drive signal supplied to the FET 111, and the drive signal supplied to the FET 113 is a drive signal obtained by inverting the conduction and disconnection of the drive signal supplied to the FET 114.

[0049] Next, Figure 2 the operation of the control circuit 2 will be described.

[0050] Figure 2 is a flowchart showing an example of the operation of the control circuit 2 according to the embodiment. The processing shown in Figure 2 is executed for each period Ts of the PWM signal defined by the timer counter 21.

[0051] When startingFigure 2 In the case of the processing of, the A / D converters 221, 222, and 223 included in the control circuit 2 respectively detect the current value IL of the inductor 12, the voltage value Vin of the power supply 4, and the voltage value Vo of the load 5 (S11).

[0052] Next, the failure detection unit 25 determines whether the voltage value Vo satisfies the failure criterion based on the voltage value Vo of the load 5 (S12). When the voltage value Vo satisfies the failure criterion (Yes in S12), the failure detection unit 25 outputs a failure detection signal, and the threshold setting unit 26 sets the failure recovery current target value Ibackup as the reference for threshold setting (S13). The failure recovery current target value Ibackup is an example of the voltage recovery current value. When the voltage value Vo does not satisfy the failure criterion (No in S12), the failure detection unit 25 does not output a failure detection signal, and the threshold setting unit 26 sets the current target value Iref output by the voltage loop controller 24 as the reference for threshold setting (S14).

[0053] Next, the threshold setting unit 26 sets the current thresholds Imax and Imin above and below the failure recovery current target value Ibackup or the current target value Iref that is the reference for threshold setting, and outputs the current thresholds Imax and Imin to the subtractor 27 and the duty ratio setting unit 29 (S15).

[0054] Next, the mode switching unit 28 determines whether the absolute value of the current deviation Imin - IL between the current value IL of the inductor 12 detected by the A / D converter 221 and calculated by the subtractor 27 and the current threshold (for example, the current threshold Imin) output by the threshold setting unit 26 is equal to or greater than a specified value (S16). If the absolute value is equal to or greater than the specified value (Yes in S16), the mode switching unit 28 sets the operation mode signal to the transient response mode and outputs it to the duty ratio setting unit 29, and the duty ratio setting unit 29 calculates the input-side duty ratio value Din and the output-side duty ratio value Do in the transient response mode (S17). If the absolute value is less than the specified value (No in S16), the mode switching unit 28 sets the operation mode signal to the steady response mode and outputs it to the duty ratio setting unit 29, and the duty ratio setting unit 29 calculates the input-side duty ratio value Din and the output-side duty ratio value Do in the steady response mode (S18).

[0055] Next, the duty ratio setting unit 29 sets the calculated input-side duty ratio value Din and output-side duty ratio value Do as the duty ratio values for the next cycle (next period) to the output unit 30. The output unit 30 outputs a PWM signal in the next cycle based on these duty ratio values.

[0056] Next, the control circuit 2 uses the timer counter 21 to make the detections of the A / D converters 221 to 223 and subsequent control actions wait until the next action start time (S20). When the count value of the timer counter 21 does not match (compare match) the value equivalent to the period Ts (being "no" in S20), the control circuit 2 continues to wait. When there is a compare match (being "yes" in S20), the control circuit 2 resets the count value of the timer counter 21 (S21) and ends Figure 2 this process. Thus, the processing for one cycle of the PWM signal output from the control circuit 2 ends.

[0057] Next, regarding the operation of the threshold setting unit 26, the relationship between the voltage of the load 5 and the current thresholds Imax and Imin output by the threshold setting unit 26 is shown. Also, taking the case where the voltage to be supplied to the load 5 fails for some reason as an example, Figure 3 a timing diagram is used for explanation.

[0058] Figure 3 FIG. is a diagram for explaining the operation of the threshold setting unit 26 according to the embodiment.

[0059] Figure 3 In the two timing diagrams shown, the time axis t is set as the horizontal axis. The voltage of the load 5 is shown on the upper side, and the current of the inductor 12 is shown on the lower side. In the timing diagram of the voltage of the load 5, the voltage value Vo of the load 5, the voltage target value Vref, the recovery reference Vth1, and the failure reference Vth2 are shown. In Figure 3 the case shown, for example, the voltage target value Vref, the recovery reference Vth1, and the failure reference Vth2 are fixed values held inside the control circuit 2. Among them, it is assumed that Vref > Vth1 > Vth2. In the timing diagram of the current of the inductor 12, the current value IL of the inductor 12, the current target value Iref output by the voltage loop controller 24, the current thresholds Imax and Imin output by the threshold setting unit 26, and the current target value Ibackup for failure recovery are shown. In Figure 3 the case shown, it is assumed that the current target value Ibackup for failure recovery is a fixed value held inside the threshold setting unit 26, for example.

[0060] In Figure 3 the case shown, at time t = Tvth2, the voltage value Vo of the load 5 is lower than the failure reference Vth2. Also, at time t = Tvth1, the voltage value Vo of the load 5 exceeds the recovery reference Vth1.

[0061] The failure detection unit 25 detects a voltage failure of the load 5 at the current detection time t = nTs (n is an integer) of the A / D converter 223 immediately after the time t = Tvth2, and thus outputs a failure detection signal to the threshold setting unit 26. Further, when a voltage recovery of the load 5 is detected at the current detection time t = mTs (m is an integer larger than n) of the A / D converter 223 immediately after the time t = Tvth1, the failure detection signal output to the threshold setting unit 26 is canceled.

[0062] In normal times when no failure detection signal is output, the threshold setting unit 26 sets the current thresholds Imax and Imin above and below the current target value Iref output by the voltage loop controller 24, respectively. When a failure detection signal is output at the time t = nTs, the threshold setting unit 26 replaces the setting reference of the thresholds Imax and Imin after the time t = (n + 1)Ts from the current target value Iref with the current target value Ibackup for failure recovery. Further, when the failure detection signal is canceled at the time t = mTs, the threshold setting unit 26 replaces the setting reference of the thresholds Imax and Imin after the time t = (m + 1)Ts from the current target value Ibackup for failure recovery with the current target value Iref.

[0063] In addition, for example, if the voltage loop controller 24 is designed in a way that emphasizes stability, the value of the current target value Iref immediately after a voltage failure may be insufficient or may change too gently. Therefore, in order to recover the voltage failure more quickly, it is desirable to set the current target value Ibackup for failure recovery to a value sufficiently larger than the current target value Iref.

[0064] The duty setting unit 29 controls the current flowing through the inductor 12 by combining the ON and OFF states of the FETs 111 and 114. Here, Figure 4 is used to illustrate the combination of the ON and OFF states of the FETs 111 and 114.

[0065] Figure 4 is a diagram showing the relationship between the combination of the ON and OFF states of the FETs 111 and 114 and the slope of the change in current.

[0066] The correspondence between the increase and decrease speed dIL / dt of the current IL in the inductor 12 and the combination of the ON and OFF states of the FETs 111 and 114 is as Figure 4As shown in the table. When FET 111 is on and FET 114 is on, dIL / dt = (Vin - Vo) / L. When FET 111 is on and FET 114 is off, dIL / dt = Vin / L. When FET 111 is off and FET 114 is on, dIL / dt = -Vo / L. Further, L is the inductance of inductor 12.

[0067] The combination where FET 111 is on and FET 114 is off is an example of a first combination in which the current flowing through inductor 12 changes at a first slope. The combination where FET 111 is on and FET 114 is on is an example of a second combination in which the current flowing through inductor 12 changes at a second slope gentler than the first slope. The combination where FET 111 is off and FET 114 is on is an example of a third combination in which the current flowing through inductor 12 changes at a third slope with the opposite sign to the first slope and the second slope. The duty setting unit 29 sets the duty ratio of each of FETs 111 and 114 (in other words, the duty ratio of the PWM signals respectively supplied to FETs 111 and 114) by selecting the on and off combinations of FETs 111 and 114 from the first combination and the second combination. Further, an example is described below in which the first slope and the second slope are positive slopes and the third slope is a negative slope.

[0068] Next, Figures 5 to 9 is used to describe the relationship between the duty ratios of the PWM signals respectively supplied to FETs 111 and 114 and the current of inductor 12 in current loop control. In Figures 5 to 9 each of the three timing charts shown, the time axis t is taken as the horizontal axis, and the current of inductor 12, the PWM signal supplied to FET 111, and the PWM signal supplied to FET 114 are schematically shown in order from the top.

[0069] Figure 5 is a timing chart showing an example of the change in the current flowing through inductor 12 corresponding to the on and off of FETs 111 and 114.

[0070] In Figure 5 , the current detection value of inductor 12 detected by the A / D converter 221 at time t = (n - 1)Ts is denoted as IL n-1 , the input side duty value and the output side duty value set by the duty setting unit 29 from time t = (n - 1)Ts to t = nTs are denoted as Din n-1 and Do n-1 .

[0071] In addition, the current detection value of the inductor 12 detected by the A / D converter 221 at time t = nTs is denoted as IL n , the input-side duty value and the output-side duty value set by the duty setting unit 29 from time t = nTs to t = (n + 1)Ts are respectively denoted as Din n and Do n .

[0072] In addition, the current detection value of the inductor 12 detected by the A / D converter 221 at time t = (n + 1)Ts is denoted as IL n+1 , the input-side duty value and the output-side duty value set by the duty setting unit 29 from time t = (n + 1)Ts to t = (n + 2)Ts are respectively denoted as Din n+1 and Do n+1 .

[0073] In addition, the current detection value of the inductor 12 detected by the A / D converter 221 at time t = (n + 2)Ts is denoted as IL n+2 , the input-side duty value and the output-side duty value set by the duty setting unit 29 from time t = (n + 2)Ts to t = (n + 3)Ts are respectively denoted as Din n+2 and Do n+2 .

[0074] In addition, the current detection value of the inductor 12 detected by the A / D converter 221 at time t = (n + 3)Ts is denoted as IL n+3 , the input-side duty value and the output-side duty value set by the duty setting unit 29 from time t = (n + 3)Ts to t = (n + 4)Ts are respectively denoted as Din n+3 and Do n+3 . In addition, the current detection value of the inductor 12 detected by the A / D converter 221 at time t = (n + 4)Ts is denoted as IL n+4 .

[0075] Iref corresponds to the current target value Iref output by the voltage loop controller 24, and Imax and Imin correspond to the current thresholds Imax and Imin output by the threshold setting unit 26 based on the current target value Iref. In Figure 5 the shown case, it is assumed that the current target value Iref and the current thresholds Imax and Imin are switched to the current target value Iref′ (for example, the current target value Ibackup for failure recovery) and the current thresholds Imax′ and Imin′ at the time point of time t = (n + 1)Ts.

[0076] In Figure 5In the case shown, it is assumed that during the period from time t = (n + 1)Ts to time t = (n + 3)Ts, the mode switching unit 28 outputs an operation mode signal indicating the transition response mode, and during other periods, the mode switching unit 28 outputs an operation mode signal indicating the stable response mode. The transition response mode is a mode in which the current flowing through the inductor 12 changes at least at a first slope (a slope steeper than the second slope). In addition, in the transition response mode, the current flowing through the inductor 12 may also change at a slope combining the first slope and a second slope gentler than the first slope. In Figure 5 the case shown, during the period from time t = (n + 2)Ts to time t = (n + 3)Ts in the transition response mode, the current flowing through the inductor 12 changes at a slope combining the first slope and the second slope. The stable response mode is a mode in which the current flowing through the inductor 12 changes at the second slope. In addition, whether in the transition response mode or the stable response mode, in order to reduce the current, the current flowing through the inductor 12 changes at a third slope.

[0077] The duty ratio setting unit 29 sets the duty ratio values of the PWM signals respectively supplied to the FETs 111 and 114 so that the current value of the inductor 12 converges between the current thresholds Imax and Imin or between the current thresholds Imax' and Imin'. In the stable response mode, the duty ratio setting unit 29 sets the duty ratio value so that the combination of the on and off of the FET 111 and the on and off of the FET 114 (hereinafter also referred to as the switching mode) is the second combination in which the current of the inductor 12 increases or decreases most gently (for example, increases). That is, in the stable response mode, the duty ratio setting unit 29 sets the duty ratio value so that there is a period in which the FET 111 is on and the FET 114 is on. In addition, in the transition response mode, the duty ratio setting unit 29 sets the duty ratio value so that the switching mode is the first combination in which the current of the inductor 12 increases or decreases most rapidly (for example, increases). That is, in the transition response mode, the duty ratio setting unit 29 sets the duty ratio value so that there is a period in which the FET 111 is on and the FET 114 is off.

[0078] Among them, before the transition from the transition response mode to the stable response mode, the duty ratio setting unit 29 sets the duty ratio value according to the switching mode of the first combination that makes the current of the inductor 12 change most rapidly, and in a way that also combines the switching mode of the second combination that makes the current of the inductor 12 increase or decrease most gently, so that the current of the inductor 12 does not exceed the current threshold Imax'.

[0079] The threshold setting unit 26 is based on the fact that the current detection value of the inductor 12 is constant in the stable response mode, that is, the amplitude of the current fluctuation waveform of the inductor 12 in the stable state ( Figure 5Based on the assumed values of Iripple and Iripple' as shown, the calculation of the current thresholds Imax and Imin is implemented. Specifically, the threshold setting unit 26 defines the current thresholds Imax and Imin such that the interval between the two current thresholds, Imax - Imin, is consistent with the assumed Iripple, and the intervals between the two current thresholds and the current target value Iref, Imax - Iref and Iref - Imin, are equal. At this time, the current thresholds Imax and Imin can be defined as in the following equations (1) and (2). In addition, the calculation method of Iripple will be described later.

[0080] Imax = Iref + Iripple / 2…(1)

[0081] Imin = Iref - Iripple / 2…(2)

[0082] Next, Figures 6 to 9 the details of the duty ratio setting method performed by the threshold setting unit 26 and the duty setting unit 29 in the current loop control will be described.

[0083] Figures 6 to 9 is a timing chart showing the first to fourth examples of the duty ratio setting method of the PWM signal in the embodiment.

[0084] In Figures 6 to 9 it is shown that: the input - side PWM signal switches from on to off within one cycle (when Din > 0), and the output - side PWM signal switches from off to on within one cycle (when Do > 0). In addition, the switching order of on and off within one cycle shown in the first to fourth examples is just one example, and there is no limitation on the switching order of on and off of the input - side PWM signal and the output - side PWM signal. Also, the phases of the input - side PWM signal and the output - side PWM signal may not necessarily be the same.

[0085] In Figures 6 to 9 the operation example shown, the control circuit 2 detects the current IL of the inductor 12 (hereinafter referred to as IL n ) at the time point of t = nTs, and determines the duty values of the input - side and output - side PWM signals for the period from t = (n + 1)Ts to t = (n + 2)Ts (hereinafter referred to as Din n+1 and Do n+1 ) respectively. This is because it is impossible in reality for the control circuit 2 to instantaneously calculate and set the duty values Din n and Do n for the period from t = nTs to t = (n + 1)Ts at the moment when IL n is detected. In addition, Dinn and Do n has been set during the period from time t=(n - 1)Ts to t=nTs.

[0086] In Figures 6 to 9 In the illustrated operation example, the period from time t=(n - 1)Ts to time t=nTs is set as the (n - 1)th period, the period from time t=nTs to time t=(n + 1)Ts is set as the nth period, the period from time t=(n + 1)Ts to time t=(n + 2)Ts is set as the (n + 1)th period, and the period from time t=(n + 2)Ts to time t=(n + 3)Ts is set as the (n + 2)th period.

[0087] In Figures 6 to 9 In the illustrated operation example, the current IL of the inductor 12 increases and decreases at a constant speed according to the voltage Vin of the power supply 4 and the voltage Vo of the load 5. Here, it is assumed that the voltage Vin of the power supply 4 and the voltage Vo of the load 5 change sufficiently smoothly with respect to the current IL of the inductor 12 and are assumed to be constant in the figure.

[0088] In Figures 6 to 9 In the illustrated operation example, the current thresholds Imax and Imin output by the threshold setting unit 26 are set based on the input voltage value Vin detected by the A / D converter 222, the output voltage value Vo detected by the A / D converter 223, and the current target value Iref output by the voltage loop controller 24. In addition, as described above, when the failure detection unit 25 outputs a failure detection signal, the failure recovery current target value Ibackup is used instead of the current target value Iref.

[0089] In Figure 6 , as a first example of the duty ratio setting method, the operation when the mode switching unit 28 outputs an operation mode signal indicating the stable response mode is shown. Here, in Figure 6 , as an example, the following case is shown: the voltage Vin of the power supply 4 and the voltage Vo of the load 5 satisfy Vin>Vo>0.

[0090] In the stable response mode, the duty setting unit 29 sets the input-side duty value Din and the output-side duty value Do such that the current IL of the inductor 12 increases and decreases in the switching mode of the second combination with the lowest absolute value of the current increase and decrease rate, that is, the most gentle increase and decrease. When Vin > Vo > 0, the switching mode that makes the current of the inductor 12 increase most gently is when FET 111 is turned on and FET 114 is turned on, and the current increase rate is dIL / dt = (Vin - Vo) / L. The switching mode that makes the current of the inductor 12 decrease gently is when FET 111 is turned off and FET 114 is turned on, and the current increase rate is dIL / dt = -Vo / L. In Figure 6 In the first example shown, FET 114 is always turned on, that is, the output-side duty value Do is always set to 1.

[0091] In Figure 6 In the case of the switching mode shown, at the start time point of the nth cycle, that is, at the time point t = nTs, the detected value IL of the current of the inductor 12 at the start time point of the (n + 2)th cycle, that is, at the time point t = (n + 2)Ts, can be predicted by the following formula (3). n+2 .

[0092] IL n+2 = ⅠL n + Vin × Ts × Din n+1 / L + Vin × Ts × Din n / L - 2 × Vo × Ts / L…(3)

[0093] The input-side duty value Din n+1 is set so that IL n+2 is consistent with the current threshold Imin (specified current value). Regarding Din n+2 of the (n + 1)th cycle output by the duty setting unit 29 and being consistent with Imin, the prediction formula (3) can be used to calculate as the following formula (4). n+1

[0094] Din n+1 = L × (Imin - IL n ) / (Ts × Vin) - Din n + 2 × Vo / Vin…(4)

[0095] In addition, the operation of calculating and setting Din n+1 so that IL n+2 is consistent with Imin is an example of the operation of the duty setting unit 29. For example, when Vo > Vin > 0, Din can be always set to 1, and Do can be calculated and set in the same way. n+1In addition, when the switching order of turning on and off the PWM signals on the input side and the output side is reversed, the peaks and valleys of the waveform are also reversed. Therefore, in this case, it is necessary to make IL n+2 not coincide with Imin but instead coincide with Imax.

[0096] In addition, by extending equations (3) and (4) in the future direction, it is also possible to calculate and set Din n+1 to Din n+m-1 so that IL n+m (where m is an integer of 3 or more) coincides with Imin.

[0097] Before the operation of the duty setting unit 29, the threshold setting unit 26 assumes the operation in the stable response mode and sets the current thresholds Imax and Imin based on the amplitude Iripple of the current fluctuation waveform of the inductor 12 as in equations (1) and (2). When Vin > Vo > 0, when the duty setting unit 29 controls to make the current of the inductor 12 increase and decrease most smoothly, that is, when the current increases at a current increase rate of dIL / dt = (Vin - Vo) / L for a time Din n ×Ts and the current decreases at a current decrease rate of dIL / dt = -Vo / L for a time (1 - Din n )×Ts, when IL n = IL n+1 (steady state), the input-side duty value Din n is set to Vo / Vin, and the output-side duty value Do n is set to 1. The fluctuation amplitude Iripple of the current of the inductor 12 at this time can be calculated as shown in the following equation (5).

[0098] Iripple = (Vin - Vo)×Vo×Ts / (L×Vin)…(5)

[0099] In addition, when Vo > Vin > 0, Iripple can be calculated using the equation obtained by swapping Vin and Vo in equation (5).

[0100] In Figure 7 , as the second example of the duty ratio setting method, the operation in the following case is shown: Since the current target value is instantaneously switched to Iref' that is far from Iref, etc., the difference between IL n and the current threshold changes significantly, and the operation mode signal output by the mode switching unit 28 changes from the stable response mode to the transient response mode. Among them, Figure 7 shows the following case: Even when the current of the inductor 12 is increased to the maximum, IL n+2Nor will it reach Imin′. In addition, in Figure 7 the following situation is shown as an example: the voltage Vin of the power supply 4 and the voltage Vo of the load 5 satisfy Vin > Vo > 0.

[0101] In the transition response mode, the duty setting unit 29 performs the setting of the input-side duty value Din and the output-side duty value Do so that the current IL of the inductor 12 increases and decreases in the switching mode of the first combination with the highest absolute value of the current increase and decrease speed, that is, the most rapid one. When Vin > Vo > 0, the switching mode that makes the current of the inductor 12 increase most rapidly is when the FET 111 is turned on and the FET 114 is turned off, and the current increase speed is dIL / dt = Vin / L. The switching mode that makes the current of the inductor 12 decrease is when the FET 111 is turned off and the FET 114 is turned on, and the current increase speed is dIL / dt = -Vo / L. At this time, during the period from the time t = (n + 1)Ts to t = (n + 2)Ts, the on and off of the FET 114 are opposite to the on and off of the FET 111, and the output-side duty value Do n+1 is specified according to the input-side duty value Din n+1 as Do n+1 = 1 - Din n+1 .

[0102] In Figure 7 the case of the switching mode shown, at the start time point of the nth cycle, that is, at the time point t = nTs, the detected value IL of the current of the inductor 12 at the start time point of the (n + 2)th cycle, that is, at the time point t = (n + 2)Ts, can be predicted by the following formula (6). n+2 .

[0103] IL n+2 = IL n+1 + (Vin + Vo) × Ts × Din n+1 / L - Vo × Ts / L…(6)

[0104] Among them, regarding IL in the prediction formula (6) n+1 , a value appropriately predicted based on the relationship between the switching mode and the current increase speed and according to the values of IL n , Din n and Do n is used.

[0105] The setting of the input-side duty value Din n+1 and the output-side duty value Do n+1 is performed so that IL n+2 is consistent with the current threshold Imin (prescribed current value). Regarding IL output by the duty setting unit 29 n+2The Din of the (n + 1)-th cycle that is consistent with Imin n+1 , the predictive formula (6) can be used to calculate Din as shown in the following formula (7). n+1 = L×(Imin - ⅠL n+1 ) / (Ts×(Vin + Vo)) + Vo / (Vin + Vo)…(7)

[0106] However, in the Figure 7 shown case, even if the input-side duty ratio Din n+1 is set to the maximum value 1 to maximize the current of the inductor 12, IL n+2 will not reach Imin. In this case, the input-side duty ratio Din n+1 is set to 1, and the output-side duty ratio Do n+1 is set to 0.

[0107] In Figure 8 , as the third example of the duty ratio setting method, the operation in the following case is shown: assuming that IL n+2 exceeds Imin when the current of the inductor 12 is maximized during the operation in the transient response mode. Among them, in Figure 8 , the following case is shown as an example: the voltage Vin of the power supply 4 and the voltage Vo of the load 5 satisfy Vin > Vo > 0.

[0108] At this time, the input-side duty ratio Din n+1 and the output-side duty ratio Do n+1 can be calculated and set according to the relationship of formula (4) and Do n+1 = 1 - Din n+1 .

[0109] Let the peak value of the current IL of the inductor 12 from time t = (n + 1)Ts to t = (n + 2)Ts be Ipeak. Regarding Figure 8 the Ipeak in the shown case, it can be predicted as shown in the following formula (8) based on the input-side duty ratio Din n+1 already calculated by the duty ratio setting unit 29.

[0110] Ipeak = IL n+1 + Vin×Ts×Din n+1 / L…(8)

[0111] In Figure 9 , the duty ratio setting method in the case where Ipeak predicted by formula (8) exceeds Imax due to the operation in the transient response mode based on formula (7) is shown. Among them, in Figure 9In this case, the following situation is shown as an example: the voltage Vin of the power supply 4 and the voltage Vo of the load 5 satisfy Vin > Vo > 0.

[0112] The duty setting unit 29 combines the switching pattern of the first combination that causes the current of the inductor 12 to change sharply within one cycle with the switching pattern of the second combination that causes the current of the inductor 12 to change gently, to prevent Ipeak from exceeding Imax. In Figure 9 the operation of the fourth example of the duty ratio setting method shown, a time when FET 111 is on and FET 114 is off and a time when FET 111 is off and FET 114 is on are provided with a time when FET 111 is on and FET 114 is on.

[0113] Regarding Figure 9 Ipeak in the case shown, it can be predicted as in the following formula (9).

[0114] Ipeak = IL n+1 + (Vin - Vo) × Ts × Din n+1 / L - Vo × Ts × (1 - Din n+1 ) / L…(9)

[0115] In addition, at the start time point of the nth cycle, that is, at the time point t = nTs, the detected value IL of the current of the inductor 12 at the start time point of the (n + 2)th cycle, that is, at the time point t = (n + 2)Ts, can be predicted by the following formula (10) n+2 .

[0116] IL n+2 = Ipeak - Vo × Ts × (1 - Din n+1 ) / L…(10)

[0117] Set the input - side duty value Din n+1 and the output - side duty value Do n+1 so that Ipeak coincides with Imax and IL n+2 coincides with Imin. Based on formula (9) and formula (10), and formulas (1), (2) and (5) related to the threshold and the fluctuation range, Din n+1 and Do n+1 can be calculated as in formulas (11) and (12).

[0118] Din n+1 = Vo / Vin…(11)

[0119] Do n+1 = (IL n+1 - Imax) × L / (Vo × Ts) + 2 - Vo / Vin…(12)

[0120] As shown in the first to fourth examples, the duty setting unit 29 sets the duty ratios of the FETs 111 and 114 by selecting the combination of on and off states of the FETs 111 and 114 from the first combination and the second combination, so that the current flowing through the inductor 12 becomes a specified current value (for example, the current threshold Imin). Here, in the first combination, the current flowing through the inductor 12 changes at a first slope, and in the second combination, the current flowing through the inductor 12 changes at a second slope that is gentler than the first slope.

[0121] For example, the duty setting unit 29 may also, within the n-th cycle of the repetitive switching cycles of the FETs 111 and 114, set the duty ratios of the FETs 111 and 114 from the (n + 1)-th cycle to the (n + x - 1)-th cycle (x is an integer of 2 or more) by selecting the combination of on and off states of the respective FETs 111 and 114 from the first combination and the second combination, so that the current flowing through the inductor 12 in the (n + x)-th cycle becomes a specified current value. When x is 2, the duty setting unit 29 may also, within the n-th cycle of the repetitive switching cycles of the FETs 111 and 114, set the duty ratios of the FETs 111 and 114 in the (n + 1)-th cycle by selecting the combination of on and off states of the respective FETs 111 and 114 from the first combination and the second combination, so that the current flowing through the inductor 12 in the (n + 2)-th cycle becomes a specified current value.

[0122] In addition, in the fourth example, the duty setting unit 29 sets the duty ratios of the FETs 111 and 114 in such a way that the combination of on and off states of the respective FETs 111 and 114 becomes the second combination after becoming the first combination. This is because if the current is allowed to continuously change only at the steep slope based on the first combination within one switching cycle, the current flowing through the inductor 12 may exceed the current threshold Imax within one switching cycle. Therefore, in such a case, the current is first changed sharply by the first combination, and then changed gently by the second combination.

[0123] As described above, when the difference between the current threshold value Imin and the current detection value IL is equal to or greater than a specified value, the control circuit 2 operates the converter 1 in a switching mode that is the first combination that causes the current of the inductor 12 to change most rapidly as a transient response mode. Further, when the difference between the current threshold value Imin and the current detection value IL is less than the specified value, the control circuit 2 operates the converter 1 in a switching mode that is the second combination that causes the current of the inductor 12 to change most gently as a steady response mode. Thereby, it is possible to balance rapidly approaching a distant target value Iref with the current value of the inductor 12 and, thereafter, accurately following the target value Iref with the current value of the inductor 12.

[0124] Further, when the voltage of the load 5 is lower than the failure reference voltage, the control circuit 2 switches the calculation reference values of the current threshold values Imax and Imin from the current target value Iref output by the voltage loop controller 24 to the current target value Ibackup for failure recovery. Thereby, for example, even when the voltage loop controller 24 is designed to emphasize stability and the value of the output current target value Iref changes too gently, it is possible to immediately pass a current through the inductor 12 sufficient to rapidly recover from a voltage failure.

[0125] (Other Embodiments)

[0126] As described above, embodiments have been described as examples of the technology related to the present disclosure. However, the technology related to the present disclosure is not limited thereto, and can also be applied to embodiments that have been appropriately changed, replaced, added, omitted, etc. For example, modification examples such as the following are also included in one embodiment of the present disclosure.

[0127] For example, in the above embodiment, as an example of the circuit controlled by the control circuit 2, the converter 1 is shown, but the circuit controlled by the control circuit 2 may be any circuit including at least two switching elements and is not limited to the converter 1.

[0128] For example, in the above-described embodiment, as combinations of turning on and off of each of at least two switching elements, a first combination in which the current flowing through the circuit changes at a first slope and a second combination in which the current flowing through the circuit changes at a second slope gentler than the first slope are described. However, there may also be combinations other than the first combination and the second combination. For example, in addition to the first combination and the second combination, there may be one or more of the following combinations: the current flowing through the circuit changes at a slope gentler than the first slope and steeper than the second slope. Further, in a case where there are combinations other than the first combination and the second combination as combinations of turning on and off of each of at least two switching elements, the first slope based on the first combination is the steepest slope among the slopes based on each combination, and the second slope based on the second combination is the gentlest slope among the slopes based on each combination.

[0129] For example, in the above-described embodiment, the following example is described: when the failure detection unit 25 detects a failure, the threshold setting unit 26 sets two current thresholds not based on the current target value but instead based on a current value for voltage recovery prepared in advance. However, it is not limited thereto. For example, various current target values may be prepared in advance according to the state of the load 5, and the threshold setting unit 26 may also set two current thresholds based on the current target value corresponding to the state of the load 5. For example, it may be that when the load 5 changes to a state that requires a large current, the threshold setting unit 26 sets two current thresholds based on the current target value corresponding to this state.

[0130] For example, in the above-described embodiment, an example in which the control circuit 2 includes a failure detection unit 25, a threshold setting unit 26, and a mode switching unit 28 is described. However, the control circuit 2 may not include the failure detection unit 25, the threshold setting unit 26, or the mode switching unit 28.

[0131] For example, the present disclosure can be implemented not only as the control circuit 2 but also as a power conversion device including the converter 1 and the control circuit 2.

[0132] For example, the present disclosure can be implemented not only as the control circuit 2 but also as a control method of the control circuit 2 including steps (processes) performed by the components constituting the control circuit 2.

[0133] The control method is a method executed by the control circuit 2 that controls a circuit including at least two switching elements, and the control method is as Figure 2includes the following steps as shown: a duty setting step (S17) of setting a duty ratio of at least two switching elements by selecting a combination of turning on and off of each of at least two switching elements from a first combination and a second combination so that a current flowing in a circuit becomes a specified current value, wherein, in the first combination, the current flowing in the circuit changes at a first slope, and in the second combination, the current flowing in the circuit changes at a second slope gentler than the first slope; and an output step (S19) of outputting a signal corresponding to the set duty ratio.

[0134] For example, the steps in the control method may also be executed by a computer (computer system). Moreover, the present disclosure can be implemented as a program for causing a computer to execute the steps included in the control method.

[0135] Furthermore, the present disclosure can be implemented as a non-transitory computer-readable recording medium such as a CD-ROM on which the program is recorded.

[0136] For example, in the case where the present disclosure is implemented by a program (software), the program is executed by using hardware resources such as a CPU, a memory, and an input / output circuit of a computer. That is, each step is executed by the CPU obtaining data from a memory or an input / output circuit or the like and performing arithmetic operations, or outputting an arithmetic result to a memory or an input / output circuit or the like.

[0137] In addition, each component included in the control circuit 2 of the above-described embodiment may also be implemented as a dedicated or general-purpose circuit.

[0138] In addition, each component included in the control circuit 2 of the above-described embodiment may also be implemented as an LSI (Large Scale Integration) as an integrated circuit (IC: Integrated Circuit).

[0139] In addition, the integrated circuit is not limited to an LSI, and may also be implemented by a dedicated circuit or a general-purpose processor. An FPGA (Field Programmable Gate Array) that can be programmed, or a reconfigurable processor in which the connection and setting of circuit units inside an LSI can be reconfigured may also be used.

[0140] Moreover, if an integrated circuit technology capable of replacing an LSI appears due to the progress of semiconductor technology or other derived technologies, it is of course possible to use such a technology to integrate each component included in the control circuit 2.

[0141] In addition, modes obtained by applying various modifications that occur to those skilled in the art to the embodiments, and modes achieved by arbitrarily combining the constituent elements and functions in each embodiment within the scope not departing from the gist of the present disclosure are also included in the present disclosure.

[0142] (Supplementary Note)

[0143] Based on the description of the above embodiments, the following technologies are disclosed.

[0144] (Technology 1) A control circuit that controls a circuit including at least two switching elements, the control circuit including: a duty ratio setting unit that sets the duty ratio of each of the at least two switching elements by selecting a combination of on and off states of each of the at least two switching elements from a first combination and a second combination, such that the current flowing through the circuit becomes a specified current value, wherein, in the first combination, the current flowing through the circuit changes at a first slope, and in the second combination, the current flowing through the circuit changes at a second slope that is gentler than the first slope; and an output unit that outputs a signal corresponding to the set duty ratio.

[0145] Thereby, it is possible to set the duty ratio of each of the at least two switching elements so that the current changes at two slopes, a steep slope and a gentle slope. Therefore, current control can be performed at high speed by changing the current at a steep slope. In addition, by combining the two slopes to change the current, current control can be performed with high precision. Thus, current control can be performed at high speed and with high precision.

[0146] (Technology 2) The control circuit according to Technology 1, wherein the duty ratio setting unit, within the n-th cycle of the repeated switching cycles of the at least two switching elements, sets the duty ratio of each of the at least two switching elements from the (n + 1)-th cycle to the (n + x - 1)-th cycle by selecting a combination of on and off states of each of the at least two switching elements from the first combination and the second combination, such that the current flowing through the circuit in the (n + x)-th cycle becomes the specified current value, where n is an integer and x is an integer of 2 or more.

[0147] Thereby, in order to control the current in the (n + x)-th cycle, the duty ratio of each of the at least two switching elements from the (n + 1)-th cycle to the (n + x - 1)-th cycle is set within the n-th cycle. Therefore, there is sufficient margin in processing time, and current control can be performed with higher precision.

[0148] (Technique 3) The control circuit according to Technique 2, wherein, in the n-th cycle of the repeated switching cycles of the at least two switching elements, the duty ratio setting unit sets the duty ratio of each of the at least two switching elements in the (n + 1)-th cycle by selecting the combination of turning on and off of each of the at least two switching elements from the first combination and the second combination, so that the current flowing in the circuit in the (n + 2)-th cycle becomes the specified current value.

[0149] Thus, in order to control the current in the (n + 2)-th cycle, the duty ratio of each of the at least two switching elements in the (n + 1)-th cycle is set in the n-th cycle. Therefore, there is sufficient margin in processing time, and current control can be performed with higher precision.

[0150] (Technique 4) The control circuit according to any one of Techniques 1 to 3, further comprising a threshold setting unit that sets two current thresholds, and the specified current value is one of the two current thresholds.

[0151] Thus, current control can be performed at high speed and with high precision so that the current flowing in the circuit becomes one of the two current thresholds (for example, the maximum current value and the minimum current value in the fluctuation range of the current).

[0152] (Technique 5) The control circuit according to Technique 4, wherein the threshold setting unit sets the two current thresholds based on the current target value of the current flowing in the circuit specified by the supply voltage from the circuit to the load.

[0153] Thus, the two current thresholds can be set according to the current target value specified to make the supply voltage to the load the target voltage. For example, the maximum current value and the minimum current value can be set such that the current target value becomes the intermediate value.

[0154] (Technique 6) The control circuit according to Technique 5, further comprising a failure detection unit that detects a failure of the supply voltage. When the failure detection unit detects the failure, the threshold setting unit does not set the two current thresholds based on the current target value, but instead sets the two current thresholds based on a current value for voltage recovery prepared in advance.

[0155] Thus, when a failure of the supply voltage is detected, the two current thresholds can be quickly set based on the current value for voltage recovery prepared in advance, and the current flowing in the circuit can be quickly changed to the specified current value that is one of the two current thresholds. Therefore, the failed voltage can be quickly restored.

[0156] (Technology 7) The control circuit according to any one of Technologies 1 to 6, wherein the duty ratio setting unit sets the duty ratios of the at least two switching elements in such a manner that the combination of the on and off states of each of the at least two switching elements becomes the second combination after becoming the first combination.

[0157] If the current is made to continuously change only with a steep slope based on the first combination within one switching cycle, there may be a case where the current flowing in the circuit exceeds the maximum current value or the minimum current value of the fluctuation range within one switching cycle. Therefore, in such a case, first, the current is sharply changed by the first combination, and then the current is gently changed by the second combination. Thereby, it is possible to suppress the current flowing in the circuit from exceeding the maximum current value or the minimum current value of the fluctuation range within one switching cycle, and it is possible to change the current flowing in the circuit to a specified current value at high speed.

[0158] (Technology 8) The control circuit according to any one of Technologies 1 to 7, further comprising a mode switching unit that switches between a transient response mode and a steady response mode based on the current flowing in the circuit and the specified current value, wherein in the transient response mode, the current flowing in the circuit is changed at least at the first slope, and in the steady response mode, the current flowing in the circuit is changed at the second slope.

[0159] Thereby, when the difference between the current flowing in the circuit and the specified current value is large, it is possible to change the current flowing in the circuit to the specified current value at high speed by the transient response mode. On the other hand, when the difference between the current flowing in the circuit and the specified current value is small, since there is little necessity to change the current flowing in the circuit at high speed, it is possible to change the current flowing in the circuit to the specified current value gently by the steady response mode.

[0160] (Technology 9) The control circuit according to any one of Technologies 1 to 7, wherein the circuit is a circuit included in a power conversion device, and the current flowing in the circuit is the current flowing in an inductor for power conversion.

[0161] Thereby, it is possible to perform current control of the current flowing in the inductor in the power conversion device at high speed and with high precision.

[0162] (Technology 10) A power conversion device, comprising: the control circuit according to any one of Technologies 1 to 9; and the circuit.

[0163] Thereby, it is possible to provide a power conversion device capable of performing current control at high speed and with high precision.

[0164] (Technology 11) A control method is executed by a control circuit. The control circuit controls a circuit including at least two switching elements. The control method includes the following steps: a duty ratio setting step of setting the duty ratio of each of the at least two switching elements by selecting a combination of turning on and off of each of the at least two switching elements from a first combination and a second combination, such that the current flowing in the circuit becomes a specified current value, wherein, under the first combination, the current flowing in the circuit changes at a first slope, and under the second combination, the current flowing in the circuit changes at a second slope that is gentler than the first slope; and an output step of outputting a signal corresponding to the set duty ratio.

[0165] Accordingly, a control method capable of performing current control at high speed and with high precision can be provided.

[0166] (Technology 12) A program for causing a computer to execute the control method according to Technology 11.

[0167] Accordingly, a program capable of performing current control at high speed and with high precision can be provided.

[0168] Industrial applicability

[0169] The present disclosure can be applied to a power conversion device and the like.

[0170] Explanation of reference numerals

[0171] 1: Converter; 2: Control circuit; 4: Power supply; 5: Load; 12: Inductor; 13: Smoothing capacitor; 14: Current sensor; 15: Drive circuit; 21: Timing counter; 23, 27: Subtractor; 24: Voltage loop controller; 25: Failure detection unit; 26: Threshold setting unit; 28: Mode switching unit; 29: Duty ratio setting unit; 30: Output unit; 111, 112, 113, 114: FET; 221, 222, 223: A / D converter.

Claims

1. A control circuit for controlling a circuit including at least two switching elements, the control circuit comprising: A duty ratio setting unit that sets the duty ratio of each of the at least two switching elements by selecting a combination of turning on and off of each of the at least two switching elements from a first combination and a second combination, so that the current flowing in the circuit becomes a specified current value, where In the first combination, the current flowing in the circuit changes at a first slope, and in the second combination, the current flowing in the circuit changes at a second slope that is gentler than the first slope; And An output unit that outputs a signal corresponding to a set duty ratio.

2. The control circuit according to claim 1, wherein The duty ratio setting unit selects, in the n-th cycle of the repeated switching cycles of the at least two switching elements, a combination of turning on and off of each of the at least two switching elements from the first combination and the second combination, to set the duty ratio of each of the at least two switching elements from the (n + 1)-th cycle to the (n + x - 1)-th cycle, such that the current flowing in the circuit in the (n + x)-th cycle becomes the specified current value, where n is an integer and x is an integer of 2 or more.

3. The control circuit according to claim 2, wherein The duty ratio setting unit selects, in the n-th cycle of the repeated switching cycles of the at least two switching elements, a combination of turning on and off of each of the at least two switching elements from the first combination and the second combination, to set the duty ratio of each of the at least two switching elements in the (n + 1)-th cycle, such that the current flowing in the circuit in the (n + 2)-th cycle becomes the specified current value.

4. The control circuit according to any one of claims 1 to 3, wherein It further includes a threshold setting unit that sets two current thresholds, The specified current value is one of the two current thresholds.

5. The control circuit according to claim 4, wherein The threshold setting unit sets the two current thresholds based on a current target value of the current flowing in the circuit specified by the supply voltage from the circuit to the load.

6. The control circuit according to claim 5, wherein It further includes a failure detection unit that detects a failure of the supply voltage, When the failure detection unit detects the failure, the threshold setting unit does not use the current target value as a reference, but instead uses a current value for voltage recovery prepared in advance as a reference to set the two current thresholds.

7. The control circuit according to any one of claims 1 to 3, wherein The duty ratio setting unit sets the duty ratio of each of the at least two switching elements in such a manner that the combination of turning on and off of each of the at least two switching elements becomes the second combination after becoming the first combination.

8. The control circuit according to any one of claims 1 to 3, wherein It also has a mode switching unit, and the mode switching unit switches between a transient response mode and a steady response mode based on the current flowing in the circuit and the specified current value. In the transient response mode, the current flowing in the circuit changes at least at the first slope, and in the steady response mode, the current flowing in the circuit changes at the second slope.

9. The control circuit according to any one of claims 1 to 3, wherein the circuit is a circuit included in a power conversion device, the current flowing in the circuit is the current flowing in an inductor for power conversion.

10. A power conversion device, comprising: the control circuit according to any one of claims 1 to 3; and the circuit.

11. A control method, executed by a control circuit that controls a circuit including at least two switching elements, the control method including the following steps: A duty ratio setting step of setting the duty ratio of each of the at least two switching elements by selecting a combination of turning on and off of each of the at least two switching elements from a first combination and a second combination so that the current flowing in the circuit becomes a specified current value. In the first combination, the current flowing in the circuit changes at a first slope, and in the second combination, the current flowing in the circuit changes at a second slope that is gentler than the first slope; and An output step of outputting a signal corresponding to the set duty ratio.

12. A program for causing a computer to execute the control method according to claim 11.

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